arch/arm/src/lpc54xx: Add register level debug output for Ethernet testing. Fixed a few start up problems. Still hangs on start-up, however.

This commit is contained in:
Gregory Nutt
2017-12-31 11:11:57 -06:00
parent 63c055e1ee
commit b2adb4917f
10 changed files with 240 additions and 100 deletions
-2
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@@ -254,11 +254,9 @@ struct lpc43_dev_s
#ifdef CONFIG_LPC43_SDMMC_REGDEBUG
static uint32_t lpc43_getreg(uint32_t addr);
static void lpc43_putreg(uint32_t val, uint32_t addr);
static void lpc43_checksetup(void);
#else
# define lpc43_getreg(addr) getreg32(addr)
# define lpc43_putreg(val,addr) putreg32(val,addr)
# define lpc43_checksetup()
#endif
/* Low-level helpers ********************************************************/
+7
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@@ -862,6 +862,13 @@ config LPC54_ETH_NTXDESC1
NOTE: Each Rx descriptor will require a transmit buffer at the size
of the configured MTU.
config LPC54_ETH_REGDEBUG
bool "Register level debug"
default n
depends on DEBUG_NET_INFO
---help---
Output detailed register-level Ethernet debug information.
endmenu # Ethernet configuration
menu "SD/MMC Configuration"
File diff suppressed because it is too large Load Diff
-2
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@@ -258,11 +258,9 @@ struct lpc54_dev_s
#ifdef CONFIG_LPC54_SDMMC_REGDEBUG
static uint32_t lpc54_getreg(uint32_t addr);
static void lpc54_putreg(uint32_t val, uint32_t addr);
static void lpc54_checksetup(void);
#else
# define lpc54_getreg(addr) getreg32(addr)
# define lpc54_putreg(val,addr) putreg32(val,addr)
# define lpc54_checksetup()
#endif
/* Low-level helpers ********************************************************/
+1 -1
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@@ -393,7 +393,7 @@ void xmc4_clock_configure(void)
/* Setup peripheral clock divider */
putreg32(PBCLKCR_VALUE, XMC4_SCU_PBCLKCR);
putreg32(PBCLKCR_VALUE, XMC4_SCU_PBCLKCR);
/* Setup fCPU clock */
+5
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@@ -237,6 +237,11 @@ Configurations
3. SDRAM support is enabled and the SDRAM is added to the system heap. The
Ramtest applications is not enabled.
4. This configuration does not include support for aysnchronous network
initialization. As a consequence, NSH must bring up the network
before you get the NSH prompt. If the network cable is unplugged,
this can mean a significant delay before you see the prompt.
nsh:
Configures the NuttShell (nsh) application located at examples/nsh.
+1 -1
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@@ -22,6 +22,7 @@ CONFIG_INPUT=y
CONFIG_LPC54_EMC_DYNAMIC_CS0_SIZE=0x01000000
CONFIG_LPC54_EMC_DYNAMIC_CS0=y
CONFIG_LPC54_EMC=y
CONFIG_LPC54_ETH_PHYADDR=0
CONFIG_LPC54_ETHERNET=y
CONFIG_LPC54_GPIOIRQ=y
CONFIG_LPC54_USART0=y
@@ -47,7 +48,6 @@ CONFIG_NFILE_DESCRIPTORS=8
CONFIG_NFILE_STREAMS=8
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_DISABLE_IFUPDOWN=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_LINELEN=64
CONFIG_NSH_NETLOCAL=y
+1 -1
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@@ -104,7 +104,7 @@
/* Select the external crystal as the PLL clock source */
# define BOARD_PLL_CLOCKSRC_XTAL 1 /* PLL Clock source == extnernal crystal */
# define BOARD_PLL_CLOCKSRC_XTAL 1 /* PLL Clock source == external crystal */
# undef BOARD_PLL_CLOCKSRC_OFI /* PLL Clock source != internal fast oscillator */
/* PLL Configuration:
+15 -5
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@@ -351,13 +351,23 @@
#define MII_PHYID1_LAN8720 0x0007 /* ID1 value for LAN8720 */
#define MII_PHYID2_LAN8720 0xc0f1 /* ID2 value for LAN8720 */
/* SMSC LAN8720 SPCR register bits */
/* SMSC LAN8720 SPSCR register bits */
#define MII_LAN8720_SPSCR_10MBPS (1 << 2) /* Bit 2: 10MBPS speed */
#define MII_LAN8720_SPSCR_100MBPS (1 << 3) /* Bit 3: 100MBPS speed */
#define MII_LAN8720_SPSCR_DUPLEX (1 << 4) /* Bit 4: Duplex mode */
#define MII_LAN8720_SPSCR_MODEMASK 0x1c /* Mode/speed mask */
#define MII_LAN8720_SPSCR_SCRMDIS (1 << 0) /* Bit 0: Scramble disable */
/* Bit 1: Reserved */
#define MII_LAN8720_SPSCR_MODE_SHIFT (2) /* Bits 2-4: Speed/duplex mode */
#define MII_LAN8720_SPSCR_MODE_MASK (7 << MII_LAN8720_SPSCR_MODE_SHIFT)
# define MII_LAN8720_SPSCR_10MBPS (1 << 2) /* Bit 2: 10MBPS speed */
# define MII_LAN8720_SPSCR_100MBPS (1 << 3) /* Bit 3: 100MBPS speed */
# define MII_LAN8720_SPSCR_DUPLEX (1 << 4) /* Bit 4: Full duplex mode */
/* Bit 5: Reserved */
#define MII_LAN8720_SPSCR_ENAB4B5B (1 << 6) /* Bit 6: Enable 4B5B */
#define MII_LAN8720_SPSCR_GPIO0 (1 << 7) /* Bit 7: GPIO0 */
#define MII_LAN8720_SPSCR_GPIO1 (1 << 8) /* Bit 8: GPIO1 */
#define MII_LAN8720_SPSCR_GPIO2 (1 << 9) /* Bit 9: GPIO2 */
/* Bit 10-11: Reserved */
#define MII_LAN8720_SPSCR_ANEGDONE (1 << 12) /* Bit 12: Autonegotiation complete */
/* Bits 13-15: Reserved */
/* SMSC LAN8740 MII ID1/2 register bits */
+3 -1
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@@ -39,6 +39,8 @@
#include <nuttx/config.h>
#include <errno.h>
#include <nuttx/irq.h>
#include "irq/irq.h"
@@ -59,7 +61,7 @@
int irq_attach(int irq, xcpt_t isr, FAR void *arg)
{
#if NR_IRQS > 0
int ret = ERROR;
int ret = -EINVAL;
if ((unsigned)irq < NR_IRQS)
{