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arch/arm/src/lpc54xx: Add register level debug output for Ethernet testing. Fixed a few start up problems. Still hangs on start-up, however.
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@@ -254,11 +254,9 @@ struct lpc43_dev_s
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#ifdef CONFIG_LPC43_SDMMC_REGDEBUG
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static uint32_t lpc43_getreg(uint32_t addr);
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static void lpc43_putreg(uint32_t val, uint32_t addr);
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static void lpc43_checksetup(void);
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#else
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# define lpc43_getreg(addr) getreg32(addr)
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# define lpc43_putreg(val,addr) putreg32(val,addr)
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# define lpc43_checksetup()
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#endif
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/* Low-level helpers ********************************************************/
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@@ -862,6 +862,13 @@ config LPC54_ETH_NTXDESC1
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NOTE: Each Rx descriptor will require a transmit buffer at the size
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of the configured MTU.
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config LPC54_ETH_REGDEBUG
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bool "Register level debug"
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default n
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depends on DEBUG_NET_INFO
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---help---
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Output detailed register-level Ethernet debug information.
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endmenu # Ethernet configuration
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menu "SD/MMC Configuration"
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File diff suppressed because it is too large
Load Diff
@@ -258,11 +258,9 @@ struct lpc54_dev_s
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#ifdef CONFIG_LPC54_SDMMC_REGDEBUG
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static uint32_t lpc54_getreg(uint32_t addr);
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static void lpc54_putreg(uint32_t val, uint32_t addr);
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static void lpc54_checksetup(void);
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#else
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# define lpc54_getreg(addr) getreg32(addr)
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# define lpc54_putreg(val,addr) putreg32(val,addr)
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# define lpc54_checksetup()
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#endif
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/* Low-level helpers ********************************************************/
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@@ -393,7 +393,7 @@ void xmc4_clock_configure(void)
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/* Setup peripheral clock divider */
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putreg32(PBCLKCR_VALUE, XMC4_SCU_PBCLKCR);
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putreg32(PBCLKCR_VALUE, XMC4_SCU_PBCLKCR);
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/* Setup fCPU clock */
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@@ -237,6 +237,11 @@ Configurations
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3. SDRAM support is enabled and the SDRAM is added to the system heap. The
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Ramtest applications is not enabled.
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4. This configuration does not include support for aysnchronous network
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initialization. As a consequence, NSH must bring up the network
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before you get the NSH prompt. If the network cable is unplugged,
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this can mean a significant delay before you see the prompt.
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nsh:
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Configures the NuttShell (nsh) application located at examples/nsh.
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@@ -22,6 +22,7 @@ CONFIG_INPUT=y
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CONFIG_LPC54_EMC_DYNAMIC_CS0_SIZE=0x01000000
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CONFIG_LPC54_EMC_DYNAMIC_CS0=y
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CONFIG_LPC54_EMC=y
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CONFIG_LPC54_ETH_PHYADDR=0
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CONFIG_LPC54_ETHERNET=y
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CONFIG_LPC54_GPIOIRQ=y
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CONFIG_LPC54_USART0=y
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@@ -47,7 +48,6 @@ CONFIG_NFILE_DESCRIPTORS=8
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CONFIG_NFILE_STREAMS=8
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CONFIG_NSH_ARCHINIT=y
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CONFIG_NSH_BUILTIN_APPS=y
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CONFIG_NSH_DISABLE_IFUPDOWN=y
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CONFIG_NSH_FILEIOSIZE=512
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CONFIG_NSH_LINELEN=64
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CONFIG_NSH_NETLOCAL=y
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@@ -104,7 +104,7 @@
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/* Select the external crystal as the PLL clock source */
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# define BOARD_PLL_CLOCKSRC_XTAL 1 /* PLL Clock source == extnernal crystal */
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# define BOARD_PLL_CLOCKSRC_XTAL 1 /* PLL Clock source == external crystal */
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# undef BOARD_PLL_CLOCKSRC_OFI /* PLL Clock source != internal fast oscillator */
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/* PLL Configuration:
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+15
-5
@@ -351,13 +351,23 @@
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#define MII_PHYID1_LAN8720 0x0007 /* ID1 value for LAN8720 */
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#define MII_PHYID2_LAN8720 0xc0f1 /* ID2 value for LAN8720 */
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/* SMSC LAN8720 SPCR register bits */
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/* SMSC LAN8720 SPSCR register bits */
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#define MII_LAN8720_SPSCR_10MBPS (1 << 2) /* Bit 2: 10MBPS speed */
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#define MII_LAN8720_SPSCR_100MBPS (1 << 3) /* Bit 3: 100MBPS speed */
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#define MII_LAN8720_SPSCR_DUPLEX (1 << 4) /* Bit 4: Duplex mode */
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#define MII_LAN8720_SPSCR_MODEMASK 0x1c /* Mode/speed mask */
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#define MII_LAN8720_SPSCR_SCRMDIS (1 << 0) /* Bit 0: Scramble disable */
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/* Bit 1: Reserved */
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#define MII_LAN8720_SPSCR_MODE_SHIFT (2) /* Bits 2-4: Speed/duplex mode */
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#define MII_LAN8720_SPSCR_MODE_MASK (7 << MII_LAN8720_SPSCR_MODE_SHIFT)
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# define MII_LAN8720_SPSCR_10MBPS (1 << 2) /* Bit 2: 10MBPS speed */
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# define MII_LAN8720_SPSCR_100MBPS (1 << 3) /* Bit 3: 100MBPS speed */
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# define MII_LAN8720_SPSCR_DUPLEX (1 << 4) /* Bit 4: Full duplex mode */
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/* Bit 5: Reserved */
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#define MII_LAN8720_SPSCR_ENAB4B5B (1 << 6) /* Bit 6: Enable 4B5B */
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#define MII_LAN8720_SPSCR_GPIO0 (1 << 7) /* Bit 7: GPIO0 */
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#define MII_LAN8720_SPSCR_GPIO1 (1 << 8) /* Bit 8: GPIO1 */
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#define MII_LAN8720_SPSCR_GPIO2 (1 << 9) /* Bit 9: GPIO2 */
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/* Bit 10-11: Reserved */
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#define MII_LAN8720_SPSCR_ANEGDONE (1 << 12) /* Bit 12: Autonegotiation complete */
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/* Bits 13-15: Reserved */
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/* SMSC LAN8740 MII ID1/2 register bits */
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@@ -39,6 +39,8 @@
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#include <nuttx/config.h>
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#include <errno.h>
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#include <nuttx/irq.h>
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#include "irq/irq.h"
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@@ -59,7 +61,7 @@
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int irq_attach(int irq, xcpt_t isr, FAR void *arg)
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{
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#if NR_IRQS > 0
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int ret = ERROR;
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int ret = -EINVAL;
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if ((unsigned)irq < NR_IRQS)
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{
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