Eliminated sam3u_internal.h. Use separate header files instead. More renaming from sam3u_ to sam_ to make room in the namespce for the sam4l_

ChangeLog

@@ -4852,6 +4852,9 @@
 	  Tiny.  From Laurent Latil (2013-6-01).
 	* configs/sam3u-ek:  All remaining configurations changed to use
 	  the kconfig-frontends tools (2013-6-2).
-	* arch/arm/src/sam3u/chip:  All SAM3U register defintion files moved
+	* arch/arm/src/sam3u/chip:  All SAM3U register definition files moved
 	  to this subdirectory.  Naming of registers changed from SAM3U_ to
 	  just SAM_.  This is in preparation for a SAM4L port (2013-6-2).
+	* arch/arm/src/sam3u:  Renamed files to sam_* vs. sam3u_*.
+	  Eliminated sam3u_internal.h; instead uses individual header
+	  files for each SAM interface block (2013-6-2).

arch/arm/src/sam3u/Make.defs

@@ -35,7 +35,7 @@
 
 # The start-up, "head", file
 
-HEAD_ASRC = sam3u_vectors.S
+HEAD_ASRC = sam_vectors.S
 
 # Common ARM and Cortex-M3 files
 
@@ -77,24 +77,24 @@ endif
 # Required SAM3/4 files
 
 CHIP_ASRCS  =
-CHIP_CSRCS  = sam3u_allocateheap.c sam3u_clockconfig.c sam3u_gpioirq.c
+CHIP_CSRCS  = sam_allocateheap.c sam_clockconfig.c sam_gpioirq.c
-CHIP_CSRCS += sam3u_irq.c sam3u_lowputc.c sam3u_pio.c sam3u_serial.c
+CHIP_CSRCS += sam_irq.c sam_lowputc.c sam_gpio.c sam_serial.c
-CHIP_CSRCS += sam3u_start.c sam3u_timerisr.c
+CHIP_CSRCS += sam_start.c sam_timerisr.c
 
 # Configuration-dependent SAM3/4 files
 
 ifeq ($(CONFIG_NUTTX_KERNEL),y)
-CHIP_CSRCS += sam3u_userspace.c sam3u_mpuinit.c
+CHIP_CSRCS += sam_userspace.c sam_mpuinit.c
 endif
 
 ifeq ($(CONFIG_SAM34_DMA),y)
-CHIP_CSRCS += sam3u_dmac.c
+CHIP_CSRCS += sam_dmac.c
 endif
 
 ifeq ($(CONFIG_SAM34_HSMCI),y)
-CHIP_CSRCS += sam3u_hsmci.c
+CHIP_CSRCS += sam_hsmci.c
 endif
 
 ifeq ($(CONFIG_SAM34_SPI),y)
-CHIP_CSRCS += sam3u_spi.c
+CHIP_CSRCS += sam_spi.c
 endif

arch/arm/src/sam3u/chip/sam3u_pinmap.h

@@ -0,0 +1,223 @@
+/************************************************************************************
+ * arch/arm/src/sam3u/chip/sam3u_pinmap.h
+ *
+ *   Copyright (C) 2009-2011, 2013 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <gnutt@nuttx.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_SAM3U_CHIP_SAM3U_PINMAP_H
+#define __ARCH_ARM_SRC_SAM3U_CHIP_SAM3U_PINMAP_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+
+#include "chip.h"
+#include "sam_gpio.h"
+
+/************************************************************************************
+ * Definitions
+ ************************************************************************************/
+
+/* GPIO pin definitions *************************************************************/
+
+#define GPIO_ADC0_AD0       (GPIO_INPUT|GPIO_CFG_DEFAULT|GPIO_PORT_PIOA|GPIO_PIN21)
+#define GPIO_ADC0_AD1       (GPIO_INPUT|GPIO_CFG_DEFAULT|GPIO_PORT_PIOA|GPIO_PIN30)
+#define GPIO_ADC0_AD2       (GPIO_INPUT|GPIO_CFG_DEFAULT|GPIO_PORT_PIOB|GPIO_PIN3)
+#define GPIO_ADC0_AD3       (GPIO_INPUT|GPIO_CFG_DEFAULT|GPIO_PORT_PIOB|GPIO_PIN4)
+#define GPIO_ADC0_AD4       (GPIO_INPUT|GPIO_CFG_DEFAULT|GPIO_PORT_PIOC|GPIO_PIN15)
+#define GPIO_ADC0_AD5       (GPIO_INPUT|GPIO_CFG_DEFAULT|GPIO_PORT_PIOC|GPIO_PIN16)
+#define GPIO_ADC0_AD6       (GPIO_INPUT|GPIO_CFG_DEFAULT|GPIO_PORT_PIOC|GPIO_PIN17)
+#define GPIO_ADC0_AD7       (GPIO_INPUT|GPIO_CFG_DEFAULT|GPIO_PORT_PIOC|GPIO_PIN18)
+
+#define GPIO_CAN_XCVR_RS    (GPIO_OUTPUT|GPIO_CFG_DEFAULT|GPIO_PORT_PIOA|GPIO_OUTPUT_SET|GPIO_PIN23)
+#define GPIO_CAN1_XCVR_TXD  (GPIO_PERIPHA|GPIO_CFG_DEFAULT|GPIO_PORT_PIOA|GPIO_PIN27)
+#define GPIO_CAN1_XCVR_RXD  (GPIO_PERIPHA|GPIO_CFG_DEFAULT|GPIO_PORT_PIOA|GPIO_PIN26)
+#define GPIO_CAN2_XCVR_TXD  (GPIO_PERIPHA|GPIO_CFG_DEFAULT|GPIO_PORT_PIOA|GPIO_PIN29)
+#define GPIO_CAN2_XCVR_RXD  (GPIO_PERIPHA|GPIO_CFG_DEFAULT|GPIO_PORT_PIOA|GPIO_PIN28)
+
+#define GPIO_SMC_D0         (GPIO_PERIPHA|GPIO_CFG_PULLUP|GPIO_PORT_PIOB|{GPIO_PIN9)  /* Check! */
+#define GPIO_SMC_D1         (GPIO_PERIPHA|GPIO_CFG_PULLUP|GPIO_PORT_PIOB|{GPIO_PIN10) /* Check! */
+#define GPIO_SMC_D2         (GPIO_PERIPHA|GPIO_CFG_PULLUP|GPIO_PORT_PIOB|{GPIO_PIN11) /* Check! */
+#define GPIO_SMC_D3         (GPIO_PERIPHA|GPIO_CFG_PULLUP|GPIO_PORT_PIOB|{GPIO_PIN12) /* Check! */
+#define GPIO_SMC_D4         (GPIO_PERIPHA|GPIO_CFG_PULLUP|GPIO_PORT_PIOB|{GPIO_PIN13) /* Check! */
+#define GPIO_SMC_D5         (GPIO_PERIPHA|GPIO_CFG_PULLUP|GPIO_PORT_PIOB|{GPIO_PIN14) /* Check! */
+#define GPIO_SMC_D6         (GPIO_PERIPHA|GPIO_CFG_PULLUP|GPIO_PORT_PIOB|{GPIO_PIN15) /* Check! */
+#define GPIO_SMC_D7         (GPIO_PERIPHA|GPIO_CFG_PULLUP|GPIO_PORT_PIOB|{GPIO_PIN16) /* Check! */
+#define GPIO_SMC_D8         (GPIO_PERIPHA|GPIO_CFG_PULLUP|GPIO_PORT_PIOB|{GPIO_PIN25) /* Check! */
+#define GPIO_SMC_D9         (GPIO_PERIPHA|GPIO_CFG_PULLUP|GPIO_PORT_PIOB|{GPIO_PIN26) /* Check! */
+#define GPIO_SMC_D10        (GPIO_PERIPHA|GPIO_CFG_PULLUP|GPIO_PORT_PIOB|{GPIO_PIN27) /* Check! */
+#define GPIO_SMC_D11        (GPIO_PERIPHA|GPIO_CFG_PULLUP|GPIO_PORT_PIOB|{GPIO_PIN28) /* Check! */
+#define GPIO_SMC_D12        (GPIO_PERIPHA|GPIO_CFG_PULLUP|GPIO_PORT_PIOB|{GPIO_PIN29) /* Check! */
+#define GPIO_SMC_D13        (GPIO_PERIPHA|GPIO_CFG_PULLUP|GPIO_PORT_PIOB|{GPIO_PIN30) /* Check! */
+#define GPIO_SMC_D14        (GPIO_PERIPHA|GPIO_CFG_PULLUP|GPIO_PORT_PIOB|{GPIO_PIN31) /* Check! */
+#define GPIO_SMC_D15        (GPIO_PERIPHB|GPIO_CFG_PULLUP|GPIO_PORT_PIOB|GPIO_PIN6)   /* Check! */
+#define GPIO_SMC_NCS0       (GPIO_PERIPHA|GPIO_CFG_PULLUP|GPIO_PORT_PIOB|GPIO_PIN20)
+#define GPIO_SMC_NRD        (GPIO_PERIPHA|GPIO_CFG_PULLUP|GPIO_PORT_PIOB|GPIO_PIN19)
+#define GPIO_SMC_NWE        (GPIO_PERIPHA|GPIO_CFG_PULLUP|GPIO_PORT_PIOB|GPIO_PIN23)
+#define GPIO_SMC_PSRAM_A0   (GPIO_PERIPHA|GPIO_CFG_PULLUP|GPIO_PORT_PIOC|{GPIO_PIN0)  /* Check! */
+#define GPIO_SMC_PSRAM_A1   (GPIO_PERIPHA|GPIO_CFG_PULLUP|GPIO_PORT_PIOC|{GPIO_PIN1)  /* Check! */
+#define GPIO_SMC_PSRAM_A2   (GPIO_PERIPHA|GPIO_CFG_PULLUP|GPIO_PORT_PIOC|{GPIO_PIN2)  /* Check! */
+#define GPIO_SMC_PSRAM_A3   (GPIO_PERIPHA|GPIO_CFG_PULLUP|GPIO_PORT_PIOC|{GPIO_PIN3)  /* Check! */
+#define GPIO_SMC_PSRAM_A4   (GPIO_PERIPHA|GPIO_CFG_PULLUP|GPIO_PORT_PIOC|{GPIO_PIN4)  /* Check! */
+#define GPIO_SMC_PSRAM_A5   (GPIO_PERIPHA|GPIO_CFG_PULLUP|GPIO_PORT_PIOC|{GPIO_PIN5)  /* Check! */
+#define GPIO_SMC_PSRAM_A6   (GPIO_PERIPHA|GPIO_CFG_PULLUP|GPIO_PORT_PIOC|{GPIO_PIN6)  /* Check! */
+#define GPIO_SMC_PSRAM_A7   (GPIO_PERIPHA|GPIO_CFG_PULLUP|GPIO_PORT_PIOC|{GPIO_PIN7)  /* Check! */
+#define GPIO_SMC_PSRAM_A8   (GPIO_PERIPHA|GPIO_CFG_PULLUP|GPIO_PORT_PIOC|{GPIO_PIN8)  /* Check! */
+#define GPIO_SMC_PSRAM_A9   (GPIO_PERIPHA|GPIO_CFG_PULLUP|GPIO_PORT_PIOC|{GPIO_PIN9)  /* Check! */
+#define GPIO_SMC_PSRAM_A10  (GPIO_PERIPHA|GPIO_CFG_PULLUP|GPIO_PORT_PIOC|{GPIO_PIN10) /* Check! */
+#define GPIO_SMC_PSRAM_A11  (GPIO_PERIPHA|GPIO_CFG_PULLUP|GPIO_PORT_PIOC|{GPIO_PIN11) /* Check! */
+#define GPIO_SMC_PSRAM_A12  (GPIO_PERIPHA|GPIO_CFG_PULLUP|GPIO_PORT_PIOC|{GPIO_PIN24) /* Check! */
+#define GPIO_SMC_PSRAM_A13  (GPIO_PERIPHA|GPIO_CFG_PULLUP|GPIO_PORT_PIOC|{GPIO_PIN25) /* Check! */
+#define GPIO_SMC_PSRAM_A14  (GPIO_PERIPHA|GPIO_CFG_PULLUP|GPIO_PORT_PIOC|{GPIO_PIN26) /* Check! */
+#define GPIO_SMC_PSRAM_A15  (GPIO_PERIPHA|GPIO_CFG_PULLUP|GPIO_PORT_PIOC|{GPIO_PIN27) /* Check! */
+#define GPIO_SMC_PSRAM_A16  (GPIO_PERIPHA|GPIO_CFG_PULLUP|GPIO_PORT_PIOC|{GPIO_PIN27) /* Check! */
+#define GPIO_SMC_PSRAM_A17  (GPIO_PERIPHA|GPIO_CFG_PULLUP|GPIO_PORT_PIOC|{GPIO_PIN28) /* Check! */
+#define GPIO_SMC_PSRAM_A18  (GPIO_PERIPHA|GPIO_CFG_PULLUP|GPIO_PORT_PIOC|{GPIO_PIN29) /* Check! */
+#define GPIO_SMC_PSRAM_NBS0 (GPIO_PERIPHB|GPIO_CFG_PULLUP|GPIO_PORT_PIOB|GPIO_PIN7)   /* Check! */
+#define GPIO_SMC_PSRAM_NBS1 (GPIO_PERIPHA|GPIO_CFG_PULLUP|GPIO_PORT_PIOC|GPIO_PIN15)
+#define GPIO_SMC_A1         (GPIO_PERIPHB|GPIO_CFG_PULLUP|GPIO_PORT_PIOB|GPIO_PIN8)
+#define GPIO_SMC_NCS2       (GPIO_PERIPHA|GPIO_CFG_PULLUP|GPIO_PORT_PIOC|GPIO_PIN16)
+#define GPIO_SMC_LCD_RS     (GPIO_PERIPHB|GPIO_CFG_PULLUP|GPIO_PORT_PIOB|GPIO_PIN8)
+
+#define GPIO_MCI_DAT0       (GPIO_PERIPHA|GPIO_CFG_PULLUP|GPIO_PORT_PIOA|GPIO_PIN5)
+#define GPIO_MCI_DAT1       (GPIO_PERIPHA|GPIO_CFG_PULLUP|GPIO_PORT_PIOA|GPIO_PIN6)
+#define GPIO_MCI_DAT2       (GPIO_PERIPHA|GPIO_CFG_PULLUP|GPIO_PORT_PIOA|GPIO_PIN7)
+#define GPIO_MCI_DAT3       (GPIO_PERIPHA|GPIO_CFG_PULLUP|GPIO_PORT_PIOA|GPIO_PIN8)
+#define GPIO_MCI_DAT4       (GPIO_PERIPHA|GPIO_CFG_PULLUP|GPIO_PORT_PIOB|GPIO_PIN28)
+#define GPIO_MCI_DAT5       (GPIO_PERIPHA|GPIO_CFG_PULLUP|GPIO_PORT_PIOB|GPIO_PIN29)
+#define GPIO_MCI_DAT6       (GPIO_PERIPHA|GPIO_CFG_PULLUP|GPIO_PORT_PIOB|GPIO_PIN30)
+#define GPIO_MCI_DAT7       (GPIO_PERIPHA|GPIO_CFG_PULLUP|GPIO_PORT_PIOB|GPIO_PIN31)
+#define GPIO_MCI_CK         (GPIO_PERIPHA|GPIO_CFG_DEFAULT|GPIO_PORT_PIOA|GPIO_PIN3)
+#define GPIO_MCI_DA         (GPIO_PERIPHA|GPIO_CFG_PULLUP|GPIO_PORT_PIOA|GPIO_PIN4)
+#define GPIO_MCI_DAT0IN     (GPIO_INPUT|GPIO_CFG_PULLUP|GPIO_PORT_PIOA|GPIO_PIN5)
+
+#define GPIO_PWMC_PWMH0     (GPIO_PERIPHA|GPIO_CFG_DEFAULT|GPIO_PORT_PIOB|GPIO_PIN0)
+#define GPIO_PWMC_PWML0     (GPIO_PERIPHB|GPIO_CFG_DEFAULT|GPIO_PORT_PIOA|GPIO_PIN7)
+#define GPIO_PWMC_PWMH1     (GPIO_PERIPHA|GPIO_CFG_DEFAULT|GPIO_PORT_PIOB|GPIO_PIN1)
+#define GPIO_PWMC_PWML1     (GPIO_PERIPHB|GPIO_CFG_DEFAULT|GPIO_PORT_PIOA|GPIO_PIN8)
+#define GPIO_PWMC_PWMH2     (GPIO_PERIPHA|GPIO_CFG_DEFAULT|GPIO_PORT_PIOB|GPIO_PIN2)
+#define GPIO_PWMC_PWML2     (GPIO_PERIPHB|GPIO_CFG_DEFAULT|GPIO_PORT_PIOA|GPIO_PIN9)
+
+#define GPIO_SPI0_MISO      (GPIO_PERIPHA|GPIO_CFG_DEFAULT|GPIO_PORT_PIOA|GPIO_PIN13)
+#define GPIO_SPI0_MOSI      (GPIO_PERIPHA|GPIO_CFG_DEFAULT|GPIO_PORT_PIOA|GPIO_PIN14)
+#define GPIO_SPI0_SPCK      (GPIO_PERIPHA|GPIO_CFG_DEFAULT|GPIO_PORT_PIOA|GPIO_PIN15)
+#define GPIO_SPI0_NPCS0     (GPIO_PERIPHA|GPIO_CFG_DEFAULT|GPIO_PORT_PIOA|GPIO_PIN16)
+
+#define GPIO_SPI0_NPCS1_1   (GPIO_PERIPHB|GPIO_CFG_DEFAULT|GPIO_PORT_PIOA|GPIO_PIN0)
+#define GPIO_SPI0_NPCS1_2   (GPIO_PERIPHB|GPIO_CFG_DEFAULT|GPIO_PORT_PIOC|GPIO_PIN3)
+#define GPIO_SPI0_NPCS1_3   (GPIO_PERIPHB|GPIO_CFG_DEFAULT|GPIO_PORT_PIOC|GPIO_PIN19)
+#define GPIO_SPI0_NPCS2_1   (GPIO_PERIPHB|GPIO_CFG_DEFAULT|GPIO_PORT_PIOA|GPIO_PIN1)
+#define GPIO_SPI0_NPCS2_2   (GPIO_PERIPHB|GPIO_CFG_DEFAULT|GPIO_PORT_PIOC|GPIO_PIN4)
+#define GPIO_SPI0_NPCS2_3   (GPIO_PERIPHB|GPIO_CFG_DEFAULT|GPIO_PORT_PIOC|GPIO_PIN14)
+#define GPIO_SPI0_NPCS3_1   (GPIO_PERIPHB|GPIO_CFG_DEFAULT|GPIO_PORT_PIOA|GPIO_PIN19)
+#define GPIO_SPI0_NPCS3_2   (GPIO_PERIPHB|GPIO_CFG_DEFAULT|GPIO_PORT_PIOC|GPIO_PIN5)
+
+#define GPIO_SSC_TD         (GPIO_PERIPHA|GPIO_CFG_DEFAULT|GPIO_PORT_PIOA|GPIO_PIN26)
+#define GPIO_SSC_TK         (GPIO_PERIPHA|GPIO_CFG_DEFAULT|GPIO_PORT_PIOA|GPIO_PIN28)
+#define GPIO_SSC_TF         (GPIO_PERIPHA|GPIO_CFG_DEFAULT|GPIO_PORT_PIOA|GPIO_PIN30)
+
+#define GPIO_PCK0           (GPIO_PERIPHB|GPIO_CFG_DEFAULT|GPIO_PORT_PIOA|GPIO_PIN21)
+
+#define GPIO_TWI_TWD0       (GPIO_PERIPHA|GPIO_CFG_DEFAULT|GPIO_PORT_PIOA|GPIO_PIN9)
+#define GPIO_TWI_TWCK0      (GPIO_PERIPHA|GPIO_CFG_DEFAULT|GPIO_PORT_PIOA|GPIO_PIN10)
+#define GPIO_TWI_TWD1       (GPIO_PERIPHA|GPIO_CFG_DEFAULT|GPIO_PORT_PIOA|GPIO_PIN24)
+#define GPIO_TWI_TWCK1      (GPIO_PERIPHA|GPIO_CFG_DEFAULT|GPIO_PORT_PIOA|GPIO_PIN25)
+
+#define GPIO_UART_TXD       (GPIO_PERIPHA|GPIO_CFG_DEFAULT|GPIO_PORT_PIOA|GPIO_PIN12)
+#define GPIO_UART_RXD       (GPIO_PERIPHA|GPIO_CFG_DEFAULT|GPIO_PORT_PIOA|GPIO_PIN11)
+
+#define GPIO_USART0_CTS     (GPIO_PERIPHA|GPIO_CFG_DEFAULT|GPIO_PORT_PIOB|GPIO_PIN8)
+#define GPIO_USART0_DCD     (GPIO_PERIPHB|GPIO_CFG_DEFAULT|GPIO_PORT_PIOB|GPIO_PIN11)
+#define GPIO_USART0_DSR     (GPIO_PERIPHB|GPIO_CFG_DEFAULT|GPIO_PORT_PIOB|GPIO_PIN10)
+#define GPIO_USART0_DTR     (GPIO_PERIPHB|GPIO_CFG_DEFAULT|GPIO_PORT_PIOB|GPIO_PIN9)
+#define GPIO_USART0_RI      (GPIO_PERIPHB|GPIO_CFG_DEFAULT|GPIO_PORT_PIOB|GPIO_PIN12)
+#define GPIO_USART0_RTS     (GPIO_PERIPHA|GPIO_CFG_DEFAULT|GPIO_PORT_PIOB|GPIO_PIN7)
+#define GPIO_USART0_RXD     (GPIO_PERIPHA|GPIO_CFG_DEFAULT|GPIO_PORT_PIOA|GPIO_PIN19)
+#define GPIO_USART0_SCK     (GPIO_PERIPHA|GPIO_CFG_DEFAULT|GPIO_PORT_PIOA|GPIO_PIN17)
+#define GPIO_USART0_TXD     (GPIO_PERIPHA|GPIO_CFG_DEFAULT|GPIO_PORT_PIOA|GPIO_PIN18)
+
+#define GPIO_USART1_CTS     (GPIO_PERIPHB|GPIO_CFG_DEFAULT|GPIO_PORT_PIOA|GPIO_PIN23)
+#define GPIO_USART1_RTS     (GPIO_PERIPHB|GPIO_CFG_DEFAULT|GPIO_PORT_PIOA|GPIO_PIN22)
+#define GPIO_USART1_RXD     (GPIO_PERIPHA|GPIO_CFG_DEFAULT|GPIO_PORT_PIOA|GPIO_PIN21)
+#define GPIO_USART1_SCK     (GPIO_PERIPHB|GPIO_CFG_DEFAULT|GPIO_PORT_PIOA|GPIO_PIN24)
+#define GPIO_USART1_TXD     (GPIO_PERIPHA|GPIO_CFG_DEFAULT|GPIO_PORT_PIOA|GPIO_PIN20)
+
+#define GPIO_USART2_CTS     (GPIO_PERIPHB|GPIO_CFG_DEFAULT|GPIO_PORT_PIOB|GPIO_PIN22)
+#define GPIO_USART2_RTS     (GPIO_PERIPHB|GPIO_CFG_DEFAULT|GPIO_PORT_PIOB|GPIO_PIN21)
+#define GPIO_USART2_RXD     (GPIO_PERIPHA|GPIO_CFG_DEFAULT|GPIO_PORT_PIOA|GPIO_PIN23)
+#define GPIO_USART2_SCK     (GPIO_PERIPHB|GPIO_CFG_DEFAULT|GPIO_PORT_PIOA|GPIO_PIN25)
+#define GPIO_USART2_TXD     (GPIO_PERIPHA|GPIO_CFG_DEFAULT|GPIO_PORT_PIOA|GPIO_PIN22)
+
+#define GPIO_USART3_CTS     (GPIO_PERIPHB|GPIO_CFG_DEFAULT|GPIO_PORT_PIOC|GPIO_PIN10)
+#define GPIO_USART3_RTS     (GPIO_PERIPHB|GPIO_CFG_DEFAULT|GPIO_PORT_PIOC|GPIO_PIN11)
+#define GPIO_USART3_RXD     (GPIO_PERIPHB|GPIO_CFG_DEFAULT|GPIO_PORT_PIOC|GPIO_PIN13)
+#define GPIO_USART3_SCK     (GPIO_PERIPHA|GPIO_CFG_DEFAULT|GPIO_PORT_PIOC|GPIO_PIN19)
+#define GPIO_USART3_TXD     (GPIO_PERIPHB|GPIO_CFG_DEFAULT|GPIO_PORT_PIOC|GPIO_PIN12)
+
+#define GPIO_USB_VBUS       (GPIO_INPUT|GPIO_CFG_DEFAULT|GPIO_PORT_PIOA|GPIO_PIN0)
+
+/************************************************************************************
+ * Public Types
+ ************************************************************************************/
+
+/************************************************************************************
+ * Inline Functions
+ ************************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/************************************************************************************
+ * Public Function Prototypes
+ ************************************************************************************/
+
+#undef EXTERN
+#if defined(__cplusplus)
+}
+#endif
+
+#endif /* __ASSEMBLY__ */
+#endif /* __ARCH_ARM_SRC_SAM3U_CHIP_SAM3U_PINMAP_H */

arch/arm/src/sam3u/chip/sam3u_vectors.h

@@ -0,0 +1,90 @@
+/************************************************************************************************
+ * arch/arm/src/sam3u/chip/sam3u_vectors.h
+ *
+ *   Copyright (C) 2009-2010, 2013 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <gnutt@nuttx.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************************/
+
+/************************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************************/
+/* This file is included by sam_vectors.S.  It provides the macro VECTOR that
+ * supplies ach SAM3U vector in terms of a (lower-case) ISR label and an
+ * (upper-case) IRQ number as defined in arch/arm/include/sam/sam3u_irq.h.
+ * sam_vectors.S will defined the VECTOR in different ways in order to generate
+ * the interrupt vectors and handlers in their final form.
+ *
+ *
+ * Vectors for low and medium density devices
+ */
+
+/* If the common ARMv7-M vector handling is used, then all it needs is the following
+ * definition that provides the number of supported vectors.
+ */
+
+#ifdef CONFIG_ARMV7M_CMNVECTOR
+
+/* Reserve 46 interrupt table entries for I/O interrupts. */
+
+# define ARMV7M_PERIPHERAL_INTERRUPTS 46
+
+#else
+  VECTOR(sam_supc, SAM_IRQ_SUPC)      /* Vector 16+0:  Supply Controller */
+  VECTOR(sam_rstc, SAM_IRQ_RSTC)      /* Vector 16+1:  Reset Controller */
+  VECTOR(sam_rtc, SAM_IRQ_RTC)        /* Vector 16+2:  Real Time Clock */
+  VECTOR(sam_rtt, SAM_IRQ_RTT)        /* Vector 16+3:  Real Time Timer */
+  VECTOR(sam_wdt, SAM_IRQ_WDT)        /* Vector 16+4:  Watchdog Timer */
+  VECTOR(sam_pmc, SAM_IRQ_PMC)        /* Vector 16+5:  Power Management Controller */
+  VECTOR(sam_eefc0, SAM_IRQ_EEFC0)    /* Vector 16+6:  Enhanced Embedded Flash Controller 0 */
+  VECTOR(sam_eefc1, SAM_IRQ_EEFC1)    /* Vector 16+7:  Enhanced Embedded Flash Controller 1 */
+  VECTOR(sam_uart, SAM_IRQ_UART)      /* Vector 16+8:  Universal Asynchronous Receiver Transmitter */
+  VECTOR(sam_smc, SAM_IRQ_SMC)        /* Vector 16+9:  Static Memory Controller */
+  VECTOR(sam_pioa, SAM_IRQ_PIOA)      /* Vector 16+10: Parallel I/O Controller A */
+  VECTOR(sam_piob, SAM_IRQ_PIOB)      /* Vector 16+11: Parallel I/O Controller B */
+  VECTOR(sam_pioc, SAM_IRQ_PIOC)      /* Vector 16+12: Parallel I/O Controller C */
+  VECTOR(sam_usart0, SAM_IRQ_USART0)  /* Vector 16+13: USART 0 */
+  VECTOR(sam_usart1, SAM_IRQ_USART1)  /* Vector 16+14: USART 1 */
+  VECTOR(sam_usart2, SAM_IRQ_USART2)  /* Vector 16+15: USART 2 */
+  VECTOR(sam_usart3, SAM_IRQ_USART3)  /* Vector 16+16: USART 3 */
+  VECTOR(sam_hsmci, SAM_IRQ_HSMCI)    /* Vector 16+17: High Speed Multimedia Card Interface */
+  VECTOR(sam_twi0, SAM_IRQ_TWI0)      /* Vector 16+18: Two-Wire Interface 0 */
+  VECTOR(sam_twi1, SAM_IRQ_TWI1)      /* Vector 16+19: Two-Wire Interface 1 */
+  VECTOR(sam_spi, SAM_IRQ_SPI)        /* Vector 16+20: Serial Peripheral Interface */
+  VECTOR(sam_ssc, SAM_IRQ_SSC)        /* Vector 16+21: Synchronous Serial Controller */
+  VECTOR(sam_tc0, SAM_IRQ_TC0)        /* Vector 16+22: Timer Counter 0 */
+  VECTOR(sam_tc1, SAM_IRQ_TC1)        /* Vector 16+23: Timer Counter 1 */
+  VECTOR(sam_tc2, SAM_IRQ_TC2)        /* Vector 16+24: Timer Counter 2 */
+  VECTOR(sam_pwm, SAM_IRQ_PWM)        /* Vector 16+25: Pulse Width Modulation Controller */
+  VECTOR(sam_adc12b, SAM_IRQ_ADC12B)  /* Vector 16+26: 12-bit ADC Controller */
+  VECTOR(sam_adc, SAM_IRQ_ADC)        /* Vector 16+27: 10-bit ADC Controller */
+  VECTOR(sam_dmac, SAM_IRQ_DMAC)      /* Vector 16+28: DMA Controller */
+  VECTOR(sam_udphs, SAM_IRQ_UDPHS)    /* Vector 16+29: USB Device High Speed */
+#endif

arch/arm/src/sam3u/chip/sam_memorymap.h

@@ -43,7 +43,11 @@
 #include <nuttx/config.h>
 #include "chip.h"
 
-#include "chip/sam3u_memorymap.h"
+#if defined(CONFIG_ARCH_CHIP_SAM3U)
+#  include "chip/sam3u_memorymap.h"
+#else
+#  Unrecognized SAM architecture
+#endif
 
 #endif /* __ARCH_ARM_SRC_SAM3U_CHIP_SAM_MEMORYMAP_H */
 

arch/arm/src/sam3u/chip/sam_pinmap.h

@@ -0,0 +1,53 @@
+/************************************************************************************
+ * arch/arm/src/sam3u/chip/sam_pinmap.h
+ *
+ *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <gnutt@nuttx.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_SAM3U_CHIP_SAM_PINMAP_H
+#define __ARCH_ARM_SRC_SAM3U_CHIP_SAM_PINMAP_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+#include "chip.h"
+
+#if defined(CONFIG_ARCH_CHIP_SAM3U)
+#  include "chip/sam3u_pinmap.h"
+#else
+#  Unrecognized SAM architecture
+#endif
+
+#endif /* __ARCH_ARM_SRC_SAM3U_CHIP_SAM_PINMAP_H */
+

arch/arm/src/sam3u/sam_allocateheap.c

@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/arm/src/common/sam3u_allocateheap.c
+ * arch/arm/src/common/sam_allocateheap.c
  *
  *   Copyright (C) 2010, 2013 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
@@ -51,7 +51,7 @@
 #include "mpu.h"
 #include "up_arch.h"
 #include "up_internal.h"
-#include "sam3u_internal.h"
+#include "sam_mpuinit.h"
 
 /****************************************************************************
  * Private Definitions
@@ -157,7 +157,7 @@ void up_allocate_heap(FAR void **heap_start, size_t *heap_size)
 
   /* Allow user-mode access to the user heap memory */
 
-   sam3u_mpu_uheap((uintptr_t)ubase, usize);
+   sam_mpu_uheap((uintptr_t)ubase, usize);
 #else
 
   /* Return the heap settings */
@@ -226,7 +226,7 @@ void up_addregion(void)
 {
   /* Allow user access to the heap memory */
 
-  sam3u_mpu_uheap(SAM_INTSRAM1_BASE, CONFIG_SAM34_SRAM1_SIZE);
+  sam_mpu_uheap(SAM_INTSRAM1_BASE, CONFIG_SAM34_SRAM1_SIZE);
 
   /* Add the region */
 
@@ -235,7 +235,7 @@ void up_addregion(void)
 #if CONFIG_MM_REGIONS > 2
   /* Allow user access to the heap memory */
 
-  sam3u_mpu_uheap(SAM_NFCSRAM_BASE, CONFIG_SAM34_NFCSRAM_SIZE);
+  sam_mpu_uheap(SAM_NFCSRAM_BASE, CONFIG_SAM34_NFCSRAM_SIZE);
 
   /* Add the region */
 

arch/arm/src/sam3u/sam_clockconfig.c

@@ -1,6 +1,6 @@
 /****************************************************************************
- * arch/arm/src/sam3u/sam3u_clockconfig.c
+ * arch/arm/src/sam3u/sam_clockconfig.c
- * arch/arm/src/chip/sam3u_clockconfig.c
+ * arch/arm/src/chip/sam_clockconfig.c
  *
  *   Copyright (C) 2010 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
@@ -48,7 +48,8 @@
 
 #include "up_arch.h"
 #include "up_internal.h"
-#include "sam3u_internal.h"
+
+#include "sam_clockconfig.h"
 #include "chip/sam_pmc.h"
 #include "chip/sam_eefc.h"
 #include "chip/sam_wdt.h"
@@ -92,41 +93,41 @@
  ****************************************************************************/
 
 /****************************************************************************
- * Name: sam3u_efcsetup
+ * Name: sam_efcsetup
  *
  * Description:
  *   Configure 2 waitstates for embedded flash access
  *
  ****************************************************************************/
 
-static inline void sam3u_efcsetup(void)
+static inline void sam_efcsetup(void)
 {
   putreg32((2 << EEFC_FMR_FWS_SHIFT), SAM_EEFC0_FMR);
   putreg32((2 << EEFC_FMR_FWS_SHIFT), SAM_EEFC1_FMR);
 }
 
 /****************************************************************************
- * Name: sam3u_wdtsetup
+ * Name: sam_wdtsetup
  *
  * Description:
  *   Disable the watchdog timer
  *
  ****************************************************************************/
 
-static inline void sam3u_wdtsetup(void)
+static inline void sam_wdtsetup(void)
 {
   putreg32(WDT_MR_WDDIS, SAM_WDT_MR);
 }
 
 /****************************************************************************
- * Name: sam3u_supcsetup
+ * Name: sam_supcsetup
  *
  * Description:
  *   Select the external slow clock
  *
  ****************************************************************************/
 
-static inline void sam3u_supcsetup(void)
+static inline void sam_supcsetup(void)
 {
   /* Check if the 32-kHz is already selected */
 
@@ -141,14 +142,14 @@ static inline void sam3u_supcsetup(void)
 }
 
 /****************************************************************************
- * Name: sam3u_pmcwait
+ * Name: sam_pmcwait
  *
  * Description:
  *   Wait for the specide PMC status bit to become "1"
  *
  ****************************************************************************/
 
-static void sam3u_pmcwait(uint32_t bit)
+static void sam_pmcwait(uint32_t bit)
 {
   uint32_t delay;
   for (delay = 0;
@@ -157,14 +158,14 @@ static void sam3u_pmcwait(uint32_t bit)
 }
 
 /****************************************************************************
- * Name: sam3u_pmcsetup
+ * Name: sam_pmcsetup
  *
  * Description:
  *   Initialize clocking
  *
  ****************************************************************************/
 
-static inline void sam3u_pmcsetup(void)
+static inline void sam_pmcsetup(void)
 {
   uint32_t regval;
 
@@ -181,7 +182,7 @@ static inline void sam3u_pmcsetup(void)
        */
 
       putreg32(BOARD_CKGR_MOR, SAM_CKGR_MOR);
-      sam3u_pmcwait(PMC_INT_MOSCXTS);
+      sam_pmcwait(PMC_INT_MOSCXTS);
     }
 
   /* "Switch to the main oscillator.  The selection is made by writing the
@@ -197,7 +198,7 @@ static inline void sam3u_pmcsetup(void)
    */
 
   putreg32((BOARD_CKGR_MOR|CKGR_MOR_MOSCSEL), SAM_CKGR_MOR);
-  sam3u_pmcwait(PMC_INT_MOSCSELS);
+  sam_pmcwait(PMC_INT_MOSCSELS);
 
   /* "Select the master clock. "The Master Clock selection is made by writing
    *  the CSS field (Clock Source Selection) in PMC_MCKR (Master Clock Register).
@@ -212,12 +213,12 @@ static inline void sam3u_pmcsetup(void)
   regval &= ~PMC_MCKR_CSS_MASK;
   regval |= PMC_MCKR_CSS_MAIN;
   putreg32(regval, SAM_PMC_MCKR);
-  sam3u_pmcwait(PMC_INT_MCKRDY);
+  sam_pmcwait(PMC_INT_MCKRDY);
 
   /* Settup PLLA and wait for LOCKA */
 
   putreg32(BOARD_CKGR_PLLAR, SAM_CKGR_PLLAR);
-  sam3u_pmcwait(PMC_INT_LOCKA);
+  sam_pmcwait(PMC_INT_LOCKA);
 
   /* Setup UTMI for USB and wait for LOCKU */
 
@@ -225,27 +226,27 @@ static inline void sam3u_pmcsetup(void)
   regval = getreg32(SAM_CKGR_UCKR);
   regval |= BOARD_CKGR_UCKR;
   putreg32(regval, SAM_CKGR_UCKR);
-  sam3u_pmcwait(PMC_INT_LOCKU);
+  sam_pmcwait(PMC_INT_LOCKU);
 #endif
 
   /* Switch to the fast clock and wait for MCKRDY */
 
   putreg32(BOARD_PMC_MCKR_FAST, SAM_PMC_MCKR);
-  sam3u_pmcwait(PMC_INT_MCKRDY);
+  sam_pmcwait(PMC_INT_MCKRDY);
 
   putreg32(BOARD_PMC_MCKR, SAM_PMC_MCKR);
-  sam3u_pmcwait(PMC_INT_MCKRDY);
+  sam_pmcwait(PMC_INT_MCKRDY);
 }
 
 /****************************************************************************
- * Name: sam3u_enabledefaultmaster and sam3u_disabledefaultmaster
+ * Name: sam_enabledefaultmaster and sam_disabledefaultmaster
  *
  * Description:
  *   Enable/disable default master access
  *
  ****************************************************************************/
 
-static inline void sam3u_enabledefaultmaster(void)
+static inline void sam_enabledefaultmaster(void)
 {
   uint32_t regval;
 
@@ -269,7 +270,7 @@ static inline void sam3u_enabledefaultmaster(void)
 }
 
 #if 0 /* Not used */
-static inline void sam3u_disabledefaultmaster(void)
+static inline void sam_disabledefaultmaster(void)
 {
   uint32_t regval;
 
@@ -298,7 +299,7 @@ static inline void sam3u_disabledefaultmaster(void)
  ****************************************************************************/
 
 /************************************************************************************
- * Name: sam3u_clockconfig
+ * Name: sam_clockconfig
  *
  * Description:
  *   Called to initialize the SAM3/4.  This does whatever setup is needed to put the
@@ -310,26 +311,26 @@ static inline void sam3u_disabledefaultmaster(void)
  *
  ************************************************************************************/
 
-void sam3u_clockconfig(void)
+void sam_clockconfig(void)
 {
   /* Configure embedded flash access */
 
-  sam3u_efcsetup();
+  sam_efcsetup();
 
   /* Configure the watchdog timer */
 
-  sam3u_wdtsetup();
+  sam_wdtsetup();
 
   /* Setup the supply controller to use the external slow clock */
 
-  sam3u_supcsetup();
+  sam_supcsetup();
 
   /* Initialize clocking */
 
-  sam3u_pmcsetup();
+  sam_pmcsetup();
 
   /* Optimize CPU setting for speed */
 
-  sam3u_enabledefaultmaster();
+  sam_enabledefaultmaster();
 }
 

arch/arm/src/sam3u/sam_clockconfig.h

@@ -0,0 +1,97 @@
+/************************************************************************************
+ * arch/arm/src/sam3u/sam_clockconfig.h
+ *
+ *   Copyright (C) 2009-2011, 2013 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <gnutt@nuttx.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_SAM3U_SAM_CLOCKCONFIG_H
+#define __ARCH_ARM_SRC_SAM3U_SAM_CLOCKCONFIG_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+
+/************************************************************************************
+ * Definitions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Types
+ ************************************************************************************/
+
+/************************************************************************************
+ * Inline Functions
+ ************************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/************************************************************************************
+ * Public Function Prototypes
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: sam_clockconfig
+ *
+ * Description:
+ *   Called to initialize the SAM3/4.  This does whatever setup is needed to put the
+ *   SoC in a usable state.  This includes the initialization of clocking using the
+ *   settings in board.h.  (After power-on reset, the sam3u is initiallyrunning on
+ *   a 4MHz internal RC clock).  This function also performs other low-level chip
+ *   initialization of the chip including EFC, master clock, IRQ and watchdog
+ *   configuration.
+ *
+ ************************************************************************************/
+
+void sam_clockconfig(void);
+
+#undef EXTERN
+#if defined(__cplusplus)
+}
+#endif
+
+#endif /* __ASSEMBLY__ */
+#endif /* __ARCH_ARM_SRC_SAM3U_SAM_CLOCKCONFIG_H */

arch/arm/src/sam3u/sam_dmac.h

@@ -0,0 +1,297 @@
+/************************************************************************************
+ * arch/arm/src/sam3u/sam_dmac.h
+ *
+ *   Copyright (C) 2009-2011, 2013 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <gnutt@nuttx.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_SAM3U_SAM_DMAC_H
+#define __ARCH_ARM_SRC_SAM3U_SAM_DMAC_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <stdint.h>
+
+#include "chip.h"
+
+/************************************************************************************
+ * Definitions
+ ************************************************************************************/
+
+/* Configuration ********************************************************************/
+
+#ifndef CONFIG_DEBUG
+#  undef CONFIG_DEBUG_DMA
+#endif
+
+/* DMA ******************************************************************************/
+
+/* Flags used to characterize the desired DMA channel.  The naming convention is that
+ * one side is the peripheral and the other is memory (however, the interface could still
+ * be used if, for example, both sides were memory although the naming would be awkward)
+ */
+
+/* Unchange-able properties of the channel */
+
+#define DMACH_FLAG_FLOWCONTROL                (1 << 0)  /* Bit 0: Channel supports flow control */
+#define DMACH_FLAG_FIFOSIZE_SHIFT             (1)       /* Bit 1: Size of DMA FIFO */
+#define DMACH_FLAG_FIFOSIZE_MASK              (1 << DMACH_FLAG_FIFOSIZE_SHIFT)
+#  define DMACH_FLAG_FIFO_8BYTES              (0 << DMACH_FLAG_FIFOSIZE_SHIFT) /* 8 bytes */
+#  define DMACH_FLAG_FIFO_32BYTES             (1 << DMACH_FLAG_FIFOSIZE_SHIFT) /* 32 bytes */
+
+/* Configurable properties of the channel */
+
+#define DMACH_FLAG_BURST_LARGEST              0  /* Largest length AHB burst */
+#define DMACH_FLAG_BURST_HALF                 1  /* Half FIFO size */
+#define DMACH_FLAG_BURST_SINGLE               2  /* Single AHB access */
+
+#define DMACH_FLAG_FIFOCFG_SHIFT              (2)       /* Bits 2-3: FIFO configuration */
+#define DMACH_FLAG_FIFOCFG_MASK               (3 << DMACH_FLAG_FIFOCFG_SHIFT)
+#  define DMACH_FLAG_FIFOCFG_LARGEST          (DMACH_FLAG_BURST_LARGEST << DMACH_FLAG_FIFOCFG_SHIFT)
+#  define DMACH_FLAG_FIFOCFG_HALF             (DMACH_FLAG_BURST_HALF << DMACH_FLAG_FIFOCFG_SHIFT)
+#  define DMACH_FLAG_FIFOCFG_SINGLE           (DMACH_FLAG_BURST_SINGLE << DMACH_FLAG_FIFOCFG_SHIFT)
+
+/* Peripheral endpoint characteristics */
+
+#define DMACH_FLAG_PERIPHPID_SHIFT            (4)       /* Bits 4-7: Peripheral PID */
+#define DMACH_FLAG_PERIPHPID_MASK             (15 << DMACH_FLAG_PERIPHPID_SHIFT)
+#define DMACH_FLAG_PERIPHH2SEL                (1 << 8)  /* Bits 8: HW handshaking */
+#define DMACH_FLAG_PERIPHISPERIPH             (1 << 9)  /* Bits 9: 0=memory; 1=peripheral */
+#define DMACH_FLAG_PERIPHWIDTH_SHIFT          (10)      /* Bits 10-11: Peripheral width */
+#define DMACH_FLAG_PERIPHWIDTH_MASK           (3 << DMACH_FLAG_PERIPHWIDTH_SHIFT)
+#  define DMACH_FLAG_PERIPHWIDTH_8BITS        (0 << DMACH_FLAG_PERIPHWIDTH_SHIFT) /* 8 bits */
+#  define DMACH_FLAG_PERIPHWIDTH_16BITS       (1 << DMACH_FLAG_PERIPHWIDTH_SHIFT) /* 16 bits */
+#  define DMACH_FLAG_PERIPHWIDTH_32BITS       (2 << DMACH_FLAG_PERIPHWIDTH_SHIFT) /* 32 bits */
+#define DMACH_FLAG_PERIPHINCREMENT            (1 << 12) /* Bit 12: Autoincrement peripheral address */
+#define DMACH_FLAG_PERIPHCHUNKSIZE            (1 << 13) /* Bit 13: Peripheral chunk size */
+#  define DMACH_FLAG_PERIPHCHUNKSIZE_1        (0)                        /* Peripheral chunksize = 1 */
+#  define DMACH_FLAG_PERIPHCHUNKSIZE_4        DMACH_FLAG_PERIPHCHUNKSIZE /* Peripheral chunksize = 4 */
+
+/* Memory endpoint characteristics */
+
+#define DMACH_FLAG_MEMPID_SHIFT               (14)      /* Bits 14-17: Memory PID */
+#define DMACH_FLAG_MEMPID_MASK                (15 << DMACH_FLAG_PERIPHPID_SHIFT)
+#define DMACH_FLAG_MEMH2SEL                   (1 << 18) /* Bits 18: HW handshaking */
+#define DMACH_FLAG_MEMISPERIPH                (1 << 19) /* Bits 19: 0=memory; 1=peripheral */
+#define DMACH_FLAG_MEMWIDTH_SHIFT             (20)      /* Bits 20-21: Memory width */
+#define DMACH_FLAG_MEMWIDTH_MASK              (3 << DMACH_FLAG_MEMWIDTH_SHIFT)
+#  define DMACH_FLAG_MEMWIDTH_8BITS           (0 << DMACH_FLAG_MEMWIDTH_SHIFT) /* 8 bits */
+#  define DMACH_FLAG_MEMWIDTH_16BITS          (1 << DMACH_FLAG_MEMWIDTH_SHIFT) /* 16 bits */
+#  define DMACH_FLAG_MEMWIDTH_32BITS          (2 << DMACH_FLAG_MEMWIDTH_SHIFT) /* 32 bits */
+#define DMACH_FLAG_MEMINCREMENT               (1 << 22) /* Bit 22: Autoincrement memory address */
+#define DMACH_FLAG_MEMCHUNKSIZE               (1 << 22) /* Bit 23: Memory chunk size */
+#  define DMACH_FLAG_MEMCHUNKSIZE_1           (0)                     /* Memory chunksize = 1 */
+#  define DMACH_FLAG_MEMCHUNKSIZE_4           DMACH_FLAG_MEMCHUNKSIZE /* Memory chunksize = 4 */
+
+/************************************************************************************
+ * Public Types
+ ************************************************************************************/
+
+typedef FAR void *DMA_HANDLE;
+typedef void (*dma_callback_t)(DMA_HANDLE handle, void *arg, int result);
+
+/* The following is used for sampling DMA registers when CONFIG DEBUG_DMA is selected */
+
+#ifdef CONFIG_DEBUG_DMA
+struct sam_dmaregs_s
+{
+  /* Global Registers */
+
+  uint32_t gcfg;    /* DMAC Global Configuration Register */
+  uint32_t en;      /* DMAC Enable Register */
+  uint32_t sreq;    /* DMAC Software Single Request Register */
+  uint32_t creq;    /* DMAC Software Chunk Transfer Request Register */
+  uint32_t last;    /* DMAC Software Last Transfer Flag Register */
+  uint32_t ebcimr;  /* DMAC Error Mask */
+  uint32_t ebcisr;  /* DMAC Error Status */
+  uint32_t chsr;    /* DMAC Channel Handler Status Register */
+
+  /* Channel Registers */
+
+  uint32_t saddr;   /* DMAC Channel Source Address Register */
+  uint32_t daddr;   /* DMAC Channel Destination Address Register */
+  uint32_t dscr;    /* DMAC Channel Descriptor Address Register */
+  uint32_t ctrla;   /* DMAC Channel Control A Register */
+  uint32_t ctrlb;   /* DMAC Channel Control B Register */
+  uint32_t cfg;     /* DMAC Channel Configuration Register */
+};
+#endif
+
+/************************************************************************************
+ * Inline Functions
+ ************************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/************************************************************************************
+ * Public Function Prototypes
+ ************************************************************************************/
+
+/****************************************************************************
+ * Name: sam_dmachannel
+ *
+ * Description:
+ *   Allocate a DMA channel.  This function sets aside a DMA channel with
+ *   the required FIFO size and flow control capabilities (determined by
+ *   dma_flags) then  gives the caller exclusive access to the DMA channel.
+ *
+ *   The naming convention in all of the DMA interfaces is that one side is
+ *   the 'peripheral' and the other is 'memory'.  Howerver, the interface
+ *   could still be used if, for example, both sides were memory although
+ *   the naming would be awkward.
+ *
+ * Returned Value:
+ *   If a DMA channel if the required FIFO size is available, this function
+ *   returns a non-NULL, void* DMA channel handle.  NULL is returned on any
+ *   failure.
+ *
+ ****************************************************************************/
+
+DMA_HANDLE sam_dmachannel(uint32_t dmach_flags);
+
+/****************************************************************************
+ * Name: sam_dmafree
+ *
+ * Description:
+ *   Release a DMA channel.  NOTE:  The 'handle' used in this argument must
+ *   NEVER be used again until sam_dmachannel() is called again to re-gain
+ *   a valid handle.
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+void sam_dmafree(DMA_HANDLE handle);
+
+/****************************************************************************
+ * Name: sam_dmatxsetup
+ *
+ * Description:
+ *   Configure DMA for transmit of one buffer (memory to peripheral).  This
+ *   function may be called multiple times to handle large and/or dis-
+ *   continuous transfers.  Calls to sam_dmatxsetup() and sam_dmarxsetup()
+ *   must not be intermixed on the same transfer, however.
+ *
+ ****************************************************************************/
+
+int sam_dmatxsetup(DMA_HANDLE handle, uint32_t paddr, uint32_t maddr,
+                   size_t nbytes);
+
+/****************************************************************************
+ * Name: sam_dmarxsetup
+ *
+ * Description:
+ *   Configure DMA for receipt of one buffer (peripheral to memory).  This
+ *   function may be called multiple times to handle large and/or dis-
+ *   continuous transfers.  Calls to sam_dmatxsetup() and sam_dmarxsetup()
+ *   must not be intermixed on the same transfer, however.
+ *
+ ****************************************************************************/
+
+int sam_dmarxsetup(DMA_HANDLE handle, uint32_t paddr, uint32_t maddr,
+                   size_t nbytes);
+
+/****************************************************************************
+ * Name: sam_dmastart
+ *
+ * Description:
+ *   Start the DMA transfer
+ *
+ ****************************************************************************/
+
+int sam_dmastart(DMA_HANDLE handle, dma_callback_t callback, void *arg);
+
+/****************************************************************************
+ * Name: sam_dmastop
+ *
+ * Description:
+ *   Cancel the DMA.  After sam_dmastop() is called, the DMA channel is
+ *   reset and sam_dmarx/txsetup() must be called before sam_dmastart() can be
+ *   called again
+ *
+ ****************************************************************************/
+
+void sam_dmastop(DMA_HANDLE handle);
+
+/****************************************************************************
+ * Name: sam_dmasample
+ *
+ * Description:
+ *   Sample DMA register contents
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_DEBUG_DMA
+void sam_dmasample(DMA_HANDLE handle, struct sam_dmaregs_s *regs);
+#else
+#  define sam_dmasample(handle,regs)
+#endif
+
+/****************************************************************************
+ * Name: sam_dmadump
+ *
+ * Description:
+ *   Dump previously sampled DMA register contents
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_DEBUG_DMA
+void sam_dmadump(DMA_HANDLE handle, const struct sam_dmaregs_s *regs,
+                 const char *msg);
+#else
+#  define sam_dmadump(handle,regs,msg)
+#endif
+
+#undef EXTERN
+#if defined(__cplusplus)
+}
+#endif
+
+#endif /* __ASSEMBLY__ */
+#endif /* __ARCH_ARM_SRC_SAM3U_SAM_DMAC_H */

arch/arm/src/sam3u/sam_gpio.c

@@ -1,7 +1,7 @@
 /****************************************************************************
- * arch/arm/src/sam3u/sam3u_pio.c
+ * arch/arm/src/sam3u/sam_gpio.c
  *
- *   Copyright (C) 2010 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2010, 2013 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
  *
  * Redistribution and use in source and binary forms, with or without
@@ -51,7 +51,7 @@
 #include "up_arch.h"
 
 #include "chip.h"
-#include "sam3u_internal.h"
+#include "sam_gpio.h"
 #include "chip/sam_pio.h"
 
 /****************************************************************************
@@ -74,42 +74,42 @@ static const char g_portchar[4]   = { 'A', 'B', 'C', 'D' };
  * Private Function Prototypes
  ****************************************************************************/
 /****************************************************************************
- * Name: sam3u_gpiobase
+ * Name: sam_gpiobase
  *
  * Description:
  *   Return the base address of the GPIO register set
  *
  ****************************************************************************/
 
-static inline uintptr_t sam3u_gpiobase(uint16_t cfgset)
+static inline uintptr_t sam_gpiobase(uint16_t cfgset)
 {
   int port = (cfgset & GPIO_PORT_MASK) >> GPIO_PORT_SHIFT;
   return SAM_PION_BASE(port);
 }
 
 /****************************************************************************
- * Name: sam3u_gpiopin
+ * Name: sam_gpiopin
  *
  * Description:
  *   Returun the base address of the GPIO register set
  *
  ****************************************************************************/
 
-static inline int sam3u_gpiopin(uint16_t cfgset)
+static inline int sam_gpiopin(uint16_t cfgset)
 {
   return 1 << ((cfgset & GPIO_PIN_MASK) >> GPIO_PIN_SHIFT);
 }
 
 /****************************************************************************
- * Name: sam3u_configinput
+ * Name: sam_configinput
  *
  * Description:
  *   Configure a GPIO input pin based on bit-encoded description of the pin.
  *
  ****************************************************************************/
 
-static inline int sam3u_configinput(uintptr_t base, uint32_t pin,
+static inline int sam_configinput(uintptr_t base, uint32_t pin,
-                                    uint16_t cfgset)
+                                  uint16_t cfgset)
 {
   /* Disable interrupts on the pin */
 
@@ -144,22 +144,22 @@ static inline int sam3u_configinput(uintptr_t base, uint32_t pin,
 
   /* To-Do:  If DEGLITCH is selected, need to configure DIFSR, SCIFSR, and
    *         registers.  This would probably best be done with another, new
-   *         API... perhaps sam3u_configfilter()
+   *         API... perhaps sam_configfilter()
    */
 
  return OK;
 }
 
 /****************************************************************************
- * Name: sam3u_configoutput
+ * Name: sam_configoutput
  *
  * Description:
  *   Configure a GPIO output pin based on bit-encoded description of the pin.
  *
  ****************************************************************************/
 
-static inline int sam3u_configoutput(uintptr_t base, uint32_t pin,
+static inline int sam_configoutput(uintptr_t base, uint32_t pin,
-                                     uint16_t cfgset)
+                                   uint16_t cfgset)
 {
   /* Disable interrupts on the pin */
 
@@ -206,7 +206,7 @@ static inline int sam3u_configoutput(uintptr_t base, uint32_t pin,
 }
 
 /****************************************************************************
- * Name: sam3u_configperiph
+ * Name: sam_configperiph
  *
  * Description:
  *   Configure a GPIO pin driven by a peripheral A or B signal based on
@@ -214,8 +214,8 @@ static inline int sam3u_configoutput(uintptr_t base, uint32_t pin,
  *
  ****************************************************************************/
 
-static inline int sam3u_configperiph(uintptr_t base, uint32_t pin,
+static inline int sam_configperiph(uintptr_t base, uint32_t pin,
-                                     uint16_t cfgset)
+                                   uint16_t cfgset)
 {
   uint32_t regval;
 
@@ -258,32 +258,32 @@ static inline int sam3u_configperiph(uintptr_t base, uint32_t pin,
  ****************************************************************************/
 
 /****************************************************************************
- * Name: sam3u_configgpio
+ * Name: sam_configgpio
  *
  * Description:
  *   Configure a GPIO pin based on bit-encoded description of the pin.
  *
  ****************************************************************************/
 
-int sam3u_configgpio(uint16_t cfgset)
+int sam_configgpio(uint16_t cfgset)
 {
-  uintptr_t base = sam3u_gpiobase(cfgset);
+  uintptr_t base = sam_gpiobase(cfgset);
-  uint32_t  pin  = sam3u_gpiopin(cfgset);
+  uint32_t  pin  = sam_gpiopin(cfgset);
   int       ret;
 
   switch (cfgset & GPIO_MODE_MASK)
     {
       case GPIO_INPUT:
-        ret = sam3u_configinput(base, pin, cfgset);
+        ret = sam_configinput(base, pin, cfgset);
         break;
 
       case GPIO_OUTPUT:
-        ret = sam3u_configoutput(base, pin, cfgset);
+        ret = sam_configoutput(base, pin, cfgset);
         break;
 
       case GPIO_PERIPHA:
       case GPIO_PERIPHB:
-        ret = sam3u_configperiph(base, pin, cfgset);
+        ret = sam_configperiph(base, pin, cfgset);
         break;
 
       default:
@@ -294,17 +294,17 @@ int sam3u_configgpio(uint16_t cfgset)
 }
 
 /****************************************************************************
- * Name: sam3u_gpiowrite
+ * Name: sam_gpiowrite
  *
  * Description:
  *   Write one or zero to the selected GPIO pin
  *
  ****************************************************************************/
 
-void sam3u_gpiowrite(uint16_t pinset, bool value)
+void sam_gpiowrite(uint16_t pinset, bool value)
 {
-  uintptr_t base = sam3u_gpiobase(pinset);
+  uintptr_t base = sam_gpiobase(pinset);
-  uint32_t  pin  = sam3u_gpiopin(pinset);
+  uint32_t  pin  = sam_gpiopin(pinset);
 
   if (value)
     {
@@ -317,17 +317,17 @@ void sam3u_gpiowrite(uint16_t pinset, bool value)
 }
 
 /****************************************************************************
- * Name: sam3u_gpioread
+ * Name: sam_gpioread
  *
  * Description:
  *   Read one or zero from the selected GPIO pin
  *
  ****************************************************************************/
 
-bool sam3u_gpioread(uint16_t pinset)
+bool sam_gpioread(uint16_t pinset)
 {
-  uintptr_t base = sam3u_gpiobase(pinset);
+  uintptr_t base = sam_gpiobase(pinset);
-  uint32_t  pin  = sam3u_gpiopin(pinset);
+  uint32_t  pin  = sam_gpiopin(pinset);
   uint32_t  regval;
 
   if ((pinset & GPIO_MODE_MASK) == GPIO_OUTPUT)
@@ -343,7 +343,7 @@ bool sam3u_gpioread(uint16_t pinset)
 }
 
 /************************************************************************************
- * Function:  sam3u_dumpgpio
+ * Function:  sam_dumpgpio
  *
  * Description:
  *   Dump all GPIO registers associated with the base address of the provided pinset.
@@ -351,7 +351,7 @@ bool sam3u_gpioread(uint16_t pinset)
  ************************************************************************************/
 
 #ifdef CONFIG_DEBUG_GPIO
-int sam3u_dumpgpio(uint32_t pinset, const char *msg)
+int sam_dumpgpio(uint32_t pinset, const char *msg)
 {
   irqstate_t    flags;
   uintptr_t     base;
@@ -360,7 +360,7 @@ int sam3u_dumpgpio(uint32_t pinset, const char *msg)
 
   /* Get the base address associated with the PIO port */
 
-  pin  = sam3u_gpiopin(pinset);
+  pin  = sam_gpiopin(pinset);
   port = (pinset & GPIO_PORT_MASK) >> GPIO_PORT_SHIFT;
   base = SAM_PION_BASE(port);
 

arch/arm/src/sam3u/sam_gpio.h

@@ -0,0 +1,297 @@
+/************************************************************************************
+ * arch/arm/src/sam3u/sam_gpio.h
+ *
+ *   Copyright (C) 2009-2011, 2013 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <gnutt@nuttx.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_SAM3U_SAM_GPIO_H
+#define __ARCH_ARM_SRC_SAM3U_SAM_GPIO_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#include "chip.h"
+
+/************************************************************************************
+ * Definitions
+ ************************************************************************************/
+
+/* Configuration ********************************************************************/
+
+#if defined(CONFIG_GPIOA_IRQ) || defined(CONFIG_GPIOB_IRQ) || defined(CONFIG_GPIOC_IRQ)
+#  define CONFIG_GPIO_IRQ 1
+#else
+#  undef CONFIG_GPIO_IRQ
+#endif
+
+#ifndef CONFIG_DEBUG
+#  undef CONFIG_DEBUG_GPIO
+#endif
+
+/* Bit-encoded input to sam_configgpio() ********************************************/
+
+/* 16-bit Encoding:
+ * MMCC CII. VPPB BBBB
+ */
+
+/* Input/Output mode:
+ *
+ * MM.. .... .... ....
+ */
+
+#define GPIO_MODE_SHIFT            (14)        /* Bits 14-15: GPIO mode */
+#define GPIO_MODE_MASK             (3 << GPIO_MODE_SHIFT)
+#  define GPIO_INPUT               (0 << GPIO_MODE_SHIFT) /* Input */
+#  define GPIO_OUTPUT              (1 << GPIO_MODE_SHIFT) /* Output */
+#  define GPIO_PERIPHA             (2 << GPIO_MODE_SHIFT) /* Controlled by periph A signal */
+#  define GPIO_PERIPHB             (3 << GPIO_MODE_SHIFT) /* Controlled by periph B signal */
+
+/* These bits set the configuration of the pin:
+ * ..CC C... .... ....
+ */
+
+#define GPIO_CFG_SHIFT             (11)        /* Bits 11-13: GPIO configuration bits */
+#define GPIO_CFG_MASK              (7 << GPIO_CFG_SHIFT)
+#  define GPIO_CFG_DEFAULT         (0 << GPIO_CFG_SHIFT) /* Default, no attribute */
+#  define GPIO_CFG_PULLUP          (1 << GPIO_CFG_SHIFT) /* Bit 11: Internal pull-up */
+#  define GPIO_CFG_DEGLITCH        (2 << GPIO_CFG_SHIFT) /* Bit 12: Internal glitch filter */
+#  define GPIO_CFG_OPENDRAIN       (4 << GPIO_CFG_SHIFT) /* Bit 13: Open drain */
+
+/* Additional interrupt modes:
+ * .... .II. .... ....
+ */
+
+#define GPIO_INT_SHIFT             (9)        /* Bits 9-10: GPIO configuration bits */
+#define GPIO_INT_MASK              (3 << GPIO_INT_SHIFT)
+#  define GPIO_INT_LEVEL           (1 << 10)   /* Bit 10: Level detection interrupt */
+#  define GPIO_INT_EDGE            (0)         /*        (vs. Edge detection interrupt) */
+#  define GPIO_INT_HIGHLEVEL       (1 << 9)    /* Bit 9: High level detection interrupt */
+#  define GPIO_INT_LOWLEVEL        (0)         /*        (vs. Low level detection interrupt) */
+#  define GPIO_INT_RISING          (1 << 9)    /* Bit 9: Rising edge detection interrupt */
+#  define GPIO_INT_FALLING         (0)         /*        (vs. Falling edge detection interrupt) */
+
+/* If the pin is an GPIO output, then this identifies the initial output value:
+ * .... .... V... ....
+ */
+
+#define GPIO_OUTPUT_SET            (1 << 7)    /* Bit 7: Inital value of output */
+#define GPIO_OUTPUT_CLEAR          (0)
+
+/* This identifies the GPIO port:
+ * .... .... .PP. ....
+ */
+
+#define GPIO_PORT_SHIFT            (5)         /* Bit 5-6:  Port number */
+#define GPIO_PORT_MASK             (3 << GPIO_PORT_SHIFT)
+#  define GPIO_PORT_PIOA           (0 << GPIO_PORT_SHIFT)
+#  define GPIO_PORT_PIOB           (1 << GPIO_PORT_SHIFT)
+#  define GPIO_PORT_PIOC           (2 << GPIO_PORT_SHIFT)
+
+/* This identifies the bit in the port:
+ * .... .... ...B BBBB
+ */
+
+#define GPIO_PIN_SHIFT             0        /* Bits 0-4: GPIO number: 0-31 */
+#define GPIO_PIN_MASK              (31 << GPIO_PIN_SHIFT)
+#define GPIO_PIN0                  (0  << GPIO_PIN_SHIFT)
+#define GPIO_PIN1                  (1  << GPIO_PIN_SHIFT)
+#define GPIO_PIN2                  (2  << GPIO_PIN_SHIFT)
+#define GPIO_PIN3                  (3  << GPIO_PIN_SHIFT)
+#define GPIO_PIN4                  (4  << GPIO_PIN_SHIFT)
+#define GPIO_PIN5                  (5  << GPIO_PIN_SHIFT)
+#define GPIO_PIN6                  (6  << GPIO_PIN_SHIFT)
+#define GPIO_PIN7                  (7  << GPIO_PIN_SHIFT)
+#define GPIO_PIN8                  (8  << GPIO_PIN_SHIFT)
+#define GPIO_PIN9                  (9  << GPIO_PIN_SHIFT)
+#define GPIO_PIN10                 (10 << GPIO_PIN_SHIFT)
+#define GPIO_PIN11                 (11 << GPIO_PIN_SHIFT)
+#define GPIO_PIN12                 (12 << GPIO_PIN_SHIFT)
+#define GPIO_PIN13                 (13 << GPIO_PIN_SHIFT)
+#define GPIO_PIN14                 (14 << GPIO_PIN_SHIFT)
+#define GPIO_PIN15                 (15 << GPIO_PIN_SHIFT)
+#define GPIO_PIN16                 (16 << GPIO_PIN_SHIFT)
+#define GPIO_PIN17                 (17 << GPIO_PIN_SHIFT)
+#define GPIO_PIN18                 (18 << GPIO_PIN_SHIFT)
+#define GPIO_PIN19                 (19 << GPIO_PIN_SHIFT)
+#define GPIO_PIN20                 (20 << GPIO_PIN_SHIFT)
+#define GPIO_PIN21                 (21 << GPIO_PIN_SHIFT)
+#define GPIO_PIN22                 (22 << GPIO_PIN_SHIFT)
+#define GPIO_PIN23                 (23 << GPIO_PIN_SHIFT)
+#define GPIO_PIN24                 (24 << GPIO_PIN_SHIFT)
+#define GPIO_PIN25                 (25 << GPIO_PIN_SHIFT)
+#define GPIO_PIN26                 (26 << GPIO_PIN_SHIFT)
+#define GPIO_PIN27                 (27 << GPIO_PIN_SHIFT)
+#define GPIO_PIN28                 (28 << GPIO_PIN_SHIFT)
+#define GPIO_PIN29                 (29 << GPIO_PIN_SHIFT)
+#define GPIO_PIN30                 (30 << GPIO_PIN_SHIFT)
+#define GPIO_PIN31                 (31 << GPIO_PIN_SHIFT)
+
+/************************************************************************************
+ * Public Types
+ ************************************************************************************/
+
+/************************************************************************************
+ * Inline Functions
+ ************************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/************************************************************************************
+ * Public Function Prototypes
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: sam_gpioirqinitialize
+ *
+ * Description:
+ *   Initialize logic to support a second level of interrupt decoding for GPIO pins.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_GPIO_IRQ
+void sam_gpioirqinitialize(void);
+#else
+#  define sam_gpioirqinitialize()
+#endif
+
+/************************************************************************************
+ * Name: sam_configgpio
+ *
+ * Description:
+ *   Configure a GPIO pin based on bit-encoded description of the pin.
+ *
+ ************************************************************************************/
+
+int sam_configgpio(uint16_t cfgset);
+
+/************************************************************************************
+ * Name: sam_gpiowrite
+ *
+ * Description:
+ *   Write one or zero to the selected GPIO pin
+ *
+ ************************************************************************************/
+
+void sam_gpiowrite(uint16_t pinset, bool value);
+
+/************************************************************************************
+ * Name: sam_gpioread
+ *
+ * Description:
+ *   Read one or zero from the selected GPIO pin
+ *
+ ************************************************************************************/
+
+bool sam_gpioread(uint16_t pinset);
+
+/************************************************************************************
+ * Name: sam_gpioirq
+ *
+ * Description:
+ *   Configure an interrupt for the specified GPIO pin.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_GPIO_IRQ
+void sam_gpioirq(uint16_t pinset);
+#else
+#  define sam_gpioirq(pinset)
+#endif
+
+/************************************************************************************
+ * Name: sam_gpioirqenable
+ *
+ * Description:
+ *   Enable the interrupt for specified GPIO IRQ
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_GPIO_IRQ
+void sam_gpioirqenable(int irq);
+#else
+#  define sam_gpioirqenable(irq)
+#endif
+
+/************************************************************************************
+ * Name: sam_gpioirqdisable
+ *
+ * Description:
+ *   Disable the interrupt for specified GPIO IRQ
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_GPIO_IRQ
+void sam_gpioirqdisable(int irq);
+#else
+#  define sam_gpioirqdisable(irq)
+#endif
+
+/************************************************************************************
+ * Function:  sam_dumpgpio
+ *
+ * Description:
+ *   Dump all GPIO registers associated with the base address of the provided pinset.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_DEBUG_GPIO
+int sam_dumpgpio(uint32_t pinset, const char *msg);
+#else
+#  define sam_dumpgpio(p,m)
+#endif
+
+#undef EXTERN
+#if defined(__cplusplus)
+}
+#endif
+
+#endif /* __ASSEMBLY__ */
+#endif /* __ARCH_ARM_SRC_SAM3U_SAM_GPIO_H */

arch/arm/src/sam3u/sam_gpioirq.c

@@ -1,8 +1,7 @@
 /****************************************************************************
- * arch/arm/src/sam3u/sam3u_gpioirq.c
+ * arch/arm/src/sam3u/sam_gpioirq.c
- * arch/arm/src/chip/sam3u_gpioirq.c
  *
- *   Copyright (C) 2010 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2010, 2013 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
  *
  * Redistribution and use in source and binary forms, with or without
@@ -54,7 +53,7 @@
 #include "up_arch.h"
 #include "up_internal.h"
 
-#include "sam3u_internal.h"
+#include "sam_gpio.h"
 #include "chip/sam_pio.h"
 #include "chip/sam_pmc.h"
 
@@ -77,41 +76,41 @@
  ****************************************************************************/
 
 /****************************************************************************
- * Name: sam3u_gpiobase
+ * Name: sam_gpiobase
  *
  * Description:
  *   Return the base address of the GPIO register set
  *
  ****************************************************************************/
 
-static inline uint32_t sam3u_gpiobase(uint16_t pinset)
+static inline uint32_t sam_gpiobase(uint16_t pinset)
 {
   int port = (pinset & GPIO_PORT_MASK) >> GPIO_PORT_SHIFT;
   return SAM_PION_BASE(port >> GPIO_PORT_SHIFT);
 }
 
 /****************************************************************************
- * Name: sam3u_gpiopin
+ * Name: sam_gpiopin
  *
  * Description:
  *   Returun the base address of the GPIO register set
  *
  ****************************************************************************/
 
-static inline int sam3u_gpiopin(uint16_t pinset)
+static inline int sam_gpiopin(uint16_t pinset)
 {
   return 1 << ((pinset & GPIO_PIN_MASK) >> GPIO_PIN_SHIFT);
 }
 
 /****************************************************************************
- * Name: sam3u_irqbase
+ * Name: sam_irqbase
  *
  * Description:
  *   Return gpio information associated with this IRQ
  *
  ****************************************************************************/
 
-static int sam3u_irqbase(int irq, uint32_t *base, int *pin)
+static int sam_irqbase(int irq, uint32_t *base, int *pin)
 {
   if (irq >= SAM_IRQ_NIRQS)
     {
@@ -200,7 +199,7 @@ static int up_gpiocinterrupt(int irq, void *context)
  ****************************************************************************/
 
 /****************************************************************************
- * Name: sam3u_gpioirqinitialize
+ * Name: sam_gpioirqinitialize
  *
  * Description:
  *   Initialize logic to support a second level of interrupt decoding for
@@ -208,7 +207,7 @@ static int up_gpiocinterrupt(int irq, void *context)
  *
  ****************************************************************************/
 
-void sam3u_gpioirqinitialize(void)
+void sam_gpioirqinitialize(void)
 {
   uint32_t pcer;
 
@@ -271,17 +270,17 @@ void sam3u_gpioirqinitialize(void)
 }
 
 /************************************************************************************
- * Name: sam3u_gpioirq
+ * Name: sam_gpioirq
  *
  * Description:
  *   Configure an interrupt for the specified GPIO pin.
  *
  ************************************************************************************/
 
-void sam3u_gpioirq(uint16_t pinset)
+void sam_gpioirq(uint16_t pinset)
 {
-  uint32_t base = sam3u_gpiobase(pinset);
+  uint32_t base = sam_gpiobase(pinset);
-  int      pin  = sam3u_gpiopin(pinset);
+  int      pin  = sam_gpiopin(pinset);
 
    /* Are any additional interrupt modes selected? */
 
@@ -322,19 +321,19 @@ void sam3u_gpioirq(uint16_t pinset)
 }
 
 /************************************************************************************
- * Name: sam3u_gpioirqenable
+ * Name: sam_gpioirqenable
  *
  * Description:
  *   Enable the interrupt for specified GPIO IRQ
  *
  ************************************************************************************/
 
-void sam3u_gpioirqenable(int irq)
+void sam_gpioirqenable(int irq)
 {
   uint32_t base;
   int      pin;
 
-  if (sam3u_irqbase(irq, &base, &pin) == OK)
+  if (sam_irqbase(irq, &base, &pin) == OK)
     {
        /* Clear (all) pending interrupts and enable this pin interrupt */
 
@@ -344,19 +343,19 @@ void sam3u_gpioirqenable(int irq)
 }
 
 /************************************************************************************
- * Name: sam3u_gpioirqdisable
+ * Name: sam_gpioirqdisable
  *
  * Description:
  *   Disable the interrupt for specified GPIO IRQ
  *
  ************************************************************************************/
 
-void sam3u_gpioirqdisable(int irq)
+void sam_gpioirqdisable(int irq)
 {
   uint32_t base;
   int      pin;
 
-  if (sam3u_irqbase(irq, &base, &pin) == OK)
+  if (sam_irqbase(irq, &base, &pin) == OK)
     {
        /* Disable this pin interrupt */
 

arch/arm/src/sam3u/sam_hsmci.h

@@ -0,0 +1,143 @@
+/************************************************************************************
+ * arch/arm/src/sam3u/sam_hsmci.h
+ *
+ *   Copyright (C) 2009-2011, 2013 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <gnutt@nuttx.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_SAM3U_SAM_HSMCI_H
+#define __ARCH_ARM_SRC_SAM3U_SAM_HSMCI_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#include "chip.h"
+
+/************************************************************************************
+ * Definitions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Types
+ ************************************************************************************/
+
+/************************************************************************************
+ * Inline Functions
+ ************************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/************************************************************************************
+ * Public Function Prototypes
+ ************************************************************************************/
+
+/****************************************************************************
+ * Name: sdio_initialize
+ *
+ * Description:
+ *   Initialize SDIO for operation.
+ *
+ * Input Parameters:
+ *   slotno - Not used.
+ *
+ * Returned Values:
+ *   A reference to an SDIO interface structure.  NULL is returned on failures.
+ *
+ ****************************************************************************/
+
+struct sdio_dev_s; /* See include/nuttx/sdio.h */
+FAR struct sdio_dev_s *sdio_initialize(int slotno);
+
+/****************************************************************************
+ * Name: sdio_mediachange
+ *
+ * Description:
+ *   Called by board-specific logic -- posssible from an interrupt handler --
+ *   in order to signal to the driver that a card has been inserted or
+ *   removed from the slot
+ *
+ * Input Parameters:
+ *   dev        - An instance of the SDIO driver device state structure.
+ *   cardinslot - true is a card has been detected in the slot; false if a
+ *                card has been removed from the slot.  Only transitions
+ *                (inserted->removed or removed->inserted should be reported)
+ *
+ * Returned Values:
+ *   None
+ *
+ ****************************************************************************/
+
+void sdio_mediachange(FAR struct sdio_dev_s *dev, bool cardinslot);
+
+/****************************************************************************
+ * Name: sdio_wrprotect
+ *
+ * Description:
+ *   Called by board-specific logic to report if the card in the slot is
+ *   mechanically write protected.
+ *
+ * Input Parameters:
+ *   dev       - An instance of the SDIO driver device state structure.
+ *   wrprotect - true is a card is writeprotected.
+ *
+ * Returned Values:
+ *   None
+ *
+ ****************************************************************************/
+
+void sdio_wrprotect(FAR struct sdio_dev_s *dev, bool wrprotect);
+
+#undef EXTERN
+#if defined(__cplusplus)
+}
+#endif
+
+#endif /* __ASSEMBLY__ */
+#endif /* __ARCH_ARM_SRC_SAM3U_SAM_HSMCI_H */

arch/arm/src/sam3u/sam_irq.c

@@ -1,6 +1,5 @@
 /****************************************************************************
- * arch/arm/src/sam3u/sam3u_irq.c
+ * arch/arm/src/sam3u/sam_irq.c
- * arch/arm/src/chip/sam3u_irq.c
  *
  *   Copyright (C) 2009, 2011, 2013 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
@@ -52,7 +51,10 @@
 #include "up_arch.h"
 #include "os_internal.h"
 #include "up_internal.h"
-#include "sam3u_internal.h"
+
+#ifdef CONFIG_GPIO_IRQ
+#  include "sam_gpio.h"
+#endif
 
 /****************************************************************************
  * Definitions
@@ -87,7 +89,7 @@ volatile uint32_t *current_regs;
  ****************************************************************************/
 
 /****************************************************************************
- * Name: sam3u_dumpnvic
+ * Name: sam_dumpnvic
  *
  * Description:
  *   Dump some interesting NVIC registers
@@ -95,7 +97,7 @@ volatile uint32_t *current_regs;
  ****************************************************************************/
 
 #if defined(SAM_IRQ_DEBUG) && defined (CONFIG_DEBUG)
-static void sam3u_dumpnvic(const char *msg, int irq)
+static void sam_dumpnvic(const char *msg, int irq)
 {
   irqstate_t flags;
 
@@ -121,12 +123,12 @@ static void sam3u_dumpnvic(const char *msg, int irq)
   irqrestore(flags);
 }
 #else
-#  define sam3u_dumpnvic(msg, irq)
+#  define sam_dumpnvic(msg, irq)
 #endif
 
 /****************************************************************************
- * Name: sam3u_nmi, sam3u_busfault, sam3u_usagefault, sam3u_pendsv,
+ * Name: sam_nmi, sam_busfault, sam_usagefault, sam_pendsv, sam_dbgmonitor,
- *       sam3u_dbgmonitor, sam3u_pendsv, sam3u_reserved
+ *       sam_pendsv, sam_reserved
  *
  * Description:
  *   Handlers for various execptions.  None are handled and all are fatal
@@ -136,7 +138,7 @@ static void sam3u_dumpnvic(const char *msg, int irq)
  ****************************************************************************/
 
 #ifdef CONFIG_DEBUG
-static int sam3u_nmi(int irq, FAR void *context)
+static int sam_nmi(int irq, FAR void *context)
 {
   (void)irqsave();
   dbg("PANIC!!! NMI received\n");
@@ -144,7 +146,7 @@ static int sam3u_nmi(int irq, FAR void *context)
   return 0;
 }
 
-static int sam3u_busfault(int irq, FAR void *context)
+static int sam_busfault(int irq, FAR void *context)
 {
   (void)irqsave();
   dbg("PANIC!!! Bus fault recived\n");
@@ -152,7 +154,7 @@ static int sam3u_busfault(int irq, FAR void *context)
   return 0;
 }
 
-static int sam3u_usagefault(int irq, FAR void *context)
+static int sam_usagefault(int irq, FAR void *context)
 {
   (void)irqsave();
   dbg("PANIC!!! Usage fault received\n");
@@ -160,7 +162,7 @@ static int sam3u_usagefault(int irq, FAR void *context)
   return 0;
 }
 
-static int sam3u_pendsv(int irq, FAR void *context)
+static int sam_pendsv(int irq, FAR void *context)
 {
   (void)irqsave();
   dbg("PANIC!!! PendSV received\n");
@@ -168,7 +170,7 @@ static int sam3u_pendsv(int irq, FAR void *context)
   return 0;
 }
 
-static int sam3u_dbgmonitor(int irq, FAR void *context)
+static int sam_dbgmonitor(int irq, FAR void *context)
 {
   (void)irqsave();
   dbg("PANIC!!! Debug Monitor receieved\n");
@@ -176,7 +178,7 @@ static int sam3u_dbgmonitor(int irq, FAR void *context)
   return 0;
 }
 
-static int sam3u_reserved(int irq, FAR void *context)
+static int sam_reserved(int irq, FAR void *context)
 {
   (void)irqsave();
   dbg("PANIC!!! Reserved interrupt\n");
@@ -186,7 +188,7 @@ static int sam3u_reserved(int irq, FAR void *context)
 #endif
 
 /****************************************************************************
- * Name: sam3u_prioritize_syscall
+ * Name: sam_prioritize_syscall
  *
  * Description:
  *   Set the priority of an exception.  This function may be needed
@@ -195,7 +197,7 @@ static int sam3u_reserved(int irq, FAR void *context)
  ****************************************************************************/
 
 #ifdef CONFIG_ARMV7M_USEBASEPRI
-static inline void sam3u_prioritize_syscall(int priority)
+static inline void sam_prioritize_syscall(int priority)
 {
   uint32_t regval;
 
@@ -209,7 +211,7 @@ static inline void sam3u_prioritize_syscall(int priority)
 #endif
 
 /****************************************************************************
- * Name: sam3u_irqinfo
+ * Name: sam_irqinfo
  *
  * Description:
  *   Given an IRQ number, provide the register and bit setting to enable or
@@ -217,7 +219,7 @@ static inline void sam3u_prioritize_syscall(int priority)
  *
  ****************************************************************************/
 
-static int sam3u_irqinfo(int irq, uint32_t *regaddr, uint32_t *bit)
+static int sam_irqinfo(int irq, uint32_t *regaddr, uint32_t *bit)
 {
   DEBUGASSERT(irq >= SAM_IRQ_NMI && irq < NR_IRQS);
 
@@ -290,7 +292,7 @@ void up_irqinitialize(void)
 #if defined(CONFIG_ARCH_RAMVECTORS)
   up_ramvec_initialize();
 #elif defined(CONFIG_STM32_DFU)
-  putreg32((uint32_t)sam3u_vectors, NVIC_VECTAB);
+  putreg32((uint32_t)sam_vectors, NVIC_VECTAB);
 #endif
 
   /* Set all interrrupts (and exceptions) to the default priority */
@@ -327,7 +329,7 @@ void up_irqinitialize(void)
 /* up_prioritize_irq(SAM_IRQ_PENDSV, NVIC_SYSH_PRIORITY_MIN); */
 #endif
 #ifdef CONFIG_ARMV7M_USEBASEPRI
-   sam3u_prioritize_syscall(NVIC_SYSH_SVCALL_PRIORITY);
+   sam_prioritize_syscall(NVIC_SYSH_SVCALL_PRIORITY);
 #endif
 
   /* If the MPU is enabled, then attach and enable the Memory Management
@@ -342,18 +344,18 @@ void up_irqinitialize(void)
   /* Attach all other processor exceptions (except reset and sys tick) */
 
 #ifdef CONFIG_DEBUG
-  irq_attach(SAM_IRQ_NMI, sam3u_nmi);
+  irq_attach(SAM_IRQ_NMI, sam_nmi);
 #ifndef CONFIG_ARMV7M_MPU
   irq_attach(SAM_IRQ_MEMFAULT, up_memfault);
 #endif
-  irq_attach(SAM_IRQ_BUSFAULT, sam3u_busfault);
+  irq_attach(SAM_IRQ_BUSFAULT, sam_busfault);
-  irq_attach(SAM_IRQ_USAGEFAULT, sam3u_usagefault);
+  irq_attach(SAM_IRQ_USAGEFAULT, sam_usagefault);
-  irq_attach(SAM_IRQ_PENDSV, sam3u_pendsv);
+  irq_attach(SAM_IRQ_PENDSV, sam_pendsv);
-  irq_attach(SAM_IRQ_DBGMONITOR, sam3u_dbgmonitor);
+  irq_attach(SAM_IRQ_DBGMONITOR, sam_dbgmonitor);
-  irq_attach(SAM_IRQ_RESERVED, sam3u_reserved);
+  irq_attach(SAM_IRQ_RESERVED, sam_reserved);
 #endif
 
-  sam3u_dumpnvic("initial", SAM_IRQ_NIRQS);
+  sam_dumpnvic("initial", SAM_IRQ_NIRQS);
 
 #ifndef CONFIG_SUPPRESS_INTERRUPTS
 
@@ -362,7 +364,7 @@ void up_irqinitialize(void)
    */
 
 #ifdef CONFIG_GPIO_IRQ
-  sam3u_gpioirqinitialize();
+  sam_gpioirqinitialize();
 #endif
 
   /* And finally, enable interrupts */
@@ -385,7 +387,7 @@ void up_disable_irq(int irq)
   uint32_t regval;
   uint32_t bit;
 
-  if (sam3u_irqinfo(irq, &regaddr, &bit) == 0)
+  if (sam_irqinfo(irq, &regaddr, &bit) == 0)
     {
       /* Clear the appropriate bit in the register to enable the interrupt */
 
@@ -398,10 +400,10 @@ void up_disable_irq(int irq)
     {
       /* Maybe it is a (derived) GPIO IRQ */
 
-      sam3u_gpioirqdisable(irq);
+      sam_gpioirqdisable(irq);
     }
 #endif
-  sam3u_dumpnvic("disable", irq);
+  sam_dumpnvic("disable", irq);
 }
 
 /****************************************************************************
@@ -418,7 +420,7 @@ void up_enable_irq(int irq)
   uint32_t regval;
   uint32_t bit;
 
-  if (sam3u_irqinfo(irq, &regaddr, &bit) == 0)
+  if (sam_irqinfo(irq, &regaddr, &bit) == 0)
     {
       /* Set the appropriate bit in the register to enable the interrupt */
 
@@ -431,10 +433,10 @@ void up_enable_irq(int irq)
     {
       /* Maybe it is a (derived) GPIO IRQ */
 
-      sam3u_gpioirqenable(irq);
+      sam_gpioirqenable(irq);
     }
 #endif
-  sam3u_dumpnvic("enable", irq);
+  sam_dumpnvic("enable", irq);
 }
 
 /****************************************************************************
@@ -500,7 +502,7 @@ int up_prioritize_irq(int irq, int priority)
   regval     |= (priority << shift);
   putreg32(regval, regaddr);
 
-  sam3u_dumpnvic("prioritize", irq);
+  sam_dumpnvic("prioritize", irq);
   return OK;
 }
 #endif

arch/arm/src/sam3u/sam_lowputc.c

@@ -1,5 +1,5 @@
 /**************************************************************************
- * arch/arm/src/sam3u/sam3u_lowputc.c
+ * arch/arm/src/sam3u/sam_lowputc.c
  *
  *   Copyright (C) 2010, 2013 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
@@ -47,9 +47,11 @@
 #include "up_internal.h"
 #include "up_arch.h"
 
-#include "sam3u_internal.h"
+#include "sam_gpio.h"
+#include "sam_lowputc.h"
 #include "chip/sam_pmc.h"
 #include "chip/sam_uart.h"
+#include "chip/sam_pinmap.h"
 
 /**************************************************************************
  * Private Definitions
@@ -228,7 +230,7 @@ void up_lowputc(char ch)
 }
 
 /**************************************************************************
- * Name: sam3u_lowsetup
+ * Name: sam_lowsetup
  *
  * Description:
  *   This performs basic initialization of the USART used for the serial
@@ -237,7 +239,7 @@ void up_lowputc(char ch)
  *
  **************************************************************************/
 
-void sam3u_lowsetup(void)
+void sam_lowsetup(void)
 {
   uint32_t regval;
 
@@ -264,44 +266,44 @@ void sam3u_lowsetup(void)
   /* Configure UART pins for all selected UART/USARTs */
 
 #ifdef CONFIG_SAM34_UART
-  (void)sam3u_configgpio(GPIO_UART_RXD);
+  (void)sam_configgpio(GPIO_UART_RXD);
-  (void)sam3u_configgpio(GPIO_UART_TXD);
+  (void)sam_configgpio(GPIO_UART_TXD);
 #endif
 #ifdef CONFIG_SAM34_USART0
-  (void)sam3u_configgpio(GPIO_USART0_RXD);
+  (void)sam_configgpio(GPIO_USART0_RXD);
-  (void)sam3u_configgpio(GPIO_USART0_TXD);
+  (void)sam_configgpio(GPIO_USART0_TXD);
-  (void)sam3u_configgpio(GPIO_USART0_CTS);
+  (void)sam_configgpio(GPIO_USART0_CTS);
-  (void)sam3u_configgpio(GPIO_USART0_RTS);
+  (void)sam_configgpio(GPIO_USART0_RTS);
 #endif
 #ifdef CONFIG_SAM34_USART1
-  (void)sam3u_configgpio(GPIO_USART1_RXD);
+  (void)sam_configgpio(GPIO_USART1_RXD);
-  (void)sam3u_configgpio(GPIO_USART1_TXD);
+  (void)sam_configgpio(GPIO_USART1_TXD);
-  (void)sam3u_configgpio(GPIO_USART1_CTS);
+  (void)sam_configgpio(GPIO_USART1_CTS);
-  (void)sam3u_configgpio(GPIO_USART1_RTS);
+  (void)sam_configgpio(GPIO_USART1_RTS);
 #endif
 #ifdef CONFIG_SAM34_USART2
-  (void)sam3u_configgpio(GPIO_USART2_RXD);
+  (void)sam_configgpio(GPIO_USART2_RXD);
-  (void)sam3u_configgpio(GPIO_USART2_TXD);
+  (void)sam_configgpio(GPIO_USART2_TXD);
-  (void)sam3u_configgpio(GPIO_USART2_CTS);
+  (void)sam_configgpio(GPIO_USART2_CTS);
-  (void)sam3u_configgpio(GPIO_USART2_RTS);
+  (void)sam_configgpio(GPIO_USART2_RTS);
 #endif
 #ifdef CONFIG_SAM34_USART3
-  (void)sam3u_configgpio(GPIO_USART3_RXD);
+  (void)sam_configgpio(GPIO_USART3_RXD);
-  (void)sam3u_configgpio(GPIO_USART3_TXD);
+  (void)sam_configgpio(GPIO_USART3_TXD);
-  (void)sam3u_configgpio(GPIO_USART3_CTS);
+  (void)sam_configgpio(GPIO_USART3_CTS);
-  (void)sam3u_configgpio(GPIO_USART3_RTS);
+  (void)sam_configgpio(GPIO_USART3_RTS);
 #endif
 
 #ifdef GPIO_CONSOLE_RXD
 #endif
 #ifdef GPIO_CONSOLE_TXD
-  (void)sam3u_configgpio(GPIO_CONSOLE_TXD);
+  (void)sam_configgpio(GPIO_CONSOLE_TXD);
 #endif
 #ifdef GPIO_CONSOLE_CTS
-  (void)sam3u_configgpio(GPIO_CONSOLE_CTS);
+  (void)sam_configgpio(GPIO_CONSOLE_CTS);
 #endif
 #ifdef GPIO_CONSOLE_RTS
-  (void)sam3u_configgpio(GPIO_CONSOLE_RTS);
+  (void)sam_configgpio(GPIO_CONSOLE_RTS);
 #endif
 
   /* Configure the console (only) */

arch/arm/src/sam3u/sam_lowputc.h

@@ -0,0 +1,102 @@
+/************************************************************************************
+ * arch/arm/src/sam3u/sam_lowputc.h
+ *
+ *   Copyright (C) 2009-2011, 2013 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <gnutt@nuttx.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_SAM3U_SAM_LOWPUTC_H
+#define __ARCH_ARM_SRC_SAM3U_SAM_LOWPUTC_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+#include <nuttx/compiler.h>
+
+#include <sys/types.h>
+#include <stdint.h>
+#include <stdbool.h>
+
+#include "up_internal.h"
+#include "chip.h"
+
+/************************************************************************************
+ * Definitions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Types
+ ************************************************************************************/
+
+/************************************************************************************
+ * Inline Functions
+ ************************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/************************************************************************************
+ * Public Function Prototypes
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: sam_lowsetup
+ *
+ * Description:
+ *   Called at the very beginning of _start.  Performs low level initialization
+ *   including setup of the console UART.  This UART done early so that the serial
+ *   console is available for debugging very early in the boot sequence.
+ *
+ ************************************************************************************/
+
+void sam_lowsetup(void);
+
+#undef EXTERN
+#if defined(__cplusplus)
+}
+#endif
+
+#endif /* __ASSEMBLY__ */
+#endif /* __ARCH_ARM_SRC_SAM3U_SAM_LOWPUTC_H */

arch/arm/src/sam3u/sam_mpuinit.c

@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/arm/src/common/sam3u_mpuinit.c
+ * arch/arm/src/common/sam_mpuinit.c
  *
  *   Copyright (C) 2011, 2013 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
@@ -44,6 +44,7 @@
 #include <nuttx/userspace.h>
 
 #include "mpu.h"
+#include "sam_mpuinit.h"
 
 #if defined(CONFIG_NUTTX_KERNEL) && defined(CONFIG_ARMV7M_MPU)
 
@@ -72,7 +73,7 @@
  ****************************************************************************/
 
 /****************************************************************************
- * Name: sam3u_mpuinitialize
+ * Name: sam_mpuinitialize
  *
  * Description:
  *   Configure the MPU to permit user-space access to only restricted SAM3/4
@@ -80,7 +81,7 @@
  *
  ****************************************************************************/
 
-void sam3u_mpuinitialize(void)
+void sam_mpuinitialize(void)
 {
   uintptr_t datastart = MIN(USERSPACE->us_datastart, USERSPACE->us_bssstart);
   uintptr_t dataend   = MAX(USERSPACE->us_dataend,   USERSPACE->us_bssend);
@@ -105,7 +106,7 @@ void sam3u_mpuinitialize(void)
 }
 
 /****************************************************************************
- * Name: sam3u_mpu_uheap
+ * Name: sam_mpu_uheap
  *
  * Description:
  *  Map the user-heap region.
@@ -114,7 +115,7 @@ void sam3u_mpuinitialize(void)
  *
  ****************************************************************************/
 
-void sam3u_mpu_uheap(uintptr_t start, size_t size)
+void sam_mpu_uheap(uintptr_t start, size_t size)
 {
   mpu_userintsram(start, size);
 }

arch/arm/src/sam3u/sam_mpuinit.h

@@ -0,0 +1,114 @@
+/************************************************************************************
+ * arch/arm/src/sam3u/sam_mpuinit.h
+ *
+ *   Copyright (C) 2009-2011, 2013 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <gnutt@nuttx.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_SAM3U_SAM_MPUINIT_H
+#define __ARCH_ARM_SRC_SAM3U_SAM_MPUINIT_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <sys/types.h>
+#include <stdint.h>
+
+/************************************************************************************
+ * Definitions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Types
+ ************************************************************************************/
+
+/************************************************************************************
+ * Inline Functions
+ ************************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/************************************************************************************
+ * Public Function Prototypes
+ ************************************************************************************/
+
+/****************************************************************************
+ * Name: sam_mpuinitialize
+ *
+ * Description:
+ *   Configure the MPU to permit user-space access to only unrestricted SAM3/4
+ *   resources.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_NUTTX_KERNEL
+void sam_mpuinitialize(void);
+#else
+#  define sam_mpuinitialize()
+#endif
+
+/****************************************************************************
+ * Name: sam_mpu_uheap
+ *
+ * Description:
+ *  Map the user heap region.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_NUTTX_KERNEL
+void sam_mpu_uheap(uintptr_t start, size_t size);
+#else
+#  define sam_mpu_uheap(start,size)
+#endif
+
+#undef EXTERN
+#if defined(__cplusplus)
+}
+#endif
+
+#endif /* __ASSEMBLY__ */
+#endif /* __ARCH_ARM_SRC_SAM3U_SAM_MPUINIT_H */

arch/arm/src/sam3u/sam_serial.c

@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/arm/src/sam3u/sam3u_serial.c
+ * arch/arm/src/sam3u/sam_serial.c
  *
  *   Copyright (C) 2010, 2012-2013 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
@@ -55,12 +55,13 @@
 #include <arch/serial.h>
 #include <arch/board/board.h>
 
-#include "chip.h"
-#include "chip/sam_uart.h"
 #include "up_arch.h"
 #include "up_internal.h"
 #include "os_internal.h"
 
+#include "chip.h"
+#include "chip/sam_uart.h"
+
 /****************************************************************************
  * Definitions
  ****************************************************************************/
@@ -861,7 +862,7 @@ static int up_setup(struct uart_dev_s *dev)
   uint32_t regval;
 
   /* Note: The logic here depends on the fact that that the USART module
-   * was enabled and the pins were configured in sam3u_lowsetup().
+   * was enabled and the pins were configured in sam_lowsetup().
    */
 
   /* The shutdown method will put the UART in a known, disabled state */
@@ -1132,8 +1133,10 @@ static int up_interrupt(int irq, void *context)
 
 static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
 {
+#ifdef CONFIG_SERIAL_TIOCSERGSTRUCT
   struct inode      *inode = filep->f_inode;
   struct uart_dev_s *dev   = inode->i_private;
+#endif
   int                ret    = OK;
 
   switch (cmd)
@@ -1330,7 +1333,7 @@ static bool up_txempty(struct uart_dev_s *dev)
 void up_earlyserialinit(void)
 {
   /* NOTE:  All GPIO configuration for the USARTs was performed in
-   * sam3u_lowsetup
+   * sam_lowsetup
    */
 
   /* Disable all USARTS */
@@ -1403,7 +1406,7 @@ int up_putc(int ch)
 {
 #ifdef HAVE_CONSOLE
   struct up_dev_s *priv = (struct up_dev_s*)CONSOLE_DEV.priv;
-  uint16_t imr;
+  uint32_t imr;
 
   up_disableallints(priv, &imr);
 

arch/arm/src/sam3u/sam_spi.c

@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/arm/src/sam3u/sam3u_spi.c
+ * arch/arm/src/sam3u/sam_spi.c
  *
  *   Copyright (C) 2011, 2013 Gregory Nutt. All rights reserved.
  *   Authors: Gregory Nutt <gnutt@nuttx.org>
@@ -55,9 +55,11 @@
 #include "up_arch.h"
 
 #include "chip.h"
-#include "sam3u_internal.h"
+#include "sam_gpio.h"
+#include "sam_spi.h"
 #include "chip/sam_pmc.h"
 #include "chip/sam_spi.h"
+#include "chip/sam_pinmap.h"
 
 #ifdef CONFIG_SAM34_SPI
 
@@ -93,7 +95,7 @@
 /* The state of one chip select */
 
 #ifndef CONFIG_SPI_OWNBUS
-struct sam3u_chipselect_s
+struct sam_chipselect_s
 {
   uint32_t         frequency;  /* Requested clock frequency */
   uint32_t         actual;     /* Actual clock frequency */
@@ -104,12 +106,12 @@ struct sam3u_chipselect_s
 
 /* The overall state of the SPI interface */
 
-struct sam3u_spidev_s
+struct sam_spidev_s
 {
   struct spi_dev_s spidev;     /* Externally visible part of the SPI interface */
 #ifndef CONFIG_SPI_OWNBUS
   sem_t            exclsem;    /* Held while chip is selected for mutual exclusion */
-  struct sam3u_chipselect_s csstate[4];
+  struct sam_chipselect_s csstate[4];
 #endif
   uint8_t          cs;         /* Chip select number */
 };
@@ -127,7 +129,7 @@ static void spi_dumpregs(FAR const char *msg);
 #endif
 
 static inline void spi_flush(void);
-static inline uint32_t spi_cs2pcs(FAR struct sam3u_spidev_s *priv);
+static inline uint32_t spi_cs2pcs(FAR struct sam_spidev_s *priv);
 
 /* SPI methods */
 
@@ -164,9 +166,9 @@ static const struct spi_ops_s g_spiops =
   .setfrequency      = spi_setfrequency,
   .setmode           = spi_setmode,
   .setbits           = spi_setbits,
-  .status            = sam3u_spistatus,
+  .status            = sam_spistatus,
 #ifdef CONFIG_SPI_CMDDATA
-  .cmddata           = sam3u_spicmddata,
+  .cmddata           = sam_spicmddata,
 #endif
   .send              = spi_send,
 #ifdef CONFIG_SPI_EXCHANGE
@@ -180,7 +182,7 @@ static const struct spi_ops_s g_spiops =
 
 /* SPI device structure */
 
-static struct sam3u_spidev_s g_spidev =
+static struct sam_spidev_s g_spidev =
 {
   .spidev            = { &g_spiops },
 };
@@ -285,7 +287,7 @@ static inline void spi_flush(void)
  *
  ****************************************************************************/
 
-static inline uint32_t spi_cs2pcs(FAR struct sam3u_spidev_s *priv)
+static inline uint32_t spi_cs2pcs(FAR struct sam_spidev_s *priv)
 {
   return ((uint32_t)1 << (priv->cs)) - 1;
 }
@@ -314,7 +316,7 @@ static inline uint32_t spi_cs2pcs(FAR struct sam3u_spidev_s *priv)
 #ifndef CONFIG_SPI_OWNBUS
 static int spi_lock(FAR struct spi_dev_s *dev, bool lock)
 {
-  FAR struct sam3u_spidev_s *priv = (FAR struct sam3u_spidev_s *)dev;
+  FAR struct sam_spidev_s *priv = (FAR struct sam_spidev_s *)dev;
 
   spivdbg("lock=%d\n", lock);
   if (lock)
@@ -357,7 +359,7 @@ static int spi_lock(FAR struct spi_dev_s *dev, bool lock)
 
  static void spi_select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
  {
-  FAR struct sam3u_spidev_s *priv = (FAR struct sam3u_spidev_s *)dev;
+  FAR struct sam_spidev_s *priv = (FAR struct sam_spidev_s *)dev;
   uint32_t regval;
 
   /* Are we selecting or de-selecting the device? */
@@ -371,7 +373,7 @@ static int spi_lock(FAR struct spi_dev_s *dev, bool lock)
 
       /* Get the chip select number used with this SPI device */
 
-      priv->cs = sam3u_spicsnumber(devid);
+      priv->cs = sam_spicsnumber(devid);
       spivdbg("cs=%d\n", priv->cs);
       DEBUGASSERT(priv->cs >= 0 && priv->cs <= 3);
 
@@ -389,7 +391,7 @@ static int spi_lock(FAR struct spi_dev_s *dev, bool lock)
       /* At this point, we expect the chip to have already been selected */
 
 #ifdef CONFIG_DEBUG
-      int cs = sam3u_spicsnumber(devid);
+      int cs = sam_spicsnumber(devid);
       DEBUGASSERT(priv->cs == cs);
 #endif
 
@@ -402,7 +404,7 @@ static int spi_lock(FAR struct spi_dev_s *dev, bool lock)
    * pins may be programmed by the board specific logic in one of two
    * different ways.  First, the pins may be programmed as SPI peripherals.
    * In that case, the pins are completely controlled by the SPI driver.
-   * This sam3u_spiselect method still needs to be provided, but it may
+   * This sam_spiselect method still needs to be provided, but it may
    * be only a stub.
    *
    * An alternative way to program the PIO chip select pins is as normal
@@ -412,7 +414,7 @@ static int spi_lock(FAR struct spi_dev_s *dev, bool lock)
    * same as the NPCS pin normal associated with the chip select number.
    */
 
-  sam3u_spiselect(devid, selected);
+  sam_spiselect(devid, selected);
  }
 
 /****************************************************************************
@@ -432,7 +434,7 @@ static int spi_lock(FAR struct spi_dev_s *dev, bool lock)
 
 static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
 {
-  FAR struct sam3u_spidev_s *priv = (FAR struct sam3u_spidev_s *)dev;
+  FAR struct sam_spidev_s *priv = (FAR struct sam_spidev_s *)dev;
   uint32_t actual;
   uint32_t scbr;
   uint32_t dlybs;
@@ -543,7 +545,7 @@ static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
 
 static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
 {
-  FAR struct sam3u_spidev_s *priv = (FAR struct sam3u_spidev_s *)dev;
+  FAR struct sam_spidev_s *priv = (FAR struct sam_spidev_s *)dev;
   uint32_t regval;
   uint32_t regaddr;
 
@@ -612,7 +614,7 @@ static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
 
 static void spi_setbits(FAR struct spi_dev_s *dev, int nbits)
 {
-  FAR struct sam3u_spidev_s *priv = (FAR struct sam3u_spidev_s *)dev;
+  FAR struct sam_spidev_s *priv = (FAR struct sam_spidev_s *)dev;
   uint32_t regaddr;
   uint32_t regval;
 
@@ -709,7 +711,7 @@ static void  spi_exchange(FAR struct spi_dev_s *dev,
                           FAR const void *txbuffer, FAR void *rxbuffer,
                           size_t nwords)
 {
-  FAR struct sam3u_spidev_s *priv = (FAR struct sam3u_spidev_s *)dev;
+  FAR struct sam_spidev_s *priv = (FAR struct sam_spidev_s *)dev;
   FAR uint8_t *rxptr = (FAR uint8_t*)rxbuffer;
   FAR uint8_t *txptr = (FAR uint8_t*)txbuffer;
   uint32_t pcs;
@@ -882,7 +884,7 @@ static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer, size_t nw
 
 FAR struct spi_dev_s *up_spiinitialize(int port)
 {
-  FAR struct sam3u_spidev_s *priv = &g_spidev;
+  FAR struct sam_spidev_s *priv = &g_spidev;
   irqstate_t flags;
   uint32_t regval;
 
@@ -909,9 +911,9 @@ FAR struct spi_dev_s *up_spiinitialize(int port)
    * must be configured by board-specific logic.
    */
 
-  sam3u_configgpio(GPIO_SPI0_MISO);
+  sam_configgpio(GPIO_SPI0_MISO);
-  sam3u_configgpio(GPIO_SPI0_MOSI);
+  sam_configgpio(GPIO_SPI0_MOSI);
-  sam3u_configgpio(GPIO_SPI0_SPCK);
+  sam_configgpio(GPIO_SPI0_SPCK);
 
   /* Disable SPI clocking */
 

arch/arm/src/sam3u/sam_spi.h

@@ -0,0 +1,226 @@
+/************************************************************************************
+ * arch/arm/src/sam3u/sam_spi.h
+ *
+ *   Copyright (C) 2009-2011, 2013 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <gnutt@nuttx.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_SAM3U_SAM_SPI_H
+#define __ARCH_ARM_SRC_SAM3U_SAM_SPI_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#include "chip.h"
+
+/************************************************************************************
+ * Definitions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Types
+ ************************************************************************************/
+
+/************************************************************************************
+ * Inline Functions
+ ************************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/************************************************************************************
+ * Public Function Prototypes
+ ************************************************************************************/
+
+/****************************************************************************
+ * Name:  sam_spicsnumber, sam_spiselect, sam_spistatus, and sam_spicmddata
+ *
+ * Description:
+ *   These external functions must be provided by board-specific logic.  They
+ *   include:
+ *
+ *   o sam_spicsnumber and sam_spiselect which are helper functions to
+ *     manage the board-specific aspects of the unique SAM3/4 chip select
+ *     architecture.
+ *   o sam_spistatus and sam_spicmddata:  Implementations of the status
+ *     and cmddata methods of the SPI interface defined by struct spi_ops_
+ *     (see include/nuttx/spi.h). All other methods including
+ *     up_spiinitialize()) are provided by common SAM3/4 logic.
+ *
+ *  To use this common SPI logic on your board:
+ *
+ *   1. Provide logic in sam_boardinitialize() to configure SPI chip select
+ *      pins.
+ *   2. Provide sam_spicsnumber(), sam_spiselect() and sam_spistatus()
+ *      functions in your board-specific logic.  These functions will perform
+ *      chip selection and status operations using GPIOs in the way your board
+ *      is configured.
+ *   2. If CONFIG_SPI_CMDDATA is defined in the NuttX configuration, provide
+ *      sam_spicmddata() functions in your board-specific logic.  This
+ *      function will perform cmd/data selection operations using GPIOs in
+ *      the way your board is configured.
+ *   3. Add a call to up_spiinitialize() in your low level application
+ *      initialization logic
+ *   4. The handle returned by up_spiinitialize() may then be used to bind the
+ *      SPI driver to higher level logic (e.g., calling
+ *      mmcsd_spislotinitialize(), for example, will bind the SPI driver to
+ *      the SPI MMC/SD driver).
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_SAM34_SPI
+struct spi_dev_s;
+enum spi_dev_e;
+
+/****************************************************************************
+ * Name: sam_spicsnumber
+ *
+ * Description:
+ *   The SAM3/4 has 4 CS registers for controlling device features.  This
+ *   function must be provided by board-specific code.  Given a logical device
+ *   ID, this function returns a number from 0 to 3 that identifies one of
+ *   these SAM3/4 CS resources.
+ *
+ *   If CONFIG_SPI_OWNBUS is not defined and the GPIO is controlled by
+ *   sam_spiselect, then the same CS register may be used to control
+ *   multiple devices.
+ *
+ * Input Parameters:
+ *   dev - SPI device info
+ *   devid - Identifies the (logical) device
+ *
+ * Returned Values:
+ *   On success, a CS number from 0 to 3 is returned; A negated errno may
+ *   be returned on a failure.
+ *
+ ****************************************************************************/
+
+int sam_spicsnumber(enum spi_dev_e devid);
+
+/****************************************************************************
+ * Name: sam_spiselect
+ *
+ * Description:
+ *   PIO chip select pins may be programmed by the board specific logic in
+ *   one of two different ways.  First, the pins may be programmed as SPI
+ *   peripherals.  In that case, the pins are completely controlled by the
+ *   SPI driver.  This method still needs to be provided, but it may be only
+ *   a stub.
+ *
+ *   An alternative way to program the PIO chip select pins is as a normal
+ *   GPIO output.  In that case, the automatic control of the CS pins is
+ *   bypassed and this function must provide control of the chip select.
+ *   NOTE:  In this case, the GPIO output pin does *not* have to be the
+ *   same as the NPCS pin normal associated with the chip select number.
+ *
+ * Input Parameters:
+ *   dev - SPI device info
+ *   devid - Identifies the (logical) device
+ *   selected - TRUE:Select the device, FALSE:De-select the device
+ *
+ * Returned Values:
+ *   None
+ *
+ ****************************************************************************/
+
+void sam_spiselect(enum spi_dev_e devid, bool selected);
+
+/****************************************************************************
+ * Name: sam_spistatus
+ *
+ * Description:
+ *   Return status information associated with the SPI device.
+ *
+ * Input Parameters:
+ *   dev - SPI device info
+ *   devid - Identifies the (logical) device
+ *
+ * Returned Values:
+ *   Bit-encoded SPI status (see include/nuttx/spi.h.
+ *
+ ****************************************************************************/
+
+uint8_t sam_spistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
+
+/****************************************************************************
+ * Name: sam_spicmddata
+ *
+ * Description:
+ *   Some SPI devices require an additional control to determine if the SPI
+ *   data being sent is a command or is data.  If CONFIG_SPI_CMDDATA then
+ *   this function will be called to different be command and data transfers.
+ *
+ *   This is often needed, for example, by LCD drivers.  Some LCD hardware
+ *   may be configured to use 9-bit data transfers with the 9th bit
+ *   indicating command or data.  That same hardware may be configurable,
+ *   instead, to use 8-bit data but to require an additional, board-
+ *   specific GPIO control to distinguish command and data.  This function
+ *   would be needed in that latter case.
+ *
+ * Input Parameters:
+ *   dev - SPI device info
+ *   devid - Identifies the (logical) device
+ *
+ * Returned Values:
+ *   Zero on success; a negated errno on failure.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_SPI_CMDDATA
+int sam_spicmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
+#endif
+#endif /* CONFIG_SAM34_SPI */
+
+#undef EXTERN
+#if defined(__cplusplus)
+}
+#endif
+
+#endif /* __ASSEMBLY__ */
+#endif /* __ARCH_ARM_SRC_SAM3U_SAM_SPI_H */

arch/arm/src/sam3u/sam_start.c

@@ -1,8 +1,7 @@
 /****************************************************************************
- * arch/arm/src/sam3u/sam3u_start.c
+ * arch/arm/src/sam3u/sam_start.c
- * arch/arm/src/chip/sam3u_start.c
  *
- *   Copyright (C) 2009-2010, 2012 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2009-2010, 2012-2013 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
  *
  * Redistribution and use in source and binary forms, with or without
@@ -50,7 +49,9 @@
 #include "up_arch.h"
 #include "up_internal.h"
 
-#include "sam3u_internal.h"
+#include "sam_clockconfig.h"
+#include "sam_lowputc.h"
+#include "sam_userspace.h"
 
 /****************************************************************************
  * Private Definitions
@@ -101,8 +102,8 @@ void __start(void)
 
   /* Configure the uart so that we can get debug output as soon as possible */
 
-  sam3u_clockconfig();
+  sam_clockconfig();
-  sam3u_lowsetup();
+  sam_lowsetup();
   showprogress('A');
 
   /* Clear .bss.  We'll do this inline (vs. calling memset) just to be
@@ -141,13 +142,13 @@ void __start(void)
    */
 
 #ifdef CONFIG_NUTTX_KERNEL
-  sam3u_userspace();
+  sam_userspace();
   showprogress('E');
 #endif
 
   /* Initialize onboard resources */
 
-  sam3u_boardinitialize();
+  sam_boardinitialize();
   showprogress('F');
 
   /* Then start NuttX */

arch/arm/src/sam3u/sam_timerisr.c

@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/arm/src/sam3u/sam3u_timerisr.c
+ * arch/arm/src/sam3u/sam_timerisr.c
  *
  *   Copyright (C) 2010, 2013 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
@@ -51,7 +51,6 @@
 #include "up_arch.h"
 
 #include "chip.h"
-#include "sam3u_internal.h"
 
 /****************************************************************************
  * Definitions

arch/arm/src/sam3u/sam_userspace.c

@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/arm/src/sam3u/sam3u_userspace.c
+ * arch/arm/src/sam3u/sam_userspace.c
  *
  *   Copyright (C) 2011, 2013 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
@@ -44,7 +44,7 @@
 
 #include <nuttx/userspace.h>
 
-#include "sam3u_internal.h"
+#include "sam_userspace.h"
 
 #ifdef CONFIG_NUTTX_KERNEL
 
@@ -65,7 +65,7 @@
  ****************************************************************************/
 
 /****************************************************************************
- * Name: sam3u_userspace
+ * Name: sam_userspace
  *
  * Description:
  *   For the case of the separate user-/kernel-space build, perform whatever
@@ -75,7 +75,7 @@
  *
  ****************************************************************************/
 
-void sam3u_userspace(void)
+void sam_userspace(void)
 {
   uint8_t *src;
   uint8_t *dest;
@@ -111,7 +111,7 @@ void sam3u_userspace(void)
 
   /* Configure the MPU to permit user-space access to its FLASH and RAM */
 
-  sam3u_mpuinitialize();
+  sam_mpuinitialize();
 }
 
 #endif /* CONFIG_NUTTX_KERNEL */

arch/arm/src/sam3u/sam_userspace.h

@@ -0,0 +1,105 @@
+/************************************************************************************
+ * arch/arm/src/sam3u/sam_userspace.h
+ *
+ *   Copyright (C) 2009-2011, 2013 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <gnutt@nuttx.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_SAM3U_SAM_USERSPACE_H
+#define __ARCH_ARM_SRC_SAM3U_SAM_USERSPACE_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+#include <nuttx/compiler.h>
+
+#include <sys/types.h>
+#include <stdint.h>
+#include <stdbool.h>
+
+#include "up_internal.h"
+#include "chip.h"
+
+/************************************************************************************
+ * Definitions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Types
+ ************************************************************************************/
+
+/************************************************************************************
+ * Inline Functions
+ ************************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/************************************************************************************
+ * Public Function Prototypes
+ ************************************************************************************/
+
+/****************************************************************************
+ * Name: sam_userspace
+ *
+ * Description:
+ *   For the case of the separate user-/kernel-space build, perform whatever
+ *   platform specific initialization of the user memory is required.
+ *   Normally this just means initializing the user space .data and .bss
+ *   segments.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_NUTTX_KERNEL
+void sam_userspace(void);
+#endif
+
+#undef EXTERN
+#if defined(__cplusplus)
+}
+#endif
+
+#endif /* __ASSEMBLY__ */
+#endif /* __ARCH_ARM_SRC_SAM3U_SAM_USERSPACE_H */

arch/arm/src/sam3u/sam_vectors.S

@@ -1,6 +1,5 @@
 /************************************************************************************************
- * arch/arm/src/sam3u/sam3u_vectors.S
+ * arch/arm/src/sam3u/sam_vectors.S
- * arch/arm/src/chip/sam3u_vectors.S
  *
  *   Copyright (C) 2009-2010, 2013 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
@@ -73,7 +72,7 @@
 
 	.syntax		unified
 	.thumb
-	.file		"sam3u_vectors.S"
+	.file		"sam_vectors.S"
 
 /************************************************************************************************
  * Macros
@@ -89,7 +88,7 @@
 	.thumb_func
 \label:
 	mov		r0, #\irqno
-	b		sam3u_common
+	b		sam_common
 	.endm
 
 /************************************************************************************************
@@ -99,10 +98,10 @@
 	.section	.vectors, "ax"
 	.code		16
 	.align		2
-	.globl		sam3u_vectors
+	.globl		sam_vectors
-	.type		sam3u_vectors, function
+	.type		sam_vectors, function
 
-sam3u_vectors:
+sam_vectors:
 
 /* Processor Exceptions */
 
@@ -125,36 +124,18 @@ sam3u_vectors:
 
 /* External Interrupts */
 
-	.word	sam_supc		/* Vector 16+0:  Supply Controller */
+#undef VECTOR
-	.word	sam_rstc		/* Vector 16+1:  Reset Controller */
+#define VECTOR(l,i) .word l
-	.word	sam_rtc			/* Vector 16+2:  Real Time Clock */
+
-	.word	sam_rtt			/* Vector 16+3:  Real Time Timer */
+#undef UNUSED
-	.word	sam_wdt			/* Vector 16+4:  Watchdog Timer */
+#define UNUSED(i) .word stm32_reserved
-	.word	sam_pmc			/* Vector 16+5:  Power Management Controller */
+
-	.word	sam_eefc0		/* Vector 16+6:  Enhanced Embedded Flash Controller 0 */
+#if defined(CONFIG_ARCH_CHIP_SAM3U)
-	.word	sam_eefc1		/* Vector 16+7:  Enhanced Embedded Flash Controller 1 */
+#  include "chip/sam3u_vectors.h"
-	.word	sam_uart		/* Vector 16+8:  Universal Asynchronous Receiver Transmitter */
+#else
-	.word	sam_smc			/* Vector 16+9:  Static Memory Controller */
+#  Unrecognized SAM architecture
-	.word	sam_pioa		/* Vector 16+10: Parallel I/O Controller A */
+#endif
-	.word	sam_piob		/* Vector 16+11: Parallel I/O Controller B */
+
-	.word	sam_pioc		/* Vector 16+12: Parallel I/O Controller C */
-	.word	sam_usart0		/* Vector 16+13: USART 0 */
-	.word	sam_usart1		/* Vector 16+14: USART 1 */
-	.word	sam_usart2		/* Vector 16+15: USART 2 */
-	.word	sam_usart3		/* Vector 16+16: USART 3 */
-	.word	sam_hsmci		/* Vector 16+17: High Speed Multimedia Card Interface */
-	.word	sam_twi0		/* Vector 16+18: Two-Wire Interface 0 */
-	.word	sam_twi1		/* Vector 16+19: Two-Wire Interface 1 */
-	.word	sam_spi			/* Vector 16+20: Serial Peripheral Interface */
-	.word	sam_ssc			/* Vector 16+21: Synchronous Serial Controller */
-	.word	sam_tc0			/* Vector 16+22: Timer Counter 0 */
-	.word	sam_tc1			/* Vector 16+23: Timer Counter 1 */
-	.word	sam_tc2			/* Vector 16+24: Timer Counter 2 */
-	.word	sam_pwm			/* Vector 16+25: Pulse Width Modulation Controller */
-	.word	sam_adc12b		/* Vector 16+26: 12-bit ADC Controller */
-	.word	sam_adc			/* Vector 16+27: 10-bit ADC Controller */
-	.word	sam_dmac		/* Vector 16+28: DMA Controller */
-	.word	sam_udphs		/* Vector 16+29: USB Device High Speed */
 	.size	sam_vectors, .-sam_vectors
 
 /************************************************************************************************
@@ -176,36 +157,17 @@ handlers:
 	HANDLER	sam_pendsv, SAM_IRQ_PENDSV			/* Vector 14: Penable system service request */
 	HANDLER	sam_systick, SAM_IRQ_SYSTICK		/* Vector 15: System tick */
 
-	HANDLER	sam_supc, SAM_IRQ_SUPC				/* Vector 16+0:  Supply Controller */
+#undef VECTOR
-	HANDLER	sam_rstc, SAM_IRQ_RSTC				/* Vector 16+1:  Reset Controller */
+#define VECTOR(l,i) HANDLER l, i
-	HANDLER	sam_rtc, SAM_IRQ_RTC				/* Vector 16+2:  Real Time Clock */
+
-	HANDLER	sam_rtt, SAM_IRQ_RTT				/* Vector 16+3:  Real Time Timer */
+#undef UNUSED
-	HANDLER	sam_wdt, SAM_IRQ_WDT				/* Vector 16+4:  Watchdog Timer */
+#define UNUSED(i)
-	HANDLER	sam_pmc, SAM_IRQ_PMC				/* Vector 16+5:  Power Management Controller */
+
-	HANDLER	sam_eefc0, SAM_IRQ_EEFC0			/* Vector 16+6:  Enhanced Embedded Flash Controller 0 */
+#if defined(CONFIG_ARCH_CHIP_SAM3U)
-	HANDLER	sam_eefc1, SAM_IRQ_EEFC1			/* Vector 16+7:  Enhanced Embedded Flash Controller 1 */
+#  include "chip/sam3u_vectors.h"
-	HANDLER	sam_uart, SAM_IRQ_UART				/* Vector 16+8:  Universal Asynchronous Receiver Transmitter */
+#else
-	HANDLER	sam_smc, SAM_IRQ_SMC				/* Vector 16+9:  Static Memory Controller */
+#  Unrecognized SAM architecture
-	HANDLER	sam_pioa, SAM_IRQ_PIOA				/* Vector 16+10: Parallel I/O Controller A */
+#endif
-	HANDLER	sam_piob, SAM_IRQ_PIOB				/* Vector 16+11: Parallel I/O Controller B */
-	HANDLER	sam_pioc, SAM_IRQ_PIOC				/* Vector 16+12: Parallel I/O Controller C */
-	HANDLER	sam_usart0, SAM_IRQ_USART0			/* Vector 16+13: USART 0 */
-	HANDLER	sam_usart1, SAM_IRQ_USART1			/* Vector 16+14: USART 1 */
-	HANDLER	sam_usart2, SAM_IRQ_USART2			/* Vector 16+15: USART 2 */
-	HANDLER	sam_usart3, SAM_IRQ_USART3			/* Vector 16+16: USART 3 */
-	HANDLER	sam_hsmci, SAM_IRQ_HSMCI			/* Vector 16+17: High Speed Multimedia Card Interface */
-	HANDLER	sam_twi0, SAM_IRQ_TWI0				/* Vector 16+18: Two-Wire Interface 0 */
-	HANDLER	sam_twi1, SAM_IRQ_TWI1				/* Vector 16+19: Two-Wire Interface 1 */
-	HANDLER	sam_spi, SAM_IRQ_SPI				/* Vector 16+20: Serial Peripheral Interface */
-	HANDLER	sam_ssc, SAM_IRQ_SSC				/* Vector 16+21: Synchronous Serial Controller */
-	HANDLER	sam_tc0, SAM_IRQ_TC0				/* Vector 16+22: Timer Counter 0 */
-	HANDLER	sam_tc1, SAM_IRQ_TC1				/* Vector 16+23: Timer Counter 1 */
-	HANDLER	sam_tc2, SAM_IRQ_TC2				/* Vector 16+24: Timer Counter 2 */
-	HANDLER	sam_pwm, SAM_IRQ_PWM				/* Vector 16+25: Pulse Width Modulation Controller */
-	HANDLER	sam_adc12b, SAM_IRQ_ADC12B			/* Vector 16+26: 12-bit ADC Controller */
-	HANDLER	sam_adc, SAM_IRQ_ADC				/* Vector 16+27: 10-bit ADC Controller */
-	HANDLER	sam_dmac, SAM_IRQ_DMAC				/* Vector 16+28: DMA Controller */
-	HANDLER	sam_udphs, SAM_IRQ_UDPHS			/* Vector 16+29: USB Device High Speed */
 
 /* Common IRQ handling logic.  On entry here, the return stack is on either
  * the PSP or the MSP and looks like the following:
@@ -225,7 +187,7 @@ handlers:
  *      We are in handler mode and the current SP is the MSP
  */
 
-sam3u_common:
+sam_common:
 
 	/* Complete the context save */
 

arch/arm/src/stm32/chip/stm32l15xxx_vectors.h

@@ -56,7 +56,7 @@
 
 #ifdef CONFIG_ARMV7M_CMNVECTOR
 
-/* Reserve 61 interrupt table entries for I/O interrupts. */
+/* Reserve 45 interrupt table entries for I/O interrupts. */
 
 # define ARMV7M_PERIPHERAL_INTERRUPTS 45
 

configs/sam3u-ek/README.txt

@@ -114,7 +114,7 @@ IDEs
      on the command line.
 
   Startup files will probably cause you some headaches.  The NuttX startup file
-  is arch/arm/src/sam3u/sam3u_vectors.S.  You may need to build NuttX
+  is arch/arm/src/sam3u/sam_vectors.S.  You may need to build NuttX
   one time from the Cygwin command line in order to obtain the pre-built
   startup object needed by RIDE.
 
@@ -261,12 +261,14 @@ SAM3U-EK-specific Configuration Options
     CONFIG_ARCH_CHIP_name - For use in C code to identify the exact
        chip:
 
+       CONFIG_ARCH_CHIP_SAM34
+       CONFIG_ARCH_CHIP_SAM3U
        CONFIG_ARCH_CHIP_AT91SAM3U4
 
     CONFIG_ARCH_BOARD - Identifies the configs subdirectory and
        hence, the board that supports the particular chip or SoC.
 
-       CONFIG_ARCH_BOARD=sam3u_ek (for the SAM3U-EK development board)
+       CONFIG_ARCH_BOARD=sam3u-ek (for the SAM3U-EK development board)
 
     CONFIG_ARCH_BOARD_name - For use in C code
 

configs/sam3u-ek/include/board.h

@@ -42,7 +42,6 @@
  ************************************************************************************/
 
 #include <nuttx/config.h>
-#include "sam3u_internal.h"
 
 #ifndef __ASSEMBLY__
 #  include <stdint.h>
@@ -144,7 +143,7 @@ extern "C" {
  * Public Function Prototypes
  ************************************************************************************/
 /************************************************************************************
- * Name: sam3u_boardinitialize
+ * Name: sam_boardinitialize
  *
  * Description:
  *   All SAM3U architectures must provide the following entry point.  This entry point
@@ -153,7 +152,7 @@ extern "C" {
  *
  ************************************************************************************/
 
-EXTERN void sam3u_boardinitialize(void);
+void sam_boardinitialize(void);
 
 /************************************************************************************
  * Name: up_buttoninit
@@ -166,7 +165,7 @@ EXTERN void sam3u_boardinitialize(void);
  ************************************************************************************/
 
 #ifdef CONFIG_ARCH_BUTTONS
-EXTERN void up_buttoninit(void);
+void up_buttoninit(void);
 
 /************************************************************************************
  * Name: up_buttons
@@ -179,7 +178,7 @@ EXTERN void up_buttoninit(void);
  *
  ************************************************************************************/
 
-EXTERN uint8_t up_buttons(void);
+uint8_t up_buttons(void);
 
 /************************************************************************************
  * Name: up_irqbutton
@@ -193,7 +192,7 @@ EXTERN uint8_t up_buttons(void);
  ************************************************************************************/
 
 #ifdef CONFIG_GPIOA_IRQ
-EXTERN xcpt_t up_irqbutton(int id, xcpt_t irqhandler);
+xcpt_t up_irqbutton(int id, xcpt_t irqhandler);
 #endif
 #endif /* CONFIG_ARCH_BUTTONS */
 

configs/sam3u-ek/src/sam3u-ek.h

@@ -1,6 +1,5 @@
 /************************************************************************************
- * configs/sam3uek_eval/src/sam3uek_internal.h
+ * configs/sam3uek_eval/src/sam3u-ek.h
- * arch/arm/src/board/sam3uek_internal.n
  *
  *   Copyright (C) 2009-2011, 2013 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
@@ -34,8 +33,8 @@
  *
  ************************************************************************************/
 
-#ifndef __CONFIGS_SAM3U_EK_SRC_SAM3UEK_INTERNAL_H
+#ifndef __CONFIGS_SAM3U_EK_SRC_SAM3U_EK_H
-#define __CONFIGS_SAM3U_EK_SRC_SAM3UEK_INTERNAL_H
+#define __CONFIGS_SAM3U_EK_SRC_SAM3U_EK_H
 
 /************************************************************************************
  * Included Files
@@ -49,6 +48,8 @@
 #include <arch/irq.h>
 #include <nuttx/irq.h>
 
+#include "chip/sam_pinmap.h"
+
 /************************************************************************************
  * Definitions
  ************************************************************************************/
@@ -191,27 +192,27 @@
  ************************************************************************************/
 
 /************************************************************************************
- * Name: sam3u_spiinitialize
+ * Name: sam_spiinitialize
  *
  * Description:
  *   Called to configure SPI chip select GPIO pins for the SAM3U-EK board.
  *
  ************************************************************************************/
 
-extern void weak_function sam3u_spiinitialize(void);
+extern void weak_function sam_spiinitialize(void);
 
 /************************************************************************************
- * Name: sam3u_usbinitialize
+ * Name: sam_usbinitialize
  *
  * Description:
  *   Called to setup USB-related GPIO pins for the SAM3U-EK board.
  *
  ************************************************************************************/
 
-extern void weak_function sam3u_usbinitialize(void);
+extern void weak_function sam_usbinitialize(void);
 
 /****************************************************************************
- * Name: sam3u_hsmciinit
+ * Name: sam_hsmciinit
  *
  * Description:
  *   Initialize HSMCI support
@@ -219,13 +220,21 @@ extern void weak_function sam3u_usbinitialize(void);
  ****************************************************************************/
 
 #ifdef CONFIG_SAM34_HSMCI
-extern int weak_function sam3u_hsmciinit(void);
+extern int weak_function sam_hsmciinit(void);
 #else
-# define sam3u_hsmciinit()
+# define sam_hsmciinit()
 #endif
 
 /****************************************************************************
- * Name: sam3u_cardinserted
+ * Name: up_ledinit
+ ****************************************************************************/
+
+#ifdef CONFIG_ARCH_LEDS
+void up_ledinit(void);
+#endif
+
+/****************************************************************************
+ * Name: sam_cardinserted
  *
  * Description:
  *   Check if a card is inserted into the selected HSMCI slot
@@ -233,13 +242,13 @@ extern int weak_function sam3u_hsmciinit(void);
  ****************************************************************************/
 
 #ifdef CONFIG_SAM34_HSMCI
-extern bool sam3u_cardinserted(unsigned char slot);
+extern bool sam_cardinserted(unsigned char slot);
 #else
-#  define sam3u_cardinserted(slot) (false)
+#  define sam_cardinserted(slot) (false)
 #endif
 
 /****************************************************************************
- * Name: sam3u_writeprotected
+ * Name: sam_writeprotected
  *
  * Description:
  *   Check if a card is inserted into the selected HSMCI slot
@@ -247,11 +256,11 @@ extern bool sam3u_cardinserted(unsigned char slot);
  ****************************************************************************/
 
 #ifdef CONFIG_SAM34_HSMCI
-extern bool sam3u_writeprotected(unsigned char slot);
+extern bool sam_writeprotected(unsigned char slot);
 #else
-#  define sam3u_writeprotected(slot) (false)
+#  define sam_writeprotected(slot) (false)
 #endif
 
 #endif /* __ASSEMBLY__ */
-#endif /* __CONFIGS_SAM3U_EK_SRC_SAM3UEK_INTERNAL_H */
+#endif /* __CONFIGS_SAM3U_EK_SRC_SAM3U_EK_H */
 

configs/sam3u-ek/src/up_boot.c

@@ -1,6 +1,5 @@
 /************************************************************************************
  * configs/sam3u-ek/src/up_boot.c
- * arch/arm/src/board/up_boot.c
  *
  *   Copyright (C) 2009-2011, 2013 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
@@ -45,7 +44,7 @@
 #include <arch/board/board.h>
 
 #include "up_arch.h"
-#include "sam3uek_internal.h"
+#include "sam3u-ek.h"
 
 /************************************************************************************
  * Definitions
@@ -60,7 +59,7 @@
  ************************************************************************************/
 
 /************************************************************************************
- * Name: sam3u_boardinitialize
+ * Name: sam_boardinitialize
  *
  * Description:
  *   All SAM3U architectures must provide the following entry point.  This entry point
@@ -69,28 +68,28 @@
  *
  ************************************************************************************/
 
-void sam3u_boardinitialize(void)
+void sam_boardinitialize(void)
 {
   /* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak function
-   * sam3u_spiinitialize() has been brought into the link.
+   * sam_spiinitialize() has been brought into the link.
    */
 
 #ifdef CONFIG_SAM34_SPI
-  if (sam3u_spiinitialize)
+  if (sam_spiinitialize)
     {
-      sam3u_spiinitialize();
+      sam_spiinitialize();
     }
 #endif
 
    /* Initialize USB if 1) USBDEV is selected, 2) the USB controller is not
-    * disabled, and 3) the weak function sam3u_usbinitialize() has been brought
+    * disabled, and 3) the weak function sam_usbinitialize() has been brought
     * into the build.
     */
 
 #if defined(CONFIG_USBDEV) && defined(CONFIG_SAM34_USB)
-  if (sam3u_usbinitialize)
+  if (sam_usbinitialize)
     {
-      sam3u_usbinitialize();
+      sam_usbinitialize();
     }
 #endif
 
@@ -101,13 +100,13 @@ void sam3u_boardinitialize(void)
 #endif
 
   /* Setup SD card-related PIOs if 1) HSMCI is selected and 2) the weak
-   * function sam3u_hsmciinit() has been brought into the build.
+   * function sam_hsmciinit() has been brought into the build.
     */
 
 #ifdef CONFIG_SAM34_HSMCI
-  if (sam3u_hsmciinit)
+  if (sam_hsmciinit)
     {
-      sam3u_hsmciinit();
+      sam_hsmciinit();
     }
 #endif
 }

configs/sam3u-ek/src/up_buttons.c

@@ -46,8 +46,8 @@
 #include <arch/irq.h>
 #include <arch/board/board.h>
 
-#include "sam3u_internal.h"
+#include "sam_gpio.h"
-#include "sam3uek_internal.h"
+#include "sam3u-ek.h"
 
 #ifdef CONFIG_ARCH_BUTTONS
 
@@ -93,9 +93,9 @@ static xcpt_t up_irqbuttonx(int irq, xcpt_t irqhandler, xcpt_t *store)
 
   /* Configure the interrupt */
 
-  sam3u_gpioirq(irq);
+  sam_gpioirq(irq);
   (void)irq_attach(irq, irqhandler);
-  sam3u_gpioirqenable(irq);
+  sam_gpioirqenable(irq);
   irqrestore(flags);
 
   /* Return the old button handler (so that it can be restored) */
@@ -121,8 +121,8 @@ static xcpt_t up_irqbuttonx(int irq, xcpt_t irqhandler, xcpt_t *store)
 
 void up_buttoninit(void)
 {
-  (void)sam3u_configgpio(GPIO_BUTTON1);
+  (void)sam_configgpio(GPIO_BUTTON1);
-  (void)sam3u_configgpio(GPIO_BUTTON2);
+  (void)sam_configgpio(GPIO_BUTTON2);
 }
 
 /************************************************************************************
@@ -140,8 +140,8 @@ uint8_t up_buttons(void)
 {
   uint8_t retval;
 
-  retval  = sam3u_gpioread(GPIO_BUTTON1) ? 0 : GPIO_BUTTON1;
+  retval  = sam_gpioread(GPIO_BUTTON1) ? 0 : GPIO_BUTTON1;
-  retval |= sam3u_gpioread(GPIO_BUTTON2) ? 0 : GPIO_BUTTON2;
+  retval |= sam_gpioread(GPIO_BUTTON2) ? 0 : GPIO_BUTTON2;
 
   return retval;
 }

configs/sam3u-ek/src/up_leds.c

@@ -49,8 +49,8 @@
 #include "chip.h"
 #include "up_arch.h"
 #include "up_internal.h"
-#include "sam3u_internal.h"
+#include "sam_gpio.h"
-#include "sam3uek_internal.h"
+#include "sam3u-ek.h"
 
 #ifdef CONFIG_ARCH_LEDS
 
@@ -144,7 +144,7 @@ static void up_setled(uint16_t pinset, uint8_t state)
         return;
     }
 
-  sam3u_gpiowrite(pinset, polarity);
+  sam_gpiowrite(pinset, polarity);
 }
 
 /****************************************************************************
@@ -168,9 +168,9 @@ static void up_setleds(uint8_t state)
 
 void up_ledinit(void)
 {
-  (void)sam3u_configgpio(GPIO_LED0);
+  (void)sam_configgpio(GPIO_LED0);
-  (void)sam3u_configgpio(GPIO_LED1);
+  (void)sam_configgpio(GPIO_LED1);
-  (void)sam3u_configgpio(GPIO_LED2);
+  (void)sam_configgpio(GPIO_LED2);
 }
 
 /****************************************************************************

configs/sam3u-ek/src/up_mmcsd.c

@@ -1,6 +1,5 @@
 /************************************************************************************
  * configs/sam3u-ek/src/up_mmcsd.c
- * arch/arm/src/board/up_mmcsd.c
  *
  *   Copyright (C) 2010, 2013 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
@@ -43,8 +42,8 @@
 #include <stdbool.h>
 #include <debug.h>
 
-#include "sam3u_internal.h"
+#include "sam_gpio.h"
-#include "sam3uek_internal.h"
+#include "sam3u-ek.h"
 
 #ifdef CONFIG_SAM34_HSMCI
 
@@ -55,7 +54,7 @@
 /* This needs to be extended.  The card detect GPIO must be configured as an interrupt.
  * when the interrupt indicating that a card has been inserted or removed is received,
  * this function must call sio_mediachange() to handle that event.  See
- * arch/arm/src/sam3u/sam3u_internal.h for more information.
+ * arch/arm/src/sam3u/sam_hsmci.h for more information.
  */
 
 #ifdef GPIO_MCI_CD
@@ -71,7 +70,7 @@
  ************************************************************************************/
 
 /************************************************************************************
- * Name: sam3u_hsmciinit
+ * Name: sam_hsmciinit
  *
  * Description:
  *   Initialize HSMCI support.  This function is called very early in board
@@ -79,31 +78,31 @@
  *
  ************************************************************************************/
 
-int sam3u_hsmciinit(void)
+int sam_hsmciinit(void)
 {
 #ifdef GPIO_MCI_CD
-  sam3u_configgpio(GPIO_MCI_CD);
+  sam_configgpio(GPIO_MCI_CD);
 #endif
 #ifdef GPIO_MCI_WP
-  sam3u_configgpio(GPIO_MCI_WP);
+  sam_configgpio(GPIO_MCI_WP);
 #endif
   return OK;
 }
 
 /************************************************************************************
- * Name: sam3u_cardinserted
+ * Name: sam_cardinserted
  *
  * Description:
  *   Check if a card is inserted into the selected HSMCI slot
  *
  ************************************************************************************/
 
-bool sam3u_cardinserted(unsigned char slot)
+bool sam_cardinserted(unsigned char slot)
 {
   if (slot == 0)
     {
 #ifdef GPIO_MCI_CD
-      bool inserted = sam3u_gpioread(GPIO_MCI_CD);
+      bool inserted = sam_gpioread(GPIO_MCI_CD);
       fvdbg("inserted: %s\n", inserted ? "NO" : "YES");
       return !inserted;
 #else
@@ -114,19 +113,19 @@ bool sam3u_cardinserted(unsigned char slot)
 }
 
 /************************************************************************************
- * Name: sam3u_writeprotected
+ * Name: sam_writeprotected
  *
  * Description:
  *   Check if a card is inserted into the selected HSMCI slot
  *
  ************************************************************************************/
 
-bool sam3u_writeprotected(unsigned char slot)
+bool sam_writeprotected(unsigned char slot)
 {
   if (slot == 0)
     {
 #ifdef GPIO_MCI_WP
-      bool protected = sam3u_gpioread(GPIO_MCI_WP);
+      bool protected = sam_gpioread(GPIO_MCI_WP);
       fvdbg("protected: %s\n", inserted ? "YES" : "NO");
       return protected;
 #else

configs/sam3u-ek/src/up_nsh.c

@@ -1,6 +1,5 @@
 /****************************************************************************
  * config/sam3u-ek/src/up_nsh.c
- * arch/arm/src/board/up_nsh.c
  *
  *   Copyright (C) 2010, 2013 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
@@ -48,8 +47,8 @@
 #include <nuttx/sdio.h>
 #include <nuttx/mmcsd.h>
 
-#include "sam3u_internal.h"
+#include "sam_hsmci.h"
-#include "sam3uek_internal.h"
+#include "sam3u-ek.h"
 
 #ifdef CONFIG_SAM34_HSMCI
 
@@ -152,7 +151,7 @@ int nsh_archinitialize(void)
 
   /* Then inform the HSMCI driver if there is or is not a card in the slot. */
 
-   sdio_mediachange(sdio, sam3u_cardinserted(0));
+   sdio_mediachange(sdio, sam_cardinserted(0));
 #endif
   return OK;
 }

configs/sam3u-ek/src/up_spi.c

@@ -1,6 +1,5 @@
 /************************************************************************************
  * configs/sam3u-ek/src/up_spi.c
- * arch/arm/src/board/up_spi.c
  *
  *   Copyright (C) 2009, 2011, 2013 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
@@ -50,8 +49,9 @@
 
 #include "up_arch.h"
 #include "chip.h"
-#include "sam3u_internal.h"
+#include "sam_gpio.h"
-#include "sam3uek_internal.h"
+#include "sam_spi.h"
+#include "sam3u-ek.h"
 
 #ifdef CONFIG_SAM34_SPI
 
@@ -86,14 +86,14 @@
  ************************************************************************************/
 
 /************************************************************************************
- * Name: sam3u_spiinitialize
+ * Name: sam_spiinitialize
  *
  * Description:
  *   Called to configure SPI chip select GPIO pins for the SAM3U10E-EVAL board.
  *
  ************************************************************************************/
 
-void weak_function sam3u_spiinitialize(void)
+void weak_function sam_spiinitialize(void)
 {
   /* The ZigBee module connects used NPCS0.  However, there is not yet any
    * ZigBee support.
@@ -102,36 +102,35 @@ void weak_function sam3u_spiinitialize(void)
    /* The touchscreen connects using NPCS2 (PC14). */
 
 #if defined(CONFIG_INPUT) && defined(CONFIG_INPUT_ADS7843E)
-   sam3u_configgpio(GPIO_TSC_NPCS2);
+   sam_configgpio(GPIO_TSC_NPCS2);
 #endif
 }
 
 /****************************************************************************
- * Name:  sam3u_spicsnumber, sam3u_spiselect, sam3u_spistatus, and
+ * Name:  sam_spicsnumber, sam_spiselect, sam_spistatus, and sam_spicmddata
- *        sam3u_spicmddata
  *
  * Description:
  *   These external functions must be provided by board-specific logic.  They
  *   include:
  *
- *   o sam3u_spicsnumbe and sam3u_spiselect which are helper functions to
+ *   o sam_spicsnumber and sam_spiselect which are helper functions to
  *     manage the board-specific aspects of the unique SAM3U chip select
  *     architecture.
- *   o sam3u_spistatus and sam3u_spicmddata:  Implementations of the status
+ *   o sam_spistatus and sam_spicmddata:  Implementations of the status
  *     and cmddata methods of the SPI interface defined by struct spi_ops_
  *     (see include/nuttx/spi.h). All other methods including
  *     up_spiinitialize()) are provided by common SAM3U logic.
  *
  *  To use this common SPI logic on your board:
  *
- *   1. Provide logic in sam3u_boardinitialize() to configure SPI chip select
+ *   1. Provide logic in sam_boardinitialize() to configure SPI chip select
  *      pins.
- *   2. Provide sam3u_spicsnumber(), sam3u_spiselect() and sam3u_spistatus()
+ *   2. Provide sam_spicsnumber(), sam_spiselect() and sam_spistatus()
  *      functions in your board-specific logic.  These functions will perform
  *      chip selection and status operations using GPIOs in the way your board
  *      is configured.
  *   2. If CONFIG_SPI_CMDDATA is defined in the NuttX configuration, provide
- *      sam3u_spicmddata() functions in your board-specific logic.  This
+ *      sam_spicmddata() functions in your board-specific logic.  This
  *      function will perform cmd/data selection operations using GPIOs in
  *      the way your board is configured.
  *   3. Add a call to up_spiinitialize() in your low level application
@@ -144,7 +143,7 @@ void weak_function sam3u_spiinitialize(void)
  ****************************************************************************/
 
 /****************************************************************************
- * Name: sam3u_spicsnumber
+ * Name: sam_spicsnumber
  *
  * Description:
  *   The SAM3U has 4 CS registers for controlling device features.  This
@@ -161,7 +160,7 @@ void weak_function sam3u_spiinitialize(void)
  *
  ****************************************************************************/
 
-int sam3u_spicsnumber(enum spi_dev_e devid)
+int sam_spicsnumber(enum spi_dev_e devid)
 {
   int cs = -EINVAL;
 
@@ -179,7 +178,7 @@ int sam3u_spicsnumber(enum spi_dev_e devid)
 }
 
 /****************************************************************************
- * Name: sam3u_spiselect
+ * Name: sam_spiselect
  *
  * Description:
  *   PIO chip select pins may be programmed by the board specific logic in
@@ -203,7 +202,7 @@ int sam3u_spicsnumber(enum spi_dev_e devid)
  *
  ****************************************************************************/
 
-void sam3u_spiselect(enum spi_dev_e devid, bool selected)
+void sam_spiselect(enum spi_dev_e devid, bool selected)
 {
   /* The touchscreen chip select is implemented as a GPIO OUTPUT that must
    * be controlled by this function.  This is because the ADS7843E driver
@@ -216,13 +215,13 @@ void sam3u_spiselect(enum spi_dev_e devid, bool selected)
 #if defined(CONFIG_INPUT) && defined(CONFIG_INPUT_ADS7843E)
   if (devid == SPIDEV_TOUCHSCREEN)
     {
-      sam3u_gpiowrite(GPIO_TSC_NPCS2, !selected);
+      sam_gpiowrite(GPIO_TSC_NPCS2, !selected);
     }
 #endif
 }
 
 /****************************************************************************
- * Name: sam3u_spistatus
+ * Name: sam_spistatus
  *
  * Description:
  *   Return status information associated with the SPI device.
@@ -235,7 +234,7 @@ void sam3u_spiselect(enum spi_dev_e devid, bool selected)
  *
  ****************************************************************************/
 
-uint8_t sam3u_spistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
+uint8_t sam_spistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 {
   return 0;
 }

configs/sam3u-ek/src/up_touchscreen.c

@@ -50,8 +50,8 @@
 #include <nuttx/input/touchscreen.h>
 #include <nuttx/input/ads7843e.h>
 
-#include "sam3u_internal.h"
+#include "sam_gpio.h"
-#include "sam3uek_internal.h"
+#include "sam3u-ek.h"
 
 /****************************************************************************
  * Pre-Processor Definitions
@@ -165,11 +165,11 @@ static void tsc_enable(FAR struct ads7843e_config_s *state, bool enable)
   ivdbg("IRQ:%d enable:%d\n", SAM_TCS_IRQ, enable);
   if (enable)
     {
-      sam3u_gpioirqenable(SAM_TCS_IRQ);
+      sam_gpioirqenable(SAM_TCS_IRQ);
     }
   else
     {
-      sam3u_gpioirqdisable(SAM_TCS_IRQ);
+      sam_gpioirqdisable(SAM_TCS_IRQ);
     }
 }
 
@@ -186,7 +186,7 @@ static bool tsc_busy(FAR struct ads7843e_config_s *state)
 
   /* REVISIT:  This might need to be inverted */
 
-  bool busy = sam3u_gpioread(GPIO_TCS_BUSY);
+  bool busy = sam_gpioread(GPIO_TCS_BUSY);
 #if defined(CONFIG_DEBUG_INPUT) && defined(CONFIG_DEBUG_VERBOSE)
   if (busy != last)
     {
@@ -201,7 +201,7 @@ static bool tsc_pendown(FAR struct ads7843e_config_s *state)
 {
   /* REVISIT:  This might need to be inverted */
 
-  bool pendown = sam3u_gpioread(GPIO_TCS_IRQ);
+  bool pendown = sam_gpioread(GPIO_TCS_IRQ);
   ivdbg("pendown:%d\n", pendown);
   return pendown;
 }
@@ -238,12 +238,12 @@ int arch_tcinitialize(int minor)
 
   /* Configure and enable the ADS7843E interrupt pin as an input */
 
-  (void)sam3u_configgpio(GPIO_TCS_BUSY);
+  (void)sam_configgpio(GPIO_TCS_BUSY);
-  (void)sam3u_configgpio(GPIO_TCS_IRQ);
+  (void)sam_configgpio(GPIO_TCS_IRQ);
 
   /* Configure the PIO interrupt */
 
-  sam3u_gpioirq(GPIO_TCS_IRQ);
+  sam_gpioirq(GPIO_TCS_IRQ);
 
   /* Get an instance of the SPI interface */
 

configs/sam3u-ek/src/up_usbdev.c

@@ -1,6 +1,5 @@
 /************************************************************************************
  * configs/sam3u-ek/src/up_usbdev.c
- * arch/arm/src/board/up_usbdev.c
  *
  *   Copyright (C) 2009-2010 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
@@ -49,8 +48,7 @@
 #include <nuttx/usb/usbdev_trace.h>
 
 #include "up_arch.h"
-#include "sam3u_internal.h"
+#include "sam3u-ek.h"
-#include "sam3uek_internal.h"
 
 /************************************************************************************
  * Definitions
@@ -65,46 +63,46 @@
  ************************************************************************************/
 
 /************************************************************************************
- * Name: sam3u_usbinitialize
+ * Name: sam_usbinitialize
  *
  * Description:
  *   Called to setup USB-related GPIO pins for the SAM3U-EK board.
  *
  ************************************************************************************/
 
-void sam3u_usbinitialize(void)
+void sam_usbinitialize(void)
 {
 }
 
 /************************************************************************************
- * Name:  sam3u_usbpullup
+ * Name:  sam_usbpullup
  *
  * Description:
  *   If USB is supported and the board supports a pullup via GPIO (for USB software
- *   connect and disconnect), then the board software must provide sam3u_pullup.
+ *   connect and disconnect), then the board software must provide sam_pullup.
  *   See include/nuttx/usb/usbdev.h for additional description of this method.
  *   Alternatively, if no pull-up GPIO the following EXTERN can be redefined to be
  *   NULL.
  *
  ************************************************************************************/
 
-int sam3u_usbpullup(FAR struct usbdev_s *dev, bool enable)
+int sam_usbpullup(FAR struct usbdev_s *dev, bool enable)
 {
   return 0;
 }
 
 /************************************************************************************
- * Name:  sam3u_usbsuspend
+ * Name:  sam_usbsuspend
  *
  * Description:
- *   Board logic must provide the sam3u_usbsuspend logic if the USBDEV driver is
+ *   Board logic must provide the sam_usbsuspend logic if the USBDEV driver is
  *   used.  This function is called whenever the USB enters or leaves suspend mode.
  *   This is an opportunity for the board logic to shutdown clocks, power, etc.
  *   while the USB is suspended.
  *
  ************************************************************************************/
 
-void sam3u_usbsuspend(FAR struct usbdev_s *dev, bool resume)
+void sam_usbsuspend(FAR struct usbdev_s *dev, bool resume)
 {
   ulldbg("resume: %d\n", resume);
 }

configs/sam3u-ek/src/up_usbmsc.c

@@ -48,9 +48,9 @@
 #include <nuttx/sdio.h>
 #include <nuttx/mmcsd.h>
 
-#include "sam3u_internal.h"
+#include "sam_hsmci.h"
 
-#ifdef CONFIG_SAM34_SDIO
+#ifdef CONFIG_SAM34_HSMCI
 
 /****************************************************************************
  * Pre-Processor Definitions
@@ -149,4 +149,4 @@ int usbmsc_archinitialize(void)
    return OK;
 }
 
-#endif /* CONFIG_SAM34_SDIO */
+#endif /* CONFIG_SAM34_HSMCI */