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SAMV7: Add interrupt-related logic
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@@ -1,7 +1,7 @@
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/****************************************************************************
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* arch/arm/src/sam34/sam_irq.c
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*
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* Copyright (C) 2009, 2011, 2013-2014 Gregory Nutt. All rights reserved.
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* Copyright (C) 2009, 2011, 2013-2015 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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@@ -56,7 +56,7 @@
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#endif
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/****************************************************************************
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* Definitions
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* Pre-processor Definitions
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****************************************************************************/
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/* Get a 32-bit version of the default priority */
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@@ -79,7 +79,6 @@
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****************************************************************************/
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volatile uint32_t *current_regs;
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extern uint32_t _vectors[];
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/****************************************************************************
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@@ -105,23 +104,45 @@ static void sam_dumpnvic(const char *msg, int irq)
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flags = irqsave();
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lldbg("NVIC (%s, irq=%d):\n", msg, irq);
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lldbg(" INTCTRL: %08x VECTAB: %08x\n",
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lldbg(" INTCTRL: %08x VECTAB: %08x\n",
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getreg32(NVIC_INTCTRL), getreg32(NVIC_VECTAB));
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#if 0
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lldbg(" SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x SYSTICK: %08x\n",
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getreg32(NVIC_SYSHCON_MEMFAULTENA), getreg32(NVIC_SYSHCON_BUSFAULTENA),
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getreg32(NVIC_SYSHCON_USGFAULTENA), getreg32(NVIC_SYSTICK_CTRL_ENABLE));
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#endif
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lldbg(" IRQ ENABLE: %08x\n", getreg32(NVIC_IRQ0_31_ENABLE));
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lldbg(" IRQ ENABLE: %08x %08x %08x\n",
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getreg32(NVIC_IRQ0_31_ENABLE), getreg32(NVIC_IRQ32_63_ENABLE),
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getreg32(NVIC_IRQ64_95_ENABLE));
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lldbg(" SYSH_PRIO: %08x %08x %08x\n",
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getreg32(NVIC_SYSH4_7_PRIORITY), getreg32(NVIC_SYSH8_11_PRIORITY),
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getreg32(NVIC_SYSH12_15_PRIORITY));
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lldbg(" IRQ PRIO: %08x %08x %08x %08x\n",
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getreg32(NVIC_IRQ0_3_PRIORITY), getreg32(NVIC_IRQ4_7_PRIORITY),
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getreg32(NVIC_IRQ8_11_PRIORITY), getreg32(NVIC_IRQ12_15_PRIORITY));
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#if SAM_IRQ_NEXTINT > 15
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lldbg(" %08x %08x %08x %08x\n",
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getreg32(NVIC_IRQ16_19_PRIORITY), getreg32(NVIC_IRQ20_23_PRIORITY),
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getreg32(NVIC_IRQ24_27_PRIORITY), getreg32(NVIC_IRQ28_31_PRIORITY));
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#endif
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#if SAM_IRQ_NEXTINT > 31
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lldbg(" %08x %08x %08x %08x\n",
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getreg32(NVIC_IRQ32_35_PRIORITY), getreg32(NVIC_IRQ36_39_PRIORITY),
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getreg32(NVIC_IRQ40_43_PRIORITY), getreg32(NVIC_IRQ44_47_PRIORITY));
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#endif
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#if SAM_IRQ_NEXTINT > 47
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lldbg(" %08x %08x %08x %08x\n",
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getreg32(NVIC_IRQ48_51_PRIORITY), getreg32(NVIC_IRQ52_55_PRIORITY),
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getreg32(NVIC_IRQ56_59_PRIORITY), getreg32(NVIC_IRQ60_63_PRIORITY));
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#endif
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#if SAM_IRQ_NEXTINT > 63
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lldbg(" %08x %08x %08x %08x\n",
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getreg32(NVIC_IRQ64_67_PRIORITY), getreg32(NVIC_IRQ68_71_PRIORITY),
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getreg32(NVIC_IRQ72_75_PRIORITY), getreg32(NVIC_IRQ76_79_PRIORITY));
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#endif
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#if SAM_IRQ_NEXTINT > 79
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# warning Missing logic
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#endif
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irqrestore(flags);
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}
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#else
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@@ -133,7 +154,7 @@ static void sam_dumpnvic(const char *msg, int irq)
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* sam_pendsv, sam_reserved
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*
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* Description:
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* Handlers for various execptions. None are handled and all are fatal
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* Handlers for various exceptions. None are handled and all are fatal
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* error conditions. The only advantage these provided over the default
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* unexpected interrupt handler is that they provide a diagnostic output.
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*
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@@ -151,7 +172,7 @@ static int sam_nmi(int irq, FAR void *context)
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static int sam_busfault(int irq, FAR void *context)
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{
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(void)irqsave();
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dbg("PANIC!!! Bus fault recived\n");
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dbg("PANIC!!! Bus fault received: %08x\n", getreg32(NVIC_CFAULTS));
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PANIC();
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return 0;
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}
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@@ -159,7 +180,7 @@ static int sam_busfault(int irq, FAR void *context)
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static int sam_usagefault(int irq, FAR void *context)
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{
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(void)irqsave();
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dbg("PANIC!!! Usage fault received\n");
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dbg("PANIC!!! Usage fault received: %08x\n", getreg32(NVIC_CFAULTS));
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PANIC();
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return 0;
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}
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@@ -268,6 +289,8 @@ static int sam_irqinfo(int irq, uintptr_t *regaddr, uint32_t *bit,
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*bit = 1 << (extint - 64);
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}
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else
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#else
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# warning Missing logic
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#endif
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{
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return ERROR; /* Invalid interrupt */
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@@ -345,6 +368,16 @@ void up_irqinitialize(void)
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putreg32(0, regaddr);
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}
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/* Colorize the interrupt stack for debug purposes */
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#if defined(CONFIG_STACK_COLORATION) && CONFIG_ARCH_INTERRUPTSTACK > 3
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{
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size_t intstack_size = (CONFIG_ARCH_INTERRUPTSTACK & ~3);
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up_stack_color((FAR void *)((uintptr_t)&g_intstackbase - intstack_size),
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intstack_size);
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}
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#endif
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/* Set up the vector table address.
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*
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* If CONFIG_ARCH_RAMVECTORS is defined, then we are using a RAM-based
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@@ -488,7 +521,10 @@ void up_disable_irq(int irq)
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sam_gpioirqdisable(irq);
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}
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#endif
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#if 0 /* Might be useful in early bring-up */
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sam_dumpnvic("disable", irq);
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#endif
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}
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/****************************************************************************
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@@ -532,7 +568,10 @@ void up_enable_irq(int irq)
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sam_gpioirqenable(irq);
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}
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#endif
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#if 0 /* Might be useful in early bring-up */
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sam_dumpnvic("enable", irq);
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#endif
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}
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/****************************************************************************
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@@ -91,7 +91,7 @@ endif
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# Required SAM3/4 files
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CHIP_ASRCS =
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CHIP_CSRCS = sam_start.c sam_clockconfig.c
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CHIP_CSRCS = sam_start.c sam_clockconfig.c sam_irq.c
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# Configuration-dependent SAM3/4 files
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