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Move all SAMA5 EHCI interrupt handling to the worker thread

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This commit is contained in:
Gregory Nutt
2013-08-21 11:07:42 -06:00
parent e5208a6e92
commit b1864a995e
4 changed files with 442 additions and 29 deletions
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arch/arm/src/sama5/Kconfig
+3 -3
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@@ -386,14 +386,14 @@ config SAMA5_EHCI_NQHS
default 4
---help---
Configurable number of Queue Head (QH) structures. The default is
one per Root hub port plus one for EP0.
one per Root hub port plus one for EP0 (4).
config SAMA5_EHCI_NQTDS
int "Number of Queue Element Transfer Descriptor (qTDs)"
default 4
default 6
---help---
Configurable number of Queue Element Transfer Descriptor (qTDs).
The default is one per root hub plus three from EP0.
The default is one per root hub plus three from EP0 (6).
config SAMA5_EHCI_BUFSIZE
int "Size of one request/descriptor buffer"
arch/arm/src/sama5/sam_ehci.c
+407 -23
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configs/sama5d3x-ek/README.txt
+27 -1
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@@ -1166,7 +1166,7 @@ Configurations
volume when it is removed. But those callbacks are not used in
this configuration.
10) Support the USB full-speed OHCI host driver can be enabled by change
10) Support the USB full-speed OHCI host driver can be enabled by changing
the NuttX configuration file as follows:
System Type -> ATSAMA5 Peripheral Support
@@ -1193,6 +1193,28 @@ Configurations
multiple of the 48MHz needed for OHCI. The delay loop calibration
values that are used will be off slightly because of this.
10) Support the USB high-speed EHCI host driver can be enabled by changing
the NuttX configuration file as follows:
System Type -> ATSAMA5 Peripheral Support
CONFIG_SAMA5_UHPHS=y : USB Host High Speed
System Type -> USB High Speed Host driver options
CONFIG_SAMA5_EHCI=y : High-speed EHCI support
: Defaults for values probably OK
Device Drivers
CONFIG_USBHOST=y : Enable USB host support
Device Drivers -> USB Host Driver Support
CONFIG_USBHOST_ISOC_DISABLE=y : Isochronous endpoints not used
CONFIG_USBHOST_MSC=y : Enable the mass storage class driver
Library Routines
CONFIG_SCHED_WORKQUEUE : Worker thread support is required
Application Configuration -> NSH Library
CONFIG_NSH_ARCHINIT=y : NSH board-initialization
STATUS:
2013-7-19: This configuration (as do the others) run at 396MHz.
The SAMA5D3 can run at 536MHz. I still need to figure out the
@@ -1255,6 +1277,10 @@ Configurations
d) OHCI will support 3 downstream points, but I currently have only
one enabled.
2013-8-20: Added description to add EHCI to the configuration. At
present, however, EHCI is still a work in progress and not ready for
prime time.
ostest:
This configuration directory, performs a simple OS test using
examples/ostest.
include/nuttx/usb/ehci.h
+5 -2
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@@ -282,11 +282,11 @@
#define EHCI_INT_USBINT (1 << 0) /* Bit 0: USB Interrupt */
#define EHCI_INT_USBERRINT (1 << 1) /* Bit 1: USB Error Interrupt */
#define EHCI_INT_PCHG (1 << 2) /* Bit 2: Port Change Detect */
#define EHCI_INT_PORTSC (1 << 2) /* Bit 2: Port Change Detect */
#define EHCI_INT_FLROLL (1 << 3) /* Bit 3: Frame List Rollover */
#define EHCI_INT_SYSERROR (1 << 4) /* Bit 4: Host System Error */
#define EHCI_INT_AAINT (1 << 5) /* Bit 5: Interrupt on Async Advance */
#define ECHI_INT_ALLINTS (0x3f) /* Bits 0-5: All interrupts */
/* Bits 6-11: Reserved */
#define EHCI_USBSTS_HALTED (1 << 12) /* Bit 12: HC Halted */
#define EHCI_USBSTS_RECLAM (1 << 13) /* Bit 13: Reclamation */
@@ -352,6 +352,9 @@
#define EHCI_PORTSC_WKOCE (1 << 22) /* Bit 22: Wake on Over-current Enable */
/* Bits 23-31: Reserved */
#define EHCI_PORTSC_ALLINTS (EHCI_PORTSC_CSC | EHCI_PORTSC_PEC | \
EHCI_PORTSC_OCC | EHCI_PORTSC_RESUME)
/* Data Structures **************************************************************************/
/* Paragraph 3 */