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arch/arm, board/arm: Rename all up_ramvec_* functions to arm_ramvec_*
Summary The naming standard at https://cwiki.apache.org/confluence/display/NUTTX/Naming+FAQ requires that all MCU-private functions begin with the name of the architecture, not up_. This PR addresses only these name changes for the ARM-private functions up_ramvec_initialize() and up_ramvec_attch(). Impact There should be no impact of this change (other that one step toward more consistent naming). Testing stm32f4discovery:netnsh
This commit is contained in:
committed by
Alan Carvalho de Assis
parent
2476aad5b4
commit
b0dbdd7c10
@@ -55,14 +55,14 @@
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****************************************************************************/
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/****************************************************************************
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* Function: up_dumpnvic
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* Function: arm_dumpnvic
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*
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* Description:
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* Dump all NVIC and SYSCON registers along with a user message.
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*
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****************************************************************************/
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void up_dumpnvic(FAR const char *msg)
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void arm_dumpnvic(FAR const char *msg)
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{
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#ifdef CONFIG_DEBUG_INFO
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irqstate_t flags;
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@@ -380,7 +380,7 @@ extern "C"
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****************************************************************************************************/
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/****************************************************************************************************
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* Function: up_dumpnvic
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* Function: arm_dumpnvic
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*
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* Description:
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* Dump all NVIC and SYSCON registers along with a user message.
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@@ -388,9 +388,9 @@ extern "C"
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****************************************************************************************************/
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#ifdef CONFIG_DEBUG_FEATURES
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void up_dumpnvic(FAR const char *msg);
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void arm_dumpnvic(FAR const char *msg);
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#else
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# define up_dumpnvic(m)
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# define arm_dumpnvic(m)
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#endif
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#undef EXTERN
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@@ -43,7 +43,7 @@
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void exception_common(void);
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/****************************************************************************
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* Name: up_ramvec_attach
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* Name: arm_ramvec_attach
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*
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* Description:
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* Configure the ram vector table so that IRQ number 'irq' will be
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@@ -51,7 +51,7 @@ void exception_common(void);
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*
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****************************************************************************/
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int up_ramvec_attach(int irq, up_vector_t vector)
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int arm_ramvec_attach(int irq, up_vector_t vector)
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{
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int ret = -EINVAL;
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@@ -86,7 +86,7 @@
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****************************************************************************/
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/* If CONFIG_ARCH_RAMVECTORS is defined, then the ARM logic must provide
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* ARM-specific implementations of up_ramvec_initialize(), irq_attach(), and
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* ARM-specific implementations of arm_ramvec_initialize(), irq_attach(), and
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* irq_dispatch. In this case, it is also assumed that the ARM vector
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* table resides in RAM, has the name g_ram_vectors, and has been
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* properly positioned and aligned in memory by the linker script.
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@@ -105,14 +105,14 @@ up_vector_t g_ram_vectors[ARMV7M_VECTAB_SIZE]
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****************************************************************************/
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/****************************************************************************
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* Name: up_ramvec_initialize
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* Name: arm_ramvec_initialize
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*
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* Description:
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* Copy vectors to RAM an configure the NVIC to use the RAM vectors.
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*
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****************************************************************************/
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void up_ramvec_initialize(void)
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void arm_ramvec_initialize(void)
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{
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const up_vector_t *src;
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up_vector_t *dest;
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@@ -69,14 +69,14 @@ extern up_vector_t g_ram_vectors[ARMV7M_VECTAB_SIZE]
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****************************************************************************/
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/****************************************************************************
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* Name: up_ramvec_initialize
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* Name: arm_ramvec_initialize
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*
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* Description:
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* Copy vectors to RAM an configure the NVIC to use the RAM vectors.
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*
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****************************************************************************/
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void up_ramvec_initialize(void);
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void arm_ramvec_initialize(void);
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/****************************************************************************
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* Name: exception_common
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@@ -89,7 +89,7 @@ void up_ramvec_initialize(void);
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void exception_common(void);
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/****************************************************************************
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* Name: up_ramvec_attach
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* Name: arm_ramvec_attach
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*
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* Description:
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* Configure the ram vector table so that IRQ number 'irq' will be
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@@ -97,7 +97,7 @@ void exception_common(void);
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*
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****************************************************************************/
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int up_ramvec_attach(int irq, up_vector_t vector);
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int arm_ramvec_attach(int irq, up_vector_t vector);
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#endif /* CONFIG_ARCH_RAMVECTORS */
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#endif /* __ARCH_ARM_SRC_COMMON_ARMV7_M_RAM_VECTORS_H */
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@@ -319,7 +319,7 @@ void up_irqinitialize(void)
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* vector table that requires special initialization.
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*/
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up_ramvec_initialize();
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arm_ramvec_initialize();
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#endif
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/* Set all interrupts (and exceptions) to the default priority */
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@@ -334,7 +334,7 @@ void up_irqinitialize(void)
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* vector table that requires special initialization.
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*/
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up_ramvec_initialize();
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arm_ramvec_initialize();
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#endif
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/* Set all interrupts (and exceptions) to the default priority */
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@@ -429,7 +429,7 @@ void up_irqinitialize(void)
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* vector table that requires special initialization.
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*/
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up_ramvec_initialize();
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arm_ramvec_initialize();
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#endif
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/* Set all interrupts (and exceptions) to the default priority */
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@@ -369,7 +369,7 @@ void up_irqinitialize(void)
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* vector table that requires special initialization.
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*/
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up_ramvec_initialize();
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arm_ramvec_initialize();
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#endif
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/* Set all interrupts (and exceptions) to the default priority */
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@@ -493,7 +493,7 @@ void up_irqinitialize(void)
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*/
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#if defined(CONFIG_ARCH_RAMVECTORS)
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up_ramvec_initialize();
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arm_ramvec_initialize();
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#elif defined(CONFIG_LC823450_DFU)
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putreg32((uint32_t)_vectors, NVIC_VECTAB);
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#endif
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@@ -337,12 +337,12 @@ void up_irqinitialize(void)
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* vector table that requires special initialization.
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*
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* But even in this case NVIC_VECTAB has to point to the initial table
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* because up_ramvec_initialize() initializes RAM table from table
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* because arm_ramvec_initialize() initializes RAM table from table
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* pointed by NVIC_VECTAB register.
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*/
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#ifdef CONFIG_ARCH_RAMVECTORS
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up_ramvec_initialize();
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arm_ramvec_initialize();
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#endif
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/* Set all interrupts (and exceptions) to the default priority */
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@@ -326,7 +326,7 @@ void up_irqinitialize(void)
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* vector table that requires special initialization.
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*/
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up_ramvec_initialize();
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arm_ramvec_initialize();
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#endif
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/* Set all interrupts (and exceptions) to the default priority */
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@@ -325,7 +325,7 @@ void up_irqinitialize(void)
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* vector table that requires special initialization.
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*/
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up_ramvec_initialize();
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arm_ramvec_initialize();
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#endif
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/* Set all interrupts (and exceptions) to the default priority */
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@@ -324,7 +324,7 @@ void up_irqinitialize(void)
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* vector table that requires special initialization.
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*/
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up_ramvec_initialize();
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arm_ramvec_initialize();
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#endif
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/* Set all interrupts (and exceptions) to the default priority */
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@@ -339,7 +339,7 @@ void up_irqinitialize(void)
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* vector table that requires special initialization.
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*/
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up_ramvec_initialize();
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arm_ramvec_initialize();
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#endif
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/* Set all interrupts (and exceptions) to the default priority */
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@@ -346,7 +346,7 @@ void up_irqinitialize(void)
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* vector table that requires special initialization.
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*/
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up_ramvec_initialize();
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arm_ramvec_initialize();
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#endif
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/* Set all interrupts (and exceptions) to the default priority */
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@@ -400,7 +400,7 @@ void up_irqinitialize(void)
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* vector table that requires special initialization.
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*/
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up_ramvec_initialize();
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arm_ramvec_initialize();
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#endif
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/* Set all interrupts (and exceptions) to the default priority */
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@@ -478,7 +478,7 @@ void up_irqinitialize(void)
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* vector table that requires special initialization.
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*/
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up_ramvec_initialize();
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arm_ramvec_initialize();
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#endif
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/* Set all interrupts (and exceptions) to the default priority */
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@@ -396,7 +396,7 @@ void up_irqinitialize(void)
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* vector table that requires special initialization.
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*/
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up_ramvec_initialize();
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arm_ramvec_initialize();
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#endif
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/* Set all interrupts (and exceptions) to the default priority */
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@@ -330,7 +330,7 @@ void up_irqinitialize(void)
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* vector table that requires special initialization.
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*/
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up_ramvec_initialize();
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arm_ramvec_initialize();
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#endif
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/* Set all interrupts (and exceptions) to the default priority */
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@@ -429,7 +429,7 @@ void up_irqinitialize(void)
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* vector table that requires special initialization.
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*/
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up_ramvec_initialize();
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arm_ramvec_initialize();
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#endif
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/* Set all interrupts (and exceptions) to the default priority */
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@@ -454,7 +454,7 @@ void up_irqinitialize(void)
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* vector table that requires special initialization.
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*/
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up_ramvec_initialize();
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arm_ramvec_initialize();
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#endif
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/* Set all interrupts (and exceptions) to the default priority */
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@@ -318,7 +318,7 @@ void up_irqinitialize(void)
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* vector table that requires special initialization.
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*/
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up_ramvec_initialize();
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arm_ramvec_initialize();
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#endif
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/* Set all interrupts (and exceptions) to the default priority */
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@@ -430,7 +430,7 @@ void up_irqinitialize(void)
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* vector table that requires special initialization.
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*/
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up_ramvec_initialize();
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arm_ramvec_initialize();
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#endif
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#ifdef CONFIG_TIVA_RAMVBAR
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@@ -368,7 +368,7 @@ void up_irqinitialize(void)
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* vector table that requires special initialization.
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*/
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up_ramvec_initialize();
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arm_ramvec_initialize();
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#endif
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/* Set all interrupts (and exceptions) to the default priority */
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@@ -424,10 +424,10 @@ int highpri_main(int argc, char *argv[])
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#if !defined(CONFIG_STM32_ADC1_DMA) || defined(HIGHPRI_HAVE_INJECTED)
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/* Attach ADC12 ram vector if no DMA or injected channels support */
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ret = up_ramvec_attach(STM32_IRQ_ADC12, adc12_handler);
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ret = arm_ramvec_attach(STM32_IRQ_ADC12, adc12_handler);
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if (ret < 0)
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{
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fprintf(stderr, "highpri_main: ERROR: up_ramvec_attach failed: %d\n",
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fprintf(stderr, "highpri_main: ERROR: arm_ramvec_attach failed: %d\n",
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ret);
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ret = EXIT_FAILURE;
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goto errout;
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@@ -450,10 +450,10 @@ int highpri_main(int argc, char *argv[])
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#ifdef CONFIG_STM32_ADC1_DMA
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/* Attach DMA1 CH1 ram vector if DMA */
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ret = up_ramvec_attach(STM32_IRQ_DMA1CH1, dma1ch1_handler);
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ret = arm_ramvec_attach(STM32_IRQ_DMA1CH1, dma1ch1_handler);
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if (ret < 0)
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{
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fprintf(stderr, "highpri_main: ERROR: up_ramvec_attach failed: %d\n",
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fprintf(stderr, "highpri_main: ERROR: arm_ramvec_attach failed: %d\n",
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ret);
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ret = EXIT_FAILURE;
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goto errout;
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@@ -460,10 +460,10 @@ int highpri_main(int argc, char *argv[])
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#if !defined(CONFIG_STM32_ADC1_DMA) || defined(HIGHPRI_HAVE_INJECTED)
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/* Attach ADC12 ram vector if no DMA or injected channels support */
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ret = up_ramvec_attach(STM32_IRQ_ADC12, adc12_handler);
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ret = arm_ramvec_attach(STM32_IRQ_ADC12, adc12_handler);
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if (ret < 0)
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{
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fprintf(stderr, "highpri_main: ERROR: up_ramvec_attach failed: %d\n",
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fprintf(stderr, "highpri_main: ERROR: arm_ramvec_attach failed: %d\n",
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ret);
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ret = EXIT_FAILURE;
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goto errout;
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@@ -486,10 +486,10 @@ int highpri_main(int argc, char *argv[])
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#ifdef CONFIG_STM32_ADC1_DMA
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/* Attach DMA1 CH1 ram vector if DMA */
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ret = up_ramvec_attach(STM32_IRQ_DMA1CH1, dma1ch1_handler);
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ret = arm_ramvec_attach(STM32_IRQ_DMA1CH1, dma1ch1_handler);
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if (ret < 0)
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{
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fprintf(stderr, "highpri_main: ERROR: up_ramvec_attach failed: %d\n",
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fprintf(stderr, "highpri_main: ERROR: arm_ramvec_attach failed: %d\n",
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ret);
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ret = EXIT_FAILURE;
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goto errout;
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@@ -569,10 +569,10 @@ static int spwm_hrtim_setup(FAR struct spwm_s *spwm)
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/* Attach HRTIM Master TImer IRQ */
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ret = up_ramvec_attach(STM32_IRQ_HRTIMTM, hrtim_master_handler);
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ret = arm_ramvec_attach(STM32_IRQ_HRTIMTM, hrtim_master_handler);
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if (ret < 0)
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{
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fprintf(stderr, "spwm_main: ERROR: up_ramvec_attach failed: %d\n",
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fprintf(stderr, "spwm_main: ERROR: arm_ramvec_attach failed: %d\n",
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ret);
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ret = -1;
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goto errout;
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@@ -777,10 +777,10 @@ static int spwm_tim6_setup(FAR struct spwm_s *spwm)
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/* Attach TIM6 ram vector */
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ret = up_ramvec_attach(STM32_IRQ_TIM6, tim6_handler);
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ret = arm_ramvec_attach(STM32_IRQ_TIM6, tim6_handler);
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if (ret < 0)
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{
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printf("ERROR: up_ramvec_attach failed: %d\n", ret);
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printf("ERROR: arm_ramvec_attach failed: %d\n", ret);
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ret = -1;
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goto errout;
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}
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@@ -1107,10 +1107,10 @@ int stm32_smps_setup(void)
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/* Attach ADC12 ram vector */
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ret = up_ramvec_attach(STM32_IRQ_ADC12, adc12_handler);
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ret = arm_ramvec_attach(STM32_IRQ_ADC12, adc12_handler);
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if (ret < 0)
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{
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pwrerr("ERROR: up_ramvec_attach failed: %d\n", ret);
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pwrerr("ERROR: arm_ramvec_attach failed: %d\n", ret);
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ret = EXIT_FAILURE;
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goto errout;
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}
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@@ -409,10 +409,10 @@ int highpri_main(int argc, char *argv[])
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#if !defined(CONFIG_STM32_ADC1_DMA) || defined(HIGHPRI_HAVE_INJECTED)
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/* Attach ADC ram vector if no DMA or injected channels support */
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ret = up_ramvec_attach(STM32_IRQ_ADC, adc_handler);
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ret = arm_ramvec_attach(STM32_IRQ_ADC, adc_handler);
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if (ret < 0)
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{
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fprintf(stderr, "highpri_main: ERROR: up_ramvec_attach failed: %d\n",
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fprintf(stderr, "highpri_main: ERROR: arm_ramvec_attach failed: %d\n",
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ret);
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ret = EXIT_FAILURE;
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goto errout;
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@@ -435,10 +435,10 @@ int highpri_main(int argc, char *argv[])
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#ifdef CONFIG_STM32_ADC1_DMA
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/* Attach DMA2 STREAM0 ram vector if DMA */
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ret = up_ramvec_attach(STM32_IRQ_DMA2S0, dma2s0_handler);
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ret = arm_ramvec_attach(STM32_IRQ_DMA2S0, dma2s0_handler);
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if (ret < 0)
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{
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fprintf(stderr, "highpri_main: ERROR: up_ramvec_attach failed: %d\n",
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fprintf(stderr, "highpri_main: ERROR: arm_ramvec_attach failed: %d\n",
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ret);
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ret = EXIT_FAILURE;
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goto errout;
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@@ -199,10 +199,10 @@ int highpri_main(int argc, char *argv[])
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/* Attach TIM6 ram vector */
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ret = up_ramvec_attach(STM32_IRQ_TIM6, tim6_handler);
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ret = arm_ramvec_attach(STM32_IRQ_TIM6, tim6_handler);
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if (ret < 0)
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{
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fprintf(stderr, "highpri_main: ERROR: up_ramvec_attach failed: %d\n", ret);
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fprintf(stderr, "highpri_main: ERROR: arm_ramvec_attach failed: %d\n", ret);
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return EXIT_FAILURE;
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}
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@@ -395,10 +395,10 @@ static int spwm_tim6_setup(FAR struct spwm_s *spwm)
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/* Attach TIM6 ram vector */
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ret = up_ramvec_attach(STM32L4_IRQ_TIM6, tim6_handler);
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ret = arm_ramvec_attach(STM32L4_IRQ_TIM6, tim6_handler);
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if (ret < 0)
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{
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printf("ERROR: up_ramvec_attach failed: %d\n", ret);
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printf("ERROR: arm_ramvec_attach failed: %d\n", ret);
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ret = -1;
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||||
goto errout;
|
||||
}
|
||||
|
||||
Reference in New Issue
Block a user