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Fix an error in LPC43xx clock configuratin that can cause fail to boot

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git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4945 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo
2012-07-16 19:16:57 +00:00
parent b6d4f21d53
commit b0b8710f29
2 changed files with 4 additions and 5 deletions
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arch/arm/src/lpc43xx/lpc43_adc.c
-1
View File
@@ -65,7 +65,6 @@
#include "up_arch.h"
#include "chip.h"
#include "lpc43_internal.h"
#include "lpc43_syscon.h"
#include "lpc43_pinconn.h"
#include "lpc43_adc.h"
arch/arm/src/lpc43xx/lpc43_cgu.c
+4 -4
View File
@@ -163,13 +163,13 @@ static inline void lpc43_xtalconfig(void)
/* Select the crystal oscillator as the input to PLL1 */
regval = getreg32(LPC43_PLL1_CTRL);
regval &= PLL1_CTRL_CLKSEL_MASK;
regval &= ~PLL1_CTRL_CLKSEL_MASK;
regval |= PLL1_CLKSEL_XTAL | PLL1_CTRL_AUTOBLOCK;
putreg32(regval, LPC43_PLL1_CTRL);
}
/****************************************************************************
* Name: lpc43_clockconfig
* Name: lpc43_pll1config
*
* Description:
* Configure PLL1 dividers and multipliers per the settings in the board.h
@@ -197,11 +197,11 @@ static inline void lpc43_pll1config(void)
PLL1_CTRL_MSEL_MASK);
putreg32(regval, LPC43_PLL1_CTRL);
/* Clear PLL1 controls:
/* Set selected PLL1 controls:
*
* - PLL1_CTRL_FBSEL: Set in both integer and direct modes
* - PLL1_CTRL_DIRECT: Set in direct mode
* - PLL1_CTRL_PSEL: Set to the value from board.h
* - PLL1_CTRL_PSEL: Set to the value from board.h (integer mode only)
* - PLL1_CTRL_NSEL: Set to the value from board.h
* - PLL1_CTRL_MSEL: Set to the value from board.h
*/