arch/arm/src/imxrt/imxrt_usdhc.c: Initial commit of the i.MXRT SDHC driver. This driver is partially functional, working in PIO mode. DMA support and additional testing are needed.

This commit is contained in:
Dave Marples
2018-10-31 18:25:19 -06:00
committed by Gregory Nutt
parent efbeac79e8
commit ae054b93bb
8 changed files with 3566 additions and 0 deletions
+27
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@@ -272,6 +272,13 @@ config IMXRT_SNVS_HPRTC
bool "HP RTC"
default n
config IMXRT_USDHC
bool "USDHC"
default n
select ARCH_HAVE_SDIO
---help---
Support SD host controller
endmenu # i.MX RT Peripheral Selection
menuconfig IMXRT_GPIO_IRQ
@@ -508,6 +515,26 @@ config IMXRT_SRAM_HEAPOFFSET
endmenu # i.MX6 Primary RAM
endmenu # Memory Configuration
menu "USDHC Configuration"
depends on IMXRT_USDHC
config IMXRT_USDHC_DMA
bool "Support DMA data transfers"
default y
select SDIO_DMA
---help---
Support DMA data transfers.
Enable SD card DMA data transfers. This is marginally optional.
For most usages, SD accesses will cause data overruns if used without
DMA.
config IMXRT_USDHC_WIDTH_D1_ONLY
bool "Use D1 only"
default n
---help---
Select 1-bit transfer mode. Default: 4-bit transfer mode.
endmenu # USDHC Configuration
menu "eDMA Configuration"
depends on IMXRT_EDMA
+4
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@@ -120,6 +120,10 @@ ifeq ($(CONFIG_IMXRT_EDMA),y)
CHIP_CSRCS += imxrt_edma.c
endif
ifdef CONFIG_IMXRT_USDHC
CHIP_CSRCS += imxrt_usdhc.c
endif
ifeq ($(CONFIG_IMXRT_SNVS_LPSRTC),y)
CHIP_CSRCS += imxrt_lpsrtc.c
CHIP_CSRCS += imxrt_hprtc.c
File diff suppressed because it is too large Load Diff
+16
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@@ -228,5 +228,21 @@ void imxrt_clockconfig(void)
putreg32(reg, IMXRT_CCM_CBCMR);
#endif
#ifdef CONFIG_IMXRT_USDHC
/* Set USDHC1 & 2 to generate clocks from PPL2 PFD2 (396 MHz) */
reg = getreg32(IMXRT_CCM_CSCMR1);
reg &= CCM_CSCMR1_USDHC1_CLK_SEL | CCM_CSCMR1_USDHC2_CLK_SEL;
reg |= CCM_CSCMR1_USDHC1_CLK_SEL_PLL2_PFD0 | CCM_CSCMR1_USDHC2_CLK_SEL_PLL2_PFD0;
putreg32(reg, IMXRT_CCM_CSCMR1);
/* Now divide down clocks by 2 ( --> 198 MHz) */
reg = getreg32(IMXRT_CCM_CSCDR1);
reg &= CCM_CSCDR1_USDHC1_PODF_MASK | CCM_CSCDR1_USDHC2_PODF_MASK;
reg |= CCM_CSCDR1_USDHC1_PODF(1) | CCM_CSCDR1_USDHC2_PODF(1);
putreg32(reg, IMXRT_CCM_CSCDR1);
#endif
#endif
}
File diff suppressed because it is too large Load Diff
+70
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@@ -0,0 +1,70 @@
/****************************************************************************
* arch/arm/src/imxrt/imxrt_usdhc.h
*
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
* Author: Ivan Ucherdzhiev <ivanucherdjiev@gmail.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_IMXRT_IMX_USDHC_H
#define __ARCH_ARM_SRC_IMXRT_IMX_USDHC_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/sdio.h>
#include <nuttx/mmcsd.h>
#include "chip.h"
#include "chip/imxrt_usdhc.h"
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
/****************************************************************************
* Name: imxrt_usdhc_initialize
*
* Description:
* Initialize USDHC for operation.
*
* Input Parameters:
* slotno - Not used.
*
* Returned Value:
* A reference to an USDIO interface structure. NULL is returned on failures.
*
****************************************************************************/
FAR struct sdio_dev_s *imxrt_usdhc_initialize(int slotno);
#endif /*__ARCH_ARM_SRC_IMXRT_IMX_USDHC_H */
+33
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@@ -161,6 +161,39 @@
#define BUTTON_SW8_BIT (1 << BUTTON_SW8)
/* SDIO *****************************************************************************/
/* Pin drive characteristics - drive strength in particular may need tuning for specific boards */
#define PADCTL_USDHC1_DATAX (PADCTL_SRE|PADCTL_DSE_60OHM|PADCTL_HYS)
#define PADCTL_USDHC1_CMD PADCTL_USDHC1_DATAX
#define PADCTL_USDHC1_CLK (PADCTL_SRE|PADCTL_DSE_60OHM|PADCTL_SPEED_MAX)
#define PADCTL_USDHC1_CD (0)
#define PIN_USDHC1_D0 GPIO_USDHC1_DATA0
#define PIN_USDHC1_D1 GPIO_USDHC1_DATA1
#define PIN_USDHC1_D2 GPIO_USDHC1_DATA2
#define PIN_USDHC1_D3 GPIO_USDHC1_DATA3
#define PIN_USDHC1_DCLK GPIO_USDHC1_CLK
#define PIN_USDHC1_CMD GPIO_USDHC1_CMD
#define PIN_USDHC1_CD GPIO_USDHC1_CD_2
/* 386 KHz for initial inquiry stuff */
#define BOARD_USDHC_IDMODE_PRESCALER USDHC_SYSCTL_SDCLKFS_DIV256
#define BOARD_USDHC_IDMODE_DIVISOR USDHC_SYSCTL_DVS_DIV(2)
/* 24.8MHz for other modes */
#define BOARD_USDHC_MMCMODE_PRESCALER USDHC_SYSCTL_SDCLKFS_DIV8
#define BOARD_USDHC_MMCMODE_DIVISOR USDHC_SYSCTL_DVS_DIV(1)
#define BOARD_USDHC_SD1MODE_PRESCALER USDHC_SYSCTL_SDCLKFS_DIV8
#define BOARD_USDHC_SD1MODE_DIVISOR USDHC_SYSCTL_DVS_DIV(1)
#define BOARD_USDHC_SD4MODE_PRESCALER USDHC_SYSCTL_SDCLKFS_DIV8
#define BOARD_USDHC_SD4MODE_DIVISOR USDHC_SYSCTL_DVS_DIV(1)
/* PIO Disambiguation ***************************************************************/
/* LPUARTs
*
+41
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@@ -48,6 +48,10 @@
#include <imxrt_lpi2c.h>
#include <imxrt_lpspi.h>
#ifdef CONFIG_IMXRT_USDHC
# include "imxrt_usdhc.h"
#endif
#include "imxrt1050-evk.h"
#include <arch/board/board.h> /* Must always be included last */
@@ -91,6 +95,37 @@ static void imxrt_i2c_register(int bus)
}
#endif
#ifdef CONFIG_IMXRT_USDHC
static int nsh_sdmmc_initialize(void)
{
struct sdio_dev_s *sdmmc;
int ret = 0;
/* Get an instance of the SDIO interface */
sdmmc = imxrt_usdhc_initialize(0);
if (!sdmmc)
{
syslog(LOG_ERR, "ERROR: Failed to initialize SD/MMC\n");
}
else
{
/* Bind the SDIO interface to the MMC/SD driver */
ret = mmcsd_slotinitialize(0, sdmmc);
if (ret != OK)
{
syslog(LOG_ERR,
"ERROR: Failed to bind SDIO to the MMC/SD driver: %d\n",
ret);
}
}
return OK;
}
#else
# define nsh_sdmmc_initialize() (OK)
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
@@ -126,6 +161,12 @@ int imxrt_bringup(void)
imxrt_i2c_register(1);
#endif
#ifdef CONFIG_IMXRT_USDHC
/* Initialize SDHC-base MMC/SD card support */
nsh_sdmmc_initialize();
#endif
#ifdef CONFIG_MMCSD_SPI
/* Initialize SPI-based MMC/SD card support */