mirror of
https://github.com/apache/nuttx.git
synced 2026-05-22 05:42:05 +08:00
Nucleo-F401RE: With these changes and the changes from previous commits, the basic Nucleo-F401RE NSH configuration is working.
This commit is contained in:
@@ -992,7 +992,11 @@ static struct up_dev_s g_uart8priv =
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};
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#endif
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/* This table lets us iterate over the configured USARTs */
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/* This table lets us iterate over the configured USARTs.
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*
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* REVISIT: The following logic is not valid for the STM32F401 which
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* supports 3 USARTS: USART1, USART2, and USART6.
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*/
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static struct up_dev_s *uart_devs[STM32_NUSART] =
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{
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@@ -1153,7 +1157,7 @@ static int up_dma_nextrx(struct up_dev_s *priv)
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#ifndef CONFIG_SUPPRESS_UART_CONFIG
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static void up_set_format(struct uart_dev_s *dev)
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{
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struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
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struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
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uint32_t regval;
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#ifdef CONFIG_STM32_STM32F30XX
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@@ -1315,7 +1319,7 @@ static void up_set_format(struct uart_dev_s *dev)
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static int up_setup(struct uart_dev_s *dev)
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{
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struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
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struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
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#ifndef CONFIG_SUPPRESS_UART_CONFIG
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uint32_t regval;
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@@ -1418,7 +1422,7 @@ static int up_setup(struct uart_dev_s *dev)
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#ifdef SERIAL_HAVE_DMA
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static int up_dma_setup(struct uart_dev_s *dev)
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{
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struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
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struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
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int result;
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uint32_t regval;
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@@ -1479,7 +1483,7 @@ static int up_dma_setup(struct uart_dev_s *dev)
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static void up_shutdown(struct uart_dev_s *dev)
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{
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struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
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struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
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uint32_t regval;
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/* Disable all interrupts */
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@@ -1505,7 +1509,7 @@ static void up_shutdown(struct uart_dev_s *dev)
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#ifdef SERIAL_HAVE_DMA
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static void up_dma_shutdown(struct uart_dev_s *dev)
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{
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struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
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struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
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/* Perform the normal UART shutdown */
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@@ -1539,7 +1543,7 @@ static void up_dma_shutdown(struct uart_dev_s *dev)
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static int up_attach(struct uart_dev_s *dev)
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{
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struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
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struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
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int ret;
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/* Attach and enable the IRQ */
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@@ -1568,7 +1572,7 @@ static int up_attach(struct uart_dev_s *dev)
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static void up_detach(struct uart_dev_s *dev)
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{
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struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
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struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
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up_disable_irq(priv->irq);
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irq_detach(priv->irq);
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}
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@@ -1713,7 +1717,7 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
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struct uart_dev_s *dev = inode->i_private;
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#endif
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#ifdef CONFIG_SERIAL_TERMIOS
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struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
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struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
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#endif
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int ret = OK;
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@@ -1722,7 +1726,7 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
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#ifdef CONFIG_SERIAL_TIOCSERGSTRUCT
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case TIOCSERGSTRUCT:
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{
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struct up_dev_s *user = (struct up_dev_s*)arg;
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struct up_dev_s *user = (struct up_dev_s *)arg;
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if (!user)
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{
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ret = -EINVAL;
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@@ -1910,7 +1914,7 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
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#ifndef SERIAL_HAVE_ONLY_DMA
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static int up_receive(struct uart_dev_s *dev, uint32_t *status)
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{
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struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
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struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
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uint32_t rdr;
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/* Get the Rx byte */
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@@ -1939,7 +1943,7 @@ static int up_receive(struct uart_dev_s *dev, uint32_t *status)
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#ifndef SERIAL_HAVE_ONLY_DMA
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static void up_rxint(struct uart_dev_s *dev, bool enable)
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{
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struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
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struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
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irqstate_t flags;
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uint16_t ie;
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@@ -1997,7 +2001,7 @@ static void up_rxint(struct uart_dev_s *dev, bool enable)
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#ifndef SERIAL_HAVE_ONLY_DMA
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static bool up_rxavailable(struct uart_dev_s *dev)
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{
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struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
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struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
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return ((up_serialin(priv, STM32_USART_SR_OFFSET) & USART_SR_RXNE) != 0);
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}
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#endif
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@@ -2015,7 +2019,7 @@ static bool up_rxavailable(struct uart_dev_s *dev)
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#ifdef SERIAL_HAVE_DMA
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static int up_dma_receive(struct uart_dev_s *dev, uint32_t *status)
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{
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struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
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struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
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int c = 0;
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if (up_dma_nextrx(priv) != priv->rxdmanext)
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@@ -2044,7 +2048,7 @@ static int up_dma_receive(struct uart_dev_s *dev, uint32_t *status)
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#ifdef SERIAL_HAVE_DMA
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static void up_dma_rxint(struct uart_dev_s *dev, bool enable)
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{
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struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
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struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
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/* En/disable DMA reception.
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*
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@@ -2069,7 +2073,7 @@ static void up_dma_rxint(struct uart_dev_s *dev, bool enable)
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#ifdef SERIAL_HAVE_DMA
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static bool up_dma_rxavailable(struct uart_dev_s *dev)
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{
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struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
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struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
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/* Compare our receive pointer to the current DMA pointer, if they
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* do not match, then there are bytes to be received.
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@@ -2089,7 +2093,7 @@ static bool up_dma_rxavailable(struct uart_dev_s *dev)
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static void up_send(struct uart_dev_s *dev, int ch)
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{
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struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
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struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
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#ifdef HAVE_RS485
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if (priv->rs485_dir_gpio != 0)
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stm32_gpiowrite(priv->rs485_dir_gpio, priv->rs485_dir_polarity);
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@@ -2107,7 +2111,7 @@ static void up_send(struct uart_dev_s *dev, int ch)
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static void up_txint(struct uart_dev_s *dev, bool enable)
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{
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struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
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struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
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irqstate_t flags;
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/* USART transmit interrupts:
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@@ -2167,7 +2171,7 @@ static void up_txint(struct uart_dev_s *dev, bool enable)
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static bool up_txready(struct uart_dev_s *dev)
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{
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struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
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struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
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return ((up_serialin(priv, STM32_USART_SR_OFFSET) & USART_SR_TXE) != 0);
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}
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@@ -2247,7 +2251,7 @@ static int up_interrupt_uart8(int irq, void *context)
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#ifdef SERIAL_HAVE_DMA
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static void up_dma_rxcallback(DMA_HANDLE handle, uint8_t status, void *arg)
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{
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struct up_dev_s *priv = (struct up_dev_s*)arg;
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struct up_dev_s *priv = (struct up_dev_s *)arg;
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if (priv->rxenable && up_dma_rxavailable(&priv->dev))
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{
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@@ -63,6 +63,10 @@
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************************************************************************************/
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/* Make sure that we have not enabled more U[S]ARTs than are support by
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* the device.
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*
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* REVISIT: These should be replaced with the CONFIG_STM32_HAVE_USARTn now generated
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* by the Kconfig file. The following logic is not valid for the STM32F401 which
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* supports 3 USARTS: USART1, USART2, and USART6.
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*/
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#if STM32_NUSART < 8
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@@ -342,6 +342,18 @@ Serial Consoles
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TXD: PA10 CN9 pin 3, CN10 pin 33
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PB6 CN5 pin 3, CN10 pin 17
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NOTE: You may need to edit the include/board.h to select different USART1
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pin selections.
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TTL to RS-232 converter connection:
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Nucleo CN10 STM32F401RE
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----------- ------------
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Pin 21 PA9 USART2_RX
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Pin 33 PA10 USART2_TX
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Pin 20 GND
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Pin 8 U5V
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To configure USART1 as the console:
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CONFIG_STM32_USART1=y
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@@ -363,9 +375,9 @@ Serial Consoles
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TXD: PA2 CN9 pin 2(See SB13, 14, 62, 63). CN10 pin 35
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PD5
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If you have a 3.3 V TTL to RS-232 converter then this is the most convenient
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serial console to use. UART2 is the default in all of these
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configurations.
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UART2 is the default in all of these configurations.
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TTL to RS-232 converter connection:
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Nucleo CN9 STM32F401RE
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----------- ------------
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@@ -462,78 +474,94 @@ Shields
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Configurations
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==============
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Composite: The composite is a super set of all the functions in nsh,
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usbserial, usbmsc. (usbnsh has not been rung out).
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nsh:
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---
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Configures the NuttShell (nsh) located at apps/examples/nsh. The
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Configuration enables the serial interfaces on UART2. Support for
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builtin applications is enabled, but in the base configuration no
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builtin applications are selected (see NOTES below).
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Build it with
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NOTES:
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make distclean;(cd tools;./configure.sh nucleo-f401re/nsh)
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1. This configuration uses the mconf-based configuration tool. To
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change this configuration using that tool, you should:
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then run make menuconfig if you wish to customize things.
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a. Build and install the kconfig-mconf tool. See nuttx/README.txt
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and misc/tools/
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or
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b. Execute 'make menuconfig' in nuttx/ in order to start the
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reconfiguration process.
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$ make qconfig
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2. By default, this configuration uses the CodeSourcery toolchain
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for Linux. That can easily be reconfigured, of course.
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N.B. Memory is tight, both Flash and RAM are taxed. If you enable
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debugging you will need to add -Os following the line -g in the line:
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CONFIG_HOST_LINUX=y : Builds under Linux
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CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y : CodeSourcery for Linux
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ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
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ARCHOPTIMIZATION = -g
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3. Although the default console is USART2 (which would correspond to
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the Virtual COM port) I have done all testing with the console
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device configured for USART1 (see instruction above under "Serial
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Consoles). I have been using a TTL-to-RS-232 converted connected
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as shown below:
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in the top level Make.degs or the code will not fit.
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Nucleo CN10 STM32F401RE
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----------- ------------
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Pin 21 PA9 USART2_RX
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Pin 33 PA10 USART2_TX
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Pin 20 GND
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Pin 8 U5V
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Stack space has been hand optimized using the stack coloring by enabling
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"Stack usage debug hooks" (CONFIG_DEBUG_STACK) in Build Setup-> Debug
|
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Options. I have selected values that have 8-16 bytes of headroom with
|
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network debugging on. If you enable more debugging and get a hard fault
|
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or any weirdness like commands hanging. Then the Idle, main or Interrupt
|
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stack my be too small. Stop the target and have a look a memory for a
|
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blown stack: No DEADBEEF at the lowest address of a given stack.
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cc3000:
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------
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This configuration adds support for the CC3000 Shield.
|
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Given the RAM memory constraints it is not possible to be running the
|
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network and USB CDC/ACM and MSC at the same time. But on the bright
|
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side, you can export the FLASH memory to the PC. Write files on the
|
||||
Flash. Reboot and mount the FAT FS and run network code that will have
|
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access the files.
|
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Build it with
|
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|
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You can use the scripts/cdc-acm.inf file to install the windows
|
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composite device.
|
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make distclean;(cd tools;./configure.sh nucleo-f401re/nsh)
|
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|
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Network control is facilitated by running the c3b (cc3000basic) application.
|
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then run make menuconfig if you wish to customize things.
|
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Run c3b from the nsh prompt.
|
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or
|
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+-------------------------------------------+
|
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| Nuttx CC3000 Demo Program |
|
||||
+-------------------------------------------+
|
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$ make qconfig
|
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|
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01 - Initialize the CC3000
|
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02 - Show RX & TX buffer sizes, & free RAM
|
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03 - Start Smart Config
|
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04 - Manually connect to AP
|
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05 - Manually add connection profile
|
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06 - List access points
|
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07 - Show CC3000 information
|
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08 - Telnet
|
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You can use the scripts/cdc-acm.inf file to install the windows
|
||||
composite device.
|
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|
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Type 01-07 to select above option:
|
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Network control is facilitated by running the c3b (cc3000basic) application.
|
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|
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Select 01. Then use 03 and the TI Smart config application running on an
|
||||
IOS or Android device to configure join your network.
|
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Run c3b from the nsh prompt.
|
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Use 07 to see the IP address of the device.
|
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+-------------------------------------------+
|
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| Nuttx CC3000 Demo Program |
|
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+-------------------------------------------+
|
||||
|
||||
(On the next reboot running c3b 01 the CC3000 will automaticaly rejoin the
|
||||
network after the 01 give it a few seconds and enter 07 or 08)
|
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01 - Initialize the CC3000
|
||||
02 - Show RX & TX buffer sizes, & free RAM
|
||||
03 - Start Smart Config
|
||||
04 - Manually connect to AP
|
||||
05 - Manually add connection profile
|
||||
06 - List access points
|
||||
07 - Show CC3000 information
|
||||
08 - Telnet
|
||||
|
||||
Use 08 to start Telnet. Then you can connect to the device using the
|
||||
address listed in command 07.
|
||||
Type 01-07 to select above option:
|
||||
|
||||
qq will exit the c3b with the telnet deamon running (if started)
|
||||
Select 01. Then use 03 and the TI Smart config application running on an
|
||||
IOS or Android device to configure join your network.
|
||||
|
||||
Slow.... You will be thinking 300 bps. This is because of packet sizes and
|
||||
how the select thread runs in the telnet session. Telnet is not the best
|
||||
showcase for the CC3000, but simply a proof of network connectivity.
|
||||
Use 07 to see the IP address of the device.
|
||||
|
||||
http POST and GET should be more efficient.
|
||||
(On the next reboot running c3b 01 the CC3000 will automaticaly rejoin the
|
||||
network after the 01 give it a few seconds and enter 07 or 08)
|
||||
|
||||
Use 08 to start Telnet. Then you can connect to the device using the
|
||||
address listed in command 07.
|
||||
|
||||
qq will exit the c3b with the telnet deamon running (if started)
|
||||
|
||||
Slow.... You will be thinking 300 bps. This is because of packet sizes and
|
||||
how the select thread runs in the telnet session. Telnet is not the best
|
||||
showcase for the CC3000, but simply a proof of network connectivity.
|
||||
|
||||
http POST and GET should be more efficient.
|
||||
|
||||
@@ -228,14 +228,19 @@
|
||||
/* Alternate function pin selections ************************************************/
|
||||
|
||||
/* USART1:
|
||||
* RXD: PA11 CN10 pin 14
|
||||
* RXD: PA10 CN9 pin 3, CN10 pin 33
|
||||
* PB7 CN7 pin 21
|
||||
* TXD: PA10 CN9 pin 3, CN10 pin 33
|
||||
* TXD: PA9 CN5 pin 1, CN10 pin 21
|
||||
* PB6 CN5 pin 3, CN10 pin 17
|
||||
*/
|
||||
|
||||
#define GPIO_USART1_RX GPIO_USART1_RX_1 /* PA10 */
|
||||
#define GPIO_USART1_TX GPIO_USART1_TX_2 /* PA9 */
|
||||
#if 1
|
||||
# define GPIO_USART1_RX GPIO_USART1_RX_1 /* PA10 */
|
||||
# define GPIO_USART1_TX GPIO_USART1_TX_1 /* PA9 */
|
||||
#else
|
||||
# define GPIO_USART1_RX GPIO_USART1_RX_2 /* PB7 */
|
||||
# define GPIO_USART1_TX GPIO_USART1_TX_2 /* PB6 */
|
||||
#endif
|
||||
|
||||
/* USART2:
|
||||
* RXD: PA3 CN9 pin 1 (See SB13, 14, 62, 63). CN10 pin 37
|
||||
@@ -259,24 +264,11 @@
|
||||
#define GPIO_USART6_RX GPIO_USART6_RX_1 /* PC7 */
|
||||
#define GPIO_USART6_TX GPIO_USART6_TX_1 /* PC6 */
|
||||
|
||||
/* UART8 has no alternate pin config */
|
||||
|
||||
/* UART RX DMA configurations */
|
||||
|
||||
#define DMAMAP_USART1_RX DMAMAP_USART1_RX_2
|
||||
#define DMAMAP_USART6_RX DMAMAP_USART6_RX_2
|
||||
|
||||
/* CAN
|
||||
*
|
||||
* CAN1 is routed to the onboard transceiver.
|
||||
* CAN2 is routed to the expansion connector.
|
||||
*/
|
||||
|
||||
#define GPIO_CAN1_RX GPIO_CAN1_RX_3
|
||||
#define GPIO_CAN1_TX GPIO_CAN1_TX_3
|
||||
#define GPIO_CAN2_RX GPIO_CAN2_RX_1
|
||||
#define GPIO_CAN2_TX GPIO_CAN2_TX_2
|
||||
|
||||
/* I2C
|
||||
*
|
||||
* The optional _GPIO configurations allow the I2C driver to manually
|
||||
|
||||
Reference in New Issue
Block a user