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More trailing whilespace removal
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@@ -112,7 +112,7 @@
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/* MCO output driven by PLL3. From above, we already have PLL3 input frequency as:
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*
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* STM32_PLL_PREDIV2 = 5, 25MHz / 5 => 5MHz
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* STM32_PLL_PREDIV2 = 5, 25MHz / 5 => 5MHz
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*/
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#if defined(CONFIG_STM32_MII_MCO) || defined(CONFIG_STM32_RMII_MCO)
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@@ -160,7 +160,7 @@
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#define BUTTON_KEY2 1
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#define BUTTON_KEY3 2
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#define NUM_BUTTONS 3
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#define BUTTON_USERKEY BUTTON_KEY1 /* Names in schematic */
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#define BUTTON_TAMPER BUTTON_KEY2
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#define BUTTON_WAKEUP BUTTON_KEY3
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@@ -196,7 +196,7 @@
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* 56 PD9 MII_RXD0 Ethernet PHY. Requires CONFIG_STM32_ETH_REMAP
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* 57 PD10 MII_RXD1 Ethernet PHY. Requires CONFIG_STM32_ETH_REMAP
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*
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* The board desdign can support a 50MHz external clock to drive the PHY
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* The board desdign can support a 50MHz external clock to drive the PHY
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* (U9). However, on my board, U9 is not present.
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*
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* 67 PA8 MCO DM9161AEP
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