SAMA5D2: Add Flexcom register definition header files

This commit is contained in:
Gregory Nutt
2015-09-11 10:40:12 -06:00
parent f51541dfd6
commit a39b2351f0
6 changed files with 848 additions and 12 deletions
+127
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/************************************************************************************
* arch/arm/src/sama5/chip/sam_flexcom.h
*
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMA5_CHIP_SAM_FLEXCOM_H
#define __ARCH_ARM_SRC_SAMA5_CHIP_SAM_FLEXCOM_H
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#include "chip.h"
#include "chip/sam_memorymap.h"
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/* Common Flexcom Register Offsets **************************************************/
#define SAM_FLEX_MR_OFFSET 0x000 /* FLEXCOM Mode Register */
/* 0x00040x000c Reserved */
#define SAM_FLEX_RHR_OFFSET 0x010 /* FLEXCOM Receive Holding Register */
/* 0x00140x001c Reserved */
#define SAM_FLEX_THR_OFFSET 0x020 /* FLEXCOM Transmit Holding Register */
/* 0x00240x01fc Reserved */
/* 0x0200-0x03ff: Flexcom USART register */
/* 0x0400-0x05ff: Flexcom USART register */
/* 0x0600-0x07ff: Flexcom USART register */
/* Common Flexcom Register Addresses ************************************************/
#ifdef CONFIG_SAMA5_HAVE_FLEXCOM0
# define SAM_FLEX0_MR (SAM_FLEXCOM0_VBASE+SAM_FLEX_MR_OFFSET)
# define SAM_FLEX0_RHR (SAM_FLEXCOM0_VBASE+SAM_FLEX_RHR_OFFSET)
# define SAM_FLEX0_THR (SAM_FLEXCOM0_VBASE+SAM_FLEX_THR_OFFSET)
#endif
#ifdef CONFIG_SAMA5_HAVE_FLEXCOM1
# define SAM_FLEX1_MR (SAM_FLEXCOM1_VBASE+SAM_FLEX_MR_OFFSET)
# define SAM_FLEX1_RHR (SAM_FLEXCOM1_VBASE+SAM_FLEX_RHR_OFFSET)
# define SAM_FLEX1_THR (SAM_FLEXCOM1_VBASE+SAM_FLEX_THR_OFFSET)
#endif
#ifdef CONFIG_SAMA5_HAVE_FLEXCOM2
# define SAM_FLEX2_MR (SAM_FLEXCOM2_VBASE+SAM_FLEX_MR_OFFSET)
# define SAM_FLEX2_RHR (SAM_FLEXCOM2_VBASE+SAM_FLEX_RHR_OFFSET)
# define SAM_FLEX2_THR (SAM_FLEXCOM2_VBASE+SAM_FLEX_THR_OFFSET)
#endif
#ifdef CONFIG_SAMA5_HAVE_FLEXCOM3
# define SAM_FLEX3_MR (SAM_FLEXCOM3_VBASE+SAM_FLEX_MR_OFFSET)
# define SAM_FLEX3_RHR (SAM_FLEXCOM3_VBASE+SAM_FLEX_RHR_OFFSET)
# define SAM_FLEX3_THR (SAM_FLEXCOM3_VBASE+SAM_FLEX_THR_OFFSET)
#endif
#ifdef CONFIG_SAMA5_HAVE_FLEXCOM4
# define SAM_FLEX4_MR (SAM_FLEXCOM4_VBASE+SAM_FLEX_MR_OFFSET)
# define SAM_FLEX4_RHR (SAM_FLEXCOM4_VBASE+SAM_FLEX_RHR_OFFSET)
# define SAM_FLEX4_THR (SAM_FLEXCOM4_VBASE+SAM_FLEX_THR_OFFSET)
#endif
/* Common Flexcom Register Bit Field Definitions ************************************/
/* FLEXCOM Mode Register */
#define FLEX_MR_OPMODE_SHIFT (0) /* Bits 0-1: Operating mode */
#define FLEX_MR_OPMODE_MASK (3 << FLEX_MR_OPMODE_SHIFT)
# define FLEX_MR_OPMODE_NOCOM (0 << FLEX_MR_OPMODE_SHIFT) /* No communication */
# define FLEX_MR_OPMODE_USART (1 << FLEX_MR_OPMODE_SHIFT) /* All UART related protocols selected */
# define FLEX_MR_OPMODE_SPI (2 << FLEX_MR_OPMODE_SHIFT) /* SPI operating mode is selected */
# define FLEX_MR_OPMODE_TWI (3 << FLEX_MR_OPMODE_SHIFT) /* All TWI related protocols are selected */
/* FLEXCOM Receive Holding Register */
#define FLEX_RHR_MASK (0xffff)
/* FLEXCOM Transmit Holding Register */
#define FLEX_THR_MASK (0xffff)
/* Flexcom USART Register Definitions ***********************************************/
#include "chip/sam_flexcom_usart.h"
/* Flexcom SPI Register Definitions *************************************************/
#include "chip/sam_flexcom_spi.h"
/* Flexcom TWI Register Definitions *************************************************/
#include "chip/sam_flexcom_twi.h"
#endif /* __ARCH_ARM_SRC_SAMA5_CHIP_SAM_FLEXCOM_H */
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/************************************************************************************
* arch/arm/src/sama5/chip/sam_flexcom_spi.h
*
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMA5_CHIP_SAM_FLEXCOM_SPI_H
#define __ARCH_ARM_SRC_SAMA5_CHIP_SAM_FLEXCOM_SPI_H
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#include "chip.h"
#include "chip/sam_memorymap.h"
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/* Flexcom SPI Register Offsets *****************************************************/
/* Flexcom SPI Register Addresses ***************************************************/
/* Flexcom SPI Register Bit Field Definitions ***************************************/
#endif /* __ARCH_ARM_SRC_SAMA5_CHIP_SAM_FLEXCOM_SPI_H */
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@@ -0,0 +1,58 @@
/************************************************************************************
* arch/arm/src/sama5/chip/sam_flexcom_twi.h
*
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMA5_CHIP_SAM_FLEXCOM_TWI_H
#define __ARCH_ARM_SRC_SAMA5_CHIP_SAM_FLEXCOM_TWI_H
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#include "chip.h"
#include "chip/sam_memorymap.h"
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/* Flexcom TWI Register Offsets *****************************************************/
/* Flexcom TWI Register Addresses ***************************************************/
/* Flexcom TWI Register Bit Field Definitions ***************************************/
#endif /* __ARCH_ARM_SRC_SAMA5_CHIP_SAM_FLEXCOM_TWI_H */
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+13 -12
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@@ -1,7 +1,8 @@
/************************************************************************************************
* arch/arm/src/sama5/chip/sam3u_uart.h
* Universal Asynchronous Receiver Transmitter (UART) and Universal Synchronous Asynchronous
* Receiver Transmitter (USART) definitions for the SAMA5D3
* arch/arm/src/sama5/chip/sam_uart.h
* Universal Asynchronous Receiver Transmitter (UART) for the SAMA5D2, SAMA5D3, and SAMA5D4 and
* Universal Synchronous Asynchronous Receiver Transmitter (USART) definitions for the SAMA5D3
* and SAMAD4
*
* Copyright (C) 2013 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@@ -430,7 +431,7 @@
# define UART_SR_CTS (1 << 23) /* Bit 23: Image of CTS Input (SR only) */
# define UART_INT_MANE (1 << 24) /* Bit 24: Manchester Error Interrupt (4) */
#define UART_INT_ALLINTS 0x018827e7
# define UART_INT_ALLINTS 0x018827e7
#endif
/* UART Receiver Holding Register */
@@ -493,29 +494,29 @@
#if defined(ATSAMA5D3) ||defined(ATSAMA5D4)
/* USART Transmitter Timeguard Register (USART only) */
# define UART_TTGR_TG_SHIFT (0) /* Bits 0-7: Timeguard Value (USART only) */
# define UART_TTGR_TG_MASK (0xff << UART_TTGR_TG_SHIFT)
# define UART_TTGR_TG_SHIFT (0) /* Bits 0-7: Timeguard Value (USART only) */
# define UART_TTGR_TG_MASK (0xff << UART_TTGR_TG_SHIFT)
#endif
#if defined(ATSAMA5D3) ||defined(ATSAMA5D4)
/* USART FI DI RATIO Register (USART only) */
# define UART_FIDI_RATIO_SHIFT (0) /* Bits 0-15: FI Over DI Ratio Value (USART only) */
# define UART_FIDI_RATIO_MASK (0xffff << UART_FIDI_RATIO_SHIFT)
# define UART_FIDI_RATIO_SHIFT (0) /* Bits 0-15: FI Over DI Ratio Value (USART only) */
# define UART_FIDI_RATIO_MASK (0xffff << UART_FIDI_RATIO_SHIFT)
#endif
#if defined(ATSAMA5D3) ||defined(ATSAMA5D4)
/* USART Number of Errors Register (USART only) */
# define UART_NER_NBERRORS_SHIFT (0) /* Bits 0-7: Number of Errrors (USART only) */
# define UART_NER_NBERRORS_MASK (0xff << UART_NER_NBERRORS_SHIFT)
# define UART_NER_NBERRORS_SHIFT (0) /* Bits 0-7: Number of Errrors (USART only) */
# define UART_NER_NBERRORS_MASK (0xff << UART_NER_NBERRORS_SHIFT)
#endif
#if defined(ATSAMA5D3) ||defined(ATSAMA5D4)
/* USART IrDA FILTER Register (USART only) */
# define UART_IFR_IRDAFILTER_SHIFT (0) /* Bits 0-7: IrDA Filter (USART only) */
# define UART_IFR_IRDAFILTER_MASK (0xff << UART_IFR_IRDAFILTER_SHIFT)
# define UART_IFR_IRDAFILTER_SHIFT (0) /* Bits 0-7: IrDA Filter (USART only) */
# define UART_IFR_IRDAFILTER_MASK (0xff << UART_IFR_IRDAFILTER_SHIFT)
#endif
#if defined(ATSAMA5D3) ||defined(ATSAMA5D4)
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