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WM8904: Add logic to program the FLL to achieve the bitrate
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+395
-42
File diff suppressed because it is too large
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@@ -814,6 +814,7 @@
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# define WM8904_FLL_CTRL_RATE(n) ((uint16_t)((n)-1) << WM8904_FLL_CTRL_RATE_SHIFT)
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# define WM8904_FLL_CTRL_RATE(n) ((uint16_t)((n)-1) << WM8904_FLL_CTRL_RATE_SHIFT)
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#define WM8904_FLL_FRATIO_SHIFT (0) /* Bits 0-2: FVCO clock divider */
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#define WM8904_FLL_FRATIO_SHIFT (0) /* Bits 0-2: FVCO clock divider */
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#define WM8904_FLL_FRATIO_MASK (7 << WM8904_FLL_FRATIO_SHIFT)
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#define WM8904_FLL_FRATIO_MASK (7 << WM8904_FLL_FRATIO_SHIFT)
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# define WM8904_FLL_FRATIO(n) ((uint32_t)(n) << WM8904_FLL_FRATIO_SHIFT)
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# define WM8904_FLL_FRATIO_DIV1 (0 << WM8904_FLL_FRATIO_SHIFT) /* Divide by 1 */
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# define WM8904_FLL_FRATIO_DIV1 (0 << WM8904_FLL_FRATIO_SHIFT) /* Divide by 1 */
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# define WM8904_FLL_FRATIO_DIV2 (1 << WM8904_FLL_FRATIO_SHIFT) /* Divide by 2 */
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# define WM8904_FLL_FRATIO_DIV2 (1 << WM8904_FLL_FRATIO_SHIFT) /* Divide by 2 */
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# define WM8904_FLL_FRATIO_DIV4 (2 << WM8904_FLL_FRATIO_SHIFT) /* Divide by 4 */
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# define WM8904_FLL_FRATIO_DIV4 (2 << WM8904_FLL_FRATIO_SHIFT) /* Divide by 4 */
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@@ -161,7 +161,7 @@ struct wm8904_lower_s
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* the frequency of MCLK in order to generate the correct bitrates.
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* the frequency of MCLK in order to generate the correct bitrates.
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*/
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*/
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uint32_t mcclk; /* W8904 Master clock frequency */
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uint32_t mclk; /* W8904 Master clock frequency */
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/* IRQ/GPIO access callbacks. These operations all hidden behind
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/* IRQ/GPIO access callbacks. These operations all hidden behind
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* callbacks to isolate the WM8904 driver from differences in GPIO
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* callbacks to isolate the WM8904 driver from differences in GPIO
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