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Add CONFIG_DEBUG_ERROR. Change names of *dbg() * *err()

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This commit is contained in:
Gregory Nutt
2016-06-11 15:50:49 -06:00
parent e99301d7c2
commit a1469a3e95
1091 changed files with 5971 additions and 5966 deletions
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Kconfig
+11 -3
View File
@@ -413,13 +413,21 @@ if DEBUG_FEATURES
comment "Debug SYSLOG Output Controls"
config DEBUG_ERROR
bool "Enable Error Output"
default n
---help---
Enables output from err() statements. Errors are significant system
exceptions that require immediate attention.
config DEBUG_WARN
bool "Enable Warnings Output"
default n
depends on DEBUG_ERROR
---help---
Enables output from warning statements. Warnings are considered to
be potential errors or errors that will not have serious
consequences.
Enables output from warn() statements. Warnings are considered to
be various unexpected conditions, potential errors or errors that will
not have serious consequences.
config DEBUG_INFO
bool "Enable Informational Debug Output"
arch/arm/src/arm/up_elf.c
+7 -7
View File
@@ -86,7 +86,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if (ehdr->e_machine != EM_ARM)
{
bdbg("Not for ARM: e_machine=%04x\n", ehdr->e_machine);
berr("Not for ARM: e_machine=%04x\n", ehdr->e_machine);
return -ENOEXEC;
}
@@ -94,7 +94,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if (ehdr->e_ident[EI_CLASS] != ELFCLASS32)
{
bdbg("Need 32-bit objects: e_ident[EI_CLASS]=%02x\n", ehdr->e_ident[EI_CLASS]);
berr("Need 32-bit objects: e_ident[EI_CLASS]=%02x\n", ehdr->e_ident[EI_CLASS]);
return -ENOEXEC;
}
@@ -106,7 +106,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if (ehdr->e_ident[EI_DATA] != ELFDATA2LSB)
#endif
{
bdbg("Wrong endian-ness: e_ident[EI_DATA]=%02x\n", ehdr->e_ident[EI_DATA]);
berr("Wrong endian-ness: e_ident[EI_DATA]=%02x\n", ehdr->e_ident[EI_DATA]);
return -ENOEXEC;
}
@@ -114,7 +114,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if ((ehdr->e_entry & 3) != 0)
{
bdbg("Entry point is not properly aligned: %08x\n", ehdr->e_entry);
berr("Entry point is not properly aligned: %08x\n", ehdr->e_entry);
return -ENOEXEC
}
@@ -185,7 +185,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
offset += sym->st_value - addr;
if (offset & 3 || offset <= (int32_t) 0xfe000000 || offset >= (int32_t) 0x02000000)
{
bdbg(" ERROR: PC24 [%d] relocation out of range, offset=%08lx\n",
berr(" ERROR: PC24 [%d] relocation out of range, offset=%08lx\n",
ELF32_R_TYPE(rel->r_info), offset);
return -EINVAL;
@@ -256,7 +256,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
break;
default:
bdbg("Unsupported relocation: %d\n", ELF32_R_TYPE(rel->r_info));
berr("Unsupported relocation: %d\n", ELF32_R_TYPE(rel->r_info));
return -EINVAL;
}
@@ -266,6 +266,6 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
int up_relocateadd(FAR const Elf32_Rela *rel, FAR const Elf32_Sym *sym,
uintptr_t addr)
{
bdbg("RELA relocation not supported\n");
berr("RELA relocation not supported\n");
return -ENOSYS;
}
arch/arm/src/arm/up_schedulesigaction.c
+2 -2
View File
@@ -94,7 +94,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
{
irqstate_t flags;
sdbg("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
serr("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
/* Make sure that interrupts are disabled */
@@ -108,7 +108,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
* being delivered to the currently executing task.
*/
sdbg("rtcb=0x%p CURRENT_REGS=0x%p\n", this_task(), CURRENT_REGS);
serr("rtcb=0x%p CURRENT_REGS=0x%p\n", this_task(), CURRENT_REGS);
if (tcb == this_task())
{
arch/arm/src/arm/up_sigdeliver.c
+2 -2
View File
@@ -95,7 +95,7 @@ void up_sigdeliver(void)
board_autoled_on(LED_SIGNAL);
sdbg("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
serr("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
rtcb, rtcb->xcp.sigdeliver, rtcb->sigpendactionq.head);
ASSERT(rtcb->xcp.sigdeliver != NULL);
@@ -126,7 +126,7 @@ void up_sigdeliver(void)
* errno that is needed by the user logic (it is probably EINTR).
*/
sdbg("Resuming\n");
serr("Resuming\n");
(void)up_irq_save();
rtcb->pterrno = saved_errno;
arch/arm/src/armv6-m/up_elf.c
+8 -8
View File
@@ -86,7 +86,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if (ehdr->e_machine != EM_ARM)
{
bdbg("Not for ARM: e_machine=%04x\n", ehdr->e_machine);
berr("Not for ARM: e_machine=%04x\n", ehdr->e_machine);
return -ENOEXEC;
}
@@ -94,7 +94,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if (ehdr->e_ident[EI_CLASS] != ELFCLASS32)
{
bdbg("Need 32-bit objects: e_ident[EI_CLASS]=%02x\n", ehdr->e_ident[EI_CLASS]);
berr("Need 32-bit objects: e_ident[EI_CLASS]=%02x\n", ehdr->e_ident[EI_CLASS]);
return -ENOEXEC;
}
@@ -106,7 +106,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if (ehdr->e_ident[EI_DATA] != ELFDATA2LSB)
#endif
{
bdbg("Wrong endian-ness: e_ident[EI_DATA]=%02x\n", ehdr->e_ident[EI_DATA]);
berr("Wrong endian-ness: e_ident[EI_DATA]=%02x\n", ehdr->e_ident[EI_DATA]);
return -ENOEXEC;
}
@@ -181,7 +181,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
offset += sym->st_value - addr;
if (offset & 3 || offset <= (int32_t) 0xfe000000 || offset >= (int32_t) 0x02000000)
{
bdbg(" ERROR: PC24 [%d] relocation out of range, offset=%08lx\n",
berr(" ERROR: PC24 [%d] relocation out of range, offset=%08lx\n",
ELF32_R_TYPE(rel->r_info), offset);
return -EINVAL;
@@ -290,7 +290,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
if (ELF32_ST_TYPE(sym->st_info) == STT_FUNC && (offset & 1) == 0)
{
bdbg(" ERROR: JUMP24 [%d] requires odd offset, offset=%08lx\n",
berr(" ERROR: JUMP24 [%d] requires odd offset, offset=%08lx\n",
ELF32_R_TYPE(rel->r_info), offset);
return -EINVAL;
@@ -300,7 +300,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
if (offset <= (int32_t)0xff000000 || offset >= (int32_t)0x01000000)
{
bdbg(" ERROR: JUMP24 [%d] relocation out of range, branch taget=%08lx\n",
berr(" ERROR: JUMP24 [%d] relocation out of range, branch taget=%08lx\n",
ELF32_R_TYPE(rel->r_info), offset);
return -EINVAL;
@@ -451,7 +451,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
break;
default:
bdbg("Unsupported relocation: %d\n", ELF32_R_TYPE(rel->r_info));
berr("Unsupported relocation: %d\n", ELF32_R_TYPE(rel->r_info));
return -EINVAL;
}
@@ -461,6 +461,6 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
int up_relocateadd(FAR const Elf32_Rela *rel, FAR const Elf32_Sym *sym,
uintptr_t addr)
{
bdbg("RELA relocation not supported\n");
berr("RELA relocation not supported\n");
return -ENOSYS;
}
arch/arm/src/armv6-m/up_hardfault.c
+10 -10
View File
@@ -55,9 +55,9 @@
****************************************************************************/
#ifdef CONFIG_DEBUG_HARDFAULT
# define hfdbg(format, ...) llerr(format, ##__VA_ARGS__)
# define hferr(format, ...) llerr(format, ##__VA_ARGS__)
#else
# define hfdbg(x...)
# define hferr(x...)
#endif
#define INSN_SVC0 0xdf00 /* insn: svc 0 */
@@ -118,7 +118,7 @@ int up_hardfault(int irq, FAR void *context)
/* Fetch the instruction that caused the Hard fault */
uint16_t insn = *pc;
hfdbg(" PC: %p INSN: %04x\n", pc, insn);
hferr(" PC: %p INSN: %04x\n", pc, insn);
/* If this was the instruction 'svc 0', then forward processing
* to the SVCall handler
@@ -126,7 +126,7 @@ int up_hardfault(int irq, FAR void *context)
if (insn == INSN_SVC0)
{
hfdbg("Forward SVCall\n");
hferr("Forward SVCall\n");
return up_svcall(irq, context);
}
}
@@ -134,17 +134,17 @@ int up_hardfault(int irq, FAR void *context)
#if defined(CONFIG_DEBUG_HARDFAULT)
/* Dump some hard fault info */
hfdbg("\nHard Fault:\n");
hfdbg(" IRQ: %d regs: %p\n", irq, regs);
hfdbg(" PRIMASK: %08x IPSR: %08x\n",
hferr("\nHard Fault:\n");
hferr(" IRQ: %d regs: %p\n", irq, regs);
hferr(" PRIMASK: %08x IPSR: %08x\n",
getprimask(), getipsr());
hfdbg(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
hferr(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R0], regs[REG_R1], regs[REG_R2], regs[REG_R3],
regs[REG_R4], regs[REG_R5], regs[REG_R6], regs[REG_R7]);
hfdbg(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
hferr(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R8], regs[REG_R9], regs[REG_R10], regs[REG_R11],
regs[REG_R12], regs[REG_R13], regs[REG_R14], regs[REG_R15]);
hfdbg(" xPSR: %08x PRIMASK: %08x (saved)\n",
hferr(" xPSR: %08x PRIMASK: %08x (saved)\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_PRIMASK]);
#endif
arch/arm/src/armv6-m/up_schedulesigaction.c
+2 -2
View File
@@ -107,7 +107,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
{
irqstate_t flags;
sdbg("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
serr("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
/* Make sure that interrupts are disabled */
@@ -121,7 +121,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
* to the currently executing task.
*/
sdbg("rtcb=0x%p CURRENT_REGS=0x%p\n", this_task(), CURRENT_REGS);
serr("rtcb=0x%p CURRENT_REGS=0x%p\n", this_task(), CURRENT_REGS);
if (tcb == this_task())
{
arch/arm/src/armv6-m/up_sigdeliver.c
+2 -2
View File
@@ -100,7 +100,7 @@ void up_sigdeliver(void)
board_autoled_on(LED_SIGNAL);
sdbg("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
serr("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
rtcb, rtcb->xcp.sigdeliver, rtcb->sigpendactionq.head);
ASSERT(rtcb->xcp.sigdeliver != NULL);
@@ -135,7 +135,7 @@ void up_sigdeliver(void)
* errno that is needed by the user logic (it is probably EINTR).
*/
sdbg("Resuming\n");
serr("Resuming\n");
(void)up_irq_save();
rtcb->pterrno = saved_errno;
arch/arm/src/armv6-m/up_svcall.c
+13 -13
View File
@@ -69,9 +69,9 @@
*/
#if defined(CONFIG_DEBUG_SYSCALL) || defined(CONFIG_DEBUG_SVCALL)
# define svcdbg(format, ...) llerr(format, ##__VA_ARGS__)
# define svcerr(format, ...) llerr(format, ##__VA_ARGS__)
#else
# define svcdbg(x...)
# define svcerr(x...)
#endif
/****************************************************************************
@@ -174,18 +174,18 @@ int up_svcall(int irq, FAR void *context)
if (cmd > SYS_switch_context)
# endif
{
svcdbg("SVCALL Entry: regs: %p cmd: %d\n", regs, cmd);
svcdbg(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
svcerr("SVCALL Entry: regs: %p cmd: %d\n", regs, cmd);
svcerr(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R0], regs[REG_R1], regs[REG_R2], regs[REG_R3],
regs[REG_R4], regs[REG_R5], regs[REG_R6], regs[REG_R7]);
svcdbg(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
svcerr(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R8], regs[REG_R9], regs[REG_R10], regs[REG_R11],
regs[REG_R12], regs[REG_R13], regs[REG_R14], regs[REG_R15]);
# ifdef CONFIG_BUILD_PROTECTED
svcdbg(" PSR: %08x PRIMASK: %08x EXC_RETURN: %08x\n",
svcerr(" PSR: %08x PRIMASK: %08x EXC_RETURN: %08x\n",
regs[REG_XPSR], regs[REG_PRIMASK], regs[REG_EXC_RETURN]);
# else
svcdbg(" PSR: %08x PRIMASK: %08x\n",
svcerr(" PSR: %08x PRIMASK: %08x\n",
regs[REG_XPSR], regs[REG_PRIMASK]);
# endif
}
@@ -486,30 +486,30 @@ int up_svcall(int irq, FAR void *context)
if (regs != CURRENT_REGS)
# endif
{
svcdbg("SVCall Return:\n");
svcdbg(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
svcerr("SVCall Return:\n");
svcerr(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
CURRENT_REGS[REG_R0], CURRENT_REGS[REG_R1],
CURRENT_REGS[REG_R2], CURRENT_REGS[REG_R3],
CURRENT_REGS[REG_R4], CURRENT_REGS[REG_R5],
CURRENT_REGS[REG_R6], CURRENT_REGS[REG_R7]);
svcdbg(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
svcerr(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
CURRENT_REGS[REG_R8], CURRENT_REGS[REG_R9],
CURRENT_REGS[REG_R10], CURRENT_REGS[REG_R11],
CURRENT_REGS[REG_R12], CURRENT_REGS[REG_R13],
CURRENT_REGS[REG_R14], CURRENT_REGS[REG_R15]);
#ifdef CONFIG_BUILD_PROTECTED
svcdbg(" PSR: %08x PRIMASK: %08x EXC_RETURN: %08x\n",
svcerr(" PSR: %08x PRIMASK: %08x EXC_RETURN: %08x\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_PRIMASK],
CURRENT_REGS[REG_EXC_RETURN]);
#else
svcdbg(" PSR: %08x PRIMASK: %08x\n",
svcerr(" PSR: %08x PRIMASK: %08x\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_PRIMASK]);
#endif
}
# ifdef CONFIG_DEBUG_SVCALL
else
{
svcdbg("SVCall Return: %d\n", regs[REG_R0]);
svcerr("SVCall Return: %d\n", regs[REG_R0]);
}
# endif
#endif
arch/arm/src/armv7-a/arm_addrenv.c
+4 -4
View File
@@ -278,7 +278,7 @@ int up_addrenv_create(size_t textsize, size_t datasize, size_t heapsize,
MMU_L2_UTEXTFLAGS);
if (ret < 0)
{
bdbg("ERROR: Failed to create .text region: %d\n", ret);
berr("ERROR: Failed to create .text region: %d\n", ret);
goto errout;
}
@@ -293,7 +293,7 @@ int up_addrenv_create(size_t textsize, size_t datasize, size_t heapsize,
MMU_L2_UDATAFLAGS);
if (ret < 0)
{
bdbg("ERROR: Failed to create .bss/.data region: %d\n", ret);
berr("ERROR: Failed to create .bss/.data region: %d\n", ret);
goto errout;
}
@@ -305,7 +305,7 @@ int up_addrenv_create(size_t textsize, size_t datasize, size_t heapsize,
ret = up_addrenv_initdata((uintptr_t)addrenv->data[0] & PMD_PTE_PADDR_MASK);
if (ret < 0)
{
bdbg("ERROR: Failed to initialize .bss/.data region: %d\n", ret);
berr("ERROR: Failed to initialize .bss/.data region: %d\n", ret);
goto errout;
}
#endif
@@ -318,7 +318,7 @@ int up_addrenv_create(size_t textsize, size_t datasize, size_t heapsize,
MMU_L2_UDATAFLAGS);
if (ret < 0)
{
bdbg("ERROR: Failed to create heap region: %d\n", ret);
berr("ERROR: Failed to create heap region: %d\n", ret);
goto errout;
}
arch/arm/src/armv7-a/arm_addrenv_kstack.c
+1 -1
View File
@@ -153,7 +153,7 @@ int up_addrenv_kstackalloc(FAR struct tcb_s *tcb)
tcb->xcp.kstack = (FAR uint32_t *)kmm_memalign(8, ARCH_KERNEL_STACKSIZE);
if (!tcb->xcp.kstack)
{
bdbg("ERROR: Failed to allocate the kernel stack\n");
berr("ERROR: Failed to allocate the kernel stack\n");
return -ENOMEM;
}
arch/arm/src/armv7-a/arm_addrenv_ustack.c
+1 -1
View File
@@ -163,7 +163,7 @@ int up_addrenv_ustackalloc(FAR struct tcb_s *tcb, size_t stacksize)
MMU_L2_UDATAFLAGS);
if (ret < 0)
{
bdbg("ERROR: Failed to create stack region: %d\n", ret);
berr("ERROR: Failed to create stack region: %d\n", ret);
up_addrenv_ustackfree(tcb);
return ret;
}
arch/arm/src/armv7-a/arm_addrenv_utils.c
+1 -1
View File
@@ -98,7 +98,7 @@ int arm_addrenv_create_region(FAR uintptr_t **list, unsigned int listlen,
npages = MM_NPAGES(regionsize);
if (npages > (listlen << (20 - MM_PGSHIFT)))
{
bdbg("ERROR: npages=%u listlen=%u\n", npages, listlen);
berr("ERROR: npages=%u listlen=%u\n", npages, listlen);
return -E2BIG;
}
arch/arm/src/armv7-a/arm_elf.c
+7 -7
View File
@@ -74,7 +74,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if (ehdr->e_machine != EM_ARM)
{
bdbg("Not for ARM: e_machine=%04x\n", ehdr->e_machine);
berr("Not for ARM: e_machine=%04x\n", ehdr->e_machine);
return -ENOEXEC;
}
@@ -82,7 +82,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if (ehdr->e_ident[EI_CLASS] != ELFCLASS32)
{
bdbg("Need 32-bit objects: e_ident[EI_CLASS]=%02x\n", ehdr->e_ident[EI_CLASS]);
berr("Need 32-bit objects: e_ident[EI_CLASS]=%02x\n", ehdr->e_ident[EI_CLASS]);
return -ENOEXEC;
}
@@ -94,7 +94,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if (ehdr->e_ident[EI_DATA] != ELFDATA2LSB)
#endif
{
bdbg("Wrong endian-ness: e_ident[EI_DATA]=%02x\n", ehdr->e_ident[EI_DATA]);
berr("Wrong endian-ness: e_ident[EI_DATA]=%02x\n", ehdr->e_ident[EI_DATA]);
return -ENOEXEC;
}
@@ -102,7 +102,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if ((ehdr->e_entry & 3) != 0)
{
bdbg("Entry point is not properly aligned: %08x\n", ehdr->e_entry);
berr("Entry point is not properly aligned: %08x\n", ehdr->e_entry);
return -ENOEXEC;
}
@@ -175,7 +175,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
offset += sym->st_value - addr;
if (offset & 3 || offset <= (int32_t) 0xfe000000 || offset >= (int32_t) 0x02000000)
{
bdbg(" ERROR: PC24 [%d] relocation out of range, offset=%08lx\n",
berr(" ERROR: PC24 [%d] relocation out of range, offset=%08lx\n",
ELF32_R_TYPE(rel->r_info), offset);
return -EINVAL;
@@ -246,7 +246,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
break;
default:
bdbg("Unsupported relocation: %d\n", ELF32_R_TYPE(rel->r_info));
berr("Unsupported relocation: %d\n", ELF32_R_TYPE(rel->r_info));
return -EINVAL;
}
@@ -256,6 +256,6 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
int up_relocateadd(FAR const Elf32_Rela *rel, FAR const Elf32_Sym *sym,
uintptr_t addr)
{
bdbg("RELA relocation not supported\n");
berr("RELA relocation not supported\n");
return -ENOSYS;
}
arch/arm/src/armv7-a/arm_schedulesigaction.c
+2 -2
View File
@@ -94,7 +94,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
{
irqstate_t flags;
sdbg("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
serr("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
/* Make sure that interrupts are disabled */
@@ -108,7 +108,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
* to the currently executing task.
*/
sdbg("rtcb=0x%p CURRENT_REGS=0x%p\n", this_task(), CURRENT_REGS);
serr("rtcb=0x%p CURRENT_REGS=0x%p\n", this_task(), CURRENT_REGS);
if (tcb == this_task())
{
arch/arm/src/armv7-a/arm_sigdeliver.c
+2 -2
View File
@@ -83,7 +83,7 @@ void up_sigdeliver(void)
board_autoled_on(LED_SIGNAL);
sdbg("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
serr("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
rtcb, rtcb->xcp.sigdeliver, rtcb->sigpendactionq.head);
ASSERT(rtcb->xcp.sigdeliver != NULL);
@@ -114,7 +114,7 @@ void up_sigdeliver(void)
* errno that is needed by the user logic (it is probably EINTR).
*/
sdbg("Resuming\n");
serr("Resuming\n");
(void)up_irq_save();
rtcb->pterrno = saved_errno;
arch/arm/src/armv7-a/arm_syscall.c
+11 -11
View File
@@ -71,9 +71,9 @@
/* Debug ********************************************************************/
#if defined(CONFIG_DEBUG_SYSCALL)
# define svcdbg(format, ...) llerr(format, ##__VA_ARGS__)
# define svcerr(format, ...) llerr(format, ##__VA_ARGS__)
#else
# define svcdbg(x...)
# define svcerr(x...)
#endif
/****************************************************************************
@@ -179,14 +179,14 @@ uint32_t *arm_syscall(uint32_t *regs)
*/
#if defined(CONFIG_DEBUG_SYSCALL)
svcdbg("SYSCALL Entry: regs: %p cmd: %d\n", regs, cmd);
svcdbg(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
svcerr("SYSCALL Entry: regs: %p cmd: %d\n", regs, cmd);
svcerr(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R0], regs[REG_R1], regs[REG_R2], regs[REG_R3],
regs[REG_R4], regs[REG_R5], regs[REG_R6], regs[REG_R7]);
svcdbg(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
svcerr(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R8], regs[REG_R9], regs[REG_R10], regs[REG_R11],
regs[REG_R12], regs[REG_R13], regs[REG_R14], regs[REG_R15]);
svcdbg("CPSR: %08x\n", regs[REG_CPSR]);
svcerr("CPSR: %08x\n", regs[REG_CPSR]);
#endif
/* Handle the SVCall according to the command in R0 */
@@ -480,7 +480,7 @@ uint32_t *arm_syscall(uint32_t *regs)
regs[REG_R0] -= CONFIG_SYS_RESERVED;
#else
svcdbg("ERROR: Bad SYS call: %d\n", regs[REG_R0]);
svcerr("ERROR: Bad SYS call: %d\n", regs[REG_R0]);
#endif
#ifdef CONFIG_ARCH_KERNEL_STACK
@@ -504,14 +504,14 @@ uint32_t *arm_syscall(uint32_t *regs)
#if defined(CONFIG_DEBUG_SYSCALL)
/* Report what happened */
svcdbg("SYSCALL Exit: regs: %p\n", regs);
svcdbg(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
svcerr("SYSCALL Exit: regs: %p\n", regs);
svcerr(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R0], regs[REG_R1], regs[REG_R2], regs[REG_R3],
regs[REG_R4], regs[REG_R5], regs[REG_R6], regs[REG_R7]);
svcdbg(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
svcerr(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R8], regs[REG_R9], regs[REG_R10], regs[REG_R11],
regs[REG_R12], regs[REG_R13], regs[REG_R14], regs[REG_R15]);
svcdbg("CPSR: %08x\n", regs[REG_CPSR]);
svcerr("CPSR: %08x\n", regs[REG_CPSR]);
#endif
/* Return the last value of curent_regs. This supports context switches
arch/arm/src/armv7-a/gic.h
+2 -2
View File
@@ -594,12 +594,12 @@
/* Debug */
#ifdef CONFIG_DEBUG_IRQ
# define gicdbg(format, ...) dbg(format, ##__VA_ARGS__)
# define gicerr(format, ...) err(format, ##__VA_ARGS__)
# define gicllerr(format, ...) llerr(format, ##__VA_ARGS__)
# define gicinfo(format, ...) info(format, ##__VA_ARGS__)
# define gicllinfo(format, ...) llinfo(format, ##__VA_ARGS__)
#else
# define gicdbg(x...)
# define gicerr(x...)
# define gicllerr(x...)
# define gicinfo(x...)
# define gicllinfo(x...)
arch/arm/src/armv7-m/mpu.h
+1 -1
View File
@@ -221,7 +221,7 @@ static inline void mpu_showtype(void)
{
#ifdef CONFIG_DEBUG_FEATURES
uint32_t regval = getreg32(MPU_TYPE);
dbg("%s MPU Regions: data=%d instr=%d\n",
err("%s MPU Regions: data=%d instr=%d\n",
(regval & MPU_TYPE_SEPARATE) != 0 ? "Separate" : "Unified",
(regval & MPU_TYPE_DREGION_MASK) >> MPU_TYPE_DREGION_SHIFT,
(regval & MPU_TYPE_IREGION_MASK) >> MPU_TYPE_IREGION_SHIFT);
arch/arm/src/armv7-m/up_elf.c
+8 -8
View File
@@ -82,7 +82,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if (ehdr->e_machine != EM_ARM)
{
bdbg("Not for ARM: e_machine=%04x\n", ehdr->e_machine);
berr("Not for ARM: e_machine=%04x\n", ehdr->e_machine);
return -ENOEXEC;
}
@@ -90,7 +90,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if (ehdr->e_ident[EI_CLASS] != ELFCLASS32)
{
bdbg("Need 32-bit objects: e_ident[EI_CLASS]=%02x\n", ehdr->e_ident[EI_CLASS]);
berr("Need 32-bit objects: e_ident[EI_CLASS]=%02x\n", ehdr->e_ident[EI_CLASS]);
return -ENOEXEC;
}
@@ -102,7 +102,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if (ehdr->e_ident[EI_DATA] != ELFDATA2LSB)
#endif
{
bdbg("Wrong endian-ness: e_ident[EI_DATA]=%02x\n", ehdr->e_ident[EI_DATA]);
berr("Wrong endian-ness: e_ident[EI_DATA]=%02x\n", ehdr->e_ident[EI_DATA]);
return -ENOEXEC;
}
@@ -177,7 +177,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
offset += sym->st_value - addr;
if (offset & 3 || offset <= (int32_t) 0xfe000000 || offset >= (int32_t) 0x02000000)
{
bdbg(" ERROR: PC24 [%d] relocation out of range, offset=%08lx\n",
berr(" ERROR: PC24 [%d] relocation out of range, offset=%08lx\n",
ELF32_R_TYPE(rel->r_info), offset);
return -EINVAL;
@@ -298,7 +298,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
if (ELF32_ST_TYPE(sym->st_info) == STT_FUNC && (offset & 1) == 0)
{
bdbg(" ERROR: JUMP24 [%d] requires odd offset, offset=%08lx\n",
berr(" ERROR: JUMP24 [%d] requires odd offset, offset=%08lx\n",
ELF32_R_TYPE(rel->r_info), offset);
return -EINVAL;
@@ -308,7 +308,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
if (offset <= (int32_t)0xff000000 || offset >= (int32_t)0x01000000)
{
bdbg(" ERROR: JUMP24 [%d] relocation out of range, branch taget=%08lx\n",
berr(" ERROR: JUMP24 [%d] relocation out of range, branch taget=%08lx\n",
ELF32_R_TYPE(rel->r_info), offset);
return -EINVAL;
@@ -461,7 +461,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
break;
default:
bdbg("Unsupported relocation: %d\n", ELF32_R_TYPE(rel->r_info));
berr("Unsupported relocation: %d\n", ELF32_R_TYPE(rel->r_info));
return -EINVAL;
}
@@ -471,7 +471,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
int up_relocateadd(FAR const Elf32_Rela *rel, FAR const Elf32_Sym *sym,
uintptr_t addr)
{
bdbg("RELA relocation not supported\n");
berr("RELA relocation not supported\n");
return -ENOSYS;
}
arch/arm/src/armv7-m/up_hardfault.c
+14 -14
View File
@@ -60,9 +60,9 @@
*/
#ifdef CONFIG_DEBUG_HARDFAULT
# define hfdbg(format, ...) llerr(format, ##__VA_ARGS__)
# define hferr(format, ...) llerr(format, ##__VA_ARGS__)
#else
# define hfdbg(x...)
# define hferr(x...)
#endif
#define INSN_SVC0 0xdf00 /* insn: svc 0 */
@@ -127,7 +127,7 @@ int up_hardfault(int irq, FAR void *context)
/* Fetch the instruction that caused the Hard fault */
uint16_t insn = *pc;
hfdbg(" PC: %p INSN: %04x\n", pc, insn);
hferr(" PC: %p INSN: %04x\n", pc, insn);
/* If this was the instruction 'svc 0', then forward processing
* to the SVCall handler
@@ -135,7 +135,7 @@ int up_hardfault(int irq, FAR void *context)
if (insn == INSN_SVC0)
{
hfdbg("Forward SVCall\n");
hferr("Forward SVCall\n");
return up_svcall(irq, context);
}
}
@@ -143,37 +143,37 @@ int up_hardfault(int irq, FAR void *context)
/* Dump some hard fault info */
hfdbg("Hard Fault:\n");
hfdbg(" IRQ: %d regs: %p\n", irq, regs);
hfdbg(" BASEPRI: %08x PRIMASK: %08x IPSR: %08x CONTROL: %08x\n",
hferr("Hard Fault:\n");
hferr(" IRQ: %d regs: %p\n", irq, regs);
hferr(" BASEPRI: %08x PRIMASK: %08x IPSR: %08x CONTROL: %08x\n",
getbasepri(), getprimask(), getipsr(), getcontrol());
hfdbg(" CFAULTS: %08x HFAULTS: %08x DFAULTS: %08x BFAULTADDR: %08x AFAULTS: %08x\n",
hferr(" CFAULTS: %08x HFAULTS: %08x DFAULTS: %08x BFAULTADDR: %08x AFAULTS: %08x\n",
getreg32(NVIC_CFAULTS), getreg32(NVIC_HFAULTS),
getreg32(NVIC_DFAULTS), getreg32(NVIC_BFAULT_ADDR),
getreg32(NVIC_AFAULTS));
hfdbg(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
hferr(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R0], regs[REG_R1], regs[REG_R2], regs[REG_R3],
regs[REG_R4], regs[REG_R5], regs[REG_R6], regs[REG_R7]);
hfdbg(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
hferr(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R8], regs[REG_R9], regs[REG_R10], regs[REG_R11],
regs[REG_R12], regs[REG_R13], regs[REG_R14], regs[REG_R15]);
#ifdef CONFIG_ARMV7M_USEBASEPRI
# ifdef REG_EXC_RETURN
hfdbg(" xPSR: %08x BASEPRI: %08x EXC_RETURN: %08x (saved)\n",
hferr(" xPSR: %08x BASEPRI: %08x EXC_RETURN: %08x (saved)\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_BASEPRI],
CURRENT_REGS[REG_EXC_RETURN]);
# else
hfdbg(" xPSR: %08x BASEPRI: %08x (saved)\n",
hferr(" xPSR: %08x BASEPRI: %08x (saved)\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_BASEPRI]);
# endif
#else
# ifdef REG_EXC_RETURN
hfdbg(" xPSR: %08x PRIMASK: %08x EXC_RETURN: %08x (saved)\n",
hferr(" xPSR: %08x PRIMASK: %08x EXC_RETURN: %08x (saved)\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_PRIMASK],
CURRENT_REGS[REG_EXC_RETURN]);
# else
hfdbg(" xPSR: %08x PRIMASK: %08x (saved)\n",
hferr(" xPSR: %08x PRIMASK: %08x (saved)\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_PRIMASK]);
# endif
#endif
arch/arm/src/armv7-m/up_memfault.c
+10 -10
View File
@@ -55,9 +55,9 @@
#undef DEBUG_MEMFAULTS /* Define to debug memory management faults */
#ifdef DEBUG_MEMFAULTS
# define mfdbg(format, ...) llerr(format, ##__VA_ARGS__)
# define mferr(format, ...) llerr(format, ##__VA_ARGS__)
#else
# define mfdbg(x...)
# define mferr(x...)
#endif
/****************************************************************************
@@ -93,34 +93,34 @@ int up_memfault(int irq, FAR void *context)
(void)up_irq_save();
llerr("PANIC!!! Memory Management Fault:\n");
mfdbg(" IRQ: %d context: %p\n", irq, regs);
mferr(" IRQ: %d context: %p\n", irq, regs);
llerr(" CFAULTS: %08x MMFAR: %08x\n",
getreg32(NVIC_CFAULTS), getreg32(NVIC_MEMMANAGE_ADDR));
mfdbg(" BASEPRI: %08x PRIMASK: %08x IPSR: %08x CONTROL: %08x\n",
mferr(" BASEPRI: %08x PRIMASK: %08x IPSR: %08x CONTROL: %08x\n",
getbasepri(), getprimask(), getipsr(), getcontrol());
mfdbg(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
mferr(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R0], regs[REG_R1], regs[REG_R2], regs[REG_R3],
regs[REG_R4], regs[REG_R5], regs[REG_R6], regs[REG_R7]);
mfdbg(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
mferr(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R8], regs[REG_R9], regs[REG_R10], regs[REG_R11],
regs[REG_R12], regs[REG_R13], regs[REG_R14], regs[REG_R15]);
#ifdef CONFIG_ARMV7M_USEBASEPRI
# ifdef REG_EXC_RETURN
mfdbg(" xPSR: %08x BASEPRI: %08x EXC_RETURN: %08x (saved)\n",
mferr(" xPSR: %08x BASEPRI: %08x EXC_RETURN: %08x (saved)\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_BASEPRI],
CURRENT_REGS[REG_EXC_RETURN]);
# else
mfdbg(" xPSR: %08x BASEPRI: %08x (saved)\n",
mferr(" xPSR: %08x BASEPRI: %08x (saved)\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_BASEPRI]);
# endif
#else
# ifdef REG_EXC_RETURN
mfdbg(" xPSR: %08x PRIMASK: %08x EXC_RETURN: %08x (saved)\n",
mferr(" xPSR: %08x PRIMASK: %08x EXC_RETURN: %08x (saved)\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_PRIMASK],
CURRENT_REGS[REG_EXC_RETURN]);
# else
mfdbg(" xPSR: %08x PRIMASK: %08x (saved)\n",
mferr(" xPSR: %08x PRIMASK: %08x (saved)\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_PRIMASK]);
# endif
#endif
arch/arm/src/armv7-m/up_ramvec_attach.c
+2 -2
View File
@@ -59,10 +59,10 @@
*/
#ifdef CONFIG_DEBUG_IRQ
# define intdbg llerr
# define interr llerr
# define intinfo llinfo
#else
# define intdbg(x...)
# define interr(x...)
# define intinfo(x...)
#endif
arch/arm/src/armv7-m/up_ramvec_initialize.c
+2 -2
View File
@@ -78,10 +78,10 @@
*/
#ifdef CONFIG_DEBUG_IRQ
# define intdbg llerr
# define interr llerr
# define intinfo llinfo
#else
# define intdbg(x...)
# define interr(x...)
# define intinfo(x...)
#endif
arch/arm/src/armv7-m/up_schedulesigaction.c
+2 -2
View File
@@ -95,7 +95,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
{
irqstate_t flags;
sdbg("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
serr("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
DEBUGASSERT(tcb != NULL && sigdeliver != NULL);
/* Make sure that interrupts are disabled */
@@ -110,7 +110,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
* to the currently executing task.
*/
sdbg("rtcb=0x%p CURRENT_REGS=0x%p\n", this_task(), CURRENT_REGS);
serr("rtcb=0x%p CURRENT_REGS=0x%p\n", this_task(), CURRENT_REGS);
if (tcb == this_task())
{
arch/arm/src/armv7-m/up_sigdeliver.c
+2 -2
View File
@@ -95,7 +95,7 @@ void up_sigdeliver(void)
board_autoled_on(LED_SIGNAL);
sdbg("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
serr("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
rtcb, rtcb->xcp.sigdeliver, rtcb->sigpendactionq.head);
ASSERT(rtcb->xcp.sigdeliver != NULL);
@@ -138,7 +138,7 @@ void up_sigdeliver(void)
* errno that is needed by the user logic (it is probably EINTR).
*/
sdbg("Resuming\n");
serr("Resuming\n");
(void)up_irq_save();
rtcb->pterrno = saved_errno;
arch/arm/src/armv7-m/up_svcall.c
+13 -13
View File
@@ -70,9 +70,9 @@
*/
#if defined(CONFIG_DEBUG_SYSCALL) || defined(CONFIG_DEBUG_SVCALL)
# define svcdbg(format, ...) llerr(format, ##__VA_ARGS__)
# define svcerr(format, ...) llerr(format, ##__VA_ARGS__)
#else
# define svcdbg(x...)
# define svcerr(x...)
#endif
/****************************************************************************
@@ -169,18 +169,18 @@ int up_svcall(int irq, FAR void *context)
if (cmd > SYS_switch_context)
# endif
{
svcdbg("SVCALL Entry: regs: %p cmd: %d\n", regs, cmd);
svcdbg(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
svcerr("SVCALL Entry: regs: %p cmd: %d\n", regs, cmd);
svcerr(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R0], regs[REG_R1], regs[REG_R2], regs[REG_R3],
regs[REG_R4], regs[REG_R5], regs[REG_R6], regs[REG_R7]);
svcdbg(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
svcerr(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R8], regs[REG_R9], regs[REG_R10], regs[REG_R11],
regs[REG_R12], regs[REG_R13], regs[REG_R14], regs[REG_R15]);
# ifdef REG_EXC_RETURN
svcdbg(" PSR: %08x EXC_RETURN: %08x\n",
svcerr(" PSR: %08x EXC_RETURN: %08x\n",
regs[REG_XPSR], regs[REG_EXC_RETURN]);
# else
svcdbg(" PSR: %08x\n", regs[REG_XPSR]);
svcerr(" PSR: %08x\n", regs[REG_XPSR]);
# endif
}
#endif
@@ -488,28 +488,28 @@ int up_svcall(int irq, FAR void *context)
if (regs != CURRENT_REGS)
# endif
{
svcdbg("SVCall Return:\n");
svcdbg(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
svcerr("SVCall Return:\n");
svcerr(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
CURRENT_REGS[REG_R0], CURRENT_REGS[REG_R1],
CURRENT_REGS[REG_R2], CURRENT_REGS[REG_R3],
CURRENT_REGS[REG_R4], CURRENT_REGS[REG_R5],
CURRENT_REGS[REG_R6], CURRENT_REGS[REG_R7]);
svcdbg(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
svcerr(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
CURRENT_REGS[REG_R8], CURRENT_REGS[REG_R9],
CURRENT_REGS[REG_R10], CURRENT_REGS[REG_R11],
CURRENT_REGS[REG_R12], CURRENT_REGS[REG_R13],
CURRENT_REGS[REG_R14], CURRENT_REGS[REG_R15]);
# ifdef REG_EXC_RETURN
svcdbg(" PSR: %08x EXC_RETURN: %08x\n",
svcerr(" PSR: %08x EXC_RETURN: %08x\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_EXC_RETURN]);
# else
svcdbg(" PSR: %08x\n", CURRENT_REGS[REG_XPSR]);
svcerr(" PSR: %08x\n", CURRENT_REGS[REG_XPSR]);
# endif
}
# ifdef CONFIG_DEBUG_SVCALL
else
{
svcdbg("SVCall Return: %d\n", regs[REG_R0]);
svcerr("SVCall Return: %d\n", regs[REG_R0]);
}
# endif
#endif
arch/arm/src/armv7-r/arm_elf.c
+7 -7
View File
@@ -86,7 +86,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if (ehdr->e_machine != EM_ARM)
{
bdbg("Not for ARM: e_machine=%04x\n", ehdr->e_machine);
berr("Not for ARM: e_machine=%04x\n", ehdr->e_machine);
return -ENOEXEC;
}
@@ -94,7 +94,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if (ehdr->e_ident[EI_CLASS] != ELFCLASS32)
{
bdbg("Need 32-bit objects: e_ident[EI_CLASS]=%02x\n", ehdr->e_ident[EI_CLASS]);
berr("Need 32-bit objects: e_ident[EI_CLASS]=%02x\n", ehdr->e_ident[EI_CLASS]);
return -ENOEXEC;
}
@@ -106,7 +106,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if (ehdr->e_ident[EI_DATA] != ELFDATA2LSB)
#endif
{
bdbg("Wrong endian-ness: e_ident[EI_DATA]=%02x\n", ehdr->e_ident[EI_DATA]);
berr("Wrong endian-ness: e_ident[EI_DATA]=%02x\n", ehdr->e_ident[EI_DATA]);
return -ENOEXEC;
}
@@ -114,7 +114,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if ((ehdr->e_entry & 3) != 0)
{
bdbg("Entry point is not properly aligned: %08x\n", ehdr->e_entry);
berr("Entry point is not properly aligned: %08x\n", ehdr->e_entry);
return -ENOEXEC;
}
@@ -187,7 +187,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
offset += sym->st_value - addr;
if (offset & 3 || offset <= (int32_t) 0xfe000000 || offset >= (int32_t) 0x02000000)
{
bdbg(" ERROR: PC24 [%d] relocation out of range, offset=%08lx\n",
berr(" ERROR: PC24 [%d] relocation out of range, offset=%08lx\n",
ELF32_R_TYPE(rel->r_info), offset);
return -EINVAL;
@@ -258,7 +258,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
break;
default:
bdbg("Unsupported relocation: %d\n", ELF32_R_TYPE(rel->r_info));
berr("Unsupported relocation: %d\n", ELF32_R_TYPE(rel->r_info));
return -EINVAL;
}
@@ -268,6 +268,6 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
int up_relocateadd(FAR const Elf32_Rela *rel, FAR const Elf32_Sym *sym,
uintptr_t addr)
{
bdbg("RELA relocation not supported\n");
berr("RELA relocation not supported\n");
return -ENOSYS;
}
arch/arm/src/armv7-r/arm_schedulesigaction.c
+2 -2
View File
@@ -94,7 +94,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
{
irqstate_t flags;
sdbg("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
serr("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
/* Make sure that interrupts are disabled */
@@ -108,7 +108,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
* to the currently executing task.
*/
sdbg("rtcb=0x%p CURRENT_REGS=0x%p\n", this_task(), CURRENT_REGS);
serr("rtcb=0x%p CURRENT_REGS=0x%p\n", this_task(), CURRENT_REGS);
if (tcb == this_task())
{
arch/arm/src/armv7-r/arm_sigdeliver.c
+2 -2
View File
@@ -83,7 +83,7 @@ void up_sigdeliver(void)
board_autoled_on(LED_SIGNAL);
sdbg("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
serr("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
rtcb, rtcb->xcp.sigdeliver, rtcb->sigpendactionq.head);
ASSERT(rtcb->xcp.sigdeliver != NULL);
@@ -114,7 +114,7 @@ void up_sigdeliver(void)
* errno that is needed by the user logic (it is probably EINTR).
*/
sdbg("Resuming\n");
serr("Resuming\n");
(void)up_irq_save();
rtcb->pterrno = saved_errno;
arch/arm/src/armv7-r/arm_syscall.c
+11 -11
View File
@@ -69,9 +69,9 @@
/* Debug ********************************************************************/
#if defined(CONFIG_DEBUG_SYSCALL)
# define svcdbg(format, ...) llerr(format, ##__VA_ARGS__)
# define svcerr(format, ...) llerr(format, ##__VA_ARGS__)
#else
# define svcdbg(x...)
# define svcerr(x...)
#endif
/****************************************************************************
@@ -177,14 +177,14 @@ uint32_t *arm_syscall(uint32_t *regs)
*/
#if defined(CONFIG_DEBUG_SYSCALL)
svcdbg("SYSCALL Entry: regs: %p cmd: %d\n", regs, cmd);
svcdbg(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
svcerr("SYSCALL Entry: regs: %p cmd: %d\n", regs, cmd);
svcerr(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R0], regs[REG_R1], regs[REG_R2], regs[REG_R3],
regs[REG_R4], regs[REG_R5], regs[REG_R6], regs[REG_R7]);
svcdbg(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
svcerr(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R8], regs[REG_R9], regs[REG_R10], regs[REG_R11],
regs[REG_R12], regs[REG_R13], regs[REG_R14], regs[REG_R15]);
svcdbg("CPSR: %08x\n", regs[REG_CPSR]);
svcerr("CPSR: %08x\n", regs[REG_CPSR]);
#endif
/* Handle the SVCall according to the command in R0 */
@@ -478,7 +478,7 @@ uint32_t *arm_syscall(uint32_t *regs)
regs[REG_R0] -= CONFIG_SYS_RESERVED;
#else
svcdbg("ERROR: Bad SYS call: %d\n", regs[REG_R0]);
svcerr("ERROR: Bad SYS call: %d\n", regs[REG_R0]);
#endif
#ifdef CONFIG_ARCH_KERNEL_STACK
@@ -502,14 +502,14 @@ uint32_t *arm_syscall(uint32_t *regs)
#if defined(CONFIG_DEBUG_SYSCALL)
/* Report what happened */
svcdbg("SYSCALL Exit: regs: %p\n", regs);
svcdbg(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
svcerr("SYSCALL Exit: regs: %p\n", regs);
svcerr(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R0], regs[REG_R1], regs[REG_R2], regs[REG_R3],
regs[REG_R4], regs[REG_R5], regs[REG_R6], regs[REG_R7]);
svcdbg(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
svcerr(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R8], regs[REG_R9], regs[REG_R10], regs[REG_R11],
regs[REG_R12], regs[REG_R13], regs[REG_R14], regs[REG_R15]);
svcdbg("CPSR: %08x\n", regs[REG_CPSR]);
svcerr("CPSR: %08x\n", regs[REG_CPSR]);
#endif
/* Return the last value of curent_regs. This supports context switches
arch/arm/src/armv7-r/mpu.h
+1 -1
View File
@@ -361,7 +361,7 @@ static inline void mpu_showtype(void)
{
#ifdef CONFIG_DEBUG_FEATURES
uint32_t regval = mpu_get_mpuir();
dbg("%s MPU Regions: data=%d instr=%d\n",
err("%s MPU Regions: data=%d instr=%d\n",
(regval & MPUIR_SEPARATE) != 0 ? "Separate" : "Unified",
(regval & MPUIR_DREGION_MASK) >> MPUIR_DREGION_SHIFT,
(regval & MPUIR_IREGION_MASK) >> MPUIR_IREGION_SHIFT);
arch/arm/src/c5471/c5471_ethernet.c
+17 -17
View File
@@ -737,22 +737,22 @@ static int c5471_phyinit (void)
phyid = (c5471_mdread(0, MD_PHY_MSB_REG) << 16) | c5471_mdread(0, MD_PHY_LSB_REG);
if (phyid != LU3X31_T64_PHYID)
{
ndbg("Unrecognized PHY ID: %08x\n", phyid);
nerr("Unrecognized PHY ID: %08x\n", phyid);
return ERROR;
}
/* Next, Set desired network rate, 10BaseT, 100BaseT, or auto. */
#ifdef CONFIG_C5471_AUTONEGOTIATION
ndbg("Setting PHY Transceiver for Autonegotiation\n");
nerr("Setting PHY Transceiver for Autonegotiation\n");
c5471_mdwrite(0, MD_PHY_CONTROL_REG, MODE_AUTONEG);
#endif
#ifdef CONFIG_C5471_BASET100
ndbg("Setting PHY Transceiver for 100BaseT FullDuplex\n");
nerr("Setting PHY Transceiver for 100BaseT FullDuplex\n");
c5471_mdwrite(0, MD_PHY_CONTROL_REG, MODE_100MBIT_FULLDUP);
#endif
#ifdef CONFIG_C5471_BASET10
ndbg("Setting PHY Transceiver for 10BaseT FullDuplex\n");
nerr("Setting PHY Transceiver for 10BaseT FullDuplex\n");
c5471_mdwrite(0, MD_PHY_CONTROL_REG, MODE_10MBIT_FULLDUP);
#endif
@@ -1371,7 +1371,7 @@ static void c5471_receive(struct c5471_driver_s *c5471)
{
/* Increment the count of dropped packets */
ndbg("Too big! packetlen: %d\n", packetlen);
nerr("Too big! packetlen: %d\n", packetlen);
c5471->c_rxdropped++;
}
#endif
@@ -1680,7 +1680,7 @@ static int c5471_ifup(struct net_driver_s *dev)
struct c5471_driver_s *c5471 = (struct c5471_driver_s *)dev->d_private;
volatile uint32_t clearbits;
ndbg("Bringing up: %d.%d.%d.%d\n",
nerr("Bringing up: %d.%d.%d.%d\n",
dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
(dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
@@ -1742,7 +1742,7 @@ static int c5471_ifdown(struct net_driver_s *dev)
struct c5471_driver_s *c5471 = (struct c5471_driver_s *)dev->d_private;
irqstate_t flags;
ndbg("Stopping\n");
nerr("Stopping\n");
/* Disable the Ethernet interrupt */
@@ -1798,7 +1798,7 @@ static int c5471_txavail(struct net_driver_s *dev)
struct c5471_driver_s *c5471 = (struct c5471_driver_s *)dev->d_private;
irqstate_t flags;
ndbg("Polling\n");
nerr("Polling\n");
flags = enter_critical_section();
/* Ignore the notification if the interface is not yet up */
@@ -1951,7 +1951,7 @@ static void c5471_eimconfig(struct c5471_driver_s *c5471)
/* TX ENET 0 */
ndbg("TX ENET0 desc: %08x pbuf: %08x\n", desc, pbuf);
nerr("TX ENET0 desc: %08x pbuf: %08x\n", desc, pbuf);
putreg32((desc & 0x0000ffff), ENET0_TDBA); /* 16-bit offset address */
for (i = NUM_DESC_TX-1; i >= 0; i--)
{
@@ -1978,7 +1978,7 @@ static void c5471_eimconfig(struct c5471_driver_s *c5471)
/* RX ENET 0 */
ndbg("RX ENET0 desc: %08x pbuf: %08x\n", desc, pbuf);
nerr("RX ENET0 desc: %08x pbuf: %08x\n", desc, pbuf);
putreg32((desc & 0x0000ffff), ENET0_RDBA); /* 16-bit offset address */
for (i = NUM_DESC_RX-1; i >= 0; i--)
{
@@ -2005,7 +2005,7 @@ static void c5471_eimconfig(struct c5471_driver_s *c5471)
/* TX CPU */
ndbg("TX CPU desc: %08x pbuf: %08x\n", desc, pbuf);
nerr("TX CPU desc: %08x pbuf: %08x\n", desc, pbuf);
c5471->c_txcpudesc = desc;
putreg32((desc & 0x0000ffff), EIM_CPU_TXBA); /* 16-bit offset address */
for (i = NUM_DESC_TX-1; i >= 0; i--)
@@ -2035,7 +2035,7 @@ static void c5471_eimconfig(struct c5471_driver_s *c5471)
/* RX CPU */
ndbg("RX CPU desc: %08x pbuf: %08x\n", desc, pbuf);
nerr("RX CPU desc: %08x pbuf: %08x\n", desc, pbuf);
c5471->c_rxcpudesc = desc;
putreg32((desc & 0x0000ffff), EIM_CPU_RXBA); /* 16-bit offset address */
for (i = NUM_DESC_RX-1; i >= 0; i--)
@@ -2063,7 +2063,7 @@ static void c5471_eimconfig(struct c5471_driver_s *c5471)
pbuf += sizeof(uint32_t); /* Ether Module's "Buffer Usage Word" */
}
ndbg("END desc: %08x pbuf: %08x\n", desc, pbuf);
nerr("END desc: %08x pbuf: %08x\n", desc, pbuf);
/* Save the descriptor packet size */
@@ -2150,13 +2150,13 @@ static void c5471_eimconfig(struct c5471_driver_s *c5471)
static void c5471_reset(struct c5471_driver_s *c5471)
{
#if defined(CONFIG_C5471_PHY_LU3X31T_T64)
ndbg("EIM reset\n");
nerr("EIM reset\n");
c5471_eimreset(c5471);
#endif
ndbg("PHY init\n");
nerr("PHY init\n");
c5471_phyinit();
ndbg("EIM config\n");
nerr("EIM config\n");
c5471_eimconfig(c5471);
}
@@ -2178,7 +2178,7 @@ static void c5471_macassign(struct c5471_driver_s *c5471)
uint8_t *mptr = dev->d_mac.ether_addr_octet;
register uint32_t tmp;
ndbg("MAC: %0x:%0x:%0x:%0x:%0x:%0x\n",
nerr("MAC: %0x:%0x:%0x:%0x:%0x:%0x\n",
mptr[0], mptr[1], mptr[2], mptr[3], mptr[4], mptr[5]);
/* Set CPU port MAC address. S/W will only see incoming packets that match
arch/arm/src/c5471/c5471_watchdog.c
+18 -18
View File
@@ -155,7 +155,7 @@ static inline unsigned int wdt_prescaletoptv(unsigned int prescale)
}
}
dbg("prescale=%d -> ptv=%d\n", prescale, ptv);
err("prescale=%d -> ptv=%d\n", prescale, ptv);
return ptv;
}
@@ -173,7 +173,7 @@ static int wdt_setusec(uint32_t usec)
uint32_t divisor = 1;
uint32_t mode;
dbg("usec=%d\n", usec);
err("usec=%d\n", usec);
/* Calculate a value of prescaler and divisor that will be able
* to count to the usec. It may not be exact or the best
@@ -186,7 +186,7 @@ static int wdt_setusec(uint32_t usec)
do
{
divisor = (CLOCK_MHZx2 * usec) / (prescaler * 2);
dbg("divisor=0x%x prescaler=0x%x\n", divisor, prescaler);
err("divisor=0x%x prescaler=0x%x\n", divisor, prescaler);
if (divisor >= 0x10000)
{
@@ -194,7 +194,7 @@ static int wdt_setusec(uint32_t usec)
{
/* This is the max possible ~2.5 seconds. */
dbg("prescaler=0x%x too big!\n", prescaler);
err("prescaler=0x%x too big!\n", prescaler);
return ERROR;
}
@@ -207,19 +207,19 @@ static int wdt_setusec(uint32_t usec)
}
while (divisor >= 0x10000);
dbg("prescaler=0x%x divisor=0x%x\n", prescaler, divisor);
err("prescaler=0x%x divisor=0x%x\n", prescaler, divisor);
mode = wdt_prescaletoptv(prescaler);
mode &= ~C5471_TIMER_AUTORELOAD; /* One shot mode. */
mode |= divisor << 5;
dbg("mode=0x%x\n", mode);
err("mode=0x%x\n", mode);
c5471_wdt_cntl = mode;
/* Now start the watchdog */
c5471_wdt_cntl |= C5471_TIMER_STARTBIT;
dbg("cntl_timer=0x%x\n", c5471_wdt_cntl);
err("cntl_timer=0x%x\n", c5471_wdt_cntl);
return 0;
}
@@ -234,17 +234,17 @@ static int wdt_setusec(uint32_t usec)
static int wdt_interrupt(int irq, void *context)
{
dbg("expired\n");
err("expired\n");
#if defined(CONFIG_SOFTWARE_REBOOT)
# if defined(CONFIG_SOFTWARE_TEST)
dbg(" Test only\n");
err(" Test only\n");
# else
dbg(" Re-booting\n");
err(" Re-booting\n");
# warning "Add logic to reset CPU here"
# endif
#else
dbg(" No reboot\n");
err(" No reboot\n");
#endif
return OK;
}
@@ -259,7 +259,7 @@ static ssize_t wdt_read(struct file *filep, char *buffer, size_t buflen)
* not work if the user provides a buffer smaller than 18 bytes.
*/
dbg("buflen=%d\n", buflen);
err("buflen=%d\n", buflen);
if (buflen >= 18)
{
sprintf(buffer, "%08x %08x\n", c5471_wdt_cntl, c5471_wdt_count);
@@ -274,7 +274,7 @@ static ssize_t wdt_read(struct file *filep, char *buffer, size_t buflen)
static ssize_t wdt_write(struct file *filep, const char *buffer, size_t buflen)
{
dbg("buflen=%d\n", buflen);
err("buflen=%d\n", buflen);
if (buflen)
{
/* Reset the timer to the maximum delay */
@@ -292,7 +292,7 @@ static ssize_t wdt_write(struct file *filep, const char *buffer, size_t buflen)
static int wdt_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
{
dbg("ioctl Call: cmd=0x%x arg=0x%x", cmd, arg);
err("ioctl Call: cmd=0x%x arg=0x%x", cmd, arg);
/* Process the IOCTL command (see arch/watchdog.h) */
@@ -315,7 +315,7 @@ static int wdt_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
static int wdt_open(struct file *filep)
{
dbg("");
err("");
if (g_wdtopen)
{
@@ -339,7 +339,7 @@ static int wdt_open(struct file *filep)
static int wdt_close(struct file *filep)
{
dbg("");
err("");
/* The task controlling the watchdog has terminated. Take the timer
* the
@@ -367,7 +367,7 @@ int up_wdtinit(void)
{
int ret;
dbg("C547x Watchdog Driver\n");
err("C547x Watchdog Driver\n");
/* Register as /dev/wdt */
@@ -379,7 +379,7 @@ int up_wdtinit(void)
/* Register for an interrupt level callback through wdt_interrupt */
dbg("Attach to IRQ=%d\n", C5471_IRQ_WATCHDOG);
err("Attach to IRQ=%d\n", C5471_IRQ_WATCHDOG);
/* Make sure that the timer is stopped */
arch/arm/src/calypso/calypso_spi.c
+5 -5
View File
@@ -216,7 +216,7 @@ int spi_xfer(uint8_t dev_idx, uint8_t bitlen, const void *dout, void *din)
tmp <<= (32-bitlen); /* align to MSB */
}
dbg("spi_xfer(dev_idx=%u, bitlen=%u, data_out=0x%08x): ",
err("spi_xfer(dev_idx=%u, bitlen=%u, data_out=0x%08x): ",
dev_idx, bitlen, tmp);
/* fill transmit registers */
@@ -236,14 +236,14 @@ int spi_xfer(uint8_t dev_idx, uint8_t bitlen, const void *dout, void *din)
}
putreg16(reg_ctrl, SPI_REG(REG_CTRL));
dbg("reg_ctrl=0x%04x ", reg_ctrl);
err("reg_ctrl=0x%04x ", reg_ctrl);
/* wait until the transfer is complete */
while (1)
{
reg_status = getreg16(SPI_REG(REG_STATUS));
dbg("status=0x%04x ", reg_status);
err("status=0x%04x ", reg_status);
if (din && (reg_status & SPI_STATUS_RE))
{
break;
@@ -262,7 +262,7 @@ int spi_xfer(uint8_t dev_idx, uint8_t bitlen, const void *dout, void *din)
{
tmp = getreg16(SPI_REG(REG_RX_MSB)) << 16;
tmp |= getreg16(SPI_REG(REG_RX_LSB));
dbg("data_in=0x%08x ", tmp);
err("data_in=0x%08x ", tmp);
if (bitlen <= 8)
{
@@ -278,7 +278,7 @@ int spi_xfer(uint8_t dev_idx, uint8_t bitlen, const void *dout, void *din)
}
}
dbg("\n");
err("\n");
return 0;
}
arch/arm/src/calypso/calypso_uwire.c
+4 -4
View File
@@ -112,7 +112,7 @@ int uwire_xfer(int cs, int bitlen, const void *dout, void *din)
/* FIXME uwire_init always selects CS0 for now */
dbg("uwire_xfer(dev_idx=%u, bitlen=%u\n", cs, bitlen);
err("uwire_xfer(dev_idx=%u, bitlen=%u\n", cs, bitlen);
/* select the chip */
@@ -128,7 +128,7 @@ int uwire_xfer(int cs, int bitlen, const void *dout, void *din)
tmp <<= 16 - bitlen; /* align to MSB */
putreg16(tmp, UWIRE_REG(REG_DATA));
dbg(", data_out=0x%04hx", tmp);
err(", data_out=0x%04hx", tmp);
}
tmp = (dout ? UWIRE_CSR_BITS_WR(bitlen) : 0) |
@@ -142,7 +142,7 @@ int uwire_xfer(int cs, int bitlen, const void *dout, void *din)
_uwire_wait(UWIRE_CSR_RDRB, UWIRE_CSR_RDRB);
tmp = getreg16(UWIRE_REG(REG_DATA));
dbg(", data_in=0x%08x", tmp);
err(", data_in=0x%08x", tmp);
if (bitlen <= 8)
*(uint8_t *)din = tmp & 0xff;
@@ -155,7 +155,7 @@ int uwire_xfer(int cs, int bitlen, const void *dout, void *din)
putreg16(UWIRE_CSR_IDX(0) | 0, UWIRE_REG(REG_CSR));
_uwire_wait(UWIRE_CSR_CSRB, 0);
dbg(")\n");
err(")\n");
return 0;
}
arch/arm/src/common/up_createstack.c
+1 -1
View File
@@ -210,7 +210,7 @@ int up_create_stack(FAR struct tcb_s *tcb, size_t stack_size, uint8_t ttype)
if (!tcb->stack_alloc_ptr)
{
sdbg("ERROR: Failed to allocate stack, size %d\n", stack_size);
serr("ERROR: Failed to allocate stack, size %d\n", stack_size);
}
#endif
}
arch/arm/src/common/up_exit.c
+5 -5
View File
@@ -77,8 +77,8 @@ static void _up_dumponexit(FAR struct tcb_s *tcb, FAR void *arg)
int i;
#endif
sdbg(" TCB=%p name=%s pid=%d\n", tcb, tcb->argv[0], tcb->pid);
sdbg(" priority=%d state=%d\n", tcb->sched_priority, tcb->task_state);
serr(" TCB=%p name=%s pid=%d\n", tcb, tcb->argv[0], tcb->pid);
serr(" priority=%d state=%d\n", tcb->sched_priority, tcb->task_state);
#if CONFIG_NFILE_DESCRIPTORS > 0
filelist = tcb->group->tg_filelist;
@@ -87,7 +87,7 @@ static void _up_dumponexit(FAR struct tcb_s *tcb, FAR void *arg)
struct inode *inode = filelist->fl_files[i].f_inode;
if (inode)
{
sdbg(" fd=%d refcount=%d\n",
serr(" fd=%d refcount=%d\n",
i, inode->i_crefs);
}
}
@@ -101,11 +101,11 @@ static void _up_dumponexit(FAR struct tcb_s *tcb, FAR void *arg)
if (filep->fs_fd >= 0)
{
#if CONFIG_STDIO_BUFFER_SIZE > 0
sdbg(" fd=%d nbytes=%d\n",
serr(" fd=%d nbytes=%d\n",
filep->fs_fd,
filep->fs_bufpos - filep->fs_bufstart);
#else
sdbg(" fd=%d\n", filep->fs_fd);
serr(" fd=%d\n", filep->fs_fd);
#endif
}
}
arch/arm/src/common/up_vfork.c
+2 -2
View File
@@ -143,7 +143,7 @@ pid_t up_vfork(const struct vfork_s *context)
child = task_vforksetup((start_t)(context->lr & ~1));
if (!child)
{
sdbg("ERROR: task_vforksetup failed\n");
serr("ERROR: task_vforksetup failed\n");
return (pid_t)ERROR;
}
@@ -162,7 +162,7 @@ pid_t up_vfork(const struct vfork_s *context)
parent->flags & TCB_FLAG_TTYPE_MASK);
if (ret != OK)
{
sdbg("ERROR: up_create_stack failed: %d\n", ret);
serr("ERROR: up_create_stack failed: %d\n", ret);
task_vforkabort(child, -ret);
return (pid_t)ERROR;
}
arch/arm/src/dm320/dm320_framebuffer.c
+2 -2
View File
@@ -928,7 +928,7 @@ static void dm320_hwinitialize(void)
/* Set up the rectangular cursor with defaults */
#ifdef CONFIG_FB_HWCURSOR
gdbg("Initialize rectangular cursor\n");
gerr("Initialize rectangular cursor\n");
putreg16(0, DM320_OSD_CURXP);
putreg16(0, DM320_OSD_CURYP);
@@ -1385,7 +1385,7 @@ int up_fbinitialize(int display)
ret = dm320_allocvideomemory();
if (ret != 0)
{
gdbg("Failed to allocate video buffers\n");
gerr("Failed to allocate video buffers\n");
return ret;
}
arch/arm/src/efm32/efm32_adc.c
+1 -1
View File
@@ -1298,7 +1298,7 @@ struct adc_dev_s *efm32_adcinitialize(int intf, const uint8_t *chanlist, int nch
else
#endif
{
adbg("No ADC interface defined\n");
aerr("No ADC interface defined\n");
return NULL;
}
arch/arm/src/efm32/efm32_dma.c
+22 -22
View File
@@ -804,29 +804,29 @@ void efm32_dmadump(DMA_HANDLE handle, const struct efm32_dmaregs_s *regs,
{
struct dma_channel_s *dmach = (struct dma_channel_s *)handle;
dmadbg("%s\n", msg);
dmadbg(" DMA Registers:\n");
dmadbg(" STATUS: %08x\n", regs->status);
dmadbg(" CTRLBASE: %08x\n", regs->ctrlbase);
dmadbg(" ALTCTRLBASE: %08x\n", regs->altctrlbase);
dmadbg(" CHWAITSTATUS: %08x\n", regs->chwaitstatus);
dmadbg(" CHUSEBURSTS: %08x\n", regs->chusebursts);
dmadbg(" CHREQMASKS: %08x\n", regs->chreqmasks);
dmadbg(" CHENS: %08x\n", regs->chens);
dmadbg(" CHALTS: %08x\n", regs->chalts);
dmadbg(" CHPRIS: %08x\n", regs->chpris);
dmadbg(" ERRORC: %08x\n", regs->errorc);
dmadbg(" CHREQSTATUS: %08x\n", regs->chreqstatus);
dmadbg(" CHSREQSTATUS: %08x\n", regs->chsreqstatus);
dmadbg(" IEN: %08x\n", regs->ien);
dmaerr("%s\n", msg);
dmaerr(" DMA Registers:\n");
dmaerr(" STATUS: %08x\n", regs->status);
dmaerr(" CTRLBASE: %08x\n", regs->ctrlbase);
dmaerr(" ALTCTRLBASE: %08x\n", regs->altctrlbase);
dmaerr(" CHWAITSTATUS: %08x\n", regs->chwaitstatus);
dmaerr(" CHUSEBURSTS: %08x\n", regs->chusebursts);
dmaerr(" CHREQMASKS: %08x\n", regs->chreqmasks);
dmaerr(" CHENS: %08x\n", regs->chens);
dmaerr(" CHALTS: %08x\n", regs->chalts);
dmaerr(" CHPRIS: %08x\n", regs->chpris);
dmaerr(" ERRORC: %08x\n", regs->errorc);
dmaerr(" CHREQSTATUS: %08x\n", regs->chreqstatus);
dmaerr(" CHSREQSTATUS: %08x\n", regs->chsreqstatus);
dmaerr(" IEN: %08x\n", regs->ien);
#if defined(CONFIG_EFM32_EFM32GG)
dmadbg(" CTRL: %08x\n", regs->ctrl);
dmadbg(" RDS: %08x\n", regs->rds);
dmadbg(" LOOP0: %08x\n", regs->loop0);
dmadbg(" LOOP1: %08x\n", regs->loop1);
dmadbg(" RECT0: %08x\n", regs->rect0);
dmaerr(" CTRL: %08x\n", regs->ctrl);
dmaerr(" RDS: %08x\n", regs->rds);
dmaerr(" LOOP0: %08x\n", regs->loop0);
dmaerr(" LOOP1: %08x\n", regs->loop1);
dmaerr(" RECT0: %08x\n", regs->rect0);
#endif
dmadbg(" DMA Channel %d Registers:\n", dmach->chan);
dmadbg(" CHCTRL: %08x\n", regs->chnctrl);
dmaerr(" DMA Channel %d Registers:\n", dmach->chan);
dmaerr(" CHCTRL: %08x\n", regs->chnctrl);
}
#endif
arch/arm/src/efm32/efm32_i2c.c
+4 -4
View File
@@ -137,10 +137,10 @@
/* CONFIG_DEBUG_I2C + CONFIG_DEBUG_FEATURES enables general I2C debug output. */
#ifdef CONFIG_DEBUG_I2C
# define i2cdbg dbg
# define i2cerr err
# define i2cinfo info
#else
# define i2cdbg(x...)
# define i2cerr(x...)
# define i2cinfo(x...)
#endif
@@ -761,7 +761,7 @@ static void efm32_i2c_tracenew(FAR struct efm32_i2c_priv_s *priv)
if (priv->tndx >= (CONFIG_I2C_NTRACE - 1))
{
i2cdbg("Trace table overflow\n");
i2cerr("Trace table overflow\n");
return;
}
@@ -1536,7 +1536,7 @@ static int efm32_i2c_transfer(FAR struct i2c_master_s *dev,
{
ret = -ETIMEDOUT;
i2cdbg("Timed out: I2Cx_STATE: 0x%04x I2Cx_STATUS: 0x%08x\n",
i2cerr("Timed out: I2Cx_STATE: 0x%04x I2Cx_STATUS: 0x%08x\n",
efm32_i2c_getreg(priv, EFM32_I2C_STATE_OFFSET),
efm32_i2c_getreg(priv, EFM32_I2C_STATUS_OFFSET));
arch/arm/src/efm32/efm32_irq.c
+9 -9
View File
@@ -155,7 +155,7 @@ static void efm32_dumpnvic(const char *msg, int irq)
/****************************************************************************
* Name: efm32_nmi, efm32_busfault, efm32_usagefault, efm32_pendsv,
* efm32_dbgmonitor, efm32_pendsv, efm32_reserved
* efm32_errmonitor, efm32_pendsv, efm32_reserved
*
* Description:
* Handlers for various exceptions. None are handled and all are fatal
@@ -168,7 +168,7 @@ static void efm32_dumpnvic(const char *msg, int irq)
static int efm32_nmi(int irq, FAR void *context)
{
(void)up_irq_save();
dbg("PANIC!!! NMI received\n");
err("PANIC!!! NMI received\n");
PANIC();
return 0;
}
@@ -176,7 +176,7 @@ static int efm32_nmi(int irq, FAR void *context)
static int efm32_busfault(int irq, FAR void *context)
{
(void)up_irq_save();
dbg("PANIC!!! Bus fault received: %08x\n", getreg32(NVIC_CFAULTS));
err("PANIC!!! Bus fault received: %08x\n", getreg32(NVIC_CFAULTS));
PANIC();
return 0;
}
@@ -184,7 +184,7 @@ static int efm32_busfault(int irq, FAR void *context)
static int efm32_usagefault(int irq, FAR void *context)
{
(void)up_irq_save();
dbg("PANIC!!! Usage fault received: %08x\n", getreg32(NVIC_CFAULTS));
err("PANIC!!! Usage fault received: %08x\n", getreg32(NVIC_CFAULTS));
PANIC();
return 0;
}
@@ -192,15 +192,15 @@ static int efm32_usagefault(int irq, FAR void *context)
static int efm32_pendsv(int irq, FAR void *context)
{
(void)up_irq_save();
dbg("PANIC!!! PendSV received\n");
err("PANIC!!! PendSV received\n");
PANIC();
return 0;
}
static int efm32_dbgmonitor(int irq, FAR void *context)
static int efm32_errmonitor(int irq, FAR void *context)
{
(void)up_irq_save();
dbg("PANIC!!! Debug Monitor received\n");
err("PANIC!!! Debug Monitor received\n");
PANIC();
return 0;
}
@@ -208,7 +208,7 @@ static int efm32_dbgmonitor(int irq, FAR void *context)
static int efm32_reserved(int irq, FAR void *context)
{
(void)up_irq_save();
dbg("PANIC!!! Reserved interrupt\n");
err("PANIC!!! Reserved interrupt\n");
PANIC();
return 0;
}
@@ -456,7 +456,7 @@ void up_irqinitialize(void)
irq_attach(EFM32_IRQ_BUSFAULT, efm32_busfault);
irq_attach(EFM32_IRQ_USAGEFAULT, efm32_usagefault);
irq_attach(EFM32_IRQ_PENDSV, efm32_pendsv);
irq_attach(EFM32_IRQ_DBGMONITOR, efm32_dbgmonitor);
irq_attach(EFM32_IRQ_DBGMONITOR, efm32_errmonitor);
irq_attach(EFM32_IRQ_RESERVED, efm32_reserved);
#endif
arch/arm/src/efm32/efm32_pwm.c
+4 -4
View File
@@ -82,7 +82,7 @@
#endif
#ifdef CONFIG_DEBUG_PWM
# define pwmdbg dbg
# define pwmerr err
# define pwmllerr llerr
# ifdef CONFIG_DEBUG_INFO
# define pwminfo info
@@ -94,7 +94,7 @@
# define pwm_dumpgpio(p,m)
# endif
#else
# define pwmdbg(x...)
# define pwmerr(x...)
# define pwmllerr(x...)
# define pwminfo(x...)
# define pwmllinfo(x...)
@@ -414,7 +414,7 @@ static int pwm_timer(FAR struct efm32_pwmtimer_s *priv,
if (efm32_timer_set_freq(priv->base, priv->pclk, info->frequency) < 0)
{
pwmdbg("Cannot set TIMER frequency %dHz from clock %dHz\n",
pwmerr("Cannot set TIMER frequency %dHz from clock %dHz\n",
info->frequency, priv->pclk);
return -EINVAL;
}
@@ -933,7 +933,7 @@ FAR struct pwm_lowerhalf_s *efm32_pwminitialize(int timer)
#endif
default:
pwmdbg("No such timer configured\n");
pwmerr("No such timer configured\n");
return NULL;
}
arch/arm/src/efm32/efm32_rmu.c
+2 -2
View File
@@ -262,7 +262,7 @@ void efm32_rmu_initialize(void)
}
#ifdef CONFIG_EFM32_RMU_DEBUG
rmudbg("RMU => reg = 0x%08X\n", g_efm32_rstcause);
rmuerr("RMU => reg = 0x%08X\n", g_efm32_rstcause);
for (; ; )
{
const char *str;
@@ -273,7 +273,7 @@ void efm32_rmu_initialize(void)
break;
}
rmudbg("RMU => %s\n", str);
rmuerr("RMU => %s\n", str);
}
#endif
}
arch/arm/src/efm32/efm32_rmu.h
+2 -2
View File
@@ -56,14 +56,14 @@
#endif
#ifdef CONFIG_EFM32_RMU_DEBUG
# define rmudbg llerr
# define rmuerr llerr
# ifdef CONFIG_DEBUG_INFO
# define rmuinfo llerr
# else
# define rmuinfo(x...)
# endif
#else
# define rmudbg(x...)
# define rmuerr(x...)
# define rmuinfo(x...)
#endif
arch/arm/src/efm32/efm32_rtc_burtc.c
+9 -9
View File
@@ -131,9 +131,9 @@
#define __CNT_ZERO_REG EFM32_BURTC_RET_REG(1)
#if defined CONFIG_DEBUG_FEATURES && defined CONFIG_RTC_DEBUG
# define burtcdbg llerr
# define burtcerr llerr
#else
# define burtcdbg(x...)
# define burtcerr(x...)
#endif
/************************************************************************************
@@ -191,7 +191,7 @@ static int efm32_rtc_burtc_interrupt(int irq, void *context)
if (source & BURTC_IF_LFXOFAIL)
{
burtcdbg("BURTC_IF_LFXOFAIL");
burtcerr("BURTC_IF_LFXOFAIL");
}
#ifdef CONFIG_RTC_HIRES
@@ -245,7 +245,7 @@ static void efm32_rtc_burtc_init(void)
regval = g_efm32_rstcause;
regval2 = getreg32(EFM32_BURTC_CTRL);
burtcdbg("BURTC RESETCAUSE=0x%08X BURTC_CTRL=0x%08X\n", regval, regval2);
burtcerr("BURTC RESETCAUSE=0x%08X BURTC_CTRL=0x%08X\n", regval, regval2);
if (!(regval2 & BURTC_CTRL_RSTEN) &&
!(regval & RMU_RSTCAUSE_BUBODREG) &&
@@ -262,11 +262,11 @@ static void efm32_rtc_burtc_init(void)
/* restore saved base time */
burtcdbg("BURTC OK\n");
burtcerr("BURTC OK\n");
return;
}
burtcdbg("BURTC RESETED\n");
burtcerr("BURTC RESETED\n");
/* Disable reset of BackupDomain */
@@ -358,7 +358,7 @@ static uint64_t efm32_get_burtc_tick(void)
val = (uint64_t)cnt_carry*__CNT_TOP + cnt + cnt_zero;
burtcdbg("Get Tick carry %u zero %u reg %u\n", cnt_carry, cnt_carry,cnt);
burtcerr("Get Tick carry %u zero %u reg %u\n", cnt_carry, cnt_carry,cnt);
return val;
}
@@ -449,7 +449,7 @@ int up_rtc_gettime(FAR struct timespec *tp)
tp->tv_sec = val / CONFIG_RTC_FREQUENCY;
tp->tv_nsec = (val % CONFIG_RTC_FREQUENCY)*(NSEC_PER_SEC/CONFIG_RTC_FREQUENCY);
burtcdbg("Get RTC %u.%09u\n", tp->tv_sec, tp->tv_nsec);
burtcerr("Get RTC %u.%09u\n", tp->tv_sec, tp->tv_nsec);
return OK;
}
@@ -499,7 +499,7 @@ int up_rtc_settime(FAR const struct timespec *tp)
cnt_carry = val / __CNT_TOP;
cnt = val % __CNT_TOP;
burtcdbg("Set RTC %u.%09u carry %u zero %u reg %u\n",
burtcerr("Set RTC %u.%09u carry %u zero %u reg %u\n",
tp->tv_sec, tp->tv_nsec, cnt_carry, cnt, cnt_reg);
putreg32(cnt_carry, __CNT_CARRY_REG);
arch/arm/src/efm32/efm32_spi.c
+8 -8
View File
@@ -100,14 +100,14 @@
#endif
#ifdef CONFIG_DEBUG_SPI
# define spidbg llerr
# define spierr llerr
# ifdef CONFIG_DEBUG_INFO
# define spiinfo llerr
# else
# define spiinfo(x...)
# endif
#else
# define spidbg(x...)
# define spierr(x...)
# define spiinfo(x...)
#endif
@@ -1456,7 +1456,7 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
ret = wd_start(priv->wdog, (int)ticks, spi_dma_timeout, 1, (uint32_t)priv);
if (ret < 0)
{
spidbg("ERROR: Failed to start timeout\n");
spierr("ERROR: Failed to start timeout\n");
}
/* Then wait for each to complete. TX should complete first */
@@ -1594,7 +1594,7 @@ static int spi_portinitialize(struct efm32_spidev_s *priv)
priv->rxdmach = efm32_dmachannel();
if (!priv->rxdmach)
{
spidbg("ERROR: Failed to allocate the RX DMA channel for SPI port: %d\n",
spierr("ERROR: Failed to allocate the RX DMA channel for SPI port: %d\n",
port);
goto errout;
}
@@ -1602,7 +1602,7 @@ static int spi_portinitialize(struct efm32_spidev_s *priv)
priv->txdmach = efm32_dmachannel();
if (!priv->txdmach)
{
spidbg("ERROR: Failed to allocate the TX DMA channel for SPI port: %d\n",
spierr("ERROR: Failed to allocate the TX DMA channel for SPI port: %d\n",
port);
goto errout_with_rxdmach;
}
@@ -1612,7 +1612,7 @@ static int spi_portinitialize(struct efm32_spidev_s *priv)
priv->wdog = wd_create();
if (!priv->wdog)
{
spidbg("ERROR: Failed to create a timer for SPI port: %d\n", port);
spierr("ERROR: Failed to create a timer for SPI port: %d\n", port);
goto errout_with_txdmach;
}
@@ -1709,7 +1709,7 @@ struct spi_dev_s *efm32_spibus_initialize(int port)
else
#endif
{
spidbg("ERROR: Unsupported SPI port: %d\n", port);
spierr("ERROR: Unsupported SPI port: %d\n", port);
return NULL;
}
@@ -1731,7 +1731,7 @@ struct spi_dev_s *efm32_spibus_initialize(int port)
ret = spi_portinitialize(priv);
if (ret < 0)
{
spidbg("ERROR: Failed to initialize SPI port %d\n", port);
spierr("ERROR: Failed to initialize SPI port %d\n", port);
leave_critical_section(flags);
return NULL;
}
arch/arm/src/efm32/efm32_timer.c
+3 -3
View File
@@ -68,7 +68,7 @@
#endif
#ifdef CONFIG_DEBUG_TIMER
# define efm32_timerdbg dbg
# define efm32_timererr err
# define efm32_timerllerr llerr
# ifdef CONFIG_DEBUG_INFO
# define efm32_timerinfo info
@@ -80,7 +80,7 @@
# define efm32_timer_dumpgpio(p,m)
# endif
#else
# define efm32_timerdbg(x...)
# define efm32_timererr(x...)
# define efm32_timerllerr(x...)
# define efm32_timerinfo(x...)
# define efm32_timerllinfo(x...)
@@ -262,7 +262,7 @@ int efm32_timer_set_freq(uintptr_t base, uint32_t clk_freq, uint32_t freq)
reload = (clk_freq / prescaler / freq);
efm32_timerdbg("Source: %4xHz Div: %4x Reload: %4x \n",
efm32_timererr("Source: %4xHz Div: %4x Reload: %4x \n",
clk_freq, prescaler, reload);
putreg32(reload, base + EFM32_TIMER_TOP_OFFSET);

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