mirror of
https://github.com/apache/nuttx.git
synced 2025-12-20 04:09:12 +08:00
Squashed commit of the following:
Author: Gregory Nutt <gnutt@nuttx.org> arch/arm/src/kinetis: Cosmetic changes from review of coding standard. Author: David Sidrane <david_s5@nscdg.com> Merged in david_s5/nuttx/master_kinetis (pull request #710) kinetis:Add DMA and use it as RX FIFOs on Serial * Add initial implementation of the DMA * Add across Kxx family support [WIP] * Incorporate the DMA into the serial Add polling to serial do DMA initialisation at UART startup and fix DMA mux setting. Fix circular DMA handling in the serial driver. * Adapt defconfig to enable UART1,4 RXDMA * [WIP] - refactor this with new CONFIG DMA settings * kinetis/Kconfig:Bring inline with upstream stucture 1. Use the Serial console configuration from drivers/serial/Kconfig and friends. 2. Prefix arch specific featurs as such UARTx_RXDMA->KINETIS_UARTx_RXDMA * Kinetis:Serial formatting and clean up * kinetis:DMA Formating and Cleanup * kinetis:serial Use cleaner DMA API * kinetis:Make.defs fix duplicate/errant kinetis_dma.o * kinetis:serial Fix warning/error on only one uart using DMA The driver can support no DMA on any UART, DMA on some UARTs or DMA on all UARTs. In the case of no DMA we disable the DMA based variables and logic. In the case of all DMA we disable the non DMA variables and logic, and in the mixed case both DMA and non DMA variable and logic are enabled. * kinetis:dma config fix formatting * kinetis:chip/dma fix formatting * kinetis:DMA config assume Unknown Assume KINETIS_DMA_VERSION_UKN for all SoC not versioned This is as the code was in nuttx prior to this commit * kinetis:DMAMUX contain versioning- use HAS pattern define Unknown The pattern for chip versioning is to define 'HAS' constants. Define KINETIS_DMAMUX_HAS_MONOTONIC_CHCFG to contain the version numbers to the include soc header and use that define in the chip headers. Define the KINETIS_DMAMUX_VERSION_UKN for the default as prior this commit addressing was by default monotonic for CHCFG * freedom-k66f:Disable Serial RXDMA The application has to add calling of the kinetis serial dma poll as it is application specific. Approved-by: GregoryN <gnutt@nuttx.org>
This commit is contained in:
David Sidrane
committed by
Gregory Nutt
Gregory Nutt
parent
2e23ffe9d2
commit
9ef481ce4b
@@ -42,6 +42,8 @@
|
||||
************************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
#include <arch/kinetis/kinetis_dma.h>
|
||||
#include <arch/kinetis/kinetis_dmamux.h>
|
||||
#include <arch/kinetis/kinetis_mcg.h>
|
||||
#include <arch/kinetis/kinetis_sim.h>
|
||||
#include <arch/kinetis/kinetis_pmc.h>
|
||||
|
||||
209
arch/arm/include/kinetis/kinetis_dma.h
Normal file
209
arch/arm/include/kinetis/kinetis_dma.h
Normal file
@@ -0,0 +1,209 @@
|
||||
/************************************************************************************
|
||||
* arch/arm/include/kinetis/kinetis_dma.h
|
||||
*
|
||||
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
|
||||
* Authors: Jan Okle <jan@leitwert.ch>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
#ifndef __ARCH_ARM_INCLUDE_KINETIS_KINETIS_DMA_H
|
||||
#define __ARCH_ARM_INCLUDE_KINETIS_KINETIS_DMA_H
|
||||
|
||||
/************************************************************************************
|
||||
* Included Files
|
||||
************************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
/************************************************************************************
|
||||
* Pre-processor Definitions
|
||||
************************************************************************************/
|
||||
|
||||
/* Note: It is envisioned that in the long term as a chip is added. The author of
|
||||
* the new chip definitions will either find the exact configuration in an existing
|
||||
* chip define and add the new chip to it Or add the DMA feature configuration
|
||||
* #defines to the chip ifdef list below. In either case the author should mark
|
||||
* it as "Verified to Document Number:" taken from the reference manual.
|
||||
*/
|
||||
|
||||
/* DMA Register Configuration
|
||||
*
|
||||
* KINETIS_DMA_HAS_CR_ERGA - DMA has CR[ERGA]
|
||||
* KINETIS_DMA_HAS_CR_GRP0PRI - DMA has CR[GRP0PRI]
|
||||
* KINETIS_DMA_HAS_CR_GRP1PRI - DMA has CR[GRP1PRI]
|
||||
* KINETIS_DMA_HAS_ES_ERRCHN - DMA has ES[ERRCHN]
|
||||
* KINETIS_DMA_HAS_ES_ERRCHN_BITS - DMA has 4 bit ES[ERRCHN]
|
||||
* KINETIS_DMA_HAS_ES_GPE - DMA has ES[GPE]
|
||||
* KINETIS_DMA_HAS_CEEI_CEEI_BITS - DMA has 4 bit CEEi[CEEI]
|
||||
* KINETIS_DMA_HAS_SEEI_SEEI_BITS - DMA has 4 bit SEEi[SEEI]
|
||||
* KINETIS_DMA_HAS_CERQ_CERQ_BITS - DMA has 4 bit CERQ[CERQ]
|
||||
* KINETIS_DMA_HAS_SERQ_SERQ_BITS - DMA has 4 bit SERQ[SERQ]
|
||||
* KINETIS_DMA_HAS_CDNE_CDNE_BITS - DMA has 4 bit CDNE[CDNE]
|
||||
* KINETIS_DMA_HAS_SSRT_SSRT_BITS - DMA has 4 bit SSRT[SSRT]
|
||||
* KINETIS_DMA_HAS_CERR_CERR_BITS - DMA has 4 bit CERR[CERR]
|
||||
* KINETIS_DMA_HAS_CINT_CINT_BITS - DMA has 4 bit CINT[CINT]
|
||||
* KINETIS_DMA_HAS_DCHPRI_CHPRI_BITS - DMA has 4 bit DCHPRI[DCHPRI]
|
||||
* KINETIS_DMA_HAS_DCHPRI_GRPPRI - DMA has DCHPRI[GRPPRI]
|
||||
* KINETIS_DMA_HAS_EARS - DMA has EARS Register
|
||||
* KINETIS_DMA_HAS_TCD_CITER1_LINKCH_BITS - DMA has 4 bit TCD_CITER[LINKCH]
|
||||
* KINETIS_DMA_HAS_TCD_CSR_MAJORLINKCH_BITS - DMA has 4 bit TCD_CSR[MAJORLINKCH]
|
||||
* KINETIS_DMA_HAS_TCD_BITER1_LINKCH_BITS - DMA has 4 bit TCD_BITER[LINKCH]
|
||||
*/
|
||||
|
||||
/* Describe the version of the DMA
|
||||
*
|
||||
* These defines are not related to any NXP reference but are merely
|
||||
* a way to label the versions we are using
|
||||
*/
|
||||
|
||||
#define KINETIS_DMA_VERSION_UKN -1 /* What was in nuttx prior to 8/9/2018 */
|
||||
#define KINETIS_DMA_VERSION_01 1 /* Verified Document Number:
|
||||
* K60P144M100SF2V2RM Rev. 2, Jun 2012
|
||||
* K64P144M120SF5RM Rev. 2, Jan 2014
|
||||
*/
|
||||
#define KINETIS_DMA_VERSION_02 2 /* Verified Document Number:
|
||||
* K60P144M150SF3RM Rev. 3, Nov 2014
|
||||
* K66P144M180SF5RMV2 Rev. 2, May 2015
|
||||
*/
|
||||
|
||||
#if defined(CONFIG_ARCH_CHIP_MK60DN256VLQ10) || defined(CONFIG_ARCH_CHIP_MK60DX256VLQ10) || \
|
||||
defined(CONFIG_ARCH_CHIP_MK60DN512VLQ10) || defined(CONFIG_ARCH_CHIP_MK60DN256VMD10) || \
|
||||
defined(CONFIG_ARCH_CHIP_MK60DX256VMD10) || defined(CONFIG_ARCH_CHIP_MK60DN512VMD10)
|
||||
|
||||
/* Verified to Document Number: K60P144M100SF2V2RM Rev. 2 Jun 2012 */
|
||||
|
||||
# define KINETIS_DMA_VERSION KINETIS_DMA_VERSION_01
|
||||
|
||||
#elif defined(CONFIG_ARCH_CHIP_MK60FX512VLQ12) || defined(CONFIG_ARCH_CHIP_MK60FN1M0VLQ12) || \
|
||||
defined(CONFIG_ARCH_CHIP_MK60FX512VMD12) || defined(CONFIG_ARCH_CHIP_MK60FN1M0VMD12) || \
|
||||
defined(CONFIG_ARCH_CHIP_MK60FX512VLQ15) || defined(CONFIG_ARCH_CHIP_MK60FN1M0VLQ15) || \
|
||||
defined(CONFIG_ARCH_CHIP_MK60FX512VMD15) || defined(CONFIG_ARCH_CHIP_MK60FN1M0VMD15)
|
||||
|
||||
/* Verified Document Number: K60P144M150SF3RM Rev. 3, Nov 2014 */
|
||||
|
||||
# define KINETIS_DMA_VERSION KINETIS_DMA_VERSION_02
|
||||
|
||||
#elif defined(CONFIG_ARCH_CHIP_MK64FN1M0VLL12) || defined(CONFIG_ARCH_CHIP_MK64FX512VLL12) || \
|
||||
defined(CONFIG_ARCH_CHIP_MK64FX512VDC12) || defined(CONFIG_ARCH_CHIP_MK64FN1M0VDC12) || \
|
||||
defined(CONFIG_ARCH_CHIP_MK64FX512VLQ12) || defined(CONFIG_ARCH_CHIP_MK64FN1M0VLQ12) || \
|
||||
defined(CONFIG_ARCH_CHIP_MK64FX512VMD12) || defined(CONFIG_ARCH_CHIP_MK64FN1M0VMD12)
|
||||
|
||||
/* Verified to Document Number: K64P144M120SF5RM Rev. 2, January 2014 */
|
||||
|
||||
# define KINETIS_DMA_VERSION KINETIS_DMA_VERSION_01
|
||||
|
||||
|
||||
/* MK66F N/X 1M0/2M0 V MD/LQ 18
|
||||
*
|
||||
* --------------- ------- --- ------- ------- ------ ------ ------ -----
|
||||
* PART NUMBER CPU PIN PACKAGE TOTAL PROGRAM EEPROM SRAM GPIO
|
||||
* FREQ CNT FLASH FLASH
|
||||
* --------------- ------- --- ------- ------- ------ ------ ------ -----
|
||||
* MK66FN2M0VMD18 180 MHz 144 MAPBGA 2 MB — — KB 260 KB 100
|
||||
* MK66FX1M0VMD18 180 MHz 144 MAPBGA 1.25 MB 1 MB 4 KB 256 KB 100
|
||||
* MK66FN2M0VLQ18 180 MHz 144 LQFP 2 MB — — KB 260 KB 100
|
||||
* MK66FX1M0VLQ18 180 MHz 144 LQFP 1.25 MB 1 MB 4 KB 256 KB 100
|
||||
*/
|
||||
|
||||
#elif defined(CONFIG_ARCH_CHIP_MK66FN2M0VMD18) || defined(CONFIG_ARCH_CHIP_MK66FX1M0VMD18) || \
|
||||
defined(CONFIG_ARCH_CHIP_MK66FN2M0VLQ18) || defined(CONFIG_ARCH_CHIP_MK66FX1M0VLQ18)
|
||||
|
||||
/* Verified to Document Number: Document Number: K66P144M180SF5RMV2 Rev. 2, May 2015 */
|
||||
|
||||
# define KINETIS_DMA_VERSION KINETIS_DMA_VERSION_02
|
||||
#else
|
||||
# define KINETIS_DMA_VERSION KINETIS_DMA_VERSION_UKN
|
||||
#endif
|
||||
|
||||
/* Use the catch all configuration for the DMA based on the implementations in nuttx
|
||||
* prior 8/10/2018
|
||||
*/
|
||||
|
||||
#if KINETIS_DMA_VERSION == KINETIS_DMA_VERSION_UKN
|
||||
|
||||
/* DMA Register Configuration */
|
||||
|
||||
#if defined(CONFIG_KINETIS_DMA)
|
||||
# warning "DMA Unsupported on this Kinetis device!"
|
||||
#endif
|
||||
|
||||
#elif KINETIS_DMA_VERSION == KINETIS_DMA_VERSION_01
|
||||
|
||||
/* DMA Register Configuration */
|
||||
# undef DMA_CHN_PER_GROUP /* Number of channels per group */
|
||||
|
||||
# undef KINETIS_DMA_HAS_CR_ERGA /* DMA has CR[ERGA ] */
|
||||
# undef KINETIS_DMA_HAS_CR_GRP0PRI /* DMA has CR[GRP0PRI] */
|
||||
# undef KINETIS_DMA_HAS_CR_GRP1PRI /* DMA has CR[GRP1PRI] */
|
||||
# define KINETIS_DMA_HAS_ES_ERRCHN 1 /* DMA has ES[ERRCHN] */
|
||||
# define KINETIS_DMA_HAS_ES_ERRCHN_BITS 4 /* DMA has 4 bit ES[ERRCHN] */
|
||||
# undef KINETIS_DMA_HAS_ES_GPE /* DMA has ES[GPE ] */
|
||||
# define KINETIS_DMA_HAS_CEEI_CEEI_BITS 4 /* DMA has 4 bit CEEi[CEEI]*/
|
||||
# define KINETIS_DMA_HAS_SEEI_SEEI_BITS 4 /* DMA has 4 bit SEEi[SEEI]*/
|
||||
# define KINETIS_DMA_HAS_CERQ_CERQ_BITS 4 /* DMA has 4 bit CERQ[CERQ]*/
|
||||
# define KINETIS_DMA_HAS_SERQ_SERQ_BITS 4 /* DMA has 4 bit SERQ[SERQ]*/
|
||||
# define KINETIS_DMA_HAS_CDNE_CDNE_BITS 4 /* DMA has 4 bit CDNE[CDNE]*/
|
||||
# define KINETIS_DMA_HAS_SSRT_SSRT_BITS 4 /* DMA has 4 bit SSRT[SSRT]*/
|
||||
# define KINETIS_DMA_HAS_CERR_CERR_BITS 4 /* DMA has 4 bit CERR[CERR]*/
|
||||
# define KINETIS_DMA_HAS_CINT_CINT_BITS 4 /* DMA has 4 bit CINT[CINT]*/
|
||||
# define KINETIS_DMA_HAS_DCHPRI_CHPRI_BITS 4 /* DMA has 4 bit DCHPRI[DCHPRI]*/
|
||||
# undef KINETIS_DMA_HAS_DCHPRI_GRPPRI /* DMA has DCHPRI[GRPPRI] */
|
||||
# undef KINETIS_DMA_HAS_EARS /* DMA has EARS Register */
|
||||
# define KINETIS_DMA_HAS_TCD_CITER1_LINKCH_BITS 4 /* DMA has 4 bit TCD_CITER[LINKCH] */
|
||||
# define KINETIS_DMA_HAS_TCD_CSR_MAJORLINKCH_BITS 4 /* DMA has 4 bit TCD_CSR[MAJORLINKCH] */
|
||||
# define KINETIS_DMA_HAS_TCD_BITER1_LINKCH_BITS 4 /* DMA has 4 bit TCD_BITER[LINKCH] */
|
||||
|
||||
#elif KINETIS_DMA_VERSION == KINETIS_DMA_VERSION_02
|
||||
|
||||
/* DMA Register Configuration */
|
||||
|
||||
# define DMA_CHN_PER_GROUP 16 /* Number of channels per group */
|
||||
# define KINETIS_DMA_HAS_CR_ERGA 1 /* DMA has CR[ERGA ] */
|
||||
# define KINETIS_DMA_HAS_CR_GRP0PRI 1 /* DMA has CR[GRP0PRI] */
|
||||
# define KINETIS_DMA_HAS_CR_GRP1PRI 1 /* DMA has CR[GRP1PRI] */
|
||||
# define KINETIS_DMA_HAS_ES_ERRCHN_BITS 5 /* DMA has 5 bit ES[ERRCHN] */
|
||||
# define KINETIS_DMA_HAS_ES_GPE 1 /* DMA has ES[GPE ] */
|
||||
# define KINETIS_DMA_HAS_CEEI_CEEI_BITS 5 /* DMA has 5 bit CEEI[CEEI]*/
|
||||
# define KINETIS_DMA_HAS_SEEI_SEEI_BITS 5 /* DMA has 5 bit SEEI[SEEI]*/
|
||||
# define KINETIS_DMA_HAS_CERQ_CERQ_BITS 5 /* DMA has 5 bit CERQ[CERQ]*/
|
||||
# define KINETIS_DMA_HAS_SERQ_SERQ_BITS 5 /* DMA has 5 bit SERQ[SERQ]*/
|
||||
# define KINETIS_DMA_HAS_CDNE_CDNE_BITS 5 /* DMA has 5 bit CDNE[CDNE]*/
|
||||
# define KINETIS_DMA_HAS_SSRT_SSRT_BITS 5 /* DMA has 5 bit SSRT[SSRT]*/
|
||||
# define KINETIS_DMA_HAS_CERR_CERR_BITS 5 /* DMA has 5 bit CERR[CERR]*/
|
||||
# define KINETIS_DMA_HAS_CINT_CINT_BITS 5 /* DMA has 5 bit CINT[CINT]*/
|
||||
# define KINETIS_DMA_HAS_DCHPRI_CHPRI_BITS 5 /* DMA has 5 bit DCHPRI[DCHPRI]*/
|
||||
# define KINETIS_DMA_HAS_DCHPRI_GRPPRI 1 /* DMA has DCHPRI[GRPPRI] */
|
||||
# define KINETIS_DMA_HAS_EARS 1 /* DMA has EARS Register */
|
||||
# define KINETIS_DMA_HAS_TCD_CITER1_LINKCH_BITS 5 /* DMA has 5 bit TCD_CITER[LINKCH] */
|
||||
# define KINETIS_DMA_HAS_TCD_CSR_MAJORLINKCH_BITS 5 /* DMA has 5 bit TCD_CSR[MAJORLINKCH] */
|
||||
# define KINETIS_DMA_HAS_TCD_BITER1_LINKCH_BITS 5 /* DMA has 5 bit TCD_BITER[LINKCH] */
|
||||
#endif
|
||||
|
||||
#endif /* __ARCH_ARM_INCLUDE_KINETIS_KINETIS_DMA_H */
|
||||
152
arch/arm/include/kinetis/kinetis_dmamux.h
Normal file
152
arch/arm/include/kinetis/kinetis_dmamux.h
Normal file
@@ -0,0 +1,152 @@
|
||||
/************************************************************************************
|
||||
* arch/arm/include/kinetis/kinetis_dmamux.h
|
||||
*
|
||||
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
|
||||
* Authors: Jan Okle <jan@leitwert.ch>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
#ifndef __ARCH_ARM_INCLUDE_KINETIS_KINETIS_DMAMUX_H
|
||||
#define __ARCH_ARM_INCLUDE_KINETIS_KINETIS_DMAMUX_H
|
||||
|
||||
/************************************************************************************
|
||||
* Included Files
|
||||
************************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
/************************************************************************************
|
||||
* Pre-processor Definitions
|
||||
************************************************************************************/
|
||||
|
||||
/* Note: It is envisioned that in the long term as a chip is added. The author of
|
||||
* the new chip definitions will either find the exact configuration in an existing
|
||||
* chip define and add the new chip to it Or add the DMAMUX feature configuration
|
||||
* #defines to the chip ifdef list below. In either case the author should mark
|
||||
* it as "Verified to Document Number:" taken from the reference manual.
|
||||
*/
|
||||
|
||||
/* DMAMUX Register Configuration
|
||||
*
|
||||
* KINETIS_DMAMUX_HAS_MONOTONIC_CHCFG 0|1 - SoC has reg in 0,1,2..KINETIS_NDMACH
|
||||
*/
|
||||
|
||||
/* Describe the version of the DMA
|
||||
*
|
||||
* These defines are not related to any NXP reference but are merely
|
||||
* a way to label the versions we are using
|
||||
*/
|
||||
|
||||
#define KINETIS_DMAMUX_VERSION_UKN -1 /* What was in nuttx prior to 8/9/2018 */
|
||||
#define KINETIS_DMAMUX_VERSION_01 1 /* Verified Document Number:
|
||||
* K60P144M150SF3RM Rev. 3, Nov 2014
|
||||
*/
|
||||
#define KINETIS_DMAMUX_VERSION_02 2 /* Verified Document Number:
|
||||
* K60P144M100SF2V2RM Rev. 2, Jun 2012
|
||||
* K64P144M120SF5RM Rev. 2, Jan 2014
|
||||
* K66P144M180SF5RMV2 Rev. 2, May 2015
|
||||
*/
|
||||
|
||||
#if defined(CONFIG_ARCH_CHIP_MK60DN256VLQ10) || defined(CONFIG_ARCH_CHIP_MK60DX256VLQ10) || \
|
||||
defined(CONFIG_ARCH_CHIP_MK60DN512VLQ10) || defined(CONFIG_ARCH_CHIP_MK60DN256VMD10) || \
|
||||
defined(CONFIG_ARCH_CHIP_MK60DX256VMD10) || defined(CONFIG_ARCH_CHIP_MK60DN512VMD10)
|
||||
|
||||
/* Verified to Document Number: K60P144M100SF2V2RM Rev. 2 Jun 2012 */
|
||||
|
||||
# define KINETIS_DMAMUX_VERSION KINETIS_DMAMUX_VERSION_02
|
||||
|
||||
#elif defined(CONFIG_ARCH_CHIP_MK60FX512VLQ12) || defined(CONFIG_ARCH_CHIP_MK60FN1M0VLQ12) || \
|
||||
defined(CONFIG_ARCH_CHIP_MK60FX512VMD12) || defined(CONFIG_ARCH_CHIP_MK60FN1M0VMD12) || \
|
||||
defined(CONFIG_ARCH_CHIP_MK60FX512VLQ15) || defined(CONFIG_ARCH_CHIP_MK60FN1M0VLQ15) || \
|
||||
defined(CONFIG_ARCH_CHIP_MK60FX512VMD15) || defined(CONFIG_ARCH_CHIP_MK60FN1M0VMD15)
|
||||
|
||||
/* Verified Document Number: K60P144M150SF3RM Rev. 3, Nov 2014 */
|
||||
|
||||
# define KINETIS_DMAMUX_VERSION KINETIS_DMAMUX_VERSION_01
|
||||
|
||||
#elif defined(CONFIG_ARCH_CHIP_MK64FN1M0VLL12) || defined(CONFIG_ARCH_CHIP_MK64FX512VLL12) || \
|
||||
defined(CONFIG_ARCH_CHIP_MK64FX512VDC12) || defined(CONFIG_ARCH_CHIP_MK64FN1M0VDC12) || \
|
||||
defined(CONFIG_ARCH_CHIP_MK64FX512VLQ12) || defined(CONFIG_ARCH_CHIP_MK64FN1M0VLQ12) || \
|
||||
defined(CONFIG_ARCH_CHIP_MK64FX512VMD12) || defined(CONFIG_ARCH_CHIP_MK64FN1M0VMD12)
|
||||
|
||||
/* Verified to Document Number: K64P144M120SF5RM Rev. 2, January 2014 */
|
||||
|
||||
# define KINETIS_DMAMUX_VERSION KINETIS_DMAMUX_VERSION_02
|
||||
|
||||
/* MK66F N/X 1M0/2M0 V MD/LQ 18
|
||||
*
|
||||
* --------------- ------- --- ------- ------- ------ ------ ------ -----
|
||||
* PART NUMBER CPU PIN PACKAGE TOTAL PROGRAM EEPROM SRAM GPIO
|
||||
* FREQ CNT FLASH FLASH
|
||||
* --------------- ------- --- ------- ------- ------ ------ ------ -----
|
||||
* MK66FN2M0VMD18 180 MHz 144 MAPBGA 2 MB — — KB 260 KB 100
|
||||
* MK66FX1M0VMD18 180 MHz 144 MAPBGA 1.25 MB 1 MB 4 KB 256 KB 100
|
||||
* MK66FN2M0VLQ18 180 MHz 144 LQFP 2 MB — — KB 260 KB 100
|
||||
* MK66FX1M0VLQ18 180 MHz 144 LQFP 1.25 MB 1 MB 4 KB 256 KB 100
|
||||
*/
|
||||
|
||||
#elif defined(CONFIG_ARCH_CHIP_MK66FN2M0VMD18) || defined(CONFIG_ARCH_CHIP_MK66FX1M0VMD18) || \
|
||||
defined(CONFIG_ARCH_CHIP_MK66FN2M0VLQ18) || defined(CONFIG_ARCH_CHIP_MK66FX1M0VLQ18)
|
||||
|
||||
/* Verified to Document Number: Document Number: K66P144M180SF5RMV2 Rev. 2, May 2015 */
|
||||
|
||||
# define KINETIS_DMAMUX_VERSION KINETIS_DMAMUX_VERSION_02
|
||||
|
||||
#else
|
||||
# define KINETIS_DMAMUX_VERSION KINETIS_DMAMUX_VERSION_UKN
|
||||
#endif
|
||||
|
||||
/* Use the catch all configuration for the DMAMUX based on the implementations in
|
||||
* nuttx prior 8/10/2018
|
||||
*/
|
||||
|
||||
#if KINETIS_DMA_VERSION == KINETIS_DMAMUX_VERSION_01
|
||||
|
||||
/* DMAMUX Register Configuration */
|
||||
|
||||
# define KINETIS_DMAMUX_HAS_MONOTONIC_CHCFG 0 /* SoC has reg in 3,2,1,0..KINETIS_NDMACH */
|
||||
|
||||
#elif KINETIS_DMA_VERSION == KINETIS_DMAMUX_VERSION_02
|
||||
|
||||
/* DMAMUX Register Configuration */
|
||||
|
||||
# define KINETIS_DMAMUX_HAS_MONOTONIC_CHCFG 1 /* SoC has reg in 0,1,2,3..KINETIS_NDMACH */
|
||||
|
||||
#elif KINETIS_DMA_VERSION == KINETIS_DMAMUX_VERSION_UKN
|
||||
|
||||
/* DMAMUX Register Configuration */
|
||||
|
||||
# define KINETIS_DMAMUX_HAS_MONOTONIC_CHCFG 1 /* SoC has reg in 0,1,2,3..KINETIS_NDMACH */
|
||||
# if defined(CONFIG_KINETIS_DMA)
|
||||
# warning "DMAMUX Assuming monotonic CHCFG addressing!"
|
||||
# endif
|
||||
#endif
|
||||
|
||||
#endif /* __ARCH_ARM_INCLUDE_KINETIS_KINETIS_DMAMUX_H */
|
||||
@@ -316,6 +316,7 @@ config ARCH_FAMILY_K66
|
||||
select KINETIS_HAVE_LPUART0
|
||||
select KINETIS_HAVE_TPM1
|
||||
select KINETIS_HAVE_TPM2
|
||||
select KINETIS_HAVE_DMA
|
||||
|
||||
menu "Kinetis Peripheral Support"
|
||||
|
||||
@@ -323,6 +324,10 @@ config KINETIS_HAVE_FTM3
|
||||
bool
|
||||
default n
|
||||
|
||||
config KINETIS_HAVE_DMA
|
||||
bool
|
||||
default n
|
||||
|
||||
config KINETIS_HAVE_I2C1
|
||||
bool
|
||||
default n
|
||||
@@ -659,11 +664,11 @@ config KINETIS_LPTMR0
|
||||
Support the low power timer 0
|
||||
|
||||
config KINETIS_LPTMR1
|
||||
bool "Low power timer 0 (LPTMR1)"
|
||||
default n
|
||||
bool "Low power timer 0 (LPTMR1)"
|
||||
default n
|
||||
depends on KINETIS_HAVE_LPTMR1
|
||||
---help---
|
||||
Support the low power timer 1
|
||||
---help---
|
||||
Support the low power timer 1
|
||||
|
||||
config KINETIS_RTC
|
||||
bool "RTC"
|
||||
@@ -723,6 +728,8 @@ config KINETIS_FTFL
|
||||
config KINETIS_DMA
|
||||
bool "DMA"
|
||||
default n
|
||||
depends on KINETIS_HAVE_DMA
|
||||
select ARCH_DMA
|
||||
---help---
|
||||
Support DMA
|
||||
|
||||
@@ -1079,6 +1086,60 @@ config KINETIS_UARTFIFOS
|
||||
default n
|
||||
depends on KINETIS_UART0
|
||||
|
||||
config KINETIS_UART0_RXDMA
|
||||
bool "UART0 Rx DMA"
|
||||
default n
|
||||
depends on KINETIS_UART0 && KINETIS_DMA
|
||||
---help---
|
||||
In high data rate usage, Rx DMA may eliminate Rx overrun errors
|
||||
|
||||
config KINETIS_UART1_RXDMA
|
||||
bool "UART1 Rx DMA"
|
||||
default n
|
||||
depends on KINETIS_UART1 && KINETIS_DMA
|
||||
---help---
|
||||
In high data rate usage, Rx DMA may eliminate Rx overrun errors
|
||||
|
||||
config KINETIS_UART2_RXDMA
|
||||
bool "UART2 Rx DMA"
|
||||
default n
|
||||
depends on KINETIS_UART2 && KINETIS_DMA
|
||||
---help---
|
||||
In high data rate usage, Rx DMA may eliminate Rx overrun errors
|
||||
|
||||
config KINETIS_UART3_RXDMA
|
||||
bool "UART3 Rx DMA"
|
||||
default n
|
||||
depends on KINETIS_UART3 && KINETIS_DMA
|
||||
---help---
|
||||
In high data rate usage, Rx DMA may eliminate Rx overrun errors
|
||||
|
||||
config KINETIS_UART4_RXDMA
|
||||
bool "UART4 Rx DMA"
|
||||
default n
|
||||
depends on KINETIS_UART4 && KINETIS_DMA
|
||||
---help---
|
||||
In high data rate usage, Rx DMA may eliminate Rx overrun errors
|
||||
|
||||
config KINETIS_UART5_RXDMA
|
||||
bool "UART5 Rx DMA"
|
||||
default n
|
||||
depends on KINETIS_UART5 && KINETIS_DMA
|
||||
---help---
|
||||
In high data rate usage, Rx DMA may eliminate Rx overrun errors
|
||||
|
||||
config KINETIS_SERIAL_RXDMA_BUFFER_SIZE
|
||||
int "Rx DMA buffer size"
|
||||
default 32
|
||||
depends on UART1_RXDMA || UART2_RXDMA || UART3_RXDMA || UART4_RXDMA || UART5_RXDMA
|
||||
---help---
|
||||
The DMA buffer size when using RX DMA to emulate a FIFO.
|
||||
|
||||
When streaming data, the generic serial layer will be called
|
||||
every time the FIFO receives half this number of bytes.
|
||||
|
||||
Value given here will be rounded up to next multiple of 32 bytes.
|
||||
|
||||
endmenu # Kinetis UART Configuration
|
||||
|
||||
config KINETIS_MERGE_TTY
|
||||
|
||||
@@ -159,10 +159,6 @@ ifeq ($(CONFIG_PWM),y)
|
||||
CHIP_CSRCS += kinetis_pwm.c
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_PWM),y)
|
||||
CHIP_CSRCS += kinetis_dma.c
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_I2C),y)
|
||||
CHIP_CSRCS += kinetis_i2c.c
|
||||
endif
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -1,8 +1,9 @@
|
||||
/********************************************************************************************
|
||||
* arch/arm/src/kinetis/chip/kinetis_dmamux.h
|
||||
*
|
||||
* Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
* Copyright (C) 2011, 2016, 2018 Gregory Nutt. All rights reserved.
|
||||
* Authors: Gregory Nutt <gnutt@nuttx.org>
|
||||
* Jan Okle <jan@leitwert.ch>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
@@ -50,43 +51,21 @@
|
||||
|
||||
/* Register Offsets *************************************************************************/
|
||||
|
||||
#define KINETIS_DMAMUX_CHCFG_OFFSET(n) (n) /* Channel n Configuration Register */
|
||||
#define KINETIS_DMAMUX_CHCFG0_OFFSET 0x0000 /* Channel 0 Configuration Register */
|
||||
#define KINETIS_DMAMUX_CHCFG1_OFFSET 0x0001 /* Channel 1 Configuration Register */
|
||||
#define KINETIS_DMAMUX_CHCFG2_OFFSET 0x0002 /* Channel 2 Configuration Register */
|
||||
#define KINETIS_DMAMUX_CHCFG3_OFFSET 0x0003 /* Channel 3 Configuration Register */
|
||||
#define KINETIS_DMAMUX_CHCFG4_OFFSET 0x0004 /* Channel 4 Configuration Register */
|
||||
#define KINETIS_DMAMUX_CHCFG5_OFFSET 0x0005 /* Channel 5 Configuration Register */
|
||||
#define KINETIS_DMAMUX_CHCFG6_OFFSET 0x0006 /* Channel 6 Configuration Register */
|
||||
#define KINETIS_DMAMUX_CHCFG7_OFFSET 0x0007 /* Channel 7 Configuration Register */
|
||||
#define KINETIS_DMAMUX_CHCFG8_OFFSET 0x0008 /* Channel 8 Configuration Register */
|
||||
#define KINETIS_DMAMUX_CHCFG9_OFFSET 0x0009 /* Channel 9 Configuration Register */
|
||||
#define KINETIS_DMAMUX_CHCFG10_OFFSET 0x000a /* Channel 10 Configuration Register */
|
||||
#define KINETIS_DMAMUX_CHCFG11_OFFSET 0x000b /* Channel 11 Configuration Register */
|
||||
#define KINETIS_DMAMUX_CHCFG12_OFFSET 0x000c /* Channel 12 Configuration Register */
|
||||
#define KINETIS_DMAMUX_CHCFG13_OFFSET 0x000d /* Channel 13 Configuration Register */
|
||||
#define KINETIS_DMAMUX_CHCFG14_OFFSET 0x000e /* Channel 14 Configuration Register */
|
||||
#define KINETIS_DMAMUX_CHCFG15_OFFSET 0x000f /* Channel 15 Configuration Register */
|
||||
#if KINETIS_DMAMUX_HAS_MONOTONIC_CHCFG == 0
|
||||
|
||||
/* Channel n Configuration Register, 3,2,1,0,7,6,5,4 ..KINETIS_NDMACH-1 */
|
||||
|
||||
# define KINETIS_DMAMUX_CHCFG_OFFSET(n) (n - (n % 4)) + (3 - (n % 4))
|
||||
#elif KINETIS_DMAMUX_HAS_MONOTONIC_CHCFG == 1
|
||||
|
||||
/* Channel n Configuration Register, n=0..KINETIS_NDMACH-1 */
|
||||
|
||||
# define KINETIS_DMAMUX_CHCFG_OFFSET(n) (n)
|
||||
#endif
|
||||
|
||||
/* Register Addresses ***********************************************************************/
|
||||
|
||||
#define KINETIS_DMAMUX_CHCFG(n) (KINETIS_DMAMUX0_BASE+KINETIS_DMAMUX_CHCFG_OFFSET(n))
|
||||
#define KINETIS_DMAMUX_CHCFG0 (KINETIS_DMAMUX0_BASE+KINETIS_DMAMUX_CHCFG0_OFFSET)
|
||||
#define KINETIS_DMAMUX_CHCFG1 (KINETIS_DMAMUX0_BASE+KINETIS_DMAMUX_CHCFG1_OFFSET)
|
||||
#define KINETIS_DMAMUX_CHCFG2 (KINETIS_DMAMUX0_BASE+KINETIS_DMAMUX_CHCFG2_OFFSET)
|
||||
#define KINETIS_DMAMUX_CHCFG3 (KINETIS_DMAMUX0_BASE+KINETIS_DMAMUX_CHCFG3_OFFSET)
|
||||
#define KINETIS_DMAMUX_CHCFG4 (KINETIS_DMAMUX0_BASE+KINETIS_DMAMUX_CHCFG4_OFFSET)
|
||||
#define KINETIS_DMAMUX_CHCFG5 (KINETIS_DMAMUX0_BASE+KINETIS_DMAMUX_CHCFG5_OFFSET)
|
||||
#define KINETIS_DMAMUX_CHCFG6 (KINETIS_DMAMUX0_BASE+KINETIS_DMAMUX_CHCFG6_OFFSET)
|
||||
#define KINETIS_DMAMUX_CHCFG7 (KINETIS_DMAMUX0_BASE+KINETIS_DMAMUX_CHCFG7_OFFSET)
|
||||
#define KINETIS_DMAMUX_CHCFG8 (KINETIS_DMAMUX0_BASE+KINETIS_DMAMUX_CHCFG8_OFFSET)
|
||||
#define KINETIS_DMAMUX_CHCFG9 (KINETIS_DMAMUX0_BASE+KINETIS_DMAMUX_CHCFG9_OFFSET)
|
||||
#define KINETIS_DMAMUX_CHCFG10 (KINETIS_DMAMUX0_BASE+KINETIS_DMAMUX_CHCFG10_OFFSET)
|
||||
#define KINETIS_DMAMUX_CHCFG11 (KINETIS_DMAMUX0_BASE+KINETIS_DMAMUX_CHCFG11_OFFSET)
|
||||
#define KINETIS_DMAMUX_CHCFG12 (KINETIS_DMAMUX0_BASE+KINETIS_DMAMUX_CHCFG12_OFFSET)
|
||||
#define KINETIS_DMAMUX_CHCFG13 (KINETIS_DMAMUX0_BASE+KINETIS_DMAMUX_CHCFG13_OFFSET)
|
||||
#define KINETIS_DMAMUX_CHCFG14 (KINETIS_DMAMUX0_BASE+KINETIS_DMAMUX_CHCFG14_OFFSET)
|
||||
#define KINETIS_DMAMUX_CHCFG15 (KINETIS_DMAMUX0_BASE+KINETIS_DMAMUX_CHCFG15_OFFSET)
|
||||
|
||||
/* Register Bit Definitions *****************************************************************/
|
||||
/* Channel n Configuration Register */
|
||||
@@ -96,6 +75,189 @@
|
||||
#define DMAMUX_CHCFG_TRIG (1 << 6) /* Bit 6: DMA Channel Trigger Enable */
|
||||
#define DMAMUX_CHCFG_ENBL (1 << 7) /* Bit 7: DMA Channel Enable */
|
||||
|
||||
/* DMA Request sources*****************************************************************************/
|
||||
|
||||
#ifdef KINETIS_K60
|
||||
|
||||
# define KINETIS_DMA_REQUEST_SRC_UART0_RX 2
|
||||
# define KINETIS_DMA_REQUEST_SRC_UART0_TX 3
|
||||
# define KINETIS_DMA_REQUEST_SRC_UART1_RX 4
|
||||
# define KINETIS_DMA_REQUEST_SRC_UART1_TX 5
|
||||
# define KINETIS_DMA_REQUEST_SRC_UART2_RX 6
|
||||
# define KINETIS_DMA_REQUEST_SRC_UART2_TX 7
|
||||
# define KINETIS_DMA_REQUEST_SRC_UART3_RX 8
|
||||
# define KINETIS_DMA_REQUEST_SRC_UART3_TX 9
|
||||
# define KINETIS_DMA_REQUEST_SRC_UART4_RX 10
|
||||
# define KINETIS_DMA_REQUEST_SRC_UART4_TX 11
|
||||
# define KINETIS_DMA_REQUEST_SRC_UART5_RX 12
|
||||
# define KINETIS_DMA_REQUEST_SRC_UART5_TX 13
|
||||
# define KINETIS_DMA_REQUEST_SRC_I2S0_RX 14
|
||||
# define KINETIS_DMA_REQUEST_SRC_I2S0_TX 15
|
||||
# define KINETIS_DMA_REQUEST_SRC_SPI0_RX 16
|
||||
# define KINETIS_DMA_REQUEST_SRC_SPI0_TX 17
|
||||
# define KINETIS_DMA_REQUEST_SRC_SPI1_RX 18
|
||||
# define KINETIS_DMA_REQUEST_SRC_SPI1_TX 19
|
||||
# define KINETIS_DMA_REQUEST_SRC_SPI2_RX 20
|
||||
# define KINETIS_DMA_REQUEST_SRC_SPI2_TX 21
|
||||
# define KINETIS_DMA_REQUEST_SRC_I2C0 22
|
||||
# define KINETIS_DMA_REQUEST_SRC_I2C1 23
|
||||
# define KINETIS_DMA_REQUEST_SRC_FTM0_CH0 24
|
||||
# define KINETIS_DMA_REQUEST_SRC_FTM0_CH1 25
|
||||
# define KINETIS_DMA_REQUEST_SRC_FTM0_CH2 26
|
||||
# define KINETIS_DMA_REQUEST_SRC_FTM0_CH3 27
|
||||
# define KINETIS_DMA_REQUEST_SRC_FTM0_CH4 28
|
||||
# define KINETIS_DMA_REQUEST_SRC_FTM0_CH5 29
|
||||
# define KINETIS_DMA_REQUEST_SRC_FTM0_CH6 30
|
||||
# define KINETIS_DMA_REQUEST_SRC_FTM0_CH7 31
|
||||
# define KINETIS_DMA_REQUEST_SRC_FTM1_CH0 32
|
||||
# define KINETIS_DMA_REQUEST_SRC_FTM1_CH1 33
|
||||
# define KINETIS_DMA_REQUEST_SRC_FTM2_CH0 34
|
||||
# define KINETIS_DMA_REQUEST_SRC_FTM2_CH1 35
|
||||
# define KINETIS_DMA_REQUEST_SRC_TIMER0 36
|
||||
# define KINETIS_DMA_REQUEST_SRC_TIMER1 37
|
||||
# define KINETIS_DMA_REQUEST_SRC_TIMER2 38
|
||||
# define KINETIS_DMA_REQUEST_SRC_TIMER3 39
|
||||
# define KINETIS_DMA_REQUEST_SRC_ADC0 40
|
||||
# define KINETIS_DMA_REQUEST_SRC_ADC1 41
|
||||
# define KINETIS_DMA_REQUEST_SRC_CMP0 42
|
||||
# define KINETIS_DMA_REQUEST_SRC_CMP1 43
|
||||
# define KINETIS_DMA_REQUEST_SRC_CMP2 44
|
||||
# define KINETIS_DMA_REQUEST_SRC_DAC0 45
|
||||
# define KINETIS_DMA_REQUEST_SRC_DAC1 46
|
||||
# define KINETIS_DMA_REQUEST_SRC_CMT 47
|
||||
# define KINETIS_DMA_REQUEST_SRC_PDB 48
|
||||
# define KINETIS_DMA_REQUEST_SRC_PCM_A 49
|
||||
# define KINETIS_DMA_REQUEST_SRC_PCM_B 50
|
||||
# define KINETIS_DMA_REQUEST_SRC_PCM_C 51
|
||||
# define KINETIS_DMA_REQUEST_SRC_PCM_D 52
|
||||
# define KINETIS_DMA_REQUEST_SRC_PCM_E 53
|
||||
|
||||
#endif /* KINETIS_K60 */
|
||||
|
||||
#ifdef KINETIS_K64
|
||||
|
||||
# define KINETIS_DMA_REQUEST_SRC_UART0_RX 2
|
||||
# define KINETIS_DMA_REQUEST_SRC_UART0_TX 3
|
||||
# define KINETIS_DMA_REQUEST_SRC_UART1_RX 4
|
||||
# define KINETIS_DMA_REQUEST_SRC_UART1_TX 5
|
||||
# define KINETIS_DMA_REQUEST_SRC_UART2_RX 6
|
||||
# define KINETIS_DMA_REQUEST_SRC_UART2_TX 7
|
||||
# define KINETIS_DMA_REQUEST_SRC_UART3_RX 8
|
||||
# define KINETIS_DMA_REQUEST_SRC_UART3_TX 9
|
||||
# define KINETIS_DMA_REQUEST_SRC_UART4_RXTX 10
|
||||
# define KINETIS_DMA_REQUEST_SRC_UART5_RXTX 11
|
||||
# define KINETIS_DMA_REQUEST_SRC_I2S0_RX 12
|
||||
# define KINETIS_DMA_REQUEST_SRC_I2S0_TX 13
|
||||
# define KINETIS_DMA_REQUEST_SRC_SPI0_RX 14
|
||||
# define KINETIS_DMA_REQUEST_SRC_SPI0_TX 15
|
||||
# define KINETIS_DMA_REQUEST_SRC_SPI1_RXTX 16
|
||||
# define KINETIS_DMA_REQUEST_SRC_SPI2_RXTX 17
|
||||
# define KINETIS_DMA_REQUEST_SRC_I2C0 18
|
||||
# define KINETIS_DMA_REQUEST_SRC_I2C1__I2C2 19
|
||||
# define KINETIS_DMA_REQUEST_SRC_FTM0_CH0 20
|
||||
# define KINETIS_DMA_REQUEST_SRC_FTM0_CH1 21
|
||||
# define KINETIS_DMA_REQUEST_SRC_FTM0_CH2 22
|
||||
# define KINETIS_DMA_REQUEST_SRC_FTM0_CH3 23
|
||||
# define KINETIS_DMA_REQUEST_SRC_FTM0_CH4 24
|
||||
# define KINETIS_DMA_REQUEST_SRC_FTM0_CH5 25
|
||||
# define KINETIS_DMA_REQUEST_SRC_FTM0_CH6 26
|
||||
# define KINETIS_DMA_REQUEST_SRC_FTM0_CH7 27
|
||||
# define KINETIS_DMA_REQUEST_SRC_FTM1_CH0 28
|
||||
# define KINETIS_DMA_REQUEST_SRC_FTM1_CH1 29
|
||||
# define KINETIS_DMA_REQUEST_SRC_FTM2_CH0 30
|
||||
# define KINETIS_DMA_REQUEST_SRC_FTM2_CH1 31
|
||||
# define KINETIS_DMA_REQUEST_SRC_FTM3_CH0 32
|
||||
# define KINETIS_DMA_REQUEST_SRC_FTM3_CH1 33
|
||||
# define KINETIS_DMA_REQUEST_SRC_FTM3_CH2 34
|
||||
# define KINETIS_DMA_REQUEST_SRC_FTM3_CH3 35
|
||||
# define KINETIS_DMA_REQUEST_SRC_FTM3_CH4 36
|
||||
# define KINETIS_DMA_REQUEST_SRC_FTM3_CH5 37
|
||||
# define KINETIS_DMA_REQUEST_SRC_FTM3_CH6 38
|
||||
# define KINETIS_DMA_REQUEST_SRC_FTM3_CH7 39
|
||||
# define KINETIS_DMA_REQUEST_SRC_ADC0 40
|
||||
# define KINETIS_DMA_REQUEST_SRC_ADC1 41
|
||||
# define KINETIS_DMA_REQUEST_SRC_CMP0 42
|
||||
# define KINETIS_DMA_REQUEST_SRC_CMP1 43
|
||||
# define KINETIS_DMA_REQUEST_SRC_CMP2 44
|
||||
# define KINETIS_DMA_REQUEST_SRC_DAC0 45
|
||||
# define KINETIS_DMA_REQUEST_SRC_DAC1 46
|
||||
# define KINETIS_DMA_REQUEST_SRC_CMT 47
|
||||
# define KINETIS_DMA_REQUEST_SRC_PDB 48
|
||||
# define KINETIS_DMA_REQUEST_SRC_PCM_A 49
|
||||
# define KINETIS_DMA_REQUEST_SRC_PCM_B 50
|
||||
# define KINETIS_DMA_REQUEST_SRC_PCM_C 51
|
||||
# define KINETIS_DMA_REQUEST_SRC_PCM_D 52
|
||||
# define KINETIS_DMA_REQUEST_SRC_PCM_E 53
|
||||
# define KINETIS_DMA_REQUEST_SRC_TIMER0 54
|
||||
# define KINETIS_DMA_REQUEST_SRC_TIMER1 55
|
||||
# define KINETIS_DMA_REQUEST_SRC_TIMER2 56
|
||||
# define KINETIS_DMA_REQUEST_SRC_TIMER3 57
|
||||
|
||||
#endif /* KINETIS K64 */
|
||||
|
||||
#ifdef KINETIS_K66
|
||||
|
||||
# define KINETIS_DMA_REQUEST_SRC_TSI0 1
|
||||
# define KINETIS_DMA_REQUEST_SRC_UART0_RX 2
|
||||
# define KINETIS_DMA_REQUEST_SRC_UART0_TX 3
|
||||
# define KINETIS_DMA_REQUEST_SRC_UART1_RX 4
|
||||
# define KINETIS_DMA_REQUEST_SRC_UART1_TX 5
|
||||
# define KINETIS_DMA_REQUEST_SRC_UART2_RX 6
|
||||
# define KINETIS_DMA_REQUEST_SRC_UART2_TX 7
|
||||
# define KINETIS_DMA_REQUEST_SRC_UART3_RX 8
|
||||
# define KINETIS_DMA_REQUEST_SRC_UART3_TX 9
|
||||
# define KINETIS_DMA_REQUEST_SRC_UART4_RXTX 10
|
||||
# define KINETIS_DMA_REQUEST_SRC_I2S0_RX 12
|
||||
# define KINETIS_DMA_REQUEST_SRC_I2S0_TX 13
|
||||
# define KINETIS_DMA_REQUEST_SRC_SPI0_RX 14
|
||||
# define KINETIS_DMA_REQUEST_SRC_SPI0_TX 15
|
||||
# define KINETIS_DMA_REQUEST_SRC_SPI1_RX 16
|
||||
# define KINETIS_DMA_REQUEST_SRC_SPI1_TX 17
|
||||
# define KINETIS_DMA_REQUEST_SRC_I2C0__I2C3 18
|
||||
# define KINETIS_DMA_REQUEST_SRC_I2C1__I2C2 19
|
||||
# define KINETIS_DMA_REQUEST_SRC_FTM0_CH0 20
|
||||
# define KINETIS_DMA_REQUEST_SRC_FTM0_CH1 21
|
||||
# define KINETIS_DMA_REQUEST_SRC_FTM0_CH2 22
|
||||
# define KINETIS_DMA_REQUEST_SRC_FTM0_CH3 23
|
||||
# define KINETIS_DMA_REQUEST_SRC_FTM0_CH4 24
|
||||
# define KINETIS_DMA_REQUEST_SRC_FTM0_CH5 25
|
||||
# define KINETIS_DMA_REQUEST_SRC_FTM0_CH6 26
|
||||
# define KINETIS_DMA_REQUEST_SRC_FTM0_CH7 27
|
||||
# define KINETIS_DMA_REQUEST_SRC_FTM1_TPM1_CH0 28
|
||||
# define KINETIS_DMA_REQUEST_SRC_FTM1_TPM1_CH1 29
|
||||
# define KINETIS_DMA_REQUEST_SRC_FTM2_TPM2_CH0 30
|
||||
# define KINETIS_DMA_REQUEST_SRC_FTM2_TPM2_CH1 31
|
||||
# define KINETIS_DMA_REQUEST_SRC_FTM3_CH0 32
|
||||
# define KINETIS_DMA_REQUEST_SRC_FTM3_CH1 33
|
||||
# define KINETIS_DMA_REQUEST_SRC_FTM3_CH2 34
|
||||
# define KINETIS_DMA_REQUEST_SRC_FTM3_CH3 35
|
||||
# define KINETIS_DMA_REQUEST_SRC_FTM3_CH4 36
|
||||
# define KINETIS_DMA_REQUEST_SRC_FTM3_CH5 37
|
||||
# define KINETIS_DMA_REQUEST_SRC_FTM3_CH6__SPI2_RX 38
|
||||
# define KINETIS_DMA_REQUEST_SRC_FTM3_CH7__SPI2_TX 39
|
||||
# define KINETIS_DMA_REQUEST_SRC_ADC0 40
|
||||
# define KINETIS_DMA_REQUEST_SRC_ADC1 41
|
||||
# define KINETIS_DMA_REQUEST_SRC_CMP0 42
|
||||
# define KINETIS_DMA_REQUEST_SRC_CMP1 43
|
||||
# define KINETIS_DMA_REQUEST_SRC_CMP2__CMP3 44
|
||||
# define KINETIS_DMA_REQUEST_SRC_DAC0 45
|
||||
# define KINETIS_DMA_REQUEST_SRC_DAC1 46
|
||||
# define KINETIS_DMA_REQUEST_SRC_CMT 47
|
||||
# define KINETIS_DMA_REQUEST_SRC_PDB 48
|
||||
# define KINETIS_DMA_REQUEST_SRC_PCM_A 49
|
||||
# define KINETIS_DMA_REQUEST_SRC_PCM_B 50
|
||||
# define KINETIS_DMA_REQUEST_SRC_PCM_C 51
|
||||
# define KINETIS_DMA_REQUEST_SRC_PCM_D 52
|
||||
# define KINETIS_DMA_REQUEST_SRC_PCM_E 53
|
||||
# define KINETIS_DMA_REQUEST_SRC_TIMER0 54
|
||||
# define KINETIS_DMA_REQUEST_SRC_TIMER1 55
|
||||
# define KINETIS_DMA_REQUEST_SRC_TIMER2 56
|
||||
# define KINETIS_DMA_REQUEST_SRC_TIMER3 57
|
||||
# define KINETIS_DMA_REQUEST_SRC_LPUART0_RX 58
|
||||
# define KINETIS_DMA_REQUEST_SRC_LPUART0_TX 59
|
||||
|
||||
#endif /* KINETIS_K66 */
|
||||
|
||||
/********************************************************************************************
|
||||
* Public Types
|
||||
********************************************************************************************/
|
||||
|
||||
@@ -4,6 +4,7 @@
|
||||
* Copyright (C) 2016 Gregory Nutt. All rights reserved.
|
||||
* Authors: Gregory Nutt <gnutt@nuttx.org>
|
||||
* David Sidrane <david_s5@nscdg.com>
|
||||
* Jan Okle <jan@leitwert.ch>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
@@ -44,6 +45,10 @@
|
||||
#include <stdbool.h>
|
||||
#include <errno.h>
|
||||
#include <debug.h>
|
||||
#include <sys/types.h>
|
||||
|
||||
#include <nuttx/irq.h>
|
||||
#include <nuttx/arch.h>
|
||||
|
||||
#include <arch/board/board.h>
|
||||
|
||||
@@ -53,23 +58,100 @@
|
||||
#include "kinetis_config.h"
|
||||
#include "chip.h"
|
||||
#include "kinetis_dma.h"
|
||||
#include "chip/kinetis_dmamux.h"
|
||||
#include "chip/kinetis_sim.h"
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef DMA_CHN_PER_GROUP
|
||||
# define DMA_CHN_PER_GROUP KINETIS_NDMACH /* Number of channels per group */
|
||||
#endif
|
||||
|
||||
#ifndef CONFIG_DMA_PRI
|
||||
# define CONFIG_DMA_PRI NVIC_SYSH_PRIORITY_DEFAULT
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Private Types
|
||||
****************************************************************************/
|
||||
|
||||
struct kinetis_dma_ch
|
||||
{
|
||||
bool used;
|
||||
uint8_t ind;
|
||||
uint8_t irq;
|
||||
kinetis_dma_direction_t dir;
|
||||
kinetis_dma_data_sz_t data_sz;
|
||||
dma_callback_t callback;
|
||||
void *arg;
|
||||
};
|
||||
|
||||
/****************************************************************************
|
||||
* Private Data
|
||||
****************************************************************************/
|
||||
|
||||
static struct kinetis_dma_ch g_channels[KINETIS_NDMACH];
|
||||
|
||||
/****************************************************************************
|
||||
* Private Functions
|
||||
****************************************************************************/
|
||||
|
||||
static int kinetis_dmainterrupt_int(int irq, void *context,
|
||||
struct kinetis_dma_ch *ch)
|
||||
{
|
||||
/* Clear bit in the interrupt */
|
||||
|
||||
putreg8(ch->ind, KINETIS_DMA_CINT);
|
||||
|
||||
/* Invoke the callback */
|
||||
|
||||
if (ch->callback)
|
||||
{
|
||||
ch->callback((DMA_HANDLE)&ch, ch->arg, 0);
|
||||
}
|
||||
|
||||
return OK;
|
||||
}
|
||||
|
||||
static int kinetis_dmainterrupt(int irq, void *context, void *arg)
|
||||
{
|
||||
uint8_t irq_int = *(uint8_t *)arg;
|
||||
uint32_t regval;
|
||||
regval = getreg32(KINETIS_DMA_INT);
|
||||
|
||||
/* Channel irq_int and irq_int + DMA_CHN_PER_GROUP use the same arg. Check
|
||||
* which one requested an interrupt
|
||||
*/
|
||||
|
||||
if ((regval & (1 << irq_int)) != 0)
|
||||
{
|
||||
kinetis_dmainterrupt_int(irq, context, &g_channels[irq_int]);
|
||||
}
|
||||
|
||||
if ((regval & (1 << (irq_int + DMA_CHN_PER_GROUP))) != 0)
|
||||
{
|
||||
kinetis_dmainterrupt_int(irq, context,
|
||||
&g_channels[irq_int + DMA_CHN_PER_GROUP]);
|
||||
}
|
||||
|
||||
return OK;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
size_t kinetis_dmaresidual(DMA_HANDLE handle)
|
||||
{
|
||||
struct kinetis_dma_ch *ch = (struct kinetis_dma_ch *)handle;
|
||||
|
||||
/* Channel Linking Disabled */
|
||||
|
||||
return ((getreg16(KINETIS_DMA_TCD_CITER(ch->ind)) >> DMA_TCD_CITER2_SHIFT) &
|
||||
DMA_TCD_CITER2_MASK);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: kinetis_dmainitialize
|
||||
@@ -82,9 +164,64 @@
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void kinetis_dmainitilaize(void)
|
||||
void weak_function up_dmainitialize(void)
|
||||
{
|
||||
int i;
|
||||
uint32_t regval;
|
||||
int ret;
|
||||
|
||||
for (i = KINETIS_NDMACH - 1; i >= 0; i--)
|
||||
{
|
||||
g_channels[i].ind = i;
|
||||
g_channels[i].used = false;
|
||||
g_channels[i].irq = KINETIS_IRQ_FIRST + (i % DMA_CHN_PER_GROUP);
|
||||
|
||||
if (i < DMA_CHN_PER_GROUP)
|
||||
{
|
||||
#ifdef CONFIG_ARCH_IRQPRIO
|
||||
/* Set up the interrupt priority */
|
||||
|
||||
up_prioritize_irq(g_channels[i].irq, CONFIG_DMA_PRI);
|
||||
#endif
|
||||
|
||||
/* Attach DMA interrupt */
|
||||
|
||||
ret = irq_attach(g_channels[i].irq, kinetis_dmainterrupt,
|
||||
(void *)&g_channels[i].ind);
|
||||
|
||||
if (ret == OK)
|
||||
{
|
||||
/* Enable the IRQ at the NVIC (still disabled at the DMA
|
||||
* controller)
|
||||
*/
|
||||
|
||||
up_enable_irq(g_channels[i].irq);
|
||||
}
|
||||
else
|
||||
{
|
||||
g_channels[i].used = true;
|
||||
g_channels[i + DMA_CHN_PER_GROUP].used = true;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/* Enable clocking for DMA */
|
||||
|
||||
regval = getreg32(KINETIS_SIM_SCGC7);
|
||||
regval |= SIM_SCGC7_DMA;
|
||||
putreg32(regval, KINETIS_SIM_SCGC7);
|
||||
|
||||
/* Configure DMA for round robin arbitration */
|
||||
|
||||
regval = 0;
|
||||
regval |= DMA_CR_ERCA | DMA_CR_ERGA;
|
||||
putreg32(regval, KINETIS_DMA_CR);
|
||||
|
||||
/* Enable clocking for the DMA mux*/
|
||||
|
||||
regval = getreg32(KINETIS_SIM_SCGC6);
|
||||
regval |= SIM_SCGC6_DMAMUX0;
|
||||
putreg32(regval, KINETIS_SIM_SCGC6);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
@@ -101,9 +238,85 @@ void kinetis_dmainitilaize(void)
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
DMA_HANDLE kinetis_dmachannel(void)
|
||||
DMA_HANDLE kinetis_dmachannel(uint8_t src, uint32_t per_addr,
|
||||
kinetis_dma_data_sz_t per_data_sz,
|
||||
kinetis_dma_direction_t dir)
|
||||
{
|
||||
return NULL;
|
||||
int i;
|
||||
int ch_ind;
|
||||
uint8_t regval8;
|
||||
uint16_t regval16;
|
||||
irqstate_t flags;
|
||||
struct kinetis_dma_ch *ch;
|
||||
|
||||
/* Find available channel */
|
||||
|
||||
ch_ind = -1;
|
||||
flags = enter_critical_section();
|
||||
for (i = 0; i < KINETIS_NDMACH; i++)
|
||||
{
|
||||
if (!g_channels[i].used)
|
||||
{
|
||||
ch_ind = i;
|
||||
g_channels[ch_ind].used = true;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
leave_critical_section(flags);
|
||||
|
||||
if (ch_ind == -1)
|
||||
{
|
||||
/* No available channel */
|
||||
|
||||
return NULL;
|
||||
}
|
||||
|
||||
ch = &g_channels[ch_ind];
|
||||
|
||||
/* Copy arguments */
|
||||
|
||||
ch->dir = dir;
|
||||
ch->data_sz = per_data_sz;
|
||||
|
||||
/* DMAMUX Set DMA channel source and enable it */
|
||||
|
||||
regval8 = ((((uint8_t)src) << DMAMUX_CHCFG_SOURCE_SHIFT) &
|
||||
DMAMUX_CHCFG_SOURCE_MASK) | DMAMUX_CHCFG_ENBL;
|
||||
putreg8(regval8, KINETIS_DMAMUX_CHCFG(ch_ind));
|
||||
|
||||
/* DMA Set peripheral address in TCD */
|
||||
|
||||
if (ch->dir == KINETIS_DMA_DIRECTION_PERIPHERAL_TO_MEMORY)
|
||||
{
|
||||
putreg32(per_addr, KINETIS_DMA_TCD_SADDR(ch->ind));
|
||||
putreg16(0, KINETIS_DMA_TCD_SOFF(ch->ind));
|
||||
putreg32(0, KINETIS_DMA_TCD_SLAST(ch->ind));
|
||||
}
|
||||
else if (ch->dir == KINETIS_DMA_DIRECTION_MEMORY_TO_PERIPHERAL)
|
||||
{
|
||||
putreg32(per_addr, KINETIS_DMA_TCD_DADDR(ch->ind));
|
||||
putreg16(0, KINETIS_DMA_TCD_DOFF(ch->ind));
|
||||
putreg32(0, KINETIS_DMA_TCD_DLASTSGA(ch->ind));
|
||||
}
|
||||
else
|
||||
{
|
||||
ch->used = false;
|
||||
return NULL;
|
||||
}
|
||||
|
||||
/* Set data sizes */
|
||||
|
||||
regval16 = (DMA_TCD_ATTR_SSIZE_MASK & ((uint16_t)per_data_sz) <<
|
||||
DMA_TCD_ATTR_SSIZE_SHIFT);
|
||||
regval16 |= (DMA_TCD_ATTR_DSIZE_MASK & ((uint16_t)per_data_sz) <<
|
||||
DMA_TCD_ATTR_DSIZE_SHIFT);
|
||||
putreg16(regval16, KINETIS_DMA_TCD_ATTR(ch->ind));
|
||||
|
||||
/* Set minor loop count */
|
||||
|
||||
putreg32(1 << (uint8_t)per_data_sz, KINETIS_DMA_TCD_NBYTES(ch->ind));
|
||||
return (DMA_HANDLE)ch;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
@@ -121,7 +334,18 @@ DMA_HANDLE kinetis_dmachannel(void)
|
||||
|
||||
void kinetis_dmafree(DMA_HANDLE handle)
|
||||
{
|
||||
struct kinetis_dma_ch *ch = (struct kinetis_dma_ch *)handle;
|
||||
irqstate_t flags;
|
||||
|
||||
DEBUGASSERT(handle != NULL);
|
||||
|
||||
/* Disable DMA channel in the dmamux */
|
||||
|
||||
putreg8(0, KINETIS_DMAMUX_CHCFG(ch->ind));
|
||||
|
||||
flags = enter_critical_section();
|
||||
ch->used = false;
|
||||
leave_critical_section(flags);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
@@ -132,10 +356,54 @@ void kinetis_dmafree(DMA_HANDLE handle)
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int kinetis_dmasetup(DMA_HANDLE handle, uint32_t control, uint32_t config,
|
||||
uint32_t srcaddr, uint32_t destaddr, size_t nbytes)
|
||||
int kinetis_dmasetup(DMA_HANDLE handle, uint32_t mem_addr, size_t ntransfers,
|
||||
uint16_t control)
|
||||
{
|
||||
return -1;
|
||||
struct kinetis_dma_ch *ch = (struct kinetis_dma_ch *)handle;
|
||||
uint16_t regval = 0;
|
||||
uint32_t nbytes;
|
||||
|
||||
if (ntransfers > (DMA_TCD_CITER2_MASK >> DMA_TCD_CITER2_SHIFT))
|
||||
{
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
DEBUGASSERT(handle != NULL);
|
||||
|
||||
nbytes = (uint32_t)ntransfers * (uint32_t)(1 << (uint8_t)ch->data_sz);
|
||||
|
||||
if (ch->dir == KINETIS_DMA_DIRECTION_PERIPHERAL_TO_MEMORY)
|
||||
{
|
||||
putreg32(mem_addr, KINETIS_DMA_TCD_DADDR(ch->ind));
|
||||
putreg16(1 << (uint8_t)ch->data_sz, KINETIS_DMA_TCD_DOFF(ch->ind));
|
||||
putreg32(-nbytes, KINETIS_DMA_TCD_DLASTSGA(ch->ind));
|
||||
}
|
||||
else if (ch->dir == KINETIS_DMA_DIRECTION_MEMORY_TO_PERIPHERAL)
|
||||
{
|
||||
putreg32(mem_addr, KINETIS_DMA_TCD_SADDR(ch->ind));
|
||||
putreg16(1 << (uint8_t)ch->data_sz, KINETIS_DMA_TCD_SOFF(ch->ind));
|
||||
putreg32(-nbytes, KINETIS_DMA_TCD_SLAST(ch->ind));
|
||||
}
|
||||
else
|
||||
{
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
/* Set up channel with control word */
|
||||
|
||||
regval = (control & DMA_TCD_CSR_MAJORELINK) ? ch->ind : 0;
|
||||
regval <<= DMA_TCD_CSR_MAJORLINKCH_SHIFT;
|
||||
regval &= DMA_TCD_CSR_MAJORLINKCH_MASK;
|
||||
regval |= (DMA_TCD_CSR_INTMAJOR |
|
||||
(control & (DMA_TCD_CSR_INTHALF | DMA_TCD_CSR_MAJORELINK)));
|
||||
putreg16(regval, KINETIS_DMA_TCD_CSR(ch->ind));
|
||||
|
||||
/* Set major loop count */
|
||||
|
||||
putreg16(ntransfers, KINETIS_DMA_TCD_BITER(ch->ind));
|
||||
putreg16(ntransfers, KINETIS_DMA_TCD_CITER(ch->ind));
|
||||
|
||||
return OK;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
@@ -148,22 +416,37 @@ int kinetis_dmasetup(DMA_HANDLE handle, uint32_t control, uint32_t config,
|
||||
|
||||
int kinetis_dmastart(DMA_HANDLE handle, dma_callback_t callback, void *arg)
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
struct kinetis_dma_ch *ch = (struct kinetis_dma_ch *)handle;
|
||||
|
||||
DEBUGASSERT(handle != NULL);
|
||||
|
||||
ch->callback = callback;
|
||||
ch->arg = arg;
|
||||
|
||||
/* Enable request register for this channel */
|
||||
|
||||
putreg8(ch->ind, KINETIS_DMA_SERQ);
|
||||
|
||||
return OK;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: kinetis_dmastop
|
||||
*
|
||||
* Description:
|
||||
* Cancel the DMA. After kinetis_dmastop() is called, the DMA channel is
|
||||
* reset and kinetis_dmasetup() must be called before kinetis_dmastart() can be
|
||||
* called again
|
||||
* reset and kinetis_dmasetup() must be called before kinetis_dmastart()
|
||||
* can be called again
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void kinetis_dmastop(DMA_HANDLE handle)
|
||||
{
|
||||
struct kinetis_dma_ch *ch = (struct kinetis_dma_ch *)handle;
|
||||
|
||||
DEBUGASSERT(handle != NULL);
|
||||
|
||||
putreg8(ch->ind, KINETIS_DMA_CERQ);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
@@ -177,7 +460,7 @@ void kinetis_dmastop(DMA_HANDLE handle)
|
||||
#ifdef CONFIG_DEBUG_DMA
|
||||
void kinetis_dmasample(DMA_HANDLE handle, struct kinetis_dmaregs_s *regs)
|
||||
{
|
||||
|
||||
DEBUGASSERT(handle != NULL);
|
||||
}
|
||||
#endif
|
||||
|
||||
@@ -193,7 +476,6 @@ void kinetis_dmasample(DMA_HANDLE handle, struct kinetis_dmaregs_s *regs)
|
||||
void kinetis_dmadump(DMA_HANDLE handle, const struct kinetis_dmaregs_s *regs,
|
||||
const char *msg)
|
||||
{
|
||||
|
||||
DEBUGASSERT(handle != NULL);
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
@@ -1,9 +1,10 @@
|
||||
/****************************************************************************
|
||||
* arch/arm/src/kinetis/kinetis_dma.h
|
||||
*
|
||||
* Copyright (C) 2016 Gregory Nutt. All rights reserved.
|
||||
* Copyright (C) 2016-2018 Gregory Nutt. All rights reserved.
|
||||
* Authors: Gregory Nutt <gnutt@nuttx.org>
|
||||
* David Sidrane <david_s5@nscdg.com>
|
||||
* Jan Okle <jan@leitwert.ch>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
@@ -57,7 +58,9 @@
|
||||
typedef FAR void *DMA_HANDLE;
|
||||
typedef void (*dma_callback_t)(DMA_HANDLE handle, void *arg, int result);
|
||||
|
||||
/* The following is used for sampling DMA registers when CONFIG DEBUG_DMA is selected */
|
||||
/* The following is used for sampling DMA registers when CONFIG DEBUG_DMA is
|
||||
* selected.
|
||||
*/
|
||||
|
||||
#ifdef CONFIG_DEBUG_DMA
|
||||
struct kinetis_dmaglobalregs_s
|
||||
@@ -84,6 +87,21 @@ struct kinetis_dmaregs_s
|
||||
};
|
||||
#endif
|
||||
|
||||
typedef enum _kinetis_dma_direction_e
|
||||
{
|
||||
KINETIS_DMA_DIRECTION_PERIPHERAL_TO_MEMORY,
|
||||
KINETIS_DMA_DIRECTION_MEMORY_TO_PERIPHERAL
|
||||
} kinetis_dma_direction_t;
|
||||
|
||||
/* Kinetis data transfer size */
|
||||
|
||||
typedef enum _kinetis_dma_data_sz_e
|
||||
{
|
||||
KINETIS_DMA_DATA_SZ_8BIT = 0,
|
||||
KINETIS_DMA_DATA_SZ_16BIT = 1,
|
||||
KINETIS_DMA_DATA_SZ_32BIT = 2,
|
||||
} kinetis_dma_data_sz_t;
|
||||
|
||||
/****************************************************************************
|
||||
* Public Data
|
||||
****************************************************************************/
|
||||
@@ -99,10 +117,9 @@ extern "C"
|
||||
#define EXTERN extern
|
||||
#endif
|
||||
|
||||
|
||||
/************************************************************************************
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
************************************************************************************/
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: kinetis_dmainitialize
|
||||
@@ -115,7 +132,7 @@ extern "C"
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void kinetis_dmainitilaize(void);
|
||||
void kinetis_dmainitialize(void);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: kinetis_dmachannel
|
||||
@@ -124,22 +141,33 @@ void kinetis_dmainitilaize(void);
|
||||
* Allocate a DMA channel. This function sets aside a DMA channel and
|
||||
* gives the caller exclusive access to the DMA channel.
|
||||
*
|
||||
* Input Parameters:
|
||||
* src - DMA request source
|
||||
* per_addr - Address of the peripheral data
|
||||
* per_data_sz - Peripheral data size (register size). Note that if this
|
||||
* does not agree with the peripheral register size, DMA
|
||||
* transfers will silently fail during operation.
|
||||
* dir - transfer direction
|
||||
*
|
||||
* Returned Value:
|
||||
* One success, this function returns a non-NULL, void* DMA channel
|
||||
* One success, this function returns a non-NULL, void * DMA channel
|
||||
* handle. NULL is returned on any failure. This function can fail only
|
||||
* if no DMA channel is available.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
DMA_HANDLE kinetis_dmachannel(void);
|
||||
DMA_HANDLE kinetis_dmachannel(uint8_t src,
|
||||
uint32_t per_addr,
|
||||
kinetis_dma_data_sz_t per_data_sz,
|
||||
kinetis_dma_direction_t dir);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: kinetis_dmafree
|
||||
*
|
||||
* Description:
|
||||
* Release a DMA channel. NOTE: The 'handle' used in this argument must
|
||||
* NEVER be used again until kinetis_dmachannel() is called again to re-gain
|
||||
* a valid handle.
|
||||
* NEVER be used again until kinetis_dmachannel() is called again to re-
|
||||
* gain a valid handle.
|
||||
*
|
||||
* Returned Value:
|
||||
* None
|
||||
@@ -154,10 +182,18 @@ void kinetis_dmafree(DMA_HANDLE handle);
|
||||
* Description:
|
||||
* Configure DMA for one transfer.
|
||||
*
|
||||
* Input Parameters:
|
||||
* mem_addr - Memory address
|
||||
* ntransfers - Number of transfers. Must be 0<= ntransfers <= 0x7FFF
|
||||
* control - Channel control configuration
|
||||
*
|
||||
* Returned Value:
|
||||
* result: 0 if ok, negative else
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int kinetis_dmasetup(DMA_HANDLE handle, uint32_t control, uint32_t config,
|
||||
uint32_t srcaddr, uint32_t destaddr, size_t nbytes);
|
||||
int kinetis_dmasetup(DMA_HANDLE handle, uint32_t mem_addr,
|
||||
size_t ntransfers, uint16_t control);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: kinetis_dmastart
|
||||
@@ -174,13 +210,25 @@ int kinetis_dmastart(DMA_HANDLE handle, dma_callback_t callback, void *arg);
|
||||
*
|
||||
* Description:
|
||||
* Cancel the DMA. After kinetis_dmastop() is called, the DMA channel is
|
||||
* reset and kinetis_dmasetup() must be called before kinetis_dmastart() can be
|
||||
* called again
|
||||
* reset and kinetis_dmasetup() must be called before kinetis_dmastart()
|
||||
* can be called again
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void kinetis_dmastop(DMA_HANDLE handle);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: kinetis_dmaresidual
|
||||
*
|
||||
* Description:
|
||||
* Returns the number of transfers left
|
||||
*
|
||||
* Returned Value:
|
||||
* Residual transfers
|
||||
****************************************************************************/
|
||||
|
||||
size_t kinetis_dmaresidual(DMA_HANDLE handle);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: kinetis_dmasample
|
||||
*
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
118
arch/arm/src/kinetis/kinetis_uart.h
Normal file
118
arch/arm/src/kinetis/kinetis_uart.h
Normal file
@@ -0,0 +1,118 @@
|
||||
/************************************************************************************
|
||||
* arch/arm/src/kinetis/kinetis_uart.h
|
||||
*
|
||||
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
|
||||
* Authors: David Sidrane <david_s5@nscdg.com>
|
||||
* Jan Okle <jan@leitwert.ch>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_UART_H
|
||||
#define __ARCH_ARM_SRC_KINETIS_KINETIS_UART_H
|
||||
|
||||
#if defined(HAVE_UART_DEVICE) && defined(USE_SERIALDRIVER)
|
||||
/************************************************************************************
|
||||
* Included Files
|
||||
************************************************************************************/
|
||||
|
||||
/************************************************************************************
|
||||
* Pre-processor Definitions
|
||||
************************************************************************************/
|
||||
|
||||
|
||||
/* Is DMA available on any (enabled) UART? */
|
||||
|
||||
#undef SERIAL_HAVE_DMA
|
||||
#if defined(CONFIG_KINETIS_UART0_RXDMA) || defined(CONFIG_KINETIS_UART1_RXDMA) || \
|
||||
defined(CONFIG_KINETIS_UART2_RXDMA) || defined(CONFIG_KINETIS_UART3_RXDMA) || \
|
||||
defined(CONFIG_KINETIS_UART4_RXDMA) || defined(CONFIG_KINETIS_UART5_RXDMA)
|
||||
# define SERIAL_HAVE_DMA 1
|
||||
|
||||
/* Is DMA available on All (enabled) UART? */
|
||||
|
||||
#define SERIAL_HAVE_ALL_DMA 1
|
||||
# if (defined(CONFIG_KINETIS_UART0) && !defined(CONFIG_KINETIS_UART0_RXDMA)) || \
|
||||
(defined(CONFIG_KINETIS_UART1) && !defined(CONFIG_KINETIS_UART1_RXDMA)) || \
|
||||
(defined(CONFIG_KINETIS_UART2) && !defined(CONFIG_KINETIS_UART2_RXDMA)) || \
|
||||
(defined(CONFIG_KINETIS_UART3) && !defined(CONFIG_KINETIS_UART3_RXDMA)) || \
|
||||
(defined(CONFIG_KINETIS_UART4) && !defined(CONFIG_KINETIS_UART4_RXDMA)) || \
|
||||
(defined(CONFIG_KINETIS_UART5) && !defined(CONFIG_KINETIS_UART5_RXDMA))
|
||||
# undef SERIAL_HAVE_ALL_DMA
|
||||
# endif
|
||||
#endif
|
||||
|
||||
/************************************************************************************
|
||||
* Public Types
|
||||
************************************************************************************/
|
||||
|
||||
/************************************************************************************
|
||||
* Public Data
|
||||
************************************************************************************/
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
#undef EXTERN
|
||||
#if defined(__cplusplus)
|
||||
#define EXTERN extern "C"
|
||||
extern "C"
|
||||
{
|
||||
#else
|
||||
#define EXTERN extern
|
||||
#endif
|
||||
|
||||
/************************************************************************************
|
||||
* Public Functions
|
||||
************************************************************************************/
|
||||
|
||||
/************************************************************************************
|
||||
* Name: kinetis_serial_dma_poll
|
||||
*
|
||||
* Description:
|
||||
* Must be called periodically if any Kinetis UART is configured for DMA. The DMA
|
||||
* callback is triggered for each fifo size/2 bytes, but this can result in some
|
||||
* bytes being transferred but not collected if the incoming data is not a whole
|
||||
* multiple of half the FIFO size.
|
||||
*
|
||||
* May be safely called from either interrupt or thread context.
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
#ifdef SERIAL_HAVE_DMA
|
||||
void kinetis_serial_dma_poll(void);
|
||||
#endif
|
||||
|
||||
#undef EXTERN
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
#endif /* HAVE_UART_DEVICE && USE_SERIALDRIVER) */
|
||||
#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_UART_H */
|
||||
@@ -36,6 +36,7 @@ CONFIG_FS_PROCFS=y
|
||||
CONFIG_FS_PROCFS_REGISTER=y
|
||||
CONFIG_I2C_RESET=y
|
||||
CONFIG_INPUT=y
|
||||
CONFIG_KINETIS_DMA=y
|
||||
CONFIG_KINETIS_FTM0=y
|
||||
CONFIG_KINETIS_FTM0_CHANNEL=2
|
||||
CONFIG_KINETIS_FTM0_PWM=y
|
||||
@@ -86,8 +87,8 @@ CONFIG_RTC_DRIVER=y
|
||||
CONFIG_RTC_HIRES=y
|
||||
CONFIG_SCHED_CHILD_STATUS=y
|
||||
CONFIG_SCHED_HAVE_PARENT=y
|
||||
CONFIG_SCHED_HPWORK=y
|
||||
CONFIG_SCHED_HPWORKPERIOD=50000
|
||||
CONFIG_SCHED_HPWORK=y
|
||||
CONFIG_SCHED_WAITPID=y
|
||||
CONFIG_SDCLONE_DISABLE=y
|
||||
CONFIG_SERIAL_TERMIOS=y
|
||||
|
||||
Reference in New Issue
Block a user