mirror of
https://github.com/apache/nuttx.git
synced 2026-06-06 00:14:22 +08:00
EFM32: Fix GPIO configuration logic; Add missing board initializatin logic; Fix LED naming
This commit is contained in:
+9
-9
@@ -143,20 +143,20 @@ Installation Directories with Spaces in the Path
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Downloading from Repositories
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-----------------------------
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Cloning the Repository
|
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Cloning the Repository
|
||||
|
||||
The current NuttX du jour is available in from a GIT repository. Cloning
|
||||
instructions are available here:
|
||||
The current NuttX du jour is available in from a GIT repository. Cloning
|
||||
instructions are available here:
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||||
|
||||
https://sourceforge.net/p/nuttx/git
|
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https://sourceforge.net/p/nuttx/git
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||||
|
||||
Cloning NuttX Inside Cygwin
|
||||
Cloning NuttX Inside Cygwin
|
||||
|
||||
If you are cloning the NuttX repository, it is recommended to avoid
|
||||
automatic end of lines conversions by git. These conversions may break
|
||||
some scripts like configure.sh. Before cloning, do the following:
|
||||
If you are cloning the NuttX repository, it is recommended to avoid
|
||||
automatic end of lines conversions by git. These conversions may break
|
||||
some scripts like configure.sh. Before cloning, do the following:
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||||
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git config --global core.autocrlf false
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git config --global core.autocrlf false
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Notes about Header Files
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------------------------
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@@ -266,7 +266,7 @@ static inline void efm32_setmode(uintptr_t base, uint8_t pin, uint8_t mode)
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regval = getreg32(regaddr);
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regval &= ~((uint32_t)15 << shift);
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regval |= ~((uint32_t)mode << shift);
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regval |= (uint32_t)mode << shift;
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putreg32(regval, regaddr);
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}
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@@ -51,15 +51,23 @@
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#include "up_arch.h"
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#include "up_internal.h"
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#include "efm32_config.h"
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#include "efm32_lowputc.h"
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#include "efm32_clockconfig.h"
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#include "efm32_start.h"
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#ifdef CONFIG_ARCH_FPU
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# include "nvic.h"
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#endif
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/****************************************************************************
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* Private Function prototypes
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****************************************************************************/
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#ifdef CONFIG_ARCH_FPU
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static inline void efm32_fpuconfig(void);
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#endif
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#ifdef CONFIG_DEBUG_STACK
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static void go_os_start(void *pv, unsigned int nbytes)
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__attribute__ ((naked,no_instrument_function,noreturn));
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@@ -89,6 +97,96 @@ static void go_os_start(void *pv, unsigned int nbytes)
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# define showprogress(c)
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#endif
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/****************************************************************************
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* Name: efm32_fpuconfig
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*
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* Description:
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* Configure the FPU. Relative bit settings:
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*
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* CPACR: Enables access to CP10 and CP11
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* CONTROL.FPCA: Determines whether the FP extension is active in the
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* current context:
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* FPCCR.ASPEN: Enables automatic FP state preservation, then the
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* processor sets this bit to 1 on successful completion of any FP
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* instruction.
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* FPCCR.LSPEN: Enables lazy context save of FP state. When this is
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* done, the processor reserves space on the stack for the FP state,
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* but does not save that state information to the stack.
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*
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* Software must not change the value of the ASPEN bit or LSPEN bit while either:
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* - the CPACR permits access to CP10 and CP11, that give access to the FP
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* extension, or
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* - the CONTROL.FPCA bit is set to 1
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*
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****************************************************************************/
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#ifdef CONFIG_ARCH_FPU
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#ifdef CONFIG_ARMV7M_CMNVECTOR
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static inline void efm32_fpuconfig(void)
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{
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uint32_t regval;
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/* Set CONTROL.FPCA so that we always get the extended context frame
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* with the volatile FP registers stacked above the basic context.
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*/
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regval = getcontrol();
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regval |= (1 << 2);
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setcontrol(regval);
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/* Ensure that FPCCR.LSPEN is disabled, so that we don't have to contend
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* with the lazy FP context save behaviour. Clear FPCCR.ASPEN since we
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* are going to turn on CONTROL.FPCA for all contexts.
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*/
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regval = getreg32(NVIC_FPCCR);
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regval &= ~((1 << 31) | (1 << 30));
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putreg32(regval, NVIC_FPCCR);
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/* Enable full access to CP10 and CP11 */
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regval = getreg32(NVIC_CPACR);
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regval |= ((3 << (2*10)) | (3 << (2*11)));
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putreg32(regval, NVIC_CPACR);
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}
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#else
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static inline void efm32_fpuconfig(void)
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{
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uint32_t regval;
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/* Clear CONTROL.FPCA so that we do not get the extended context frame
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* with the volatile FP registers stacked in the saved context.
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*/
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regval = getcontrol();
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regval &= ~(1 << 2);
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setcontrol(regval);
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/* Ensure that FPCCR.LSPEN is disabled, so that we don't have to contend
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* with the lazy FP context save behaviour. Clear FPCCR.ASPEN since we
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* are going to keep CONTROL.FPCA off for all contexts.
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*/
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regval = getreg32(NVIC_FPCCR);
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regval &= ~((1 << 31) | (1 << 30));
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putreg32(regval, NVIC_FPCCR);
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/* Enable full access to CP10 and CP11 */
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regval = getreg32(NVIC_CPACR);
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regval |= ((3 << (2*10)) | (3 << (2*11)));
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putreg32(regval, NVIC_CPACR);
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}
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#endif
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#else
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# define efm32_fpuconfig()
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#endif
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/****************************************************************************
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* Name: go_os_start
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*
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@@ -149,6 +247,7 @@ void __start(void)
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/* Configure the uart so that we can get debug output as soon as possible */
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efm32_clockconfig();
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efm32_fpuconfig();
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efm32_lowsetup();
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showprogress('A');
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@@ -179,7 +278,6 @@ void __start(void)
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/* Perform early serial initialization */
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up_earlyserialinit();
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showprogress('D');
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/* For the case of the separate user-/kernel-space build, perform whatever
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@@ -193,6 +291,11 @@ void __start(void)
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showprogress('E');
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#endif
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/* Initialize onboard resources */
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efm32_boardinitialize();
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showprogress('F');
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/* Then start NuttX */
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showprogress('\r');
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@@ -54,7 +54,7 @@ LEDs
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include/board.h and src/efm32_autoleds.c. The LEDs are used to
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encode OS-related events as follows:
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SYMBOL Meaning LED1* LED2 LED3 LED4
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SYMBOL Meaning LED0* LED1 LED2 LED3
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----------------- ----------------------- ------ ----- ----- ------
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LED_STARTED NuttX has been started ON OFF OFF OFF
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LED_HEAPALLOCATE Heap has been allocated OFF ON OFF OFF
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@@ -66,12 +66,12 @@ LEDs
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LED_PANIC The system has crashed N/C N/C N/C ON
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LED_IDLE STM32 is is sleep mode (Optional, not used)
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* If LED1, LED2, LED3 are statically on, then NuttX probably failed to boot
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* If LED0, LED1, LED2 are statically on, then NuttX probably failed to boot
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and these LEDs will give you some indication of where the failure was
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** The normal state is LED3 ON and LED1 faintly glowing. This faint glow
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** The normal state is LED2 ON and LED3 faintly glowing. This faint glow
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is because of timer interrupt that result in the LED being illuminated
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on a small proportion of the time.
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*** LED2 may also flicker normally if signals are processed.
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*** LED1 may also flicker normally if signals are processed.
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SERIAL CONSOLE
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==============
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@@ -172,37 +172,32 @@
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/* LED index values for use with efm32_setled() */
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#define BOARD_LED1 0
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#define BOARD_LED2 1
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#define BOARD_LED3 2
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#define BOARD_LED4 3
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#define BOARD_LED0 0
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#define BOARD_LED1 1
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#define BOARD_LED2 2
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#define BOARD_LED3 3
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#define BOARD_NLEDS 4
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#define BOARD_LED_GREEN BOARD_LED1
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#define BOARD_LED_ORANGE BOARD_LED2
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#define BOARD_LED_RED BOARD_LED3
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#define BOARD_LED_BLUE BOARD_LED4
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/* LED bits for use with efm32_setleds() */
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#define BOARD_LED0_BIT (1 << BOARD_LED0)
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#define BOARD_LED1_BIT (1 << BOARD_LED1)
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#define BOARD_LED2_BIT (1 << BOARD_LED2)
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#define BOARD_LED3_BIT (1 << BOARD_LED3)
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#define BOARD_LED4_BIT (1 << BOARD_LED4)
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/* If CONFIG_ARCH_LEDs is defined, then NuttX will control the 4 LEDs on
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* board the EFM32 Gecko Starter Kit. The following definitions describe
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* how NuttX controls the LEDs in this configuration:
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*/
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#define LED_STARTED 0 /* LED1 */
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#define LED_HEAPALLOCATE 1 /* LED2 */
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#define LED_IRQSENABLED 2 /* LED1 + LED2 */
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#define LED_STACKCREATED 3 /* LED3 */
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#define LED_INIRQ 4 /* LED1 + LED3 */
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#define LED_SIGNAL 5 /* LED2 + LED3 */
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#define LED_ASSERTION 6 /* LED1 + LED2 + LED3 */
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#define LED_PANIC 7 /* N/C + N/C + N/C + LED4 */
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#define LED_STARTED 0 /* LED0 */
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#define LED_HEAPALLOCATE 1 /* LED1 */
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#define LED_IRQSENABLED 2 /* LED0 + LED1 */
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#define LED_STACKCREATED 3 /* LED2 */
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#define LED_INIRQ 4 /* LED0 + LED2 */
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#define LED_SIGNAL 5 /* LED1 + LED3 */
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#define LED_ASSERTION 6 /* LED0 + LED2 + LED2 */
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#define LED_PANIC 7 /* N/C + N/C + N/C + LED3 */
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/* Pin routing **************************************************************/
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/* UART0:
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@@ -78,13 +78,13 @@
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* value to the LED.
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*/
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#define GPIO_LED1 (GPIO_OUTPUT_WIREDOR_PULLDOWN|\
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#define GPIO_LED0 (GPIO_OUTPUT_WIREDOR_PULLDOWN|\
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GPIO_OUTPUT_CLEAR|GPIO_PORTC|GPIO_PIN0)
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#define GPIO_LED2 (GPIO_OUTPUT_WIREDOR_PULLDOWN|\
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#define GPIO_LED1 (GPIO_OUTPUT_WIREDOR_PULLDOWN|\
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GPIO_OUTPUT_CLEAR|GPIO_PORTC|GPIO_PIN1)
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#define GPIO_LED3 (GPIO_OUTPUT_WIREDOR_PULLDOWN|\
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#define GPIO_LED2 (GPIO_OUTPUT_WIREDOR_PULLDOWN|\
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GPIO_OUTPUT_CLEAR|GPIO_PORTC|GPIO_PIN2)
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#define GPIO_LED4 (GPIO_OUTPUT_WIREDOR_PULLDOWN|\
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#define GPIO_LED3 (GPIO_OUTPUT_WIREDOR_PULLDOWN|\
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GPIO_OUTPUT_CLEAR|GPIO_PORTC|GPIO_PIN3)
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/****************************************************************************
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@@ -72,10 +72,10 @@
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/* The following definitions map the encoded LED setting to GPIO settings */
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#define EFM32F4_LED1 (1 << 0)
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#define EFM32F4_LED2 (1 << 1)
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#define EFM32F4_LED3 (1 << 2)
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#define EFM32F4_LED4 (1 << 3)
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#define EFM32_LED0 (1 << 0)
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#define EFM32_LED1 (1 << 1)
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#define EFM32_LED2 (1 << 2)
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#define EFM32_LED3 (1 << 3)
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#define ON_SETBITS_SHIFT (0)
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#define ON_CLRBITS_SHIFT (4)
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@@ -92,45 +92,45 @@
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#define OFF_SETBITS(v) (SETBITS(OFF_BITS(v))
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#define OFF_CLRBITS(v) (CLRBITS(OFF_BITS(v))
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#define LED_STARTED_ON_SETBITS ((EFM32F4_LED1) << ON_SETBITS_SHIFT)
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#define LED_STARTED_ON_CLRBITS ((EFM32F4_LED2|EFM32F4_LED3|EFM32F4_LED4) << ON_CLRBITS_SHIFT)
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#define LED_STARTED_ON_SETBITS ((EFM32_LED0) << ON_SETBITS_SHIFT)
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#define LED_STARTED_ON_CLRBITS ((EFM32_LED1|EFM32_LED2|EFM32_LED3) << ON_CLRBITS_SHIFT)
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#define LED_STARTED_OFF_SETBITS (0 << OFF_SETBITS_SHIFT)
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#define LED_STARTED_OFF_CLRBITS ((EFM32F4_LED1|EFM32F4_LED2|EFM32F4_LED3|EFM32F4_LED4) << OFF_CLRBITS_SHIFT)
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#define LED_STARTED_OFF_CLRBITS ((EFM32_LED0|EFM32_LED1|EFM32_LED2|EFM32_LED3) << OFF_CLRBITS_SHIFT)
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|
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#define LED_HEAPALLOCATE_ON_SETBITS ((EFM32F4_LED2) << ON_SETBITS_SHIFT)
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#define LED_HEAPALLOCATE_ON_CLRBITS ((EFM32F4_LED1|EFM32F4_LED3|EFM32F4_LED4) << ON_CLRBITS_SHIFT)
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#define LED_HEAPALLOCATE_OFF_SETBITS ((EFM32F4_LED1) << OFF_SETBITS_SHIFT)
|
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#define LED_HEAPALLOCATE_OFF_CLRBITS ((EFM32F4_LED2|EFM32F4_LED3|EFM32F4_LED4) << OFF_CLRBITS_SHIFT)
|
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#define LED_HEAPALLOCATE_ON_SETBITS ((EFM32_LED1) << ON_SETBITS_SHIFT)
|
||||
#define LED_HEAPALLOCATE_ON_CLRBITS ((EFM32_LED0|EFM32_LED2|EFM32_LED3) << ON_CLRBITS_SHIFT)
|
||||
#define LED_HEAPALLOCATE_OFF_SETBITS ((EFM32_LED0) << OFF_SETBITS_SHIFT)
|
||||
#define LED_HEAPALLOCATE_OFF_CLRBITS ((EFM32_LED1|EFM32_LED2|EFM32_LED3) << OFF_CLRBITS_SHIFT)
|
||||
|
||||
#define LED_IRQSENABLED_ON_SETBITS ((EFM32F4_LED1|EFM32F4_LED2) << ON_SETBITS_SHIFT)
|
||||
#define LED_IRQSENABLED_ON_CLRBITS ((EFM32F4_LED3|EFM32F4_LED4) << ON_CLRBITS_SHIFT)
|
||||
#define LED_IRQSENABLED_OFF_SETBITS ((EFM32F4_LED2) << OFF_SETBITS_SHIFT)
|
||||
#define LED_IRQSENABLED_OFF_CLRBITS ((EFM32F4_LED1|EFM32F4_LED3|EFM32F4_LED4) << OFF_CLRBITS_SHIFT)
|
||||
#define LED_IRQSENABLED_ON_SETBITS ((EFM32_LED0|EFM32_LED1) << ON_SETBITS_SHIFT)
|
||||
#define LED_IRQSENABLED_ON_CLRBITS ((EFM32_LED2|EFM32_LED3) << ON_CLRBITS_SHIFT)
|
||||
#define LED_IRQSENABLED_OFF_SETBITS ((EFM32_LED1) << OFF_SETBITS_SHIFT)
|
||||
#define LED_IRQSENABLED_OFF_CLRBITS ((EFM32_LED0|EFM32_LED2|EFM32_LED3) << OFF_CLRBITS_SHIFT)
|
||||
|
||||
#define LED_STACKCREATED_ON_SETBITS ((EFM32F4_LED3) << ON_SETBITS_SHIFT)
|
||||
#define LED_STACKCREATED_ON_CLRBITS ((EFM32F4_LED1|EFM32F4_LED2|EFM32F4_LED4) << ON_CLRBITS_SHIFT)
|
||||
#define LED_STACKCREATED_OFF_SETBITS ((EFM32F4_LED1|EFM32F4_LED2) << OFF_SETBITS_SHIFT)
|
||||
#define LED_STACKCREATED_OFF_CLRBITS ((EFM32F4_LED3|EFM32F4_LED4) << OFF_CLRBITS_SHIFT)
|
||||
#define LED_STACKCREATED_ON_SETBITS ((EFM32_LED2) << ON_SETBITS_SHIFT)
|
||||
#define LED_STACKCREATED_ON_CLRBITS ((EFM32_LED0|EFM32_LED1|EFM32_LED3) << ON_CLRBITS_SHIFT)
|
||||
#define LED_STACKCREATED_OFF_SETBITS ((EFM32_LED0|EFM32_LED1) << OFF_SETBITS_SHIFT)
|
||||
#define LED_STACKCREATED_OFF_CLRBITS ((EFM32_LED2|EFM32_LED3) << OFF_CLRBITS_SHIFT)
|
||||
|
||||
#define LED_INIRQ_ON_SETBITS ((EFM32F4_LED1) << ON_SETBITS_SHIFT)
|
||||
#define LED_INIRQ_ON_SETBITS ((EFM32_LED0) << ON_SETBITS_SHIFT)
|
||||
#define LED_INIRQ_ON_CLRBITS ((0) << ON_CLRBITS_SHIFT)
|
||||
#define LED_INIRQ_OFF_SETBITS ((0) << OFF_SETBITS_SHIFT)
|
||||
#define LED_INIRQ_OFF_CLRBITS ((EFM32F4_LED1) << OFF_CLRBITS_SHIFT)
|
||||
#define LED_INIRQ_OFF_CLRBITS ((EFM32_LED0) << OFF_CLRBITS_SHIFT)
|
||||
|
||||
#define LED_SIGNAL_ON_SETBITS ((EFM32F4_LED2) << ON_SETBITS_SHIFT)
|
||||
#define LED_SIGNAL_ON_SETBITS ((EFM32_LED1) << ON_SETBITS_SHIFT)
|
||||
#define LED_SIGNAL_ON_CLRBITS ((0) << ON_CLRBITS_SHIFT)
|
||||
#define LED_SIGNAL_OFF_SETBITS ((0) << OFF_SETBITS_SHIFT)
|
||||
#define LED_SIGNAL_OFF_CLRBITS ((EFM32F4_LED2) << OFF_CLRBITS_SHIFT)
|
||||
#define LED_SIGNAL_OFF_CLRBITS ((EFM32_LED1) << OFF_CLRBITS_SHIFT)
|
||||
|
||||
#define LED_ASSERTION_ON_SETBITS ((EFM32F4_LED4) << ON_SETBITS_SHIFT)
|
||||
#define LED_ASSERTION_ON_SETBITS ((EFM32_LED3) << ON_SETBITS_SHIFT)
|
||||
#define LED_ASSERTION_ON_CLRBITS ((0) << ON_CLRBITS_SHIFT)
|
||||
#define LED_ASSERTION_OFF_SETBITS ((0) << OFF_SETBITS_SHIFT)
|
||||
#define LED_ASSERTION_OFF_CLRBITS ((EFM32F4_LED4) << OFF_CLRBITS_SHIFT)
|
||||
#define LED_ASSERTION_OFF_CLRBITS ((EFM32_LED3) << OFF_CLRBITS_SHIFT)
|
||||
|
||||
#define LED_PANIC_ON_SETBITS ((EFM32F4_LED4) << ON_SETBITS_SHIFT)
|
||||
#define LED_PANIC_ON_SETBITS ((EFM32_LED3) << ON_SETBITS_SHIFT)
|
||||
#define LED_PANIC_ON_CLRBITS ((0) << ON_CLRBITS_SHIFT)
|
||||
#define LED_PANIC_OFF_SETBITS ((0) << OFF_SETBITS_SHIFT)
|
||||
#define LED_PANIC_OFF_CLRBITS ((EFM32F4_LED4) << OFF_CLRBITS_SHIFT)
|
||||
#define LED_PANIC_OFF_CLRBITS ((EFM32_LED3) << OFF_CLRBITS_SHIFT)
|
||||
|
||||
/****************************************************************************
|
||||
* Private Data
|
||||
@@ -169,48 +169,48 @@ static const uint16_t g_ledbits[8] =
|
||||
|
||||
static inline void led_clrbits(unsigned int clrbits)
|
||||
{
|
||||
if ((clrbits & EFM32F4_LED1) != 0)
|
||||
if ((clrbits & EFM32_LED0) != 0)
|
||||
{
|
||||
efm32_gpiowrite(GPIO_LED0, false);
|
||||
}
|
||||
|
||||
if ((clrbits & EFM32_LED1) != 0)
|
||||
{
|
||||
efm32_gpiowrite(GPIO_LED1, false);
|
||||
}
|
||||
|
||||
if ((clrbits & EFM32F4_LED2) != 0)
|
||||
if ((clrbits & EFM32_LED2) != 0)
|
||||
{
|
||||
efm32_gpiowrite(GPIO_LED2, false);
|
||||
}
|
||||
|
||||
if ((clrbits & EFM32F4_LED3) != 0)
|
||||
if ((clrbits & EFM32_LED3) != 0)
|
||||
{
|
||||
efm32_gpiowrite(GPIO_LED3, false);
|
||||
}
|
||||
|
||||
if ((clrbits & EFM32F4_LED4) != 0)
|
||||
{
|
||||
efm32_gpiowrite(GPIO_LED4, false);
|
||||
}
|
||||
}
|
||||
|
||||
static inline void led_setbits(unsigned int setbits)
|
||||
{
|
||||
if ((setbits & EFM32F4_LED1) != 0)
|
||||
if ((setbits & EFM32_LED0) != 0)
|
||||
{
|
||||
efm32_gpiowrite(GPIO_LED0, true);
|
||||
}
|
||||
|
||||
if ((setbits & EFM32_LED1) != 0)
|
||||
{
|
||||
efm32_gpiowrite(GPIO_LED1, true);
|
||||
}
|
||||
|
||||
if ((setbits & EFM32F4_LED2) != 0)
|
||||
if ((setbits & EFM32_LED2) != 0)
|
||||
{
|
||||
efm32_gpiowrite(GPIO_LED2, true);
|
||||
}
|
||||
|
||||
if ((setbits & EFM32F4_LED3) != 0)
|
||||
if ((setbits & EFM32_LED3) != 0)
|
||||
{
|
||||
efm32_gpiowrite(GPIO_LED3, true);
|
||||
}
|
||||
|
||||
if ((setbits & EFM32F4_LED4) != 0)
|
||||
{
|
||||
efm32_gpiowrite(GPIO_LED4, true);
|
||||
}
|
||||
}
|
||||
|
||||
static void led_setonoff(unsigned int bits)
|
||||
@@ -229,12 +229,12 @@ static void led_setonoff(unsigned int bits)
|
||||
|
||||
void board_led_initialize(void)
|
||||
{
|
||||
/* Configure LED1-4 GPIOs for output */
|
||||
/* Configure LED0-4 GPIOs for output */
|
||||
|
||||
efm32_configgpio(GPIO_LED0);
|
||||
efm32_configgpio(GPIO_LED1);
|
||||
efm32_configgpio(GPIO_LED2);
|
||||
efm32_configgpio(GPIO_LED3);
|
||||
efm32_configgpio(GPIO_LED4);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
|
||||
@@ -78,7 +78,7 @@
|
||||
|
||||
static gpio_pinset_t g_ledcfg[BOARD_NLEDS] =
|
||||
{
|
||||
GPIO_LED1, GPIO_LED2, GPIO_LED3, GPIO_LED4
|
||||
GPIO_LED0, GPIO_LED1, GPIO_LED2, GPIO_LED3
|
||||
};
|
||||
|
||||
/****************************************************************************
|
||||
@@ -193,12 +193,12 @@ static int led_pm_prepare(struct pm_callback_s *cb , enum pm_state_e pmstate)
|
||||
|
||||
void efm32_ledinit(void)
|
||||
{
|
||||
/* Configure LED1-4 GPIOs for output */
|
||||
/* Configure LED0-4 GPIOs for output */
|
||||
|
||||
efm32_configgpio(GPIO_LED0);
|
||||
efm32_configgpio(GPIO_LED1);
|
||||
efm32_configgpio(GPIO_LED2);
|
||||
efm32_configgpio(GPIO_LED3);
|
||||
efm32_configgpio(GPIO_LED4);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
@@ -219,10 +219,10 @@ void efm32_setled(int led, bool ledon)
|
||||
|
||||
void efm32_setleds(uint8_t ledset)
|
||||
{
|
||||
efm32_gpiowrite(GPIO_LED1, (ledset & BOARD_LED1_BIT) == 0);
|
||||
efm32_gpiowrite(GPIO_LED2, (ledset & BOARD_LED2_BIT) == 0);
|
||||
efm32_gpiowrite(GPIO_LED3, (ledset & BOARD_LED3_BIT) == 0);
|
||||
efm32_gpiowrite(GPIO_LED4, (ledset & BOARD_LED4_BIT) == 0);
|
||||
efm32_gpiowrite(GPIO_LED0, (ledset & BOARD_LED0_BIT) != 0);
|
||||
efm32_gpiowrite(GPIO_LED1, (ledset & BOARD_LED1_BIT) != 0);
|
||||
efm32_gpiowrite(GPIO_LED2, (ledset & BOARD_LED2_BIT) != 0);
|
||||
efm32_gpiowrite(GPIO_LED3, (ledset & BOARD_LED3_BIT) != 0);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
|
||||
Reference in New Issue
Block a user