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@@ -101,10 +101,6 @@
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#define TIMTYPE_TIM13 TIMTYPE_COUNTUP16
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#define TIMTYPE_TIM14 TIMTYPE_COUNTUP16
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/* The maximum repetition count is 128 */
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#define PWM_MAX_COUNT 128
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/* Debug ********************************************************************/
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/* Non-standard debug that may be enabled just for testing PWM */
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@@ -145,7 +141,8 @@ struct stm32_pwmtimer_s
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uint8_t timtype; /* See the TIMTYPE_* definitions */
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#ifdef CONFIG_PWM_PULSECOUNT
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uint8_t irq; /* Timer update IRQ */
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bool endseq; /* True: Next interrupt is the end */
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uint8_t rcr; /* Previous pulse count */
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uint32_t count; /* Remaining pluse count */
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#endif
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uint32_t base; /* The base address of the timer */
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uint32_t pincfg; /* Output pin configuration */
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@@ -183,6 +180,7 @@ static int pwm_tim1interrupt(int irq, void *context);
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#if defined(CONFIG_STM32_TIM8_PWM)
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static int pwm_tim8interrupt(int irq, void *context);
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#endif
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static uint8_t pwm_pulsecount(uint32_t count);
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#endif
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/* PWM driver methods */
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@@ -555,14 +553,12 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv,
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pwmvdbg("TIM%d channel: %d frequency: %d duty: %08x count: %d\n",
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priv->timid, priv->channel, info->frequency,
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info->duty, info->count);
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DEBUGASSERT(info->frequency > 0 && info->duty > 0 &&
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info->duty < uitoub16(100) && info->count < PWM_MAX_COUNT);
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#else
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pwmvdbg("TIM%d channel: %d frequency: %d duty: %08x\n",
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priv->timid, priv->channel, info->frequency, info->duty);
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#endif
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DEBUGASSERT(info->frequency > 0 && info->duty > 0 &&
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info->duty < uitoub16(100));
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#endif
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/* Disable all interrupts and DMA requests, clear all pending status */
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@@ -698,7 +694,8 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv,
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#ifdef CONFIG_PWM_PULSECOUNT
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if (info->count > 0)
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{
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pwm_putreg(priv, STM32_ATIM_RCR_OFFSET, info->count - 1);
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uint16_t count = (uint16_t)pwm_pulsecount(info->count) - 1;
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pwm_putreg(priv, STM32_ATIM_RCR_OFFSET, count);
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}
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/* Otherwise, just clear the repitition counter */
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@@ -896,7 +893,14 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv,
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pwm_putreg(priv, STM32_GTIM_SR_OFFSET, 0);
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pwm_putreg(priv, STM32_GTIM_DIER_OFFSET, ATIM_DIER_UIE);
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priv->endseq = false;
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/* Save the remining count and the number of counts that will have
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* elapsed on the first interrupt. Since the first interrupt will
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* occur immediately, that count will be zero.
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*/
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priv->rcr = 0;
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priv->count =info->count;
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/* Enable the timer */
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@@ -948,28 +952,22 @@ static int pwm_interrupt(struct stm32_pwmtimer_s *priv)
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pwm_putreg(priv, STM32_ATIM_SR_OFFSET, regval & ~ATIM_SR_UIF);
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/* Now all of the time critical stuff is done so we can do some debug output */
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pwmllvdbg("Update interrupt SR: %04x RCR: %d endseq: %d\n",
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regval, pwm_getreg(priv, STM32_ATIM_RCR_OFFSET), priv->endseq);
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/* Ignore the first update interrupt. That apparently happens when the
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* timer first starts so we always get one immediately. The second is
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* one that is controlled by RCR.
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/* Calculate the new count by subtracting the number of pulses
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* since the last interrupt.
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*/
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if (!priv->endseq)
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if (priv->count <= priv->rcr)
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{
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/* The next interrupt will be the one we care about. */
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priv->endseq = true;
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}
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else
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{
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/* OK.. This is the real thing. Disable further interrupts and stop
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* the timer
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/* We are finished. Turn off the mast output to stop the output as
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* quickly as possible.
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*/
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regval = pwm_getreg(priv, STM32_ATIM_BDTR_OFFSET);
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regval &= ~ATIM_BDTR_MOE;
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pwm_putreg(priv, STM32_ATIM_BDTR_OFFSET, regval);
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/* Disable first interrtups, stop and reset the timer */
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(void)pwm_stop((FAR struct pwm_lowerhalf_s *)priv);
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/* Then perform the callback into the upper half driver */
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@@ -977,8 +975,28 @@ static int pwm_interrupt(struct stm32_pwmtimer_s *priv)
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pwm_expired(priv->handle);
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priv->handle = NULL;
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priv->endseq = false;
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priv->count = 0;
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priv->rcr = 0;
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}
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else
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{
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/* Decrement the count of pulses remaining using the number of
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* pulses generated since the last interrupt. This will be the
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* same as the current RCR value *except* on the first interrupt.
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*/
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priv->count -= priv->rcr;
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/* Calculate and set the next RCR value */
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priv->rcr = pwm_pulsecount(priv->count);
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pwm_putreg(priv, STM32_ATIM_RCR_OFFSET, (uint16_t)priv->rcr - 1);
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}
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/* Now all of the time critical stuff is done so we can do some debug output */
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pwmllvdbg("Update interrupt SR: %04x RCR: %d count: %d\n",
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regval, priv->rcr, priv->count);
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return OK;
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}
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@@ -1012,6 +1030,53 @@ static int pwm_tim8interrupt(int irq, void *context)
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}
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#endif
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/****************************************************************************
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* Name: pwm_pulsecount
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*
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* Description:
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* Pick an optimal pulse count to program the RCR.
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*
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* Input parameters:
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* count - The total count remaining
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*
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* Returned Value:
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* The recommended pulse count
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*
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****************************************************************************/
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#if defined(CONFIG_PWM_PULSECOUNT) && (defined(CONFIG_STM32_TIM1_PWM) || defined(CONFIG_STM32_TIM8_PWM))
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static uint8_t pwm_pulsecount(uint32_t count)
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{
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/* The the remaining pulse count is less than or equal to the maximum, the
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* just return the count.
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*/
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if (count <= ATIM_RCR_REP_MAX)
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{
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return count;
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}
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/* Otherwise, we have to be careful. We do not want a small number of
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* counts at the end because we might have trouble responding fast enough.
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* If the remaining count is less than 150% of the maximum, then return
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* half of the maximum. In this case the final sequence will be between 64
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* and 128.
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*/
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else if (count < (3 * ATIM_RCR_REP_MAX / 2))
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{
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return (ATIM_RCR_REP_MAX + 1) >> 1;
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}
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/* Otherwise, return the maximum. The final count will be 64 or more */
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else
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{
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return ATIM_RCR_REP_MAX;
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}
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}
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#endif
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/****************************************************************************
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* Name: pwm_setup
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*
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@@ -1123,17 +1188,6 @@ static int pwm_start(FAR struct pwm_lowerhalf_s *dev,
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priv->timid, info->count);
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return -EPERM;
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}
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/* The maximum repetition count supported by the advanced timers
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* is PWM_MAX_COUNT.
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*/
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if (info->count > PWM_MAX_COUNT)
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{
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pwmdbg("ERROR: TIM%d count=%d exceeds maximum repeition count: %d\n",
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priv->timid, info->count, PWM_MAX_COUNT);
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return -EDOM;
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}
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}
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/* Save the handle */
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patacongo