RX65N DTC Driver Support Added

arch/renesas/src/rx65n/Kconfig

@@ -340,6 +340,33 @@ config RX65N_RIIC2_RCV_IN_BYTE_UNITS
 	depends on !RX65N_RIIC2_RCV_CONTINUOUS
 	
 endif #RX65N_RIIC2
+
+config RX65N_DTC
+	bool "DTC"
+	default n
+
+if RX65N_DTC
+
+config RX65N_DTC_SEQUENCE_TRANSFER_MODE
+	bool "Sequence transfer mode"
+	depends on !RX65N_DTC_SHORT_ADDRESS_MODE
+	default n
+
+config RX65N_DTC_DISPLACEMENT
+	int "Displacement value"
+	depends on !RX65N_DTC_SHORT_ADDRESS_MODE
+	default 0
+
+config RX65N_DTC_SHORT_ADDRESS_MODE
+	bool "Short address mode"
+	default n
+
+config RX65N_DTC_TRANSFER_DATA_READ_SKIP
+	bool "Transfer data read skip"
+	default y
+
+endif #RX65N_DTC
+
 endmenu # RX65N Peripheral Selections
 endif
 
@@ -625,6 +652,32 @@ config RX65N_TEST_INTEP
 
 endif #RX65N_USBDEV
 
+config RX65N_DTC
+	bool "DTC"
+	default n
+
+if RX65N_DTC
+
+config RX65N_DTC_SEQUENCE_TRANSFER_MODE
+	bool "Sequence transfer mode"
+	depends on !RX65N_DTC_SHORT_ADDRESS_MODE
+	default n
+
+config RX65N_DTC_DISPLACEMENT
+	int "Displacement value"
+	depends on !RX65N_DTC_SHORT_ADDRESS_MODE
+	default 0
+
+config RX65N_DTC_SHORT_ADDRESS_MODE
+	bool "Short address mode"
+	default n
+
+config RX65N_DTC_TRANSFER_DATA_READ_SKIP
+	bool "Transfer data read skip"
+	default y
+
+endif #RX65N_DTC
+
 endmenu # RX65N Peripheral Selections
 endif
 

arch/renesas/src/rx65n/Make.defs

@@ -65,4 +65,8 @@ endif
 
 ifeq ($(CONFIG_I2C),y)
 CHIP_CSRCS += rx65n_riic.c
+endif
+
+ifeq ($(CONFIG_RX65N_DTC),y)
+CHIP_CSRCS += rx65n_dtc.c
 endif

arch/renesas/src/rx65n/rx65n_definitions.h

@@ -1607,6 +1607,34 @@
 
 /* End of RIIC related definitions */
 
+/* Start of DTC interface related definitions */
+
+#if defined(CONFIG_RX65N_DTC)
+  #define HAVE_DTC_DRIVER    1
+#endif
+
+#define RX65N_DTC_BASE       (uint32_t)&DTC
+
+#define DTC_DTCCR_OFFSET     (0x0000)  /* DTC Control Register */
+#define DTC_DTCVBR_OFFSET    (0x0004)  /* DTC Vector Base Register */
+#define DTC_DTCADMOD_OFFSET  (0x0008)  /* DTC Address Mode Register */
+#define DTC_DTCST_OFFSET     (0x000C)  /* DTC Control Register */
+#define DTC_DTCSTS_OFFSET    (0x000E)  /* DTC Status Register */
+#define DTC_DTCIBR_OFFSET    (0x0010)  /* DTC Index Table Base Register */
+#define DTC_DTCOR_OFFSET     (0x0014)  /* DTC Operation Register */
+#define DTC_DTCSQE_OFFSET    (0x0016)  /* DTC Sequence Transfer Enable Register */
+#define DTC_DTCDISP_OFFSET   (0x0018)  /* DTC Address Displacement Register */
+
+/* Bits of register DTCCR */
+
+#define DTC_DTCCR_RRS        (1 << 4)  /* DTC Transfer Information Read Skip Enable*/
+
+/* Bits of register DTCST */
+
+#define DTC_DTCST_DTCST      (1 << 0)  /* DTC Transfer Information Read Skip Enable*/
+
+/* End of DTC related defeinitions */
+
 /****************************************************************************
  * Public Types
  ****************************************************************************/

boards/renesas/rx65n/rx65n-grrose/src/rx65n_bringup.c

@@ -47,6 +47,10 @@
 #  include <nuttx/usb/cdcacm.h>
 #endif
 
+#ifdef HAVE_DTC_DRIVER
+#  include "rx65n_dtc.h"
+#endif
+
 #ifdef HAVE_RIIC_DRIVER
 #  include <nuttx/i2c/i2c_master.h>
 #  include "rx65n_riic.h"
@@ -141,6 +145,11 @@ int rx65n_bringup(void)
   (void)rx65n_sbram_int();
 #endif
 
+#ifdef HAVE_DTC_DRIVER
+  /* Initialize DTC */
+
+  (void)rx65n_dtc_initialize();
+#endif
 #if defined(CONFIG_CDCACM) && !defined(CONFIG_CDCACM_CONSOLE)
   /* Initialize CDCACM */
 

boards/renesas/rx65n/rx65n-rsk2mb/src/rx65n_bringup.c

@@ -47,6 +47,9 @@
 #  include <nuttx/usb/cdcacm.h>
 #endif
 
+#ifdef HAVE_DTC_DRIVER
+#  include "rx65n_dtc.h"
+#endif
 #ifdef HAVE_RIIC_DRIVER
 #  include <nuttx/i2c/i2c_master.h>
 #  include "rx65n_riic.h"
@@ -141,6 +144,11 @@ int rx65n_bringup(void)
   (void)rx65n_sbram_int();
 #endif
 
+#ifdef HAVE_DTC_DRIVER
+  /* Initialize DTC */
+
+  (void)rx65n_dtc_initialize();
+#endif
 #if defined(CONFIG_CDCACM) && !defined(CONFIG_CDCACM_CONSOLE)
   /* Initialize CDCACM */