SAML21: Add some parameter checking for FDPLL96M

2026-06-07 01:05:54 +08:00 · 2015-05-20 13:51:40 -06:00
parent 4ce2cb5257
commit 9489565a98
1 changed files with 8 additions and 0 deletions
@@ -226,6 +226,14 @@

 #define BOARD_DFLL48M_FREQUENCY          (48000000)

+/* Fractional Digital Phase Locked Loop configuration.
+ *
+ *   BOARD_FDPLL96M_REFCLK - See  OSCCTRL_DPLLCTRLB_REFLCK_* definitions
+ */
+
+#undef  BOARD_FDPLL96M_ENABLE
+#define BOARD_FDPLL96M_REFCLK            OSCCTRL_DPLLCTRLB_REFLCK_XOSC
+
 /* GCLK Configuration
 *
 * Global enable/disable.