mirror of
https://github.com/apache/nuttx.git
synced 2026-05-23 14:58:13 +08:00
risc-v/bl808: Add I2C driver
This change implements a driver with support for all four I2C blocks on the BL808.
This commit is contained in:
Henry Rovner
Xiang Xiao
@@ -48,7 +48,7 @@ DMA No
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EMAC No
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GPADC Yes
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GPIO Yes
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I2C No
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I2C Yes
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I2S No
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PWM No
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SPI Yes
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@@ -54,6 +54,8 @@
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/* D0 IRQs ******************************************************************/
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#define BL808_IRQ_UART3 (RISCV_IRQ_SEXT + BL808_IRQ_NUM_BASE + 4)
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#define BL808_IRQ_I2C2 (RISCV_IRQ_SEXT + BL808_IRQ_NUM_BASE + 5)
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#define BL808_IRQ_I2C3 (RISCV_IRQ_SEXT + BL808_IRQ_NUM_BASE + 6)
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#define BL808_IRQ_SPI1 (RISCV_IRQ_SEXT + BL808_IRQ_NUM_BASE + 7)
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#define BL808_IRQ_D0_IPC (RISCV_IRQ_SEXT + BL808_IRQ_NUM_BASE + 38)
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#define BL808_IRQ_TIMER1_CH0 (RISCV_IRQ_SEXT + BL808_IRQ_NUM_BASE + 61)
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@@ -68,8 +70,10 @@
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#define BL808_IRQ_UART0 (RISCV_IRQ_SEXT + BL808_IRQ_NUM_BASE + BL808_M0_IRQ_OFFSET + 28)
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#define BL808_IRQ_UART1 (RISCV_IRQ_SEXT + BL808_IRQ_NUM_BASE + BL808_M0_IRQ_OFFSET + 29)
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#define BL808_IRQ_UART2 (RISCV_IRQ_SEXT + BL808_IRQ_NUM_BASE + BL808_M0_IRQ_OFFSET + 30)
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#define BL808_IRQ_I2C0 (RISCV_IRQ_SEXT + BL808_IRQ_NUM_BASE + BL808_M0_IRQ_OFFSET + 32)
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#define BL808_IRQ_TIMER0_CH0 (RISCV_IRQ_SEXT + BL808_IRQ_NUM_BASE + BL808_M0_IRQ_OFFSET + 36)
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#define BL808_IRQ_TIMER0_CH1 (RISCV_IRQ_SEXT + BL808_IRQ_NUM_BASE + BL808_M0_IRQ_OFFSET + 37)
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#define BL808_IRQ_WDT0 (RISCV_IRQ_SEXT + BL808_IRQ_NUM_BASE + BL808_M0_IRQ_OFFSET + 38)
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#define BL808_IRQ_I2C1 (RISCV_IRQ_SEXT + BL808_IRQ_NUM_BASE + BL808_M0_IRQ_OFFSET + 39)
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#endif /* __ARCH_RISCV_INCLUDE_BL808_IRQ_H */
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@@ -106,6 +106,98 @@ config BL808_GPADC_SCAN_ORD11
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endmenu
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menuconfig BL808_I2C0
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bool "I2C 0"
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default n
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select I2C
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select I2C_DRIVER
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select ARCH_HAVE_I2CRESET
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if BL808_I2C0
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comment "Refer to datasheet for valid pin assignments"
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config BL808_I2C0_SCL
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int "SCL Pin"
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default 6
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range 0 45
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config BL808_I2C0_SDA
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int "SDA Pin"
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default 7
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range 0 45
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endif
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menuconfig BL808_I2C1
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bool "I2C 1"
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default n
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select I2C
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select I2C_DRIVER
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select ARCH_HAVE_I2CRESET
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if BL808_I2C1
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comment "Refer to datasheet for valid pin assignments"
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config BL808_I2C1_SCL
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int "SCL Pin"
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default 6
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range 0 45
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config BL808_I2C1_SDA
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int "SDA Pin"
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default 7
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range 0 45
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endif
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menuconfig BL808_I2C2
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bool "I2C 2"
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default n
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select I2C
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select I2C_DRIVER
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select ARCH_HAVE_I2CRESET
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if BL808_I2C2
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comment "Refer to datasheet for valid pin assignments"
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config BL808_I2C2_SCL
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int "SCL Pin"
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default 6
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range 0 45
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config BL808_I2C2_SDA
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int "SDA Pin"
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default 7
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range 0 45
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endif
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menuconfig BL808_I2C3
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bool "I2C 3"
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default n
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select I2C
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select I2C_DRIVER
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select ARCH_HAVE_I2CRESET
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if BL808_I2C3
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comment "Refer to datasheet for valid pin assignments"
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config BL808_I2C3_SCL
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int "SCL Pin"
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default 6
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range 0 45
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config BL808_I2C3_SDA
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int "SDA Pin"
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default 7
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range 0 45
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endif
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config BL808_UART0
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bool "UART 0"
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default n
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@@ -31,3 +31,4 @@ CHIP_CSRCS = bl808_start.c bl808_irq_dispatch.c bl808_irq.c
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CHIP_CSRCS += bl808_timerisr.c bl808_allocateheap.c
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CHIP_CSRCS += bl808_gpio.c bl808_mm_init.c bl808_pgalloc.c bl808_serial.c
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CHIP_CSRCS += bl808_gpadc.c bl808_spi.c bl808_timer.c bl808_wdt.c
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CHIP_CSRCS += bl808_i2c.c
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@@ -58,8 +58,8 @@
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#define GPIO_MODE_SHIFT (10) /* Bit 10: Port Mode */
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#define GPIO_MODE_MASK (1 << GPIO_MODE_SHIFT)
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# define GPIO_INPUT (1 << GPIO_MODE_SHIFT) /* Input Enable */
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# define GPIO_OUTPUT (0 << GPIO_MODE_SHIFT) /* Output Enable */
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#define GPIO_INPUT (1 << GPIO_MODE_SHIFT) /* Input Enable */
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#define GPIO_OUTPUT (0 << GPIO_MODE_SHIFT) /* Output Enable */
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/* Input/Output pull-ups/downs:
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*
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@@ -116,6 +116,7 @@
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#define GPIO_FUNC_SDH (0 << GPIO_FUNC_SHIFT) /* SDH */
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#define GPIO_FUNC_SPI0 (1 << GPIO_FUNC_SHIFT) /* SPI0 */
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#define GPIO_FUNC_FLASH (2 << GPIO_FUNC_SHIFT) /* Flash */
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#define GPIO_FUNC_I2C0 (5 << GPIO_FUNC_SHIFT) /* I2C0 */
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#define GPIO_FUNC_I2C1 (6 << GPIO_FUNC_SHIFT) /* I2C1 */
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#define GPIO_FUNC_UART (7 << GPIO_FUNC_SHIFT) /* UART */
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#define GPIO_FUNC_CAM (9 << GPIO_FUNC_SHIFT) /* CSI */
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@@ -123,6 +124,8 @@
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#define GPIO_FUNC_SWGPIO (11 << GPIO_FUNC_SHIFT) /* Software GPIO */
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#define GPIO_FUNC_PWM0 (16 << GPIO_FUNC_SHIFT) /* PWM0 */
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#define GPIO_FUNC_SPI1 (18 << GPIO_FUNC_SHIFT) /* SPI1 */
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#define GPIO_FUNC_I2C2 (19 << GPIO_FUNC_SHIFT) /* I2C2 */
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#define GPIO_FUNC_I2C3 (20 << GPIO_FUNC_SHIFT) /* I2C3 */
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#define GPIO_FUNC_JTAG_D0 (27 << GPIO_FUNC_SHIFT) /* JTAG */
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/****************************************************************************
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File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,70 @@
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/****************************************************************************
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* arch/risc-v/src/bl808/bl808_i2c.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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#ifndef __ARCH_RISC_V_SRC_BL808_BL808_I2C_H
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#define __ARCH_RISC_V_SRC_BL808_BL808_I2C_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/i2c/i2c_master.h>
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/****************************************************************************
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* Public Functions Prototypes
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****************************************************************************/
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/****************************************************************************
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* Name: bl808_i2cbus_initialize
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*
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* Description:
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* Initialize the selected I2C port. And return a unique instance of struct
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* struct i2c_master_s. This function may be called to obtain multiple
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* instances of the interface, each of which may be set up with a
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* different frequency and slave address.
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*
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* Input Parameter:
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* Port number (for hardware that has multiple I2C interfaces)
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*
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* Returned Value:
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* Valid I2C device structure reference on success; a NULL on failure
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*
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****************************************************************************/
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struct i2c_master_s *bl808_i2cbus_initialize(int port);
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/****************************************************************************
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* Name: bl808_i2cbus_uninitialize
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*
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* Description:
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* De-initialize the selected I2C port, and power down the device.
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*
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* Input Parameter:
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* Device structure as returned by the rp2040_i2cbus_initialize()
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*
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* Returned Value:
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* OK on success, ERROR when internal reference count mismatch or dev
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* points to invalid hardware device.
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*
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****************************************************************************/
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int bl808_i2cbus_uninitialize(struct i2c_master_s *dev);
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#endif /* __ARCH_RISC_V_SRC_BL808_BL808_I2C_H */
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@@ -44,6 +44,35 @@
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Name: m0ic_mask_irq
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*
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* Description:
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* Masks or unmasks an interrupt in the M0 Interrupt Controller.
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*
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* Input parameters:
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* irq - IRQ number to mask or unmask
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* mask - 0 to unmask (enable), 1 to mask (disable)
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*
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****************************************************************************/
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void m0ic_mask_irq(int irq, bool mask)
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{
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int m0_extirq = irq - RISCV_IRQ_EXT
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- BL808_M0_IRQ_OFFSET - BL808_IRQ_NUM_BASE;
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if (mask)
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{
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modifyreg32(BL808_M0IC_MASK(m0_extirq / 32),
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0, 1 << (m0_extirq % 32));
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}
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else
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{
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modifyreg32(BL808_M0IC_MASK(m0_extirq / 32),
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1 << (m0_extirq % 32), 0);
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}
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}
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/****************************************************************************
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* Name: m0ic_interrupt
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*
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@@ -84,6 +113,15 @@ static int __m0ic_interrupt(int irq, void *context, void *arg)
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putreg32(status_0, BL808_M0IC_CLEAR(0));
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putreg32(status_1, BL808_M0IC_CLEAR(1));
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/* M0IC interrupts respond to the rising edge of the
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* source interrupts. If the source is held high but
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* the M0IC interrupt is cleared, the interrupt
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* never happens. So, use masks to refresh the interrupt.
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*/
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m0ic_mask_irq(irqn, 1);
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m0ic_mask_irq(irqn, 0);
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return OK;
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}
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@@ -192,9 +230,7 @@ void up_disable_irq(int irq)
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&& extirq <= (BL808_M0_MAX_EXTIRQ
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+ BL808_M0_IRQ_OFFSET))
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{
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int m0_extirq = extirq - BL808_M0_IRQ_OFFSET - BL808_IRQ_NUM_BASE;
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modifyreg32(BL808_M0IC_MASK(m0_extirq / 32),
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0, 1 << (m0_extirq % 32));
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m0ic_mask_irq(irq, 1);
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}
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else
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{
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@@ -242,9 +278,7 @@ void up_enable_irq(int irq)
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&& extirq <= (BL808_M0_MAX_EXTIRQ
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+ BL808_M0_IRQ_OFFSET))
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{
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int m0_extirq = extirq - BL808_M0_IRQ_OFFSET - BL808_IRQ_NUM_BASE;
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modifyreg32(BL808_M0IC_MASK(m0_extirq / 32),
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1 << (m0_extirq % 32), 0);
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m0ic_mask_irq(irq, 0);
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}
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else
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{
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@@ -38,6 +38,7 @@
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#define BL808_GLB_UART_CFG1_OFFSET 0x154
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#define BL808_GLB_UART_CFG2_OFFSET 0x158
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#define BL808_GLB_I2C_CFG0_OFFSET 0x180
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#define BL808_GLB_SPI_CFG0_OFFSET 0x1b0
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#define BL808_GLB_PARM_CFG0_OFFSET 0x510
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@@ -47,6 +48,7 @@
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#define BL808_GLB_UART_CFG1 (BL808_GLB_BASE + BL808_GLB_UART_CFG1_OFFSET)
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#define BL808_GLB_UART_CFG2 (BL808_GLB_BASE + BL808_GLB_UART_CFG2_OFFSET)
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#define BL808_GLB_I2C_CFG0 (BL808_GLB_BASE + BL808_GLB_I2C_CFG0_OFFSET)
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#define BL808_GLB_SPI_CFG0 (BL808_GLB_BASE + BL808_GLB_SPI_CFG0_OFFSET)
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#define BL808_GLB_PARM_CFG0 (BL808_GLB_BASE + BL808_GLB_PARM_CFG0_OFFSET)
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@@ -59,6 +61,13 @@
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#define UART_CFG_SIG_SEL_SHIFT(n) ((n % 8) * 4)
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#define UART_CFG_SIG_SEL_MASK(n) (0x0f << UART_CFG_SIG_SEL_SHIFT(n))
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/* I2C_CFG0 *****************************************************************/
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#define I2C_CFG_CLK_DIV_SHIFT 16
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#define I2C_CFG_CLK_DIV_MASK (0xff << I2C_CFG_CLK_DIV_SHIFT)
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#define I2C_CFG_CLK_EN (1 << 24)
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#define I2C_CFG_CLK_XTAL (1 << 25)
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/* SPI_CFG0 *****************************************************************/
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#define SPI_CFG_CLK_DIV_SHIFT 0
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@@ -0,0 +1,117 @@
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/****************************************************************************
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* arch/risc-v/src/bl808/hardware/bl808_i2c.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
|
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* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership. The
|
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||
* "License"); you may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at
|
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*
|
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* http://www.apache.org/licenses/LICENSE-2.0
|
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*
|
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* Unless required by applicable law or agreed to in writing, software
|
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
* License for the specific language governing permissions and limitations
|
||||
* under the License.
|
||||
*
|
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****************************************************************************/
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#ifndef __ARCH_RISCV_SRC_BL808_HARDWARE_BL808_I2C_H
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#define __ARCH_RISCV_SRC_BL808_HARDWARE_BL808_I2C_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include "bl808_memorymap.h"
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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#define BL808_I2C_BASE(n) (((n) == 0) ? BL808_I2C0_BASE \
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: ((n) == 1) ? BL808_I2C1_BASE \
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: ((n) == 2) ? BL808_I2C2_BASE \
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: BL808_I2C3_BASE)
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/* Register offsets *********************************************************/
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#define BL808_I2C_CONFIG_OFFSET 0x00
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#define BL808_I2C_INT_STS_OFFSET 0x04
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#define BL808_I2C_SUB_ADDR_OFFSET 0x08
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#define BL808_I2C_BUSY_OFFSET 0x0c
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#define BL808_I2C_PRD_START_OFFSET 0x10
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#define BL808_I2C_PRD_STOP_OFFSET 0x14
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#define BL808_I2C_PRD_DATA_OFFSET 0x18
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#define BL808_I2C_FIFO_CONFIG_0_OFFSET 0x80
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#define BL808_I2C_FIFO_CONFIG_1_OFFSET 0x84
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#define BL808_I2C_WDATA_OFFSET 0x88
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#define BL808_I2C_RDATA_OFFSET 0X8c
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/* Register definitions *****************************************************/
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#define BL808_I2C_CONFIG(n) (BL808_I2C_BASE(n) + BL808_I2C_CONFIG_OFFSET)
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#define BL808_I2C_INT_STS(n) (BL808_I2C_BASE(n) + BL808_I2C_INT_STS_OFFSET)
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#define BL808_I2C_SUB_ADDR(n) (BL808_I2C_BASE(n) + BL808_I2C_SUB_ADDR_OFFSET)
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#define BL808_I2C_BUSY(n) (BL808_I2C_BASE(n) + BL808_I2C_BUSY_OFFSET)
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#define BL808_I2C_PRD_START(n) (BL808_I2C_BASE(n) + BL808_I2C_PRD_START_OFFSET)
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#define BL808_I2C_PRD_STOP(n) (BL808_I2C_BASE(n) + BL808_I2C_PRD_STOP_OFFSET)
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#define BL808_I2C_PRD_DATA(n) (BL808_I2C_BASE(n) + BL808_I2C_PRD_DATA_OFFSET)
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#define BL808_I2C_FIFO_CONFIG_0(n) (BL808_I2C_BASE(n) + BL808_I2C_FIFO_CONFIG_0_OFFSET)
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#define BL808_I2C_FIFO_CONFIG_1(n) (BL808_I2C_BASE(n) + BL808_I2C_FIFO_CONFIG_1_OFFSET)
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#define BL808_I2C_WDATA(n) (BL808_I2C_BASE(n) + BL808_I2C_WDATA_OFFSET)
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#define BL808_I2C_RDATA(n) (BL808_I2C_BASE(n) + BL808_I2C_RDATA_OFFSET)
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/* Register bit definitions *************************************************/
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|
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/* I2C_CONFIG */
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||||
|
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#define I2C_M_EN (1 << 0)
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#define I2C_DIR_R (1 << 1)
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#define I2C_SUB_ADDR_EN (1 << 4)
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#define I2C_SUB_ADDR_LEN_SHIFT (5)
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||||
#define I2C_SUB_ADDR_LEN_MASK (0x3 << I2C_SUB_ADDR_LEN_SHIFT)
|
||||
#define I2C_10B_ADDR_EN (1 << 7)
|
||||
#define I2C_SLV_ADDR_SHIFT (8)
|
||||
#define I2C_SLV_ADDR_MASK (0x3ff << I2C_SLV_ADDR_SHIFT)
|
||||
#define I2C_PKT_LEN_SHIFT (20)
|
||||
#define I2C_PKT_LEN_MASK (0xff << I2C_PKT_LEN_SHIFT)
|
||||
|
||||
/* I2C_INT_STS */
|
||||
|
||||
#define I2C_END_INT (1 << 0)
|
||||
#define I2C_TX_FIFO_RDY_INT (1 << 1)
|
||||
#define I2C_RX_FIFO_RDY_INT (1 << 2)
|
||||
#define I2C_NAK_INT (1 << 3)
|
||||
#define I2C_ARB_INT (1 << 4)
|
||||
#define I2C_FIFO_ERROR_INT (1 << 5)
|
||||
#define I2C_END_MASK (1 << 8)
|
||||
#define I2C_TX_FIFO_RDY_MASK (1 << 9)
|
||||
#define I2C_RX_FIFO_RDY_MASK (1 << 10)
|
||||
#define I2C_NAK_MASK (1 << 11)
|
||||
#define I2C_ARB_MASK (1 << 12)
|
||||
#define I2C_FIFO_ERROR_MASK (1 << 13)
|
||||
#define I2C_END_CLR (1 << 16)
|
||||
#define I2C_NAK_CLR (1 << 19)
|
||||
#define I2C_ARB_CLR (1 << 20)
|
||||
|
||||
/* I2C_PRD_x */
|
||||
|
||||
#define I2C_PRD_PH0_SHIFT (0)
|
||||
#define I2C_PRD_PH0_MASK (0xff << I2C_PRD_PH0_SHIFT)
|
||||
#define I2C_PRD_PH1_SHIFT (8)
|
||||
#define I2C_PRD_PH1_MASK (0xff << I2C_PRD_PH1_SHIFT)
|
||||
#define I2C_PRD_PH2_SHIFT (16)
|
||||
#define I2C_PRD_PH2_MASK (0xff << I2C_PRD_PH2_SHIFT)
|
||||
#define I2C_PRD_PH3_SHIFT (24)
|
||||
#define I2C_PRD_PH3_MASK (0xff << I2C_PRD_PH3_SHIFT)
|
||||
|
||||
/* I2C_FIFO_CONFIG_0 */
|
||||
|
||||
#define TX_FIFO_CLR (1 << 2)
|
||||
#define RX_FIFO_CLR (1 << 3)
|
||||
|
||||
#endif /* __ARCH_RISCV_SRC_BL808_HARDWARE_BL808_I2C_H */
|
||||
@@ -36,10 +36,14 @@
|
||||
#define BL808_UART0_BASE 0x2000a000ul
|
||||
#define BL808_UART1_BASE 0x2000a100ul
|
||||
#define BL808_SPI0_BASE 0x2000a200ul
|
||||
#define BL808_I2C0_BASE 0x2000a300ul
|
||||
#define BL808_TIMER0_BASE 0x2000a500ul
|
||||
#define BL808_I2C1_BASE 0x2000a900ul
|
||||
#define BL808_UART2_BASE 0x2000aa00ul
|
||||
#define BL808_AON_BASE 0x2000f000ul
|
||||
#define BL808_UART3_BASE 0x30002000ul
|
||||
#define BL808_I2C2_BASE 0x30003000ul
|
||||
#define BL808_I2C3_BASE 0x30004000ul
|
||||
#define BL808_MM_GLB_BASE 0x30007000ul
|
||||
#define BL808_SPI1_BASE 0x30008000ul
|
||||
#define BL808_TIMER1_BASE 0x30009000ul
|
||||
|
||||
@@ -36,20 +36,31 @@
|
||||
|
||||
/* Register offsets *********************************************************/
|
||||
|
||||
#define BL808_MM_GLB_CLK_CTRL_CPU_OFFSET 0x00
|
||||
#define BL808_MM_GLB_CLK_CTRL_PERI_OFFSET 0x10
|
||||
#define BL808_MM_GLB_CLK_CTRL_PERI3_OFFSET 0x18
|
||||
|
||||
/* Register definitions *****************************************************/
|
||||
|
||||
#define BL808_MM_GLB_CLK_CTRL_CPU (BL808_MM_GLB_BASE \
|
||||
+ BL808_MM_GLB_CLK_CTRL_CPU_OFFSET)
|
||||
#define BL808_MM_GLB_CLK_CTRL_PERI (BL808_MM_GLB_BASE \
|
||||
+ BL808_MM_GLB_CLK_CTRL_PERI_OFFSET)
|
||||
#define BL808_MM_GLB_CLK_CTRL_PERI3 (BL808_MM_GLB_BASE \
|
||||
+ BL808_MM_GLB_CLK_CTRL_PERI3_OFFSET)
|
||||
|
||||
/* Register bit definitions *************************************************/
|
||||
|
||||
/* CLK_CTRL_CPU */
|
||||
|
||||
#define CLK_CTRL_CPU_I2C_CLK_XTAL (1 << 6)
|
||||
|
||||
/* CLK_CTRL_PERI ************************************************************/
|
||||
|
||||
#define CLK_CTRL_PERI_I2C0_DIV_SHIFT 0
|
||||
#define CLK_CTRL_PERI_I2C0_DIV_MASK (0xff << CLK_CTRL_PERI_I2C0_DIV_SHIFT)
|
||||
#define CLK_CTRL_PERI_I2C0_EN_SHIFT 9
|
||||
#define CLK_CTRL_PERI_I2C0_DIV_EN (1 << 8)
|
||||
#define CLK_CTRL_PERI_I2C0_EN (1 << 9)
|
||||
#define CLK_CTRL_PERI_UART_DIV_EN_SHIFT 16
|
||||
#define CLK_CTRL_PERI_UART_DIV_SHIFT 17
|
||||
#define CLK_CTRL_PERI_UART_DIV_MASK (0x07 << CLK_CTRL_PERI_UART_DIV_SHIFT)
|
||||
@@ -57,4 +68,11 @@
|
||||
#define CLK_CTRL_PERI_SPI_DIV_SHIFT 24
|
||||
#define CLK_CTRL_PERI_SPI_DIV_MASK (0xff << CLK_CTRL_PERI_SPI_DIV_SHIFT)
|
||||
|
||||
/* CLK_CTRL_PERI3 ***********************************************************/
|
||||
|
||||
#define CLK_CTRL_PERI_I2C1_DIV_SHIFT 0
|
||||
#define CLK_CTRL_PERI_I2C1_DIV_MASK (0xff << CLK_CTRL_PERI_I2C0_DIV_SHIFT)
|
||||
#define CLK_CTRL_PERI_I2C1_DIV_EN (1 << 8)
|
||||
#define CLK_CTRL_PERI_I2C1_EN (1 << 9)
|
||||
|
||||
#endif /* __ARCH_RISCV_SRC_BL808_HARDWARE_BL808_MM_GLB_H */
|
||||
|
||||
@@ -40,6 +40,10 @@
|
||||
#ifdef CONFIG_USERLED
|
||||
#include <nuttx/leds/userled.h>
|
||||
#endif
|
||||
#if defined(CONFIG_BL808_I2C0) || defined(CONFIG_BL808_I2C1) \
|
||||
|| defined(CONFIG_BL808_I2C2) || defined(CONFIG_BL808_I2C3)
|
||||
#include "bl808_i2c.h"
|
||||
#endif
|
||||
#if defined(CONFIG_BL808_SPI0) || defined(CONFIG_BL808_SPI1)
|
||||
#include "bl808_spi.h"
|
||||
#endif
|
||||
@@ -179,6 +183,26 @@ void board_late_initialize(void)
|
||||
bl808_gpadc_init();
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_BL808_I2C0
|
||||
struct i2c_master_s *i2c0 = bl808_i2cbus_initialize(0);
|
||||
i2c_register(i2c0, 0);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_BL808_I2C1
|
||||
struct i2c_master_s *i2c1 = bl808_i2cbus_initialize(1);
|
||||
i2c_register(i2c1, 1);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_BL808_I2C2
|
||||
struct i2c_master_s *i2c2 = bl808_i2cbus_initialize(2);
|
||||
i2c_register(i2c2, 2);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_BL808_I2C3
|
||||
struct i2c_master_s *i2c3 = bl808_i2cbus_initialize(3);
|
||||
i2c_register(i2c3, 3);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_BL808_SPI0
|
||||
struct spi_dev_s *spi0 = bl808_spibus_initialize(0);
|
||||
spi_register(spi0, 0);
|
||||
|
||||
Reference in New Issue
Block a user