Add SSP driver

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2746 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo
2010-06-14 23:14:20 +00:00
parent 2b587ee7a8
commit 9207b2dee1
5 changed files with 904 additions and 3 deletions
+1 -1
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@@ -53,7 +53,7 @@ CMN_CSRCS = up_assert.c up_blocktask.c up_copystate.c up_createstack.c \
CHIP_ASRCS =
CHIP_CSRCS = lpc17_allocateheap.c lpc17_clockconfig.c lpc17_gpio.c \
lpc17_gpioint.c lpc17_irq.c lpc17_lowputc.c lpc17_serial.c \
lpc17_start.c lpc17_timerisr.c
lpc17_ssp.c lpc17_start.c lpc17_timerisr.c
# Configuration-dependent LPC17xx files
+67 -2
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@@ -205,7 +205,7 @@
#define GPIO_SSP1_MISO (GPIO_ALT2 | GPIO_PULLUP | GPIO_PORT0 | GPIO_PIN8)
#define GPIO_MAT2p2 (GPIO_ALT3 | GPIO_PULLUP | GPIO_PORT0 | GPIO_PIN8)
#define GPIO_I2S_TXSDA_1 (GPIO_ALT1 | GPIO_PULLUP | GPIO_PORT0 | GPIO_PIN9)
#define GPIO_MOSI1 (GPIO_ALT2 | GPIO_PULLUP | GPIO_PORT0 | GPIO_PIN9)
#define GPIO_SSP1_MOSI (GPIO_ALT2 | GPIO_PULLUP | GPIO_PORT0 | GPIO_PIN9)
#define GPIO_MAT2p3 (GPIO_ALT3 | GPIO_PULLUP | GPIO_PORT0 | GPIO_PIN9)
#define GPIO_UART2_TXD_1 (GPIO_ALT1 | GPIO_PULLUP | GPIO_PORT0 | GPIO_PIN10)
#define GPIO_I2C2_SDA (GPIO_ALT2 | GPIO_PULLUP | GPIO_PORT0 | GPIO_PIN10)
@@ -224,7 +224,7 @@
#define GPIO_SPI_MISO (GPIO_ALT3 | GPIO_PULLUP | GPIO_PORT0 | GPIO_PIN17)
#define GPIO_UART1_DCD_1 (GPIO_ALT1 | GPIO_PULLUP | GPIO_PORT0 | GPIO_PIN18)
#define GPIO_SSP0_MOSI_1 (GPIO_ALT2 | GPIO_PULLUP | GPIO_PORT0 | GPIO_PIN18)
#define GPIO_MOSI (GPIO_ALT3 | GPIO_PULLUP | GPIO_PORT0 | GPIO_PIN18)
#define GPIO_SPI_MOSI (GPIO_ALT3 | GPIO_PULLUP | GPIO_PORT0 | GPIO_PIN18)
#define GPIO_UART1_DSR_1 (GPIO_ALT1 | GPIO_PULLUP | GPIO_PORT0 | GPIO_PIN19)
#define GPIO_I2C1_SDA_2 (GPIO_ALT3 | GPIO_PULLUP | GPIO_PORT0 | GPIO_PIN19)
#define GPIO_UART1_DTR_1 (GPIO_ALT1 | GPIO_PULLUP | GPIO_PORT0 | GPIO_PIN20)
@@ -495,6 +495,71 @@ EXTERN int lpc17_dumpgpio(uint32_t pinset, const char *msg);
# define lpc17_dumpgpio(p,m)
#endif
/************************************************************************************
* Name: lpc17_spi/ssp0/ssp1select and lpc17_spi/ssp0/ssp1status
*
* Description:
* The external functions, lpc17_spi/ssp0/ssp1select and lpc17_spi/ssp0/ssp1status
* must be provided by board-specific logic. They are implementations of the select
* and status methods of the SPI interface defined by struct spi_ops_s (see
* include/nuttx/spi.h). All other methods (including up_spiinitialize())
* are provided by common LPC17xx logic. To use this common SPI logic on your
* board:
*
* 1. Provide logic in lpc17_boardinitialize() to configure SPI/SSP chip select
* pins.
* 2. Provide lpc17_spi/ssp0/ssp1select() and lpc17_spi/ssp0/ssp1status() functions
* in your board-specific logic. These functions will perform chip selection
* and status operations using GPIOs in the way your board is configured.
* 3. Add a calls to up_spiinitialize() in your low level application
* initialization logic
* 4. The handle returned by up_spiinitialize() may then be used to bind the
* SPI driver to higher level logic (e.g., calling
* mmcsd_spislotinitialize(), for example, will bind the SPI driver to
* the SPI MMC/SD driver).
*
************************************************************************************/
struct spi_dev_s;
enum spi_dev_e;
#ifdef CONFIG_LPC17_SPI
EXTERN void lpc17_spiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
EXTERN uint8_t lpc17_spistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
#endif
#ifdef CONFIG_LPC17_SSP0
EXTERN void lpc17_ssp0select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
EXTERN uint8_t lpc17_ssp0status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
#endif
#ifdef CONFIG_LPC17_SSP1
EXTERN void lpc17_ssp1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
EXTERN uint8_t lpc17_ssp1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
#endif
/****************************************************************************
* Name: ssp_flush
*
* Description:
* Flush and discard any words left in the RX fifo. This can be called
* from ssp0/1select after a device is deselected (if you worry about such
* things).
*
* Input Parameters:
* dev - Device-specific state data
*
* Returned Value:
* None
*
****************************************************************************/
struct spi_dev_s;
#ifdef CONFIG_LPC17_SPI
EXTERN void spi_flush(FAR struct spi_dev_s *dev);
#endif
#if defined(CONFIG_LPC17_SSP0) || defined(CONFIG_LPC17_SSP1)
EXTERN void ssp_flush(FAR struct spi_dev_s *dev);
#endif
#undef EXTERN
#if defined(__cplusplus)
}
+815
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+3
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@@ -48,6 +48,9 @@
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/* 8 frame FIFOs for both transmit and receive */
#define LPC17_SSP_FIFOSZ 8
/* Register offsets *****************************************************************/
+18
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@@ -140,6 +140,7 @@
#define LED_PANIC 7 /* RED RED NC (1Hz flashing) */
/* Alternate pin selections *********************************************************/
/* UART1 -- Not connected */
#define GPIO_UART1_TXD GPIO_UART1_TXD_1
#define GPIO_UART1_RXD GPIO_UART1_RXD_1
@@ -150,12 +151,29 @@
#define GPIO_UART1_RI GPIO_UART1_RI_1
#define GPIO_UART1_RTS GPIO_UART1_RTS_1
/* UART2 -- Not connected */
#define GPIO_UART2_TXD GPIO_UART2_TXD_1
#define GPIO_UART2_RXD GPIO_UART2_RXD_1
/* UART3 -- Not connected */
#define GPIO_UART3_TXD GPIO_UART3_TXD_1
#define GPIO_UART3_RXD GPIO_UART3_RXD_1
/* Either SPI or SSP0 can drive the MMC/SD slot (SSP0 alternate pin settings are
* not connected)
*/
#define GPIO_SSP0_SCK GPIO_SSP0_SCK_1
#define GPIO_SSP0_SSEL GPIO_SSP0_SSEL_1
#define GPIO_SSP0_MISO GPIO_SSP0_MISO_1
#define GPIO_SSP0_MOSI GPIO_SSP0_MOSI_1
/* SSP1 */
#define GPIO_SSP1_SCK GPIO_SSP1_SCK_1
/************************************************************************************
* Public Data
************************************************************************************/