mirror of
https://github.com/apache/nuttx.git
synced 2026-06-06 08:36:24 +08:00
Add SSP driver
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2746 42af7a65-404d-4744-a932-0658087f49c3
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@@ -53,7 +53,7 @@ CMN_CSRCS = up_assert.c up_blocktask.c up_copystate.c up_createstack.c \
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CHIP_ASRCS =
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CHIP_CSRCS = lpc17_allocateheap.c lpc17_clockconfig.c lpc17_gpio.c \
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lpc17_gpioint.c lpc17_irq.c lpc17_lowputc.c lpc17_serial.c \
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lpc17_start.c lpc17_timerisr.c
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lpc17_ssp.c lpc17_start.c lpc17_timerisr.c
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# Configuration-dependent LPC17xx files
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@@ -205,7 +205,7 @@
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#define GPIO_SSP1_MISO (GPIO_ALT2 | GPIO_PULLUP | GPIO_PORT0 | GPIO_PIN8)
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#define GPIO_MAT2p2 (GPIO_ALT3 | GPIO_PULLUP | GPIO_PORT0 | GPIO_PIN8)
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#define GPIO_I2S_TXSDA_1 (GPIO_ALT1 | GPIO_PULLUP | GPIO_PORT0 | GPIO_PIN9)
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#define GPIO_MOSI1 (GPIO_ALT2 | GPIO_PULLUP | GPIO_PORT0 | GPIO_PIN9)
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#define GPIO_SSP1_MOSI (GPIO_ALT2 | GPIO_PULLUP | GPIO_PORT0 | GPIO_PIN9)
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#define GPIO_MAT2p3 (GPIO_ALT3 | GPIO_PULLUP | GPIO_PORT0 | GPIO_PIN9)
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#define GPIO_UART2_TXD_1 (GPIO_ALT1 | GPIO_PULLUP | GPIO_PORT0 | GPIO_PIN10)
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#define GPIO_I2C2_SDA (GPIO_ALT2 | GPIO_PULLUP | GPIO_PORT0 | GPIO_PIN10)
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@@ -224,7 +224,7 @@
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#define GPIO_SPI_MISO (GPIO_ALT3 | GPIO_PULLUP | GPIO_PORT0 | GPIO_PIN17)
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#define GPIO_UART1_DCD_1 (GPIO_ALT1 | GPIO_PULLUP | GPIO_PORT0 | GPIO_PIN18)
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#define GPIO_SSP0_MOSI_1 (GPIO_ALT2 | GPIO_PULLUP | GPIO_PORT0 | GPIO_PIN18)
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#define GPIO_MOSI (GPIO_ALT3 | GPIO_PULLUP | GPIO_PORT0 | GPIO_PIN18)
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#define GPIO_SPI_MOSI (GPIO_ALT3 | GPIO_PULLUP | GPIO_PORT0 | GPIO_PIN18)
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#define GPIO_UART1_DSR_1 (GPIO_ALT1 | GPIO_PULLUP | GPIO_PORT0 | GPIO_PIN19)
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#define GPIO_I2C1_SDA_2 (GPIO_ALT3 | GPIO_PULLUP | GPIO_PORT0 | GPIO_PIN19)
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#define GPIO_UART1_DTR_1 (GPIO_ALT1 | GPIO_PULLUP | GPIO_PORT0 | GPIO_PIN20)
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@@ -495,6 +495,71 @@ EXTERN int lpc17_dumpgpio(uint32_t pinset, const char *msg);
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# define lpc17_dumpgpio(p,m)
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#endif
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/************************************************************************************
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* Name: lpc17_spi/ssp0/ssp1select and lpc17_spi/ssp0/ssp1status
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*
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* Description:
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* The external functions, lpc17_spi/ssp0/ssp1select and lpc17_spi/ssp0/ssp1status
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* must be provided by board-specific logic. They are implementations of the select
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* and status methods of the SPI interface defined by struct spi_ops_s (see
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* include/nuttx/spi.h). All other methods (including up_spiinitialize())
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* are provided by common LPC17xx logic. To use this common SPI logic on your
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* board:
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*
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* 1. Provide logic in lpc17_boardinitialize() to configure SPI/SSP chip select
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* pins.
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* 2. Provide lpc17_spi/ssp0/ssp1select() and lpc17_spi/ssp0/ssp1status() functions
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* in your board-specific logic. These functions will perform chip selection
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* and status operations using GPIOs in the way your board is configured.
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* 3. Add a calls to up_spiinitialize() in your low level application
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* initialization logic
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* 4. The handle returned by up_spiinitialize() may then be used to bind the
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* SPI driver to higher level logic (e.g., calling
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* mmcsd_spislotinitialize(), for example, will bind the SPI driver to
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* the SPI MMC/SD driver).
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*
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************************************************************************************/
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struct spi_dev_s;
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enum spi_dev_e;
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#ifdef CONFIG_LPC17_SPI
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EXTERN void lpc17_spiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
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EXTERN uint8_t lpc17_spistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
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#endif
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#ifdef CONFIG_LPC17_SSP0
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EXTERN void lpc17_ssp0select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
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EXTERN uint8_t lpc17_ssp0status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
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#endif
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#ifdef CONFIG_LPC17_SSP1
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EXTERN void lpc17_ssp1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
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EXTERN uint8_t lpc17_ssp1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
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#endif
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/****************************************************************************
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* Name: ssp_flush
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*
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* Description:
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* Flush and discard any words left in the RX fifo. This can be called
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* from ssp0/1select after a device is deselected (if you worry about such
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* things).
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*
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* Input Parameters:
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* dev - Device-specific state data
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*
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* Returned Value:
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* None
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*
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****************************************************************************/
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struct spi_dev_s;
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#ifdef CONFIG_LPC17_SPI
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EXTERN void spi_flush(FAR struct spi_dev_s *dev);
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#endif
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#if defined(CONFIG_LPC17_SSP0) || defined(CONFIG_LPC17_SSP1)
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EXTERN void ssp_flush(FAR struct spi_dev_s *dev);
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#endif
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#undef EXTERN
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#if defined(__cplusplus)
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}
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Executable
+815
File diff suppressed because it is too large
Load Diff
@@ -48,6 +48,9 @@
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/************************************************************************************
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* Pre-processor Definitions
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************************************************************************************/
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/* 8 frame FIFOs for both transmit and receive */
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#define LPC17_SSP_FIFOSZ 8
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/* Register offsets *****************************************************************/
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@@ -140,6 +140,7 @@
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#define LED_PANIC 7 /* RED RED NC (1Hz flashing) */
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/* Alternate pin selections *********************************************************/
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/* UART1 -- Not connected */
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#define GPIO_UART1_TXD GPIO_UART1_TXD_1
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#define GPIO_UART1_RXD GPIO_UART1_RXD_1
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@@ -150,12 +151,29 @@
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#define GPIO_UART1_RI GPIO_UART1_RI_1
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#define GPIO_UART1_RTS GPIO_UART1_RTS_1
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/* UART2 -- Not connected */
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#define GPIO_UART2_TXD GPIO_UART2_TXD_1
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#define GPIO_UART2_RXD GPIO_UART2_RXD_1
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/* UART3 -- Not connected */
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#define GPIO_UART3_TXD GPIO_UART3_TXD_1
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#define GPIO_UART3_RXD GPIO_UART3_RXD_1
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/* Either SPI or SSP0 can drive the MMC/SD slot (SSP0 alternate pin settings are
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* not connected)
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*/
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#define GPIO_SSP0_SCK GPIO_SSP0_SCK_1
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#define GPIO_SSP0_SSEL GPIO_SSP0_SSEL_1
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#define GPIO_SSP0_MISO GPIO_SSP0_MISO_1
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#define GPIO_SSP0_MOSI GPIO_SSP0_MOSI_1
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/* SSP1 */
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#define GPIO_SSP1_SCK GPIO_SSP1_SCK_1
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/************************************************************************************
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* Public Data
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************************************************************************************/
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