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All files and functions beginning with lm_ changed to tiva_

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This commit is contained in:
Gregory Nutt
2014-03-08 13:29:09 -06:00
parent 88c2da5bc1
commit 8f5dfc3541
40 changed files with 657 additions and 768 deletions
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arch/arm/src/tiva/Kconfig
+1 -1
View File
@@ -195,7 +195,7 @@ config LM_BOARDMAC
default n
---help---
If the board-specific logic can provide a MAC address (via
lm_ethernetmac()), then this should be selected.
tiva_ethernetmac()), then this should be selected.
config LM_ETHHDUPLEX
bool "Force Half Duplex"
arch/arm/src/tiva/Make.defs
+7 -7
View File
@@ -33,7 +33,7 @@
#
############################################################################
HEAD_ASRC = lm_vectors.S
HEAD_ASRC = tiva_vectors.S
CMN_ASRCS = up_saveusercontext.S up_fullcontextrestore.S up_switchcontext.S
CMN_ASRCS += vfork.S
@@ -69,18 +69,18 @@ CMN_CSRCS += up_elf.c
endif
CHIP_ASRCS =
CHIP_CSRCS = lm_allocateheap.c lm_start.c lm_syscontrol.c lm_irq.c
CHIP_CSRCS += lm_gpio.c lm_gpioirq.c lm_timerisr.c lm_lowputc.c lm_serial.c
CHIP_CSRCS += lm_ssi.c lm_dumpgpio.c
CHIP_CSRCS = tiva_allocateheap.c tiva_start.c tiva_syscontrol.c tiva_irq.c
CHIP_CSRCS += tiva_gpio.c tiva_gpioirq.c tiva_timerisr.c tiva_lowputc.c
CHIP_CSRCS += tiva_serial.c tiva_ssi.c tiva_dumpgpio.c
ifeq ($(CONFIG_NUTTX_KERNEL),y)
CHIP_CSRCS += lm_userspace.c lm_mpuinit.c
CHIP_CSRCS += tiva_userspace.c tiva_mpuinit.c
endif
ifdef CONFIG_NET
CHIP_CSRCS += lm_ethernet.c
CHIP_CSRCS += tiva_ethernet.c
endif
ifdef CONFIG_LM_FLASH
CHIP_CSRCS += lm_flash.c
CHIP_CSRCS += tiva_flash.c
endif
arch/arm/src/tiva/chip.h
+8 -8
View File
@@ -45,14 +45,14 @@
/* Then get all of the register definitions */
#include "chip/lm_memorymap.h" /* Memory map */
#include "chip/lm_syscontrol.h" /* System control module */
#include "chip/lm_gpio.h" /* GPIO modules */
#include "chip/lm_uart.h" /* UART modules */
#include "chip/lm_i2c.h" /* I2C modules */
#include "chip/lm_ssi.h" /* SSI modules */
#include "chip/lm_ethernet.h" /* Ethernet MAC and PHY */
#include "chip/lm_flash.h" /* FLASH */
#include "chip/tiva_memorymap.h" /* Memory map */
#include "chip/tiva_syscontrol.h" /* System control module */
#include "chip/tiva_gpio.h" /* GPIO modules */
#include "chip/tiva_uart.h" /* UART modules */
#include "chip/tiva_i2c.h" /* I2C modules */
#include "chip/tiva_ssi.h" /* SSI modules */
#include "chip/tiva_ethernet.h" /* Ethernet MAC and PHY */
#include "chip/tiva_flash.h" /* FLASH */
/************************************************************************************
* Pre-processor Definitions
arch/arm/src/tiva/chip/lm3s_pinmap.h
+1 -1
View File
@@ -46,7 +46,7 @@
* Pre-processor Definitions
************************************************************************************/
/* The following lists the input value to lm_configgpio to setup the alternate,
/* The following lists the input value to tiva_configgpio to setup the alternate,
* hardware function for each pin.
*/
arch/arm/src/tiva/chip/lm3s_vectors.h
+2 -2
View File
@@ -41,10 +41,10 @@
* Vectors
************************************************************************************/
/* This file is included by lm_vectors.S. It provides the macro VECTOR that
/* This file is included by tiva_vectors.S. It provides the macro VECTOR that
* supplies ach Stellaris vector in terms of a (lower-case) ISR label and an
* (upper-case) IRQ number as defined in arch/arm/include/lm/lm3s_irq.h.
* lm_vectors.S will define the VECTOR in different ways in order to generate
* tiva_vectors.S will define the VECTOR in different ways in order to generate
* the interrupt vectors and handlers in their final form.
*/
arch/arm/src/tiva/chip/lm_epi.h
-113
View File
@@ -1,113 +0,0 @@
/************************************************************************************
* arch/arm/src/tiva/chip/lm_epi.h
*
* Copyright (C) 2009-2013 Max Neklyudov. All rights reserved.
* Author: Max Neklyudov <macscomp@gmail.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_CHIP_LM_EPI_H
#define __ARCH_ARM_SRC_TIVA_CHIP_LM_EPI_H
/************************************************************************************
* Included Files
************************************************************************************/
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/* External Peripheral Interface Register Offsets ***********************************/
#define LM_EPI_CFG_OFFSET 0x000
#define LM_EPI_SDRAMCFG_OFFSET 0x010
#define LM_EPI_ADDRMAP_OFFSET 0x01C
#define LM_EPI_STAT_OFFSET 0x060
#define LM_EPI_BAUD_OFFSET 0x004
/* External Peripheral Interface Register Addresses *********************************/
#define LM_EPI0_CFG (LM_EPI0_BASE + LM_EPI_CFG_OFFSET)
#define LM_EPI0_SDRAMCFG (LM_EPI0_BASE + LM_EPI_SDRAMCFG_OFFSET)
#define LM_EPI0_ADDRMAP (LM_EPI0_BASE + LM_EPI_ADDRMAP_OFFSET)
#define LM_EPI0_STAT (LM_EPI0_BASE + LM_EPI_STAT_OFFSET)
#define LM_EPI0_BAUD (LM_EPI0_BASE + LM_EPI_BAUD_OFFSET)
/* External Peripheral Interface Register Bit Definitions ***************************/
/* EPI Configuration (EPICFG), offset 0x000 */
#define EPI_CFG_MODE_SHIFT 0 /* Bits 3-0: Mode Select */
#define EPI_CFG_MODE_MASK (0x1f << EPI_CFG_MODE_SHIFT)
# define EPI_CFG_MODE_SDRAM (0x11 << EPI_CFG_MODE_SHIFT) /* SDRAM + BLKEN */
/* EPI Address Map (EPIADDRMAP), offset 0x01C */
#define EPI_ADDRMAP_ERADR_SHIFT 0 /* Bits 1-0: External RAM Address */
#define EPI_ADDRMAP_ERADR_MASK (0x3 << EPI_ADDRMAP_ERADR_SHIFT)
# define EPI_ADDRMAP_ERADR_6 (0x1 << EPI_ADDRMAP_ERADR_SHIFT)
# define EPI_ADDRMAP_ERADR_8 (0x2 << EPI_ADDRMAP_ERADR_SHIFT)
#define EPI_ADDRMAP_ERSZ_SHIFT 2 /* Bits 3-2: External RAM Size */
#define EPI_ADDRMAP_ERSZ_MASK (0x3 << EPI_ADDRMAP_ERSZ_SHIFT)
# define EPI_ADDRMAP_ERSZ_256B (0x0 << EPI_ADDRMAP_ERSZ_SHIFT)
# define EPI_ADDRMAP_ERSZ_64KB (0x1 << EPI_ADDRMAP_ERSZ_SHIFT)
# define EPI_ADDRMAP_ERSZ_16MB (0x2 << EPI_ADDRMAP_ERSZ_SHIFT)
# define EPI_ADDRMAP_ERSZ_512MB (0x3 << EPI_ADDRMAP_ERSZ_SHIFT)
/* EPI Status (EPISTAT), offset 0x060 */
#define EPI_STAT_INITSEQ_SHIFT 6 /* Bits 6: Initialization Sequence */
#define EPI_STAT_INITSEQ_MASK (0x1 << EPI_STAT_INITSEQ_SHIFT)
/* EPI SDRAM Configuration (EPISDRAMCFG), offset 0x010 */
#define EPI_SDRAMCFG_SIZE_SHIFT 0 /* Bits 1-0: Size of SDRAM */
#define EPI_SDRAMCFG_SIZE_MASK (3 << EPI_SDRAMCFG_SIZE_SHIFT)
# define EPI_SDRAMCFG_SIZE_8MB (0x0 << EPI_SDRAMCFG_SIZE_SHIFT)
# define EPI_SDRAMCFG_SIZE_16MB (0x1 << EPI_SDRAMCFG_SIZE_SHIFT)
# define EPI_SDRAMCFG_SIZE_32MB (0x2 << EPI_SDRAMCFG_SIZE_SHIFT)
# define EPI_SDRAMCFG_SIZE_64MB (0x3 << EPI_SDRAMCFG_SIZE_SHIFT)
#define EPI_SDRAMCFG_RFSH_SHIFT 16 /* Bits 26-16: Refresh Counter */
#define EPI_SDRAMCFG_RFSH_MASK (0x7FF << EPI_SDRAMCFG_RFSH_SHIFT)
# define EPI_SDRAMCFG_RFSH(n) ((n) << EPI_SDRAMCFG_RFSH_SHIFT)
#define EPI_SDRAMCFG_FREQ_SHIFT 30 /* EPI Frequency Range */
#define EPI_SDRAMCFG_FREQ_MASK (3 << EPI_SDRAMCFG_FREQ_SHIFT)
# define EPI_SDRAMCFG_FREQ_0_15MHZ (0x0 << EPI_SDRAMCFG_FREQ_SHIFT)
# define EPI_SDRAMCFG_FREQ_15_30MHZ (0x1 << EPI_SDRAMCFG_FREQ_SHIFT)
# define EPI_SDRAMCFG_FREQ_30_50MHZ (0x2 << EPI_SDRAMCFG_FREQ_SHIFT)
# define EPI_SDRAMCFG_FREQ_50_100MHZ (0x3 << EPI_SDRAMCFG_FREQ_SHIFT)
/* EPI Main Baud Rate (EPIBAUD), offset 0x004 */
#define EPI_BAUD_COUNT0_SHIFT 0
#define EPI_BAUD_COUNT0_MASK (0xFFFF << EPI_BAUD_COUNT0_SHIFT)
# define EPI_BAUD_COUNT0(n) ((n) << EPI_BAUD_COUNT0_SHIFT)
#endif /* __ARCH_ARM_SRC_TIVA_CHIP_LM_EPI_H */
arch/arm/src/tiva/chip/lm_ethernet.h → arch/arm/src/tiva/chip/tiva_ethernet.h
+5 -5
View File
@@ -1,7 +1,7 @@
/************************************************************************************
* arch/arm/src/tiva/chip/lm_ethernet.h
* arch/arm/src/tiva/chip/tiva_ethernet.h
*
* Copyright (C) 2009-2010, 2012-2013 Gregory Nutt. All rights reserved.
* Copyright (C) 2009-2010, 2012-2014 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@@ -33,8 +33,8 @@
*
************************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_CHIP_LM_ETHERNET_H
#define __ARCH_ARM_SRC_TIVA_CHIP_LM_ETHERNET_H
#ifndef __ARCH_ARM_SRC_TIVA_CHIP_TIVA_ETHERNET_H
#define __ARCH_ARM_SRC_TIVA_CHIP_TIVA_ETHERNET_H
/************************************************************************************
* Included Files
@@ -200,4 +200,4 @@
* Public Function Prototypes
************************************************************************************/
#endif /* __ARCH_ARM_SRC_TIVA_CHIP_LM_ETHERNET_H */
#endif /* __ARCH_ARM_SRC_TIVA_CHIP_TIVA_ETHERNET_H */
arch/arm/src/tiva/chip/lm_flash.h → arch/arm/src/tiva/chip/tiva_flash.h
+5 -5
View File
@@ -1,7 +1,7 @@
/************************************************************************************
* arch/arm/src/tiva/chip/lm_flash.h
* arch/arm/src/tiva/chip/tiva_flash.h
*
* Copyright (C) 2009, 2013 Gregory Nutt. All rights reserved.
* Copyright (C) 2009, 2013-2014 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@@ -33,8 +33,8 @@
*
************************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_CHIP_LM_FLASH_H
#define __ARCH_ARM_SRC_TIVA_CHIP_LM_FLASH_H
#ifndef __ARCH_ARM_SRC_TIVA_CHIP_TIVA_FLASH_H
#define __ARCH_ARM_SRC_TIVA_CHIP_TIVA_FLASH_H
/************************************************************************************
* Included Files
@@ -154,4 +154,4 @@
* Public Function Prototypes
************************************************************************************/
#endif /* __ARCH_ARM_SRC_TIVA_CHIP_LM_FLASH_H */
#endif /* __ARCH_ARM_SRC_TIVA_CHIP_TIVA_FLASH_H */
arch/arm/src/tiva/chip/lm_gpio.h → arch/arm/src/tiva/chip/tiva_gpio.h
+4 -4
View File
@@ -1,5 +1,5 @@
/************************************************************************************
* arch/arm/src/tiva/chip/lm_gpio.h
* arch/arm/src/tiva/chip/tiva_gpio.h
*
* Copyright (C) 2009-2010, 2013 Gregory Nutt. All rights reserved.
* Authors: Gregory Nutt <gnutt@nuttx.org>
@@ -34,8 +34,8 @@
*
************************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_CHIP_LM_GPIO_H
#define __ARCH_ARM_SRC_TIVA_CHIP_LM_GPIO_H
#ifndef __ARCH_ARM_SRC_TIVA_CHIP_TIVA_GPIO_H
#define __ARCH_ARM_SRC_TIVA_CHIP_TIVA_GPIO_H
/************************************************************************************
* Included Files
@@ -517,4 +517,4 @@
* Public Function Prototypes
************************************************************************************/
#endif /* __ARCH_ARM_SRC_TIVA_CHIP_LM_GPIO_H */
#endif /* __ARCH_ARM_SRC_TIVA_CHIP_TIVA_GPIO_H */
arch/arm/src/tiva/chip/lm_i2c.h → arch/arm/src/tiva/chip/tiva_i2c.h
+4 -4
View File
@@ -1,5 +1,5 @@
/************************************************************************************
* arch/arm/src/tiva/chip/lm_i2c.h
* arch/arm/src/tiva/chip/tiva_i2c.h
*
* Copyright (C) 2009, 2013 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@@ -33,8 +33,8 @@
*
************************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_CHIP_LM_I2C_H
#define __ARCH_ARM_SRC_TIVA_CHIP_LM_I2C_H
#ifndef __ARCH_ARM_SRC_TIVA_CHIP_TIVA_I2C_H
#define __ARCH_ARM_SRC_TIVA_CHIP_TIVA_I2C_H
/************************************************************************************
* Included Files
@@ -244,4 +244,4 @@
* Public Function Prototypes
****************************************************************************/
#endif /* __ARCH_ARM_SRC_TIVA_CHIP_LM_I2C_H */
#endif /* __ARCH_ARM_SRC_TIVA_CHIP_TIVA_I2C_H */
arch/arm/src/tiva/chip/lm_memorymap.h → arch/arm/src/tiva/chip/tiva_memorymap.h
+7 -7
View File
@@ -1,7 +1,7 @@
/************************************************************************************
* arch/arm/src/tiva/chip/lm_memorymap.h
* arch/arm/src/tiva/chip/tiva_memorymap.h
*
* Copyright (C) 2013 Gregory Nutt. All rights reserved.
* Copyright (C) 2013-2014 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@@ -33,8 +33,8 @@
*
************************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_CHIP_LM_MEMORYMAP_H
#define __ARCH_ARM_SRC_TIVA_CHIP_LM_MEMORYMAP_H
#ifndef __ARCH_ARM_SRC_TIVA_CHIP_TIVA_MEMORYMAP_H
#define __ARCH_ARM_SRC_TIVA_CHIP_TIVA_MEMORYMAP_H
/************************************************************************************
* Included Files
@@ -42,14 +42,14 @@
#include <nuttx/config.h>
/* Include the memory map file for the specific Stellaris chip */
/* Include the memory map file for the specific Tiva/Stellaris chip */
#if defined(CONFIG_ARCH_CHIP_LM3S)
# include "chip/lm3s_memorymap.h"
#elif defined(CONFIG_ARCH_CHIP_LM4F)
# include "chip/lm4f_memorymap.h"
#else
# error "Unsupported Stellaris memory map"
# error "Unsupported Tiva/Stellaris memory map"
#endif
/************************************************************************************
@@ -68,4 +68,4 @@
* Public Function Prototypes
************************************************************************************/
#endif /* __ARCH_ARM_SRC_TIVA_CHIP_LM_MEMORYMAP_H */
#endif /* __ARCH_ARM_SRC_TIVA_CHIP_TIVA_MEMORYMAP_H */
arch/arm/src/tiva/chip/lm_pinmap.h → arch/arm/src/tiva/chip/tiva_pinmap.h
+7 -7
View File
@@ -1,7 +1,7 @@
/************************************************************************************
* arch/arm/src/tiva/chip/lm_pinmap.h
* arch/arm/src/tiva/chip/tiva_pinmap.h
*
* Copyright (C) 2013 Gregory Nutt. All rights reserved.
* Copyright (C) 2013-2014 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@@ -33,8 +33,8 @@
*
************************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_CHIP_LM_PINMAP_H
#define __ARCH_ARM_SRC_TIVA_CHIP_LM_PINMAP_H
#ifndef __ARCH_ARM_SRC_TIVA_CHIP_TIVA_PINMAP_H
#define __ARCH_ARM_SRC_TIVA_CHIP_TIVA_PINMAP_H
/************************************************************************************
* Included Files
@@ -42,14 +42,14 @@
#include <nuttx/config.h>
/* Include the pin mapping file for the specific Stellaris chip */
/* Include the pin mapping file for the specific Tiva/Stellaris chip */
#if defined(CONFIG_ARCH_CHIP_LM3S)
# include "chip/lm3s_pinmap.h"
#elif defined(CONFIG_ARCH_CHIP_LM4F)
# include "chip/lm4f_pinmap.h"
#else
# error "Unsupported Stellaris PIN mapping"
# error "Unsupported Tiva/Stellaris PIN mapping"
#endif
/************************************************************************************
@@ -68,4 +68,4 @@
* Public Function Prototypes
************************************************************************************/
#endif /* __ARCH_ARM_SRC_TIVA_CHIP_LM_PINMAP_H */
#endif /* __ARCH_ARM_SRC_TIVA_CHIP_TIVA_PINMAP_H */
arch/arm/src/tiva/chip/lm_ssi.h → arch/arm/src/tiva/chip/tiva_ssi.h
+5 -5
View File
@@ -1,7 +1,7 @@
/************************************************************************************
* arch/arm/src/tiva/chip/lm_ssi.h
* arch/arm/src/tiva/chip/tiva_ssi.h
*
* Copyright (C) 2009, 2013 Gregory Nutt. All rights reserved.
* Copyright (C) 2009, 2013-2014 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@@ -33,8 +33,8 @@
*
************************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_CHIP_LM_SSI_H
#define __ARCH_ARM_SRC_TIVA_CHIP_LM_SSI_H
#ifndef __ARCH_ARM_SRC_TIVA_CHIP_TIVA_SSI_H
#define __ARCH_ARM_SRC_TIVA_CHIP_TIVA_SSI_H
/************************************************************************************
* Included Files
@@ -232,4 +232,4 @@
************************************************************************************/
#endif /* LM_NSSI > 0 */
#endif /* __ARCH_ARM_SRC_TIVA_CHIP_LM_SSI_H */
#endif /* __ARCH_ARM_SRC_TIVA_CHIP_TIVA_SSI_H */
arch/arm/src/tiva/chip/lm_syscontrol.h → arch/arm/src/tiva/chip/tiva_syscontrol.h
+5 -5
View File
@@ -1,7 +1,7 @@
/************************************************************************************
* arch/arm/src/tiva/chip/lm_syscontrol.h
* arch/arm/src/tiva/chip/tiva_syscontrol.h
*
* Copyright (C) 2009-2010, 2013 Gregory Nutt. All rights reserved.
* Copyright (C) 2009-2010, 2013-2014 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@@ -33,8 +33,8 @@
*
************************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_CHIP_LM_SYSCONTROL_H
#define __ARCH_ARM_SRC_TIVA_CHIP_LM_SYSCONTROL_H
#ifndef __ARCH_ARM_SRC_TIVA_CHIP_TIVA_SYSCONTROL_H
#define __ARCH_ARM_SRC_TIVA_CHIP_TIVA_SYSCONTROL_H
/************************************************************************************
* Included Files
@@ -69,4 +69,4 @@
* Public Functions
************************************************************************************/
#endif /* __ARCH_ARM_SRC_TIVA_CHIP_LM_SYSCONTROL_H */
#endif /* __ARCH_ARM_SRC_TIVA_CHIP_TIVA_SYSCONTROL_H */
arch/arm/src/tiva/chip/lm_timer.h → arch/arm/src/tiva/chip/tiva_timer.h
+5 -5
View File
@@ -1,7 +1,7 @@
/************************************************************************************
* arch/arm/src/tiva/chip/lm_timer.h
* arch/arm/src/tiva/chip/tiva_timer.h
*
* Copyright (C) 2012 Max Nekludov. All rights reserved.
* Copyright (C) 2012, 2014 Max Nekludov. All rights reserved.
* Author: Max Nekludov <macscomp@gmail.com>
*
* Redistribution and use in source and binary forms, with or without
@@ -33,8 +33,8 @@
*
************************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_CHIP_LM_TIMER_H
#define __ARCH_ARM_SRC_TIVA_CHIP_LM_TIMER_H
#ifndef __ARCH_ARM_SRC_TIVA_CHIP_TIVA_TIMER_H
#define __ARCH_ARM_SRC_TIVA_CHIP_TIVA_TIMER_H
/************************************************************************************
* Included Files
@@ -122,4 +122,4 @@
#define TIMER_GPTMICR_TATOCINT_SHIFT 0 /* Bits 0: GPTM Timer A Time-Out Raw Interrupt Clear*/
#define TIMER_GPTMICR_TATOCINT_MASK (0x01 << TIMER_GPTMICR_TATOCINT_SHIFT)
#endif /* __ARCH_ARM_SRC_TIVA_CHIP_LM_TIMER_H */
#endif /* __ARCH_ARM_SRC_TIVA_CHIP_TIVA_TIMER_H */
arch/arm/src/tiva/chip/lm_uart.h → arch/arm/src/tiva/chip/tiva_uart.h
+5 -5
View File
@@ -1,7 +1,7 @@
/************************************************************************************
* arch/arm/src/tiva/chip/lm_uart.h
* arch/arm/src/tiva/chip/tiva_uart.h
*
* Copyright (C) 2009, 2013 Gregory Nutt. All rights reserved.
* Copyright (C) 2009, 2013-2014 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@@ -33,8 +33,8 @@
*
************************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_CHIP_LM_UART_H
#define __ARCH_ARM_SRC_TIVA_CHIP_LM_UART_H
#ifndef __ARCH_ARM_SRC_TIVA_CHIP_TIVA_UART_H
#define __ARCH_ARM_SRC_TIVA_CHIP_TIVA_UART_H
/************************************************************************************
* Included Files
@@ -344,4 +344,4 @@
* Public Functions
************************************************************************************/
#endif /* __ARCH_ARM_SRC_TIVA_CHIP_LM_UART_H */
#endif /* __ARCH_ARM_SRC_TIVA_CHIP_TIVA_UART_H */
arch/arm/src/tiva/chip/lm_vectors.h → arch/arm/src/tiva/chip/tiva_vectors.h
+4 -4
View File
@@ -1,7 +1,7 @@
/************************************************************************************
* arch/arm/src/tiva/chip/lm_vectors.h
* arch/arm/src/tiva/chip/tiva_vectors.h
*
* Copyright (C) 2013 Gregory Nutt. All rights reserved.
* Copyright (C) 2013-2014 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@@ -37,14 +37,14 @@
* Included Files
************************************************************************************/
/* Include the vector file for the specific Stellaris chip */
/* Include the vector file for the specific Tiva/Stellaris chip */
#if defined(CONFIG_ARCH_CHIP_LM3S)
# include "chip/lm3s_vectors.h"
#elif defined(CONFIG_ARCH_CHIP_LM4F)
# include "chip/lm4f_vectors.h"
#else
# error "Unsupported Stellaris vector file"
# error "Unsupported Tiva/Stellaris vector file"
#endif
/************************************************************************************
arch/arm/src/tiva/lm_allocateheap.c → arch/arm/src/tiva/tiva_allocateheap.c
+3 -3
View File
@@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/tiva/lm_allocateheap.c
* arch/arm/src/tiva/tiva_allocateheap.c
*
* Copyright (C) 2013 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@@ -52,7 +52,7 @@
#include "mpu.h"
#include "up_arch.h"
#include "up_internal.h"
#include "lm_mpuinit.h"
#include "tiva_mpuinit.h"
/****************************************************************************
* Private Definitions
@@ -136,7 +136,7 @@ void up_allocate_heap(FAR void **heap_start, size_t *heap_size)
/* Allow user-mode access to the user heap memory */
lm_mpu_uheap((uintptr_t)ubase, usize);
tiva_mpu_uheap((uintptr_t)ubase, usize);
#else
/* Return the heap settings */
arch/arm/src/tiva/lm_dumpgpio.c → arch/arm/src/tiva/tiva_dumpgpio.c
+11 -11
View File
@@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/tiva/lm_dumpgpio.c
* arch/arm/src/tiva/tiva_dumpgpio.c
*
* Copyright (C) 2009-2010 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@@ -48,7 +48,7 @@
#include "up_arch.h"
#include "chip.h"
#include "lm_gpio.h"
#include "tiva_gpio.h"
/****************************************************************************
* Pre-processor Definitions
@@ -58,7 +58,7 @@
* Private Types
****************************************************************************/
/* NOTE: this is duplicated in lm_gpio.c */
/* NOTE: this is duplicated in tiva_gpio.c */
static const uintptr_t g_gpiobase[LM_NPORTS] =
{
@@ -127,7 +127,7 @@ static const char g_portchar[LM_NPORTS] =
****************************************************************************/
/****************************************************************************
* Name: lm_gpiobaseaddress
* Name: tiva_gpiobaseaddress
*
* Description:
* Given a GPIO enumeration value, return the base address of the
@@ -135,13 +135,13 @@ static const char g_portchar[LM_NPORTS] =
*
****************************************************************************/
static inline uintptr_t lm_gpiobaseaddress(int port)
static inline uintptr_t tiva_gpiobaseaddress(int port)
{
return port < LM_NPORTS ? g_gpiobase[port] : 0;
}
/****************************************************************************
* Name: lm_gpioport
* Name: tiva_gpioport
*
* Description:
* Given a GPIO enumeration value, return the base address of the
@@ -149,7 +149,7 @@ static inline uintptr_t lm_gpiobaseaddress(int port)
*
****************************************************************************/
static inline uint8_t lm_gpioport(int port)
static inline uint8_t tiva_gpioport(int port)
{
return port < LM_NPORTS ? g_portchar[port] : '?';
}
@@ -159,14 +159,14 @@ static inline uint8_t lm_gpioport(int port)
****************************************************************************/
/****************************************************************************
* Function: lm_dumpgpio
* Function: tiva_dumpgpio
*
* Description:
* Dump all GPIO registers associated with the provided base address
*
****************************************************************************/
int lm_dumpgpio(uint32_t pinset, const char *msg)
int tiva_dumpgpio(uint32_t pinset, const char *msg)
{
irqstate_t flags;
unsigned int port = (pinset & GPIO_PORT_MASK) >> GPIO_PORT_SHIFT;
@@ -176,7 +176,7 @@ int lm_dumpgpio(uint32_t pinset, const char *msg)
/* Get the base address associated with the GPIO port */
base = lm_gpiobaseaddress(port);
base = tiva_gpiobaseaddress(port);
DEBUGASSERT(base != 0);
/* The following requires exclusive access to the GPIO registers */
@@ -186,7 +186,7 @@ int lm_dumpgpio(uint32_t pinset, const char *msg)
enabled = ((rcgc2 & SYSCON_RCGC2_GPIO(port)) != 0);
lldbg("GPIO%c pinset: %08x base: %08x -- %s\n",
lm_gpioport(port), pinset, base, msg);
tiva_gpioport(port), pinset, base, msg);
lldbg(" RCGC2: %08x (%s)\n",
rcgc2, enabled ? "enabled" : "disabled" );
arch/arm/src/tiva/lm_ethernet.c → arch/arm/src/tiva/tiva_ethernet.c
+178 -177
View File
File diff suppressed because it is too large Load Diff
arch/arm/src/tiva/lm_ethernet.h → arch/arm/src/tiva/tiva_ethernet.h
+7 -7
View File
@@ -1,7 +1,7 @@
/************************************************************************************
* arch/arm/src/tiva/lm_ethernet.h
* arch/arm/src/tiva/tiva_ethernet.h
*
* Copyright (C) 2009-2010, 2013 Gregory Nutt. All rights reserved.
* Copyright (C) 2009-2010, 2013-2014 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@@ -33,8 +33,8 @@
*
************************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_LM_ETHERNET_H
#define __ARCH_ARM_SRC_TIVA_LM_ETHERNET_H
#ifndef __ARCH_ARM_SRC_TIVA_TIVA_ETHERNET_H
#define __ARCH_ARM_SRC_TIVA_TIVA_ETHERNET_H
/************************************************************************************
* Included Files
@@ -74,7 +74,7 @@ extern "C"
****************************************************************************/
/****************************************************************************
* Function: lm_ethinitialize
* Function: tiva_ethinitialize
*
* Description:
* Initialize the Ethernet driver for one interface. If the Stellaris chip
@@ -92,7 +92,7 @@ extern "C"
*
****************************************************************************/
int lm_ethinitialize(int intf);
int tiva_ethinitialize(int intf);
#if defined(__cplusplus)
}
@@ -100,4 +100,4 @@ int lm_ethinitialize(int intf);
#endif /* __ASSEMBLY__ */
#endif /* LM_NETHCONTROLLERS > 1 */
#endif /* __ARCH_ARM_SRC_TIVA_LM_ETHERNET_H */
#endif /* __ARCH_ARM_SRC_TIVA_TIVA_ETHERNET_H */
arch/arm/src/tiva/lm_flash.c → arch/arm/src/tiva/tiva_flash.c
+41 -39
View File
@@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/tiva/lm_flash.c
* arch/arm/src/tiva/tiva_flash.c
*
* Copyright (c) 2013 Max Holtzberg. All rights reserved.
* Copyright (C) 2013 Gregory Nutt. All rights reserved.
@@ -72,10 +72,10 @@
/* This type represents the state of the MTD device. The struct mtd_dev_s
* must appear at the beginning of the definition so that you can freely
* cast between pointers to struct mtd_dev_s and struct lm_dev_s.
* cast between pointers to struct mtd_dev_s and struct tiva_dev_s.
*/
struct lm_dev_s
struct tiva_dev_s
{
struct mtd_dev_s mtd;
@@ -88,34 +88,36 @@ struct lm_dev_s
/* MTD driver methods */
static int lm_erase(FAR struct mtd_dev_s *dev, off_t startblock, size_t nblocks);
static ssize_t lm_bread(FAR struct mtd_dev_s *dev, off_t startblock, size_t nblocks,
FAR uint8_t *buf);
static ssize_t lm_bwrite(FAR struct mtd_dev_s *dev, off_t startblock, size_t nblocks,
FAR const uint8_t *buf);
static ssize_t lm_read(FAR struct mtd_dev_s *dev, off_t offset, size_t nbytes,
FAR uint8_t *buf);
static int tiva_erase(FAR struct mtd_dev_s *dev, off_t startblock,
size_t nblocks);
static ssize_t tiva_bread(FAR struct mtd_dev_s *dev, off_t startblock,
size_t nblocks, FAR uint8_t *buf);
static ssize_t tiva_bwrite(FAR struct mtd_dev_s *dev, off_t startblock,
size_t nblocks, FAR const uint8_t *buf);
static ssize_t tiva_read(FAR struct mtd_dev_s *dev, off_t offset,
size_t nbytes, FAR uint8_t *buf);
#ifdef CONFIG_MTD_BYTE_WRITE
static ssize_t lm_write(FAR struct mtd_dev_s *dev, off_t offset, size_t nbytes,
FAR const uint8_t *buf);
static ssize_t tiva_write(FAR struct mtd_dev_s *dev, off_t offset,
size_t nbytes, FAR const uint8_t *buf);
#endif
static int lm_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg);
static int tiva_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg);
/****************************************************************************
* Private Data
****************************************************************************/
/* This structure holds the state of the MTD driver */
static struct lm_dev_s g_lmdev =
static struct tiva_dev_s g_lmdev =
{
{ lm_erase,
lm_bread,
lm_bwrite,
lm_read,
{
tiva_erase,
tiva_bread,
tiva_bwrite,
tiva_read,
#ifdef CONFIG_MTD_BYTE_WRITE
lm_write,
tiva_write,
#endif
lm_ioctl
tiva_ioctl
},
/* Initialization of any other implementation specific data goes here */
};
@@ -125,15 +127,15 @@ static struct lm_dev_s g_lmdev =
****************************************************************************/
/****************************************************************************
* Name: lm_erase
* Name: tiva_erase
*
* Description:
* Erase several blocks, each of the size previously reported.
*
****************************************************************************/
static int lm_erase(FAR struct mtd_dev_s *dev, off_t startblock,
size_t nblocks)
static int tiva_erase(FAR struct mtd_dev_s *dev, off_t startblock,
size_t nblocks)
{
int curpage;
uint32_t pageaddr;
@@ -164,15 +166,15 @@ static int lm_erase(FAR struct mtd_dev_s *dev, off_t startblock,
}
/****************************************************************************
* Name: lm_bread
* Name: tiva_bread
*
* Description:
* Read the specified number of blocks into the user provided buffer.
*
****************************************************************************/
static ssize_t lm_bread(FAR struct mtd_dev_s *dev, off_t startblock, size_t nblocks,
FAR uint8_t *buf)
static ssize_t tiva_bread(FAR struct mtd_dev_s *dev, off_t startblock, size_t nblocks,
FAR uint8_t *buf)
{
DEBUGASSERT(startblock + nblocks <= LM_VIRTUAL_NPAGES);
@@ -183,15 +185,15 @@ static ssize_t lm_bread(FAR struct mtd_dev_s *dev, off_t startblock, size_t nblo
}
/****************************************************************************
* Name: lm_bwrite
* Name: tiva_bwrite
*
* Description:
* Write the specified number of blocks from the user provided buffer.
*
****************************************************************************/
static ssize_t lm_bwrite(FAR struct mtd_dev_s *dev, off_t startblock, size_t nblocks,
FAR const uint8_t *buf)
static ssize_t tiva_bwrite(FAR struct mtd_dev_s *dev, off_t startblock, size_t nblocks,
FAR const uint8_t *buf)
{
FAR uint32_t *src = (uint32_t*)buf;
FAR uint32_t *dst = (uint32_t*)(LM_VIRTUAL_BASE + startblock * LM_FLASH_PAGESIZE);
@@ -222,15 +224,15 @@ static ssize_t lm_bwrite(FAR struct mtd_dev_s *dev, off_t startblock, size_t nbl
}
/****************************************************************************
* Name: lm_read
* Name: tiva_read
*
* Description:
* Read the specified number of bytes to the user provided buffer.
*
****************************************************************************/
static ssize_t lm_read(FAR struct mtd_dev_s *dev, off_t offset, size_t nbytes,
FAR uint8_t *buf)
static ssize_t tiva_read(FAR struct mtd_dev_s *dev, off_t offset, size_t nbytes,
FAR uint8_t *buf)
{
DEBUGASSERT(offset + nbytes < LM_VIRTUAL_NPAGES * LM_FLASH_PAGESIZE);
@@ -240,7 +242,7 @@ static ssize_t lm_read(FAR struct mtd_dev_s *dev, off_t offset, size_t nbytes,
}
/****************************************************************************
* Name: lm_write
* Name: tiva_write
*
* Description:
* Some FLASH parts have the ability to write an arbitrary number of
@@ -249,18 +251,18 @@ static ssize_t lm_read(FAR struct mtd_dev_s *dev, off_t offset, size_t nbytes,
****************************************************************************/
#ifdef CONFIG_MTD_BYTE_WRITE
static ssize_t lm_write(FAR struct mtd_dev_s *dev, off_t offset, size_t nbytes,
FAR const uint8_t *buf)
static ssize_t tiva_write(FAR struct mtd_dev_s *dev, off_t offset, size_t nbytes,
FAR const uint8_t *buf)
{
return -ENOSYS;
}
#endif
/****************************************************************************
* Name: lm_ioctl
* Name: tiva_ioctl
****************************************************************************/
static int lm_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
static int tiva_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
{
int ret = -EINVAL; /* Assume good command with bad parameters */
@@ -309,7 +311,7 @@ static int lm_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
{
/* Erase the entire device */
lm_erase(dev, 0, LM_VIRTUAL_NPAGES);
tiva_erase(dev, 0, LM_VIRTUAL_NPAGES);
ret = OK;
}
@@ -328,7 +330,7 @@ static int lm_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
****************************************************************************/
/****************************************************************************
* Name: lm_initialize
* Name: tiva_initialize
*
* Description:
* Create and initialize an MTD device instance. MTD devices are not
arch/arm/src/tiva/lm_gpio.c → arch/arm/src/tiva/tiva_gpio.c
+53 -52
View File
@@ -1,8 +1,7 @@
/****************************************************************************
* arch/arm/src/tiva/lm_gpio.c
* arch/arm/src/chip/lm_gpio.c
* arch/arm/src/tiva/tiva_gpio.c
*
* Copyright (C) 2009-2010 Gregory Nutt. All rights reserved.
* Copyright (C) 2009-2010, 2014 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@@ -50,7 +49,7 @@
#include "up_arch.h"
#include "os_internal.h"
#include "lm_gpio.h"
#include "tiva_gpio.h"
/****************************************************************************
* Pre-processor Definitions
@@ -145,7 +144,7 @@ static const struct gpio_func_s g_funcbits[] =
{GPIO_INTERRUPT_SETBITS, GPIO_INTERRUPT_CLRBITS}, /* GPIO_FUNC_INTERRUPT */
};
/* NOTE: this is duplicated in lm_dumpgpio.c */
/* NOTE: this is duplicated in tiva_dumpgpio.c */
static const uintptr_t g_gpiobase[LM_NPORTS] =
{
@@ -187,7 +186,7 @@ static const uintptr_t g_gpiobase[LM_NPORTS] =
****************************************************************************/
/****************************************************************************
* Name: lm_gpiobaseaddress
* Name: tiva_gpiobaseaddress
*
* Description:
* Given a GPIO enumeration value, return the base address of the
@@ -195,7 +194,7 @@ static const uintptr_t g_gpiobase[LM_NPORTS] =
*
****************************************************************************/
static uintptr_t lm_gpiobaseaddress(unsigned int port)
static uintptr_t tiva_gpiobaseaddress(unsigned int port)
{
uintptr_t gpiobase = 0;
if (port < LM_NPORTS)
@@ -207,15 +206,15 @@ static uintptr_t lm_gpiobaseaddress(unsigned int port)
}
/****************************************************************************
* Name: lm_gpiofunc
* Name: tiva_gpiofunc
*
* Description:
* Configure GPIO registers for a specific function
*
****************************************************************************/
static void lm_gpiofunc(uint32_t base, uint32_t pinno,
const struct gpio_func_s *func)
static void tiva_gpiofunc(uint32_t base, uint32_t pinno,
const struct gpio_func_s *func)
{
uint32_t setbit;
uint32_t clrbit;
@@ -343,14 +342,15 @@ static void lm_gpiofunc(uint32_t base, uint32_t pinno,
}
/****************************************************************************
* Name: lm_gpiopadstrength
* Name: tiva_gpiopadstrength
*
* Description:
* Set up pad strength and pull-ups
*
****************************************************************************/
static inline void lm_gpiopadstrength(uint32_t base, uint32_t pin, uint32_t cfgset)
static inline void tiva_gpiopadstrength(uint32_t base, uint32_t pin,
uint32_t cfgset)
{
int strength = (cfgset & GPIO_STRENGTH_MASK) >> GPIO_STRENGTH_SHIFT;
uint32_t regoffset;
@@ -430,19 +430,20 @@ static inline void lm_gpiopadstrength(uint32_t base, uint32_t pin, uint32_t cfgs
}
/****************************************************************************
* Name: lm_gpiopadtype
* Name: tiva_gpiopadtype
*
* Description:
* Set up pad strength and pull-ups. Some of these values may be over-
* written by lm_gpiofunc, depending on the function selection. Others
* written by tiva_gpiofunc, depending on the function selection. Others
* are optional for different function selections.
*
****************************************************************************/
static inline void lm_gpiopadtype(uint32_t base, uint32_t pin, uint32_t cfgset)
static inline void tiva_gpiopadtype(uint32_t base, uint32_t pin,
uint32_t cfgset)
{
int padtype = (cfgset & GPIO_PADTYPE_MASK) >> GPIO_PADTYPE_SHIFT;
#if 0 /* always overwritten by lm_gpiofunc */
#if 0 /* always overwritten by tiva_gpiofunc */
uint32_t odrset;
uint32_t odrclr;
#endif
@@ -450,7 +451,7 @@ static inline void lm_gpiopadtype(uint32_t base, uint32_t pin, uint32_t cfgset)
uint32_t purclr;
uint32_t pdrset;
uint32_t pdrclr;
#if 0 /* always overwritten by lm_gpiofunc */
#if 0 /* always overwritten by tiva_gpiofunc */
uint32_t denset;
uint32_t denclr;
#endif
@@ -458,7 +459,7 @@ static inline void lm_gpiopadtype(uint32_t base, uint32_t pin, uint32_t cfgset)
/* Assume digital GPIO function, push-pull with no pull-up or pull-down */
#if 0 /* always overwritten by lm_gpiofunc */
#if 0 /* always overwritten by tiva_gpiofunc */
odrset = 0;
odrclr = pin;
#endif
@@ -466,7 +467,7 @@ static inline void lm_gpiopadtype(uint32_t base, uint32_t pin, uint32_t cfgset)
purclr = pin;
pdrset = 0;
pdrclr = pin;
#if 0 /* always overwritten by lm_gpiofunc */
#if 0 /* always overwritten by tiva_gpiofunc */
denset = pin;
denclr = 0;
#endif
@@ -493,7 +494,7 @@ static inline void lm_gpiopadtype(uint32_t base, uint32_t pin, uint32_t cfgset)
break;
case 3: /* Open-drain */
{
#if 0 /* always overwritten by lm_gpiofunc */
#if 0 /* always overwritten by tiva_gpiofunc */
odrset = pin;
odrclr = 0;
#endif
@@ -501,7 +502,7 @@ static inline void lm_gpiopadtype(uint32_t base, uint32_t pin, uint32_t cfgset)
break;
case 4: /* Open-drain with weak pull-up */
{
#if 0 /* always overwritten by lm_gpiofunc */
#if 0 /* always overwritten by tiva_gpiofunc */
odrset = pin;
odrclr = 0;
#endif
@@ -511,7 +512,7 @@ static inline void lm_gpiopadtype(uint32_t base, uint32_t pin, uint32_t cfgset)
break;
case 5: /* Open-drain with weak pull-down */
{
#if 0 /* always overwritten by lm_gpiofunc */
#if 0 /* always overwritten by tiva_gpiofunc */
odrset = pin;
odrclr = 0;
#endif
@@ -521,7 +522,7 @@ static inline void lm_gpiopadtype(uint32_t base, uint32_t pin, uint32_t cfgset)
break;
case 6: /* Analog comparator */
{
#if 0 /* always overwritten by lm_gpiofunc */
#if 0 /* always overwritten by tiva_gpiofunc */
denset = 0;
denclr = pin;
#endif
@@ -540,7 +541,7 @@ static inline void lm_gpiopadtype(uint32_t base, uint32_t pin, uint32_t cfgset)
* drain output when set to 1."
*/
#if 0 /* always overwritten by lm_gpiofunc */
#if 0 /* always overwritten by tiva_gpiofunc */
regval = getreg32(base + LM_GPIO_ODR_OFFSET);
regval &= ~odrclr;
regval |= odrset;
@@ -578,7 +579,7 @@ static inline void lm_gpiopadtype(uint32_t base, uint32_t pin, uint32_t cfgset)
* corresponding GPIODEN bit must be set."
*/
#if 0 /* always overwritten by lm_gpiofunc */
#if 0 /* always overwritten by tiva_gpiofunc */
regval = getreg32(base + LM_GPIO_DEN_OFFSET);
regval &= ~denclr;
regval |= denset;
@@ -587,28 +588,28 @@ static inline void lm_gpiopadtype(uint32_t base, uint32_t pin, uint32_t cfgset)
}
/****************************************************************************
* Name: lm_initoutput
* Name: tiva_initoutput
*
* Description:
* Set the GPIO output value
*
****************************************************************************/
static inline void lm_initoutput(uint32_t cfgset)
static inline void tiva_initoutput(uint32_t cfgset)
{
bool value = ((cfgset & GPIO_VALUE_MASK) != GPIO_VALUE_ZERO);
lm_gpiowrite(cfgset, value);
tiva_gpiowrite(cfgset, value);
}
/****************************************************************************
* Name: lm_interrupt
* Name: tiva_interrupt
*
* Description:
* Configure the interrupt pin.
*
****************************************************************************/
static inline void lm_interrupt(uint32_t base, uint32_t pin, uint32_t cfgset)
static inline void tiva_interrupt(uint32_t base, uint32_t pin, uint32_t cfgset)
{
int inttype = (cfgset & GPIO_INT_MASK) >> GPIO_INT_SHIFT;
uint32_t regval;
@@ -728,7 +729,7 @@ static inline void lm_interrupt(uint32_t base, uint32_t pin, uint32_t cfgset)
}
/****************************************************************************
* Name: lm_portcontrol
* Name: tiva_portcontrol
*
* Description:
* Set the pin alternate function in the port control register.
@@ -736,9 +737,9 @@ static inline void lm_interrupt(uint32_t base, uint32_t pin, uint32_t cfgset)
****************************************************************************/
#ifdef LM4F
static inline void lm_portcontrol(uint32_t base, uint32_t pinno,
uint32_t cfgset,
const struct gpio_func_s *func)
static inline void tiva_portcontrol(uint32_t base, uint32_t pinno,
uint32_t cfgset,
const struct gpio_func_s *func)
{
uint32_t alt = 0;
uint32_t mask;
@@ -764,7 +765,7 @@ static inline void lm_portcontrol(uint32_t base, uint32_t pinno,
putreg32(regval, base + LM_GPIO_PCTL_OFFSET);
}
#else
# define lm_portcontrol(b,p,c,f)
# define tiva_portcontrol(b,p,c,f)
#endif
/****************************************************************************
@@ -772,14 +773,14 @@ static inline void lm_portcontrol(uint32_t base, uint32_t pinno,
****************************************************************************/
/****************************************************************************
* Name: lm_configgpio
* Name: tiva_configgpio
*
* Description:
* Configure a GPIO pin based on bit-encoded description of the pin.
*
****************************************************************************/
int lm_configgpio(uint32_t cfgset)
int tiva_configgpio(uint32_t cfgset)
{
irqstate_t flags;
unsigned int func;
@@ -800,7 +801,7 @@ int lm_configgpio(uint32_t cfgset)
/* Get the base address associated with the GPIO port */
base = lm_gpiobaseaddress(port);
base = tiva_gpiobaseaddress(port);
DEBUGASSERT(base != 0);
/* The following requires exclusive access to the GPIO registers */
@@ -820,34 +821,34 @@ int lm_configgpio(uint32_t cfgset)
* to perform reconfiguration.
*/
lm_gpiofunc(base, pinno, &g_funcbits[0]);
lm_portcontrol(base, pinno, cfgset, &g_funcbits[0]);
tiva_gpiofunc(base, pinno, &g_funcbits[0]);
tiva_portcontrol(base, pinno, cfgset, &g_funcbits[0]);
/* Then set up pad strengths and pull-ups. These setups should be done before
* setting up the function because some function settings will over-ride these
* user options.
*/
lm_gpiopadstrength(base, pin, cfgset);
lm_gpiopadtype(base, pin, cfgset);
tiva_gpiopadstrength(base, pin, cfgset);
tiva_gpiopadtype(base, pin, cfgset);
/* Then set up the real pin function */
lm_gpiofunc(base, pinno, &g_funcbits[func]);
lm_portcontrol(base, pinno, cfgset, &g_funcbits[func]);
tiva_gpiofunc(base, pinno, &g_funcbits[func]);
tiva_portcontrol(base, pinno, cfgset, &g_funcbits[func]);
/* Special case GPIO digital output pins */
if (func == 1 || func == 3)
{
lm_initoutput(cfgset);
tiva_initoutput(cfgset);
}
/* Special setup for interrupt GPIO pins */
else if (func == 7)
{
lm_interrupt(base, pin, cfgset);
tiva_interrupt(base, pin, cfgset);
}
irqrestore(flags);
@@ -855,14 +856,14 @@ int lm_configgpio(uint32_t cfgset)
}
/****************************************************************************
* Name: lm_gpiowrite
* Name: tiva_gpiowrite
*
* Description:
* Write one or zero to the selected GPIO pin
*
****************************************************************************/
void lm_gpiowrite(uint32_t pinset, bool value)
void tiva_gpiowrite(uint32_t pinset, bool value)
{
unsigned int port;
unsigned int pinno;
@@ -875,7 +876,7 @@ void lm_gpiowrite(uint32_t pinset, bool value)
/* Get the base address associated with the GPIO port */
base = lm_gpiobaseaddress(port);
base = tiva_gpiobaseaddress(port);
/* "The GPIO DATA register is the data register. In software control mode,
* values written in the GPIO DATA register are transferred onto the GPIO
@@ -893,14 +894,14 @@ void lm_gpiowrite(uint32_t pinset, bool value)
}
/****************************************************************************
* Name: lm_gpioread
* Name: tiva_gpioread
*
* Description:
* Read one or zero from the selected GPIO pin
*
****************************************************************************/
bool lm_gpioread(uint32_t pinset, bool value)
bool tiva_gpioread(uint32_t pinset, bool value)
{
unsigned int port;
unsigned int pinno;
@@ -913,7 +914,7 @@ bool lm_gpioread(uint32_t pinset, bool value)
/* Get the base address associated with the GPIO port */
base = lm_gpiobaseaddress(port);
base = tiva_gpiobaseaddress(port);
/* "... the values read from this register are determined for each bit
* by the mask bit derived from the address used to access the data register,
arch/arm/src/tiva/lm_gpio.h → arch/arm/src/tiva/tiva_gpio.h
+14 -14
View File
@@ -1,7 +1,7 @@
/************************************************************************************
* arch/arm/src/tiva/lm_gpio.h
* arch/arm/src/tiva/tiva_gpio.h
*
* Copyright (C) 2009-2010, 2013 Gregory Nutt. All rights reserved.
* Copyright (C) 2009-2010, 2013-2014 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@@ -33,8 +33,8 @@
*
************************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_LM_GPIO_H
#define __ARCH_ARM_SRC_TIVA_LM_GPIO_H
#ifndef __ARCH_ARM_SRC_TIVA_TIVA_GPIO_H
#define __ARCH_ARM_SRC_TIVA_TIVA_GPIO_H
/************************************************************************************
* Included Files
@@ -53,7 +53,7 @@
* Pre-processor Definitions
************************************************************************************/
/* Bit-encoded input to lm_configgpio() *********************************************/
/* Bit-encoded input to tiva_configgpio() *******************************************/
/* Encoding:
*
@@ -207,44 +207,44 @@ extern "C"
************************************************************************************/
/************************************************************************************
* Name: lm_configgpio
* Name: tiva_configgpio
*
* Description:
* Configure a GPIO pin based on bit-encoded description of the pin.
*
************************************************************************************/
int lm_configgpio(uint32_t cfgset);
int tiva_configgpio(uint32_t cfgset);
/************************************************************************************
* Name: lm_gpiowrite
* Name: tiva_gpiowrite
*
* Description:
* Write one or zero to the selected GPIO pin
*
************************************************************************************/
void lm_gpiowrite(uint32_t pinset, bool value);
void tiva_gpiowrite(uint32_t pinset, bool value);
/************************************************************************************
* Name: lm_gpioread
* Name: tiva_gpioread
*
* Description:
* Read one or zero from the selected GPIO pin
*
************************************************************************************/
bool lm_gpioread(uint32_t pinset, bool value);
bool tiva_gpioread(uint32_t pinset, bool value);
/************************************************************************************
* Function: lm_dumpgpio
* Function: tiva_dumpgpio
*
* Description:
* Dump all GPIO registers associated with the provided base address
*
************************************************************************************/
int lm_dumpgpio(uint32_t pinset, const char *msg);
int tiva_dumpgpio(uint32_t pinset, const char *msg);
/************************************************************************************
* Name: gpio_irqinitialize
@@ -261,4 +261,4 @@ int weak_function gpio_irqinitialize(void);
#endif
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_ARM_SRC_TIVA_LM_GPIO_H */
#endif /* __ARCH_ARM_SRC_TIVA_TIVA_GPIO_H */
arch/arm/src/tiva/lm_gpioirq.c → arch/arm/src/tiva/tiva_gpioirq.c
+36 -37
View File
@@ -1,8 +1,7 @@
/****************************************************************************
* arch/arm/src/tiva/lm_gpioirq.c
* arch/arm/src/chip/lm_gpioirq.c
* arch/arm/src/tiva/tiva_gpioirq.c
*
* Copyright (C) 2009-2010, 2012 Gregory Nutt. All rights reserved.
* Copyright (C) 2009-2010, 2012, 2014 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@@ -51,7 +50,7 @@
#include "os_internal.h"
#include "irq_internal.h"
#include "lm_gpio.h"
#include "tiva_gpio.h"
/****************************************************************************
* Pre-processor Definitions
@@ -114,7 +113,7 @@ static const uintptr_t g_gpiobase[] =
****************************************************************************/
/****************************************************************************
* Name: lm_gpiobaseaddress
* Name: tiva_gpiobaseaddress
*
* Input:
* gpioirq - A pin number in the range of 0 to NR_GPIO_IRQS.
@@ -126,7 +125,7 @@ static const uintptr_t g_gpiobase[] =
*
****************************************************************************/
static uintptr_t lm_gpiobaseaddress(unsigned int gpioirq)
static uintptr_t tiva_gpiobaseaddress(unsigned int gpioirq)
{
unsigned int ndx = gpioirq >> 3;
if (ndx < GPIO_NADDRS)
@@ -138,14 +137,14 @@ static uintptr_t lm_gpiobaseaddress(unsigned int gpioirq)
}
/****************************************************************************
* Name: lm_gpio*handler
* Name: tiva_gpio*handler
*
* Description:
* Handle interrupts on each enabled GPIO port
*
****************************************************************************/
static int lm_gpiohandler(uint32_t regbase, int irqbase, void *context)
static int tiva_gpiohandler(uint32_t regbase, int irqbase, void *context)
{
uint32_t mis;
int irq;
@@ -181,65 +180,65 @@ static int lm_gpiohandler(uint32_t regbase, int irqbase, void *context)
}
#ifndef CONFIG_LM_DISABLE_GPIOA_IRQS
static int lm_gpioahandler(int irq, FAR void *context)
static int tiva_gpioahandler(int irq, FAR void *context)
{
return lm_gpiohandler(LM_GPIOA_BASE, LM_IRQ_GPIOA_0, context);
return tiva_gpiohandler(LM_GPIOA_BASE, LM_IRQ_GPIOA_0, context);
}
#endif
#ifndef CONFIG_LM_DISABLE_GPIOB_IRQS
static int lm_gpiobhandler(int irq, FAR void *context)
static int tiva_gpiobhandler(int irq, FAR void *context)
{
return lm_gpiohandler(LM_GPIOB_BASE, LM_IRQ_GPIOB_0, context);
return tiva_gpiohandler(LM_GPIOB_BASE, LM_IRQ_GPIOB_0, context);
}
#endif
#ifndef CONFIG_LM_DISABLE_GPIOC_IRQS
static int lm_gpiochandler(int irq, FAR void *context)
static int tiva_gpiochandler(int irq, FAR void *context)
{
return lm_gpiohandler(LM_GPIOC_BASE, LM_IRQ_GPIOC_0, context);
return tiva_gpiohandler(LM_GPIOC_BASE, LM_IRQ_GPIOC_0, context);
}
#endif
#ifndef CONFIG_LM_DISABLE_GPIOD_IRQS
static int lm_gpiodhandler(int irq, FAR void *context)
static int tiva_gpiodhandler(int irq, FAR void *context)
{
return lm_gpiohandler(LM_GPIOD_BASE, LM_IRQ_GPIOD_0, context);
return tiva_gpiohandler(LM_GPIOD_BASE, LM_IRQ_GPIOD_0, context);
}
#endif
#ifndef CONFIG_LM_DISABLE_GPIOE_IRQS
static int lm_gpioehandler(int irq, FAR void *context)
static int tiva_gpioehandler(int irq, FAR void *context)
{
return lm_gpiohandler(LM_GPIOE_BASE, LM_IRQ_GPIOE_0, context);
return tiva_gpiohandler(LM_GPIOE_BASE, LM_IRQ_GPIOE_0, context);
}
#endif
#ifndef CONFIG_LM_DISABLE_GPIOF_IRQS
static int lm_gpiofhandler(int irq, FAR void *context)
static int tiva_gpiofhandler(int irq, FAR void *context)
{
return lm_gpiohandler(LM_GPIOF_BASE, LM_IRQ_GPIOF_0, context);
return tiva_gpiohandler(LM_GPIOF_BASE, LM_IRQ_GPIOF_0, context);
}
#endif
#ifndef CONFIG_LM_DISABLE_GPIOG_IRQS
static int lm_gpioghandler(int irq, FAR void *context)
static int tiva_gpioghandler(int irq, FAR void *context)
{
return lm_gpiohandler(LM_GPIOG_BASE, LM_IRQ_GPIOG_0, context);
return tiva_gpiohandler(LM_GPIOG_BASE, LM_IRQ_GPIOG_0, context);
}
#endif
#ifndef CONFIG_LM_DISABLE_GPIOH_IRQS
static int lm_gpiohhandler(int irq, FAR void *context)
static int tiva_gpiohhandler(int irq, FAR void *context)
{
return lm_gpiohandler(LM_GPIOH_BASE, LM_IRQ_GPIOH_0, context);
return tiva_gpiohandler(LM_GPIOH_BASE, LM_IRQ_GPIOH_0, context);
}
#endif
#ifndef CONFIG_LM_DISABLE_GPIOJ_IRQS
static int lm_gpiojhandler(int irq, FAR void *context)
static int tiva_gpiojhandler(int irq, FAR void *context)
{
return lm_gpiohandler(LM_GPIOJ_BASE, LM_IRQ_GPIOJ_0, context);
return tiva_gpiohandler(LM_GPIOJ_BASE, LM_IRQ_GPIOJ_0, context);
}
#endif
@@ -271,39 +270,39 @@ int gpio_irqinitialize(void)
*/
#ifndef CONFIG_LM_DISABLE_GPIOA_IRQS
irq_attach(LM_IRQ_GPIOA, lm_gpioahandler);
irq_attach(LM_IRQ_GPIOA, tiva_gpioahandler);
up_enable_irq(LM_IRQ_GPIOA);
#endif
#ifndef CONFIG_LM_DISABLE_GPIOB_IRQS
irq_attach(LM_IRQ_GPIOB, lm_gpiobhandler);
irq_attach(LM_IRQ_GPIOB, tiva_gpiobhandler);
up_enable_irq(LM_IRQ_GPIOB);
#endif
#ifndef CONFIG_LM_DISABLE_GPIOC_IRQS
irq_attach(LM_IRQ_GPIOC, lm_gpiochandler);
irq_attach(LM_IRQ_GPIOC, tiva_gpiochandler);
up_enable_irq(LM_IRQ_GPIOC);
#endif
#ifndef CONFIG_LM_DISABLE_GPIOD_IRQS
irq_attach(LM_IRQ_GPIOD, lm_gpiodhandler);
irq_attach(LM_IRQ_GPIOD, tiva_gpiodhandler);
up_enable_irq(LM_IRQ_GPIOD);
#endif
#ifndef CONFIG_LM_DISABLE_GPIOE_IRQS
irq_attach(LM_IRQ_GPIOE, lm_gpioehandler);
irq_attach(LM_IRQ_GPIOE, tiva_gpioehandler);
up_enable_irq(LM_IRQ_GPIOE);
#endif
#ifndef CONFIG_LM_DISABLE_GPIOF_IRQS
irq_attach(LM_IRQ_GPIOF, lm_gpiofhandler);
irq_attach(LM_IRQ_GPIOF, tiva_gpiofhandler);
up_enable_irq(LM_IRQ_GPIOF);
#endif
#ifndef CONFIG_LM_DISABLE_GPIOG_IRQS
irq_attach(LM_IRQ_GPIOG, lm_gpioghandler);
irq_attach(LM_IRQ_GPIOG, tiva_gpioghandler);
up_enable_irq(LM_IRQ_GPIOG);
#endif
#ifndef CONFIG_LM_DISABLE_GPIOH_IRQS
irq_attach(LM_IRQ_GPIOH, lm_gpiohhandler);
irq_attach(LM_IRQ_GPIOH, tiva_gpiohhandler);
up_enable_irq(LM_IRQ_GPIOH);
#endif
#ifndef CONFIG_LM_DISABLE_GPIOJ_IRQS
irq_attach(LM_IRQ_GPIOJ, lm_gpiojhandler);
irq_attach(LM_IRQ_GPIOJ, tiva_gpiojhandler);
up_enable_irq(LM_IRQ_GPIOJ);
#endif
@@ -370,7 +369,7 @@ void gpio_irqenable(int irq)
{
/* Get the base address of the GPIO module associated with this IRQ */
base = lm_gpiobaseaddress(gpioirq);
base = tiva_gpiobaseaddress(gpioirq);
DEBUGASSERT(base != 0);
pin = (1 << (gpioirq & 7));
@@ -409,7 +408,7 @@ void gpio_irqdisable(int irq)
{
/* Get the base address of the GPIO module associated with this IRQ */
base = lm_gpiobaseaddress(gpioirq);
base = tiva_gpiobaseaddress(gpioirq);
DEBUGASSERT(base != 0);
pin = (1 << (gpioirq & 7));
arch/arm/src/tiva/lm_irq.c → arch/arm/src/tiva/tiva_irq.c
+31 -32
View File
@@ -1,6 +1,5 @@
/****************************************************************************
* arch/arm/src/tiva/lm_irq.c
* arch/arm/src/chip/lm_irq.c
* arch/arm/src/tiva/tiva_irq.c
*
* Copyright (C) 2009, 2011, 2013-2014 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@@ -54,7 +53,7 @@
#include "up_internal.h"
#include "chip.h"
#include "lm_gpio.h"
#include "tiva_gpio.h"
/****************************************************************************
* Pre-processor Definitions
@@ -90,7 +89,7 @@ volatile uint32_t *current_regs;
****************************************************************************/
/****************************************************************************
* Name: lm_dumpnvic
* Name: tiva_dumpnvic
*
* Description:
* Dump some interesting NVIC registers
@@ -98,7 +97,7 @@ volatile uint32_t *current_regs;
****************************************************************************/
#if defined(CONFIG_DEBUG_IRQ)
static void lm_dumpnvic(const char *msg, int irq)
static void tiva_dumpnvic(const char *msg, int irq)
{
irqstate_t flags;
@@ -128,12 +127,12 @@ static void lm_dumpnvic(const char *msg, int irq)
irqrestore(flags);
}
#else
# define lm_dumpnvic(msg, irq)
# define tiva_dumpnvic(msg, irq)
#endif
/****************************************************************************
* Name: lm_nmi, lm_busfault, lm_usagefault, lm_pendsv,
* lm_dbgmonitor, lm_pendsv, lm_reserved
* Name: tiva_nmi, tiva_busfault, tiva_usagefault, tiva_pendsv,
* tiva_dbgmonitor, tiva_pendsv, tiva_reserved
*
* Description:
* Handlers for various execptions. None are handled and all are fatal
@@ -143,7 +142,7 @@ static void lm_dumpnvic(const char *msg, int irq)
****************************************************************************/
#ifdef CONFIG_DEBUG
static int lm_nmi(int irq, FAR void *context)
static int tiva_nmi(int irq, FAR void *context)
{
(void)irqsave();
dbg("PANIC!!! NMI received\n");
@@ -151,7 +150,7 @@ static int lm_nmi(int irq, FAR void *context)
return 0;
}
static int lm_busfault(int irq, FAR void *context)
static int tiva_busfault(int irq, FAR void *context)
{
(void)irqsave();
dbg("PANIC!!! Bus fault recived\n");
@@ -159,7 +158,7 @@ static int lm_busfault(int irq, FAR void *context)
return 0;
}
static int lm_usagefault(int irq, FAR void *context)
static int tiva_usagefault(int irq, FAR void *context)
{
(void)irqsave();
dbg("PANIC!!! Usage fault received\n");
@@ -167,7 +166,7 @@ static int lm_usagefault(int irq, FAR void *context)
return 0;
}
static int lm_pendsv(int irq, FAR void *context)
static int tiva_pendsv(int irq, FAR void *context)
{
(void)irqsave();
dbg("PANIC!!! PendSV received\n");
@@ -175,7 +174,7 @@ static int lm_pendsv(int irq, FAR void *context)
return 0;
}
static int lm_dbgmonitor(int irq, FAR void *context)
static int tiva_dbgmonitor(int irq, FAR void *context)
{
(void)irqsave();
dbg("PANIC!!! Debug Monitor receieved\n");
@@ -183,7 +182,7 @@ static int lm_dbgmonitor(int irq, FAR void *context)
return 0;
}
static int lm_reserved(int irq, FAR void *context)
static int tiva_reserved(int irq, FAR void *context)
{
(void)irqsave();
dbg("PANIC!!! Reserved interrupt\n");
@@ -193,7 +192,7 @@ static int lm_reserved(int irq, FAR void *context)
#endif
/****************************************************************************
* Name: lm_prioritize_syscall
* Name: tiva_prioritize_syscall
*
* Description:
* Set the priority of an exception. This function may be needed
@@ -202,7 +201,7 @@ static int lm_reserved(int irq, FAR void *context)
****************************************************************************/
#ifdef CONFIG_ARMV7M_USEBASEPRI
static inline void lm_prioritize_syscall(int priority)
static inline void tiva_prioritize_syscall(int priority)
{
uint32_t regval;
@@ -216,7 +215,7 @@ static inline void lm_prioritize_syscall(int priority)
#endif
/****************************************************************************
* Name: lm_irqinfo
* Name: tiva_irqinfo
*
* Description:
* Given an IRQ number, provide the register and bit setting to enable or
@@ -224,8 +223,8 @@ static inline void lm_prioritize_syscall(int priority)
*
****************************************************************************/
static int lm_irqinfo(int irq, uintptr_t *regaddr, uint32_t *bit,
uintptr_t offset)
static int tiva_irqinfo(int irq, uintptr_t *regaddr, uint32_t *bit,
uintptr_t offset)
{
DEBUGASSERT(irq >= LM_IRQ_NMI && irq < NR_IRQS);
@@ -352,7 +351,7 @@ void up_irqinitialize(void)
/* up_prioritize_irq(LM_IRQ_PENDSV, NVIC_SYSH_PRIORITY_MIN); */
#endif
#ifdef CONFIG_ARMV7M_USEBASEPRI
lm_prioritize_syscall(NVIC_SYSH_SVCALL_PRIORITY);
tiva_prioritize_syscall(NVIC_SYSH_SVCALL_PRIORITY);
#endif
/* If the MPU is enabled, then attach and enable the Memory Management
@@ -367,18 +366,18 @@ void up_irqinitialize(void)
/* Attach all other processor exceptions (except reset and sys tick) */
#ifdef CONFIG_DEBUG
irq_attach(LM_IRQ_NMI, lm_nmi);
irq_attach(LM_IRQ_NMI, tiva_nmi);
#ifndef CONFIG_ARMV7M_MPU
irq_attach(LM_IRQ_MEMFAULT, up_memfault);
#endif
irq_attach(LM_IRQ_BUSFAULT, lm_busfault);
irq_attach(LM_IRQ_USAGEFAULT, lm_usagefault);
irq_attach(LM_IRQ_PENDSV, lm_pendsv);
irq_attach(LM_IRQ_DBGMONITOR, lm_dbgmonitor);
irq_attach(LM_IRQ_RESERVED, lm_reserved);
irq_attach(LM_IRQ_BUSFAULT, tiva_busfault);
irq_attach(LM_IRQ_USAGEFAULT, tiva_usagefault);
irq_attach(LM_IRQ_PENDSV, tiva_pendsv);
irq_attach(LM_IRQ_DBGMONITOR, tiva_dbgmonitor);
irq_attach(LM_IRQ_RESERVED, tiva_reserved);
#endif
lm_dumpnvic("initial", NR_IRQS);
tiva_dumpnvic("initial", NR_IRQS);
#ifndef CONFIG_SUPPRESS_INTERRUPTS
@@ -402,7 +401,7 @@ void up_disable_irq(int irq)
uint32_t regval;
uint32_t bit;
if (lm_irqinfo(irq, &regaddr, &bit, NVIC_CLRENA_OFFSET) == 0)
if (tiva_irqinfo(irq, &regaddr, &bit, NVIC_CLRENA_OFFSET) == 0)
{
/* Modify the appropriate bit in the register to disable the interrupt.
* For normal interrupts, we need to set the bit in the associated
@@ -422,7 +421,7 @@ void up_disable_irq(int irq)
}
}
lm_dumpnvic("disable", irq);
tiva_dumpnvic("disable", irq);
}
/****************************************************************************
@@ -439,7 +438,7 @@ void up_enable_irq(int irq)
uint32_t regval;
uint32_t bit;
if (lm_irqinfo(irq, &regaddr, &bit, NVIC_ENA_OFFSET) == 0)
if (tiva_irqinfo(irq, &regaddr, &bit, NVIC_ENA_OFFSET) == 0)
{
/* Modify the appropriate bit in the register to enable the interrupt.
* For normal interrupts, we need to set the bit in the associated
@@ -459,7 +458,7 @@ void up_enable_irq(int irq)
}
}
lm_dumpnvic("enable", irq);
tiva_dumpnvic("enable", irq);
}
/****************************************************************************
@@ -518,7 +517,7 @@ int up_prioritize_irq(int irq, int priority)
regval |= (priority << shift);
putreg32(regval, regaddr);
lm_dumpnvic("prioritize", irq);
tiva_dumpnvic("prioritize", irq);
return OK;
}
#endif
arch/arm/src/tiva/lm_lowputc.c → arch/arm/src/tiva/tiva_lowputc.c
+21 -21
View File
@@ -1,7 +1,7 @@
/**************************************************************************
* arch/arm/src/tiva/lm_lowputc.c
* arch/arm/src/tiva/tiva_lowputc.c
*
* Copyright (C) 2009-2010 Gregory Nutt. All rights reserved.
* Copyright (C) 2009-2010, 2014 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@@ -46,10 +46,10 @@
#include "up_arch.h"
#include "up_internal.h"
#include "lm_gpio.h"
#include "chip/lm_pinmap.h"
#include "tiva_gpio.h"
#include "chip/tiva_pinmap.h"
#include "lm_lowputc.h"
#include "tiva_lowputc.h"
/**************************************************************************
* Pre-processor Definitions
@@ -261,8 +261,8 @@ void up_lowsetup(void)
regval |= SYSCON_RCGC1_UART0;
putreg32(regval, LM_SYSCON_RCGC1);
lm_configgpio(GPIO_UART0_RX);
lm_configgpio(GPIO_UART0_TX);
tiva_configgpio(GPIO_UART0_RX);
tiva_configgpio(GPIO_UART0_TX);
#endif
#ifdef CONFIG_LM_UART1
@@ -270,8 +270,8 @@ void up_lowsetup(void)
regval |= SYSCON_RCGC1_UART1;
putreg32(regval, LM_SYSCON_RCGC1);
lm_configgpio(GPIO_UART1_RX);
lm_configgpio(GPIO_UART1_TX);
tiva_configgpio(GPIO_UART1_RX);
tiva_configgpio(GPIO_UART1_TX);
#endif
#ifdef CONFIG_LM_UART2
@@ -279,8 +279,8 @@ void up_lowsetup(void)
regval |= SYSCON_RCGC1_UART2;
putreg32(regval, LM_SYSCON_RCGC1);
lm_configgpio(GPIO_UART2_RX);
lm_configgpio(GPIO_UART2_TX);
tiva_configgpio(GPIO_UART2_RX);
tiva_configgpio(GPIO_UART2_TX);
#endif
#ifdef CONFIG_LM_UART3
@@ -288,8 +288,8 @@ void up_lowsetup(void)
regval |= SYSCON_RCGCUART_R3;
putreg32(regval, LM_SYSCON_RCGCUART);
lm_configgpio(GPIO_UART3_RX);
lm_configgpio(GPIO_UART3_TX);
tiva_configgpio(GPIO_UART3_RX);
tiva_configgpio(GPIO_UART3_TX);
#endif
#ifdef CONFIG_LM_UART4
@@ -297,8 +297,8 @@ void up_lowsetup(void)
regval |= SYSCON_RCGCUART_R4;
putreg32(regval, LM_SYSCON_RCGCUART);
lm_configgpio(GPIO_UART4_RX);
lm_configgpio(GPIO_UART4_TX);
tiva_configgpio(GPIO_UART4_RX);
tiva_configgpio(GPIO_UART4_TX);
#endif
#ifdef CONFIG_LM_UART5
@@ -306,8 +306,8 @@ void up_lowsetup(void)
regval |= SYSCON_RCGCUART_R5;
putreg32(regval, LM_SYSCON_RCGCUART);
lm_configgpio(GPIO_UART5_RX);
lm_configgpio(GPIO_UART5_TX);
tiva_configgpio(GPIO_UART5_RX);
tiva_configgpio(GPIO_UART5_TX);
#endif
#ifdef CONFIG_LM_UART6
@@ -315,8 +315,8 @@ void up_lowsetup(void)
regval |= SYSCON_RCGCUART_R6;
putreg32(regval, LM_SYSCON_RCGCUART);
lm_configgpio(GPIO_UART6_RX);
lm_configgpio(GPIO_UART6_TX);
tiva_configgpio(GPIO_UART6_RX);
tiva_configgpio(GPIO_UART6_TX);
#endif
#ifdef CONFIG_LM_UART7
@@ -324,8 +324,8 @@ void up_lowsetup(void)
regval |= SYSCON_RCGCUART_R7;
putreg32(regval, LM_SYSCON_RCGCUART);
lm_configgpio(GPIO_UART7_RX);
lm_configgpio(GPIO_UART7_TX);
tiva_configgpio(GPIO_UART7_RX);
tiva_configgpio(GPIO_UART7_TX);
#endif
/* Enable the selected console device */
arch/arm/src/tiva/lm_lowputc.h → arch/arm/src/tiva/tiva_lowputc.h
+5 -5
View File
@@ -1,7 +1,7 @@
/************************************************************************************
* arch/arm/src/tiva/lm_lowputc.h
* arch/arm/src/tiva/tiva_lowputc.h
*
* Copyright (C) 2009-2010, 2013 Gregory Nutt. All rights reserved.
* Copyright (C) 2009-2010, 2013-2014 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@@ -33,8 +33,8 @@
*
************************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_LM_LOWPUTC_H
#define __ARCH_ARM_SRC_TIVA_LM_LOWPUTC_H
#ifndef __ARCH_ARM_SRC_TIVA_TIVA_LOWPUTC_H
#define __ARCH_ARM_SRC_TIVA_TIVA_LOWPUTC_H
/************************************************************************************
* Included Files
@@ -202,4 +202,4 @@ void up_lowsetup(void);
#endif
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_ARM_SRC_TIVA_LM_LOWPUTC_H */
#endif /* __ARCH_ARM_SRC_TIVA_TIVA_LOWPUTC_H */
arch/arm/src/tiva/lm_mpuinit.c → arch/arm/src/tiva/tiva_mpuinit.c
+7 -7
View File
@@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/tiva/lm_mpuinit.c
* arch/arm/src/tiva/tiva_mpuinit.c
*
* Copyright (C) 2013 Gregory Nutt. All rights reserved.
* Copyright (C) 2013-2014 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@@ -44,7 +44,7 @@
#include <nuttx/userspace.h>
#include "mpu.h"
#include "lm_mpuinit.h"
#include "tiva_mpuinit.h"
#if defined(CONFIG_NUTTX_KERNEL) && defined(CONFIG_ARMV7M_MPU)
@@ -73,7 +73,7 @@
****************************************************************************/
/****************************************************************************
* Name: lm_mpuinitialize
* Name: tiva_mpuinitialize
*
* Description:
* Configure the MPU to permit user-space access to only restricted SAM3U
@@ -81,7 +81,7 @@
*
****************************************************************************/
void lm_mpuinitialize(void)
void tiva_mpuinitialize(void)
{
uintptr_t datastart = MIN(USERSPACE->us_datastart, USERSPACE->us_bssstart);
uintptr_t dataend = MAX(USERSPACE->us_dataend, USERSPACE->us_bssend);
@@ -106,7 +106,7 @@ void lm_mpuinitialize(void)
}
/****************************************************************************
* Name: lm_mpu_uheap
* Name: tiva_mpu_uheap
*
* Description:
* Map the user-heap region.
@@ -115,7 +115,7 @@ void lm_mpuinitialize(void)
*
****************************************************************************/
void lm_mpu_uheap(uintptr_t start, size_t size)
void tiva_mpu_uheap(uintptr_t start, size_t size)
{
mpu_userintsram(start, size);
}
arch/arm/src/tiva/lm_mpuinit.h → arch/arm/src/tiva/tiva_mpuinit.h
+10 -10
View File
@@ -1,5 +1,5 @@
/************************************************************************************
* arch/arm/src/tiva/lm_mpuinit.h
* arch/arm/src/tiva/tiva_mpuinit.h
*
* Copyright (C) 2013 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@@ -33,8 +33,8 @@
*
************************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_LM_MPUINIT_H
#define __ARCH_ARM_SRC_TIVA_LM_MPUINIT_H
#ifndef __ARCH_ARM_SRC_TIVA_TIVA_MPUINIT_H
#define __ARCH_ARM_SRC_TIVA_TIVA_MPUINIT_H
/************************************************************************************
* Included Files
@@ -59,7 +59,7 @@
************************************************************************************/
/****************************************************************************
* Name: lm_mpuinitialize
* Name: tiva_mpuinitialize
*
* Description:
* Configure the MPU to permit user-space access to only unrestricted MCU
@@ -68,13 +68,13 @@
****************************************************************************/
#ifdef CONFIG_NUTTX_KERNEL
void lm_mpuinitialize(void);
void tiva_mpuinitialize(void);
#else
# define lm_mpuinitialize()
# define tiva_mpuinitialize()
#endif
/****************************************************************************
* Name: lm_mpu_uheap
* Name: tiva_mpu_uheap
*
* Description:
* Map the user heap region.
@@ -82,9 +82,9 @@ void lm_mpuinitialize(void);
****************************************************************************/
#ifdef CONFIG_NUTTX_KERNEL
void lm_mpu_uheap(uintptr_t start, size_t size);
void tiva_mpu_uheap(uintptr_t start, size_t size);
#else
# define lm_mpu_uheap(start,size)
# define tiva_mpu_uheap(start,size)
#endif
#endif /* __ARCH_ARM_SRC_TIVA_LM_MPUINIT_H */
#endif /* __ARCH_ARM_SRC_TIVA_TIVA_MPUINIT_H */
arch/arm/src/tiva/lm_serial.c → arch/arm/src/tiva/tiva_serial.c
+3 -3
View File
@@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/tiva/lm_serial.c
* arch/arm/src/tiva/tiva_serial.c
*
* Copyright (C) 2009-2010, 2012-2013 Gregory Nutt. All rights reserved.
* Copyright (C) 2009-2010, 2012-2014 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@@ -60,7 +60,7 @@
#include "up_internal.h"
#include "os_internal.h"
#include "lm_lowputc.h"
#include "tiva_lowputc.h"
/****************************************************************************
* Pre-processor Definitions
arch/arm/src/tiva/lm_ssi.c → arch/arm/src/tiva/tiva_ssi.c
+77 -72
View File
@@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/tiva/lm_ssi.c
* arch/arm/src/tiva/tiva_ssi.c
*
* Copyright (C) 2009-2010 Gregory Nutt. All rights reserved.
* Copyright (C) 2009-2010, 2014 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@@ -56,9 +56,9 @@
#include "up_arch.h"
#include "chip.h"
#include "lm_gpio.h"
#include "lm_ssi.h"
#include "chip/lm_pinmap.h"
#include "tiva_gpio.h"
#include "tiva_ssi.h"
#include "chip/tiva_pinmap.h"
/****************************************************************************
* Pre-processor Definitions
@@ -144,7 +144,7 @@
* Private Type Definitions
****************************************************************************/
struct lm_ssidev_s
struct tiva_ssidev_s
{
const struct spi_ops_s *ops; /* Common SPI operations */
#ifndef CONFIG_SSI_POLLWAIT
@@ -167,8 +167,8 @@ struct lm_ssidev_s
* per word.
*/
void (*txword)(struct lm_ssidev_s *priv);
void (*rxword)(struct lm_ssidev_s *priv);
void (*txword)(struct tiva_ssidev_s *priv);
void (*rxword)(struct tiva_ssidev_s *priv);
#if NSSI_ENABLED > 1
uint32_t base; /* SSI register base address */
@@ -202,15 +202,15 @@ struct lm_ssidev_s
/* SSI register access */
static inline uint32_t ssi_getreg(struct lm_ssidev_s *priv,
static inline uint32_t ssi_getreg(struct tiva_ssidev_s *priv,
unsigned int offset);
static inline void ssi_putreg(struct lm_ssidev_s *priv, unsigned int offset,
static inline void ssi_putreg(struct tiva_ssidev_s *priv, unsigned int offset,
uint32_t value);
/* Misc helpers */
static uint32_t ssi_disable(struct lm_ssidev_s *priv);
static void ssi_enable(struct lm_ssidev_s *priv, uint32_t enable);
static uint32_t ssi_disable(struct tiva_ssidev_s *priv);
static void ssi_enable(struct tiva_ssidev_s *priv, uint32_t enable);
#ifndef CONFIG_SSI_POLLWAIT
static void ssi_semtake(sem_t *sem);
@@ -219,27 +219,27 @@ static void ssi_semtake(sem_t *sem);
/* SSI data transfer */
static void ssi_txnull(struct lm_ssidev_s *priv);
static void ssi_txuint16(struct lm_ssidev_s *priv);
static void ssi_txuint8(struct lm_ssidev_s *priv);
static void ssi_rxnull(struct lm_ssidev_s *priv);
static void ssi_rxuint16(struct lm_ssidev_s *priv);
static void ssi_rxuint8(struct lm_ssidev_s *priv);
static inline bool ssi_txfifofull(struct lm_ssidev_s *priv);
static inline bool ssi_rxfifoempty(struct lm_ssidev_s *priv);
static void ssi_txnull(struct tiva_ssidev_s *priv);
static void ssi_txuint16(struct tiva_ssidev_s *priv);
static void ssi_txuint8(struct tiva_ssidev_s *priv);
static void ssi_rxnull(struct tiva_ssidev_s *priv);
static void ssi_rxuint16(struct tiva_ssidev_s *priv);
static void ssi_rxuint8(struct tiva_ssidev_s *priv);
static inline bool ssi_txfifofull(struct tiva_ssidev_s *priv);
static inline bool ssi_rxfifoempty(struct tiva_ssidev_s *priv);
#if CONFIG_SSI_TXLIMIT == 1 && defined(CONFIG_SSI_POLLWAIT)
static inline int ssi_performtx(struct lm_ssidev_s *priv);
static inline int ssi_performtx(struct tiva_ssidev_s *priv);
#else
static int ssi_performtx(struct lm_ssidev_s *priv);
static int ssi_performtx(struct tiva_ssidev_s *priv);
#endif
static inline void ssi_performrx(struct lm_ssidev_s *priv);
static int ssi_transfer(struct lm_ssidev_s *priv, const void *txbuffer,
static inline void ssi_performrx(struct tiva_ssidev_s *priv);
static int ssi_transfer(struct tiva_ssidev_s *priv, const void *txbuffer,
void *rxbuffer, unsigned int nwords);
/* Interrupt handling */
#ifndef CONFIG_SSI_POLLWAIT
static inline struct lm_ssidev_s *ssi_mapirq(int irq);
static inline struct tiva_ssidev_s *ssi_mapirq(int irq);
static int ssi_interrupt(int irq, void *context);
#endif
@@ -248,14 +248,14 @@ static int ssi_interrupt(int irq, void *context);
#ifndef CONFIG_SPI_OWNBUS
static int ssi_lock(FAR struct spi_dev_s *dev, bool lock);
#endif
static uint32_t ssi_setfrequencyinternal(struct lm_ssidev_s *priv,
static uint32_t ssi_setfrequencyinternal(struct tiva_ssidev_s *priv,
uint32_t frequency);
static uint32_t ssi_setfrequency(FAR struct spi_dev_s *dev,
uint32_t frequency);
static void ssi_setmodeinternal(struct lm_ssidev_s *priv,
static void ssi_setmodeinternal(struct tiva_ssidev_s *priv,
enum spi_mode_e mode);
static void ssi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode);
static void ssi_setbitsinternal(struct lm_ssidev_s *priv, int nbits);
static void ssi_setbitsinternal(struct tiva_ssidev_s *priv, int nbits);
static void ssi_setbits(FAR struct spi_dev_s *dev, int nbits);
static uint16_t ssi_send(FAR struct spi_dev_s *dev, uint16_t wd);
#ifdef CONFIG_SPI_EXCHANGE
@@ -279,13 +279,13 @@ static const struct spi_ops_s g_spiops =
#ifndef CONFIG_SPI_OWNBUS
.lock = ssi_lock,
#endif
.select = lm_spiselect, /* Provided externally by board logic */
.select = tiva_spiselect, /* Provided externally by board logic */
.setfrequency = ssi_setfrequency,
.setmode = ssi_setmode,
.setbits = ssi_setbits,
.status = lm_spistatus, /* Provided externally by board logic */
.status = tiva_spistatus, /* Provided externally by board logic */
#ifdef CONFIG_SPI_CMDDATA
.cmddata = lm_spicmddata,
.cmddata = tiva_spicmddata,
#endif
.send = ssi_send,
#ifdef CONFIG_SPI_EXCHANGE
@@ -298,7 +298,7 @@ static const struct spi_ops_s g_spiops =
/* This supports is up to two SSI busses/ports */
static struct lm_ssidev_s g_ssidev[] =
static struct tiva_ssidev_s g_ssidev[] =
{
#ifndef CONFIG_SSI0_DISABLE
{
@@ -347,7 +347,8 @@ static struct lm_ssidev_s g_ssidev[] =
*
****************************************************************************/
static inline uint32_t ssi_getreg(struct lm_ssidev_s *priv, unsigned int offset)
static inline uint32_t ssi_getreg(struct tiva_ssidev_s *priv,
unsigned int offset)
{
#if NSSI_ENABLED > 1
return getreg32(priv->base + offset);
@@ -372,7 +373,8 @@ static inline uint32_t ssi_getreg(struct lm_ssidev_s *priv, unsigned int offset)
*
****************************************************************************/
static inline void ssi_putreg(struct lm_ssidev_s *priv, unsigned int offset, uint32_t value)
static inline void ssi_putreg(struct tiva_ssidev_s *priv,
unsigned int offset, uint32_t value)
{
#if NSSI_ENABLED > 1
putreg32(value, priv->base + offset);
@@ -399,7 +401,7 @@ static inline void ssi_putreg(struct lm_ssidev_s *priv, unsigned int offset, uin
*
****************************************************************************/
static uint32_t ssi_disable(struct lm_ssidev_s *priv)
static uint32_t ssi_disable(struct tiva_ssidev_s *priv)
{
uint32_t retval;
uint32_t regval;
@@ -428,7 +430,7 @@ static uint32_t ssi_disable(struct lm_ssidev_s *priv)
*
****************************************************************************/
static void ssi_enable(struct lm_ssidev_s *priv, uint32_t enable)
static void ssi_enable(struct tiva_ssidev_s *priv, uint32_t enable)
{
uint32_t regval = ssi_getreg(priv, LM_SSI_CR1_OFFSET);
regval &= ~SSI_CR1_SSE;
@@ -481,13 +483,13 @@ static void ssi_semtake(sem_t *sem)
*
****************************************************************************/
static void ssi_txnull(struct lm_ssidev_s *priv)
static void ssi_txnull(struct tiva_ssidev_s *priv)
{
ssivdbg("TX: ->0xffff\n");
ssi_putreg(priv, LM_SSI_DR_OFFSET, 0xffff);
}
static void ssi_txuint16(struct lm_ssidev_s *priv)
static void ssi_txuint16(struct tiva_ssidev_s *priv)
{
uint16_t *ptr = (uint16_t*)priv->txbuffer;
ssivdbg("TX: %p->%04x\n", ptr, *ptr);
@@ -495,7 +497,7 @@ static void ssi_txuint16(struct lm_ssidev_s *priv)
priv->txbuffer = (void*)ptr;
}
static void ssi_txuint8(struct lm_ssidev_s *priv)
static void ssi_txuint8(struct tiva_ssidev_s *priv)
{
uint8_t *ptr = (uint8_t*)priv->txbuffer;
ssivdbg("TX: %p->%02x\n", ptr, *ptr);
@@ -520,7 +522,7 @@ static void ssi_txuint8(struct lm_ssidev_s *priv)
*
****************************************************************************/
static void ssi_rxnull(struct lm_ssidev_s *priv)
static void ssi_rxnull(struct tiva_ssidev_s *priv)
{
#if defined(SSI_DEBUG) && defined(CONFIG_DEBUG_VERBOSE)
uint32_t regval = ssi_getreg(priv, LM_SSI_DR_OFFSET);
@@ -530,7 +532,7 @@ static void ssi_rxnull(struct lm_ssidev_s *priv)
#endif
}
static void ssi_rxuint16(struct lm_ssidev_s *priv)
static void ssi_rxuint16(struct tiva_ssidev_s *priv)
{
uint16_t *ptr = (uint16_t*)priv->rxbuffer;
*ptr = (uint16_t)ssi_getreg(priv, LM_SSI_DR_OFFSET);
@@ -538,7 +540,7 @@ static void ssi_rxuint16(struct lm_ssidev_s *priv)
priv->rxbuffer = (void*)(++ptr);
}
static void ssi_rxuint8(struct lm_ssidev_s *priv)
static void ssi_rxuint8(struct tiva_ssidev_s *priv)
{
uint8_t *ptr = (uint8_t*)priv->rxbuffer;
*ptr = (uint8_t)ssi_getreg(priv, LM_SSI_DR_OFFSET);
@@ -560,7 +562,7 @@ static void ssi_rxuint8(struct lm_ssidev_s *priv)
*
****************************************************************************/
static inline bool ssi_txfifofull(struct lm_ssidev_s *priv)
static inline bool ssi_txfifofull(struct tiva_ssidev_s *priv)
{
return (ssi_getreg(priv, LM_SSI_SR_OFFSET) & SSI_SR_TNF) == 0;
}
@@ -579,7 +581,7 @@ static inline bool ssi_txfifofull(struct lm_ssidev_s *priv)
*
****************************************************************************/
static inline bool ssi_rxfifoempty(struct lm_ssidev_s *priv)
static inline bool ssi_rxfifoempty(struct tiva_ssidev_s *priv)
{
return (ssi_getreg(priv, LM_SSI_SR_OFFSET) & SSI_SR_RNE) == 0;
}
@@ -601,7 +603,7 @@ static inline bool ssi_rxfifoempty(struct lm_ssidev_s *priv)
****************************************************************************/
#if CONFIG_SSI_TXLIMIT == 1 && defined(CONFIG_SSI_POLLWAIT)
static inline int ssi_performtx(struct lm_ssidev_s *priv)
static inline int ssi_performtx(struct tiva_ssidev_s *priv)
{
/* Check if the Tx FIFO is full and more data to transfer */
@@ -618,7 +620,7 @@ static inline int ssi_performtx(struct lm_ssidev_s *priv)
#else /* CONFIG_SSI_TXLIMIT == 1 CONFIG_SSI_POLLWAIT */
static int ssi_performtx(struct lm_ssidev_s *priv)
static int ssi_performtx(struct tiva_ssidev_s *priv)
{
#ifndef CONFIG_SSI_POLLWAIT
uint32_t regval;
@@ -701,7 +703,7 @@ static int ssi_performtx(struct lm_ssidev_s *priv)
*
****************************************************************************/
static inline void ssi_performrx(struct lm_ssidev_s *priv)
static inline void ssi_performrx(struct tiva_ssidev_s *priv)
{
#ifndef CONFIG_SSI_POLLWAIT
uint32_t regval;
@@ -778,7 +780,7 @@ static inline void ssi_performrx(struct lm_ssidev_s *priv)
*
****************************************************************************/
static int ssi_transfer(struct lm_ssidev_s *priv, const void *txbuffer,
static int ssi_transfer(struct tiva_ssidev_s *priv, const void *txbuffer,
void *rxbuffer, unsigned int nwords)
{
#ifndef CONFIG_SSI_POLLWAIT
@@ -903,7 +905,7 @@ static int ssi_transfer(struct lm_ssidev_s *priv, const void *txbuffer,
****************************************************************************/
#ifndef CONFIG_SSI_POLLWAIT
static inline struct lm_ssidev_s *ssi_mapirq(int irq)
static inline struct tiva_ssidev_s *ssi_mapirq(int irq)
{
switch (irq)
{
@@ -944,7 +946,7 @@ static inline struct lm_ssidev_s *ssi_mapirq(int irq)
#ifndef CONFIG_SSI_POLLWAIT
static int ssi_interrupt(int irq, void *context)
{
struct lm_ssidev_s *priv = ssi_mapirq(irq);
struct tiva_ssidev_s *priv = ssi_mapirq(irq);
uint32_t regval;
int ntxd;
@@ -1022,7 +1024,7 @@ static int ssi_interrupt(int irq, void *context)
#ifndef CONFIG_SPI_OWNBUS
static int ssi_lock(FAR struct spi_dev_s *dev, bool lock)
{
FAR struct lm_ssidev_s *priv = (FAR struct lm_ssidev_s *)dev;
FAR struct tiva_ssidev_s *priv = (FAR struct tiva_ssidev_s *)dev;
if (lock)
{
@@ -1063,7 +1065,8 @@ static int ssi_lock(FAR struct spi_dev_s *dev, bool lock)
*
****************************************************************************/
static uint32_t ssi_setfrequencyinternal(struct lm_ssidev_s *priv, uint32_t frequency)
static uint32_t ssi_setfrequencyinternal(struct tiva_ssidev_s *priv,
uint32_t frequency)
{
uint32_t maxdvsr;
uint32_t cpsdvsr;
@@ -1165,7 +1168,7 @@ static uint32_t ssi_setfrequencyinternal(struct lm_ssidev_s *priv, uint32_t freq
static uint32_t ssi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
{
struct lm_ssidev_s *priv = (struct lm_ssidev_s *)dev;
struct tiva_ssidev_s *priv = (struct tiva_ssidev_s *)dev;
uint32_t enable;
uint32_t actual;
@@ -1195,7 +1198,7 @@ static uint32_t ssi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
*
****************************************************************************/
static void ssi_setmodeinternal(struct lm_ssidev_s *priv, enum spi_mode_e mode)
static void ssi_setmodeinternal(struct tiva_ssidev_s *priv, enum spi_mode_e mode)
{
uint32_t modebits;
uint32_t regval;
@@ -1251,7 +1254,7 @@ static void ssi_setmodeinternal(struct lm_ssidev_s *priv, enum spi_mode_e mode)
static void ssi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
{
struct lm_ssidev_s *priv = (struct lm_ssidev_s *)dev;
struct tiva_ssidev_s *priv = (struct tiva_ssidev_s *)dev;
uint32_t enable;
/* NOTE that the SSI must be disabled when setting any configuration registers. */
@@ -1279,7 +1282,7 @@ static void ssi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
*
****************************************************************************/
static void ssi_setbitsinternal(struct lm_ssidev_s *priv, int nbits)
static void ssi_setbitsinternal(struct tiva_ssidev_s *priv, int nbits)
{
uint32_t regval;
@@ -1299,7 +1302,7 @@ static void ssi_setbitsinternal(struct lm_ssidev_s *priv, int nbits)
static void ssi_setbits(FAR struct spi_dev_s *dev, int nbits)
{
struct lm_ssidev_s *priv = (struct lm_ssidev_s *)dev;
struct tiva_ssidev_s *priv = (struct tiva_ssidev_s *)dev;
uint32_t enable;
/* NOTE that the SSI must be disabled when setting any configuration registers. */
@@ -1327,7 +1330,7 @@ static void ssi_setbits(FAR struct spi_dev_s *dev, int nbits)
static uint16_t ssi_send(FAR struct spi_dev_s *dev, uint16_t wd)
{
struct lm_ssidev_s *priv = (struct lm_ssidev_s*)dev;
struct tiva_ssidev_s *priv = (struct tiva_ssidev_s*)dev;
uint16_t response = 0;
(void)ssi_transfer(priv, &wd, &response, 1);
@@ -1358,7 +1361,7 @@ static uint16_t ssi_send(FAR struct spi_dev_s *dev, uint16_t wd)
static void ssi_exchange(FAR struct spi_dev_s *dev, FAR const void *txbuffer,
FAR void *rxbuffer, size_t nwords)
{
struct lm_ssidev_s *priv = (struct lm_ssidev_s *)dev;
struct tiva_ssidev_s *priv = (struct tiva_ssidev_s *)dev;
(void)ssi_transfer(priv, txbuffer, rxbuffer, nwords);
}
#endif
@@ -1383,9 +1386,10 @@ static void ssi_exchange(FAR struct spi_dev_s *dev, FAR const void *txbuffer,
****************************************************************************/
#ifndef CONFIG_SPI_EXCHANGE
static void ssi_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer, size_t nwords)
static void ssi_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer,
size_t nwords)
{
struct lm_ssidev_s *priv = (struct lm_ssidev_s *)dev;
struct tiva_ssidev_s *priv = (struct tiva_ssidev_s *)dev;
(void)ssi_transfer(priv, buffer, NULL, nwords);
}
#endif
@@ -1410,9 +1414,10 @@ static void ssi_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer, size
****************************************************************************/
#ifndef CONFIG_SPI_EXCHANGE
static void ssi_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer, size_t nwords)
static void ssi_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer,
size_t nwords)
{
struct lm_ssidev_s *priv = (struct lm_ssidev_s *)dev;
struct tiva_ssidev_s *priv = (struct tiva_ssidev_s *)dev;
(void)ssi_transfer(priv, NULL, buffer, nwords);
}
#endif
@@ -1445,7 +1450,7 @@ static void ssi_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer, size_t nw
FAR struct spi_dev_s *up_spiinitialize(int port)
{
struct lm_ssidev_s *priv;
struct tiva_ssidev_s *priv;
irqstate_t flags;
uint8_t regval;
@@ -1473,10 +1478,10 @@ FAR struct spi_dev_s *up_spiinitialize(int port)
* logic in this file makes no assumptions about chip select)
*/
lm_configgpio(GPIO_SSI0_CLK); /* PA2: SSI0 clock (SSI0Clk) */
/* lm_configgpio(GPIO_SSI0_FSS); PA3: SSI0 frame (SSI0Fss) */
lm_configgpio(GPIO_SSI0_RX); /* PA4: SSI0 receive (SSI0Rx) */
lm_configgpio(GPIO_SSI0_TX); /* PA5: SSI0 transmit (SSI0Tx) */
tiva_configgpio(GPIO_SSI0_CLK); /* PA2: SSI0 clock (SSI0Clk) */
/* tiva_configgpio(GPIO_SSI0_FSS); PA3: SSI0 frame (SSI0Fss) */
tiva_configgpio(GPIO_SSI0_RX); /* PA4: SSI0 receive (SSI0Rx) */
tiva_configgpio(GPIO_SSI0_TX); /* PA5: SSI0 transmit (SSI0Tx) */
break;
#endif /* CONFIG_SSI0_DISABLE */
@@ -1495,10 +1500,10 @@ FAR struct spi_dev_s *up_spiinitialize(int port)
/* Configure SSI1 GPIOs */
lm_configgpio(GPIO_SSI1_CLK); /* PE0: SSI1 clock (SSI1Clk) */
/* lm_configgpio(GPIO_SSI1_FSS); PE1: SSI1 frame (SSI1Fss) */
lm_configgpio(GPIO_SSI1_RX); /* PE2: SSI1 receive (SSI1Rx) */
lm_configgpio(GPIO_SSI1_TX); /* PE3: SSI1 transmit (SSI1Tx) */
tiva_configgpio(GPIO_SSI1_CLK); /* PE0: SSI1 clock (SSI1Clk) */
/* tiva_configgpio(GPIO_SSI1_FSS); PE1: SSI1 frame (SSI1Fss) */
tiva_configgpio(GPIO_SSI1_RX); /* PE2: SSI1 receive (SSI1Rx) */
tiva_configgpio(GPIO_SSI1_TX); /* PE3: SSI1 transmit (SSI1Tx) */
break;
#endif /* CONFIG_SSI1_DISABLE */
arch/arm/src/tiva/lm_ssi.h → arch/arm/src/tiva/tiva_ssi.h
+12 -12
View File
@@ -1,5 +1,5 @@
/************************************************************************************
* arch/arm/src/tiva/lm_ssi.h
* arch/arm/src/tiva/tiva_ssi.h
*
* Copyright (C) 2009-2010, 2013 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@@ -33,8 +33,8 @@
*
************************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_LM_SSI_H
#define __ARCH_ARM_SRC_TIVA_LM_SSI_H
#ifndef __ARCH_ARM_SRC_TIVA_TIVA_SSI_H
#define __ARCH_ARM_SRC_TIVA_TIVA_SSI_H
/************************************************************************************
* Included Files
@@ -73,20 +73,20 @@ extern "C"
****************************************************************************/
/****************************************************************************
* The external functions, lm_spiselect, lm_spistatus, and
* lm_spicmddata must be provided by board-specific logic. These are
* The external functions, tiva_spiselect, tiva_spistatus, and
* tiva_spicmddata must be provided by board-specific logic. These are
* implementations of the select, status, and cmddata methods of the SPI
* interface defined by struct spi_ops_s (see include/nuttx/spi/spi.h).
* All other methods (including up_spiinitialize()) are provided by common
* logic. To use this common SPI logic on your board:
*
* 1. Provide logic in lm_boardinitialize() to configure SPI chip select
* 1. Provide logic in tiva_boardinitialize() to configure SPI chip select
* pins.
* 2. Provide lm_spiselect() and lm_spistatus() functions in your
* 2. Provide tiva_spiselect() and tiva_spistatus() functions in your
* board-specific logic. These functions will perform chip selection and
* status operations using GPIOs in the way your board is configured.
* 3. If CONFIG_SPI_CMDDATA is defined in your NuttX configuration, provide
* the lm_spicmddata() function in your board-specific logic. This
* the tiva_spicmddata() function in your board-specific logic. This
* functions will perform cmd/data selection operations using GPIOs in
* the way your board is configured.
* 4. Add a call to up_spiinitialize() in your low level application
@@ -100,10 +100,10 @@ extern "C"
struct spi_dev_s;
enum spi_dev_e;
void lm_spiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
uint8_t lm_spistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
void tiva_spiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected);
uint8_t tiva_spistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
#ifdef CONFIG_SPI_CMDDATA
int lm_spicmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
int tiva_spicmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
#endif
#if defined(__cplusplus)
@@ -111,4 +111,4 @@ int lm_spicmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd);
#endif
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_ARM_SRC_TIVA_LM_SSI_H */
#endif /* __ARCH_ARM_SRC_TIVA_TIVA_SSI_H */
arch/arm/src/tiva/lm_start.c → arch/arm/src/tiva/tiva_start.c
+7 -8
View File
@@ -1,8 +1,7 @@
/****************************************************************************
* arch/arm/src/tiva/lm_start.c
* arch/arm/src/chip/lm_start.c
* arch/arm/src/tiva/tiva_start.c
*
* Copyright (C) 2009, 2012 Gregory Nutt. All rights reserved.
* Copyright (C) 2009, 2012, 2014 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@@ -50,9 +49,9 @@
#include "up_arch.h"
#include "up_internal.h"
#include "lm_lowputc.h"
#include "lm_syscontrol.h"
#include "lm_userspace.h"
#include "tiva_lowputc.h"
#include "tiva_syscontrol.h"
#include "tiva_userspace.h"
/****************************************************************************
* Pre-processor Definitions
@@ -149,13 +148,13 @@ void __start(void)
*/
#ifdef CONFIG_NUTTX_KERNEL
lm_userspace();
tiva_userspace();
showprogress('E');
#endif
/* Initialize onboard resources */
lm_boardinitialize();
tiva_boardinitialize();
showprogress('F');
/* Then start NuttX */
arch/arm/src/tiva/lm_syscontrol.c → arch/arm/src/tiva/tiva_syscontrol.c
+17 -19
View File
@@ -1,8 +1,7 @@
/****************************************************************************
* arch/arm/src/tiva/lm_syscontrol.c
* arch/arm/src/chip/lm_syscontrol.c
* arch/arm/src/tiva/tiva_syscontrol.c
*
* Copyright (C) 2009 Gregory Nutt. All rights reserved.
* Copyright (C) 2009-2014 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@@ -50,7 +49,7 @@
#include "up_arch.h"
#include "up_internal.h"
#include "chip.h"
#include "lm_syscontrol.h"
#include "tiva_syscontrol.h"
/****************************************************************************
* Pre-processor Definitions
@@ -94,7 +93,7 @@
****************************************************************************/
/****************************************************************************
* Name: lm_delay
* Name: tiva_delay
*
* Description:
* Wait for the newly selected oscillator(s) to settle. This is tricky because
@@ -103,7 +102,7 @@
*
****************************************************************************/
static inline void lm_delay(uint32_t delay)
static inline void tiva_delay(uint32_t delay)
{
__asm__ __volatile__("1:\n"
"\tsubs %0, #1\n"
@@ -112,7 +111,7 @@ static inline void lm_delay(uint32_t delay)
}
/****************************************************************************
* Name: lm_oscdelay
* Name: tiva_oscdelay
*
* Description:
* Wait for the newly selected oscillator(s) to settle. This is tricky because
@@ -121,7 +120,7 @@ static inline void lm_delay(uint32_t delay)
*
****************************************************************************/
static inline void lm_oscdelay(uint32_t rcc, uint32_t rcc2)
static inline void tiva_oscdelay(uint32_t rcc, uint32_t rcc2)
{
/* Wait for the oscillator to stabilize. A smaller delay is used if the
* current clock rate is very slow.
@@ -154,18 +153,18 @@ static inline void lm_oscdelay(uint32_t rcc, uint32_t rcc2)
/* Then delay that number of loops */
lm_delay(delay);
tiva_delay(delay);
}
/****************************************************************************
* Name: lm_plllock
* Name: tiva_plllock
*
* Description:
* The new RCC values have been selected... wait for the PLL to lock on
*
****************************************************************************/
static inline void lm_plllock(void)
static inline void tiva_plllock(void)
{
volatile uint32_t delay;
@@ -191,7 +190,7 @@ static inline void lm_plllock(void)
****************************************************************************/
/****************************************************************************
* Name: lm_clockconfig
* Name: tiva_clockconfig
*
* Description:
* Called to change to new clock based on desired rcc and rcc2 settings.
@@ -200,7 +199,7 @@ static inline void lm_plllock(void)
*
****************************************************************************/
void lm_clockconfig(uint32_t newrcc, uint32_t newrcc2)
void tiva_clockconfig(uint32_t newrcc, uint32_t newrcc2)
{
uint32_t rcc;
uint32_t rcc2;
@@ -241,7 +240,7 @@ void lm_clockconfig(uint32_t newrcc, uint32_t newrcc2)
* clock setting, not the one that we are configuring.
*/
lm_oscdelay(rcc, rcc2);
tiva_oscdelay(rcc, rcc2);
}
/* Set the new crystal value, oscillator source and PLL configuration */
@@ -282,7 +281,7 @@ void lm_clockconfig(uint32_t newrcc, uint32_t newrcc2)
/* Wait for the new crystal value and oscillator source to take effect */
lm_delay(16);
tiva_delay(16);
/* Set the requested system divider and disable the non-selected osciallators */
@@ -298,7 +297,7 @@ void lm_clockconfig(uint32_t newrcc, uint32_t newrcc2)
{
/* Yes, wail untill the PLL is locked */
lm_plllock();
tiva_plllock();
/* Then enable the PLL */
@@ -322,7 +321,7 @@ void lm_clockconfig(uint32_t newrcc, uint32_t newrcc2)
/* Wait for the system divider to be effective */
lm_delay(6);
tiva_delay(6);
}
/****************************************************************************
@@ -348,6 +347,5 @@ void up_clockconfig(void)
* header file
*/
lm_clockconfig(LM_RCC_VALUE, LM_RCC2_VALUE);
tiva_clockconfig(LM_RCC_VALUE, LM_RCC2_VALUE);
}
arch/arm/src/tiva/lm_syscontrol.h → arch/arm/src/tiva/tiva_syscontrol.h
+7 -7
View File
@@ -1,7 +1,7 @@
/************************************************************************************
* arch/arm/src/tiva/lm_syscontrol.h
* arch/arm/src/tiva/tiva_syscontrol.h
*
* Copyright (C) 2009-2010, 2013 Gregory Nutt. All rights reserved.
* Copyright (C) 2009-2010, 2013-2014 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@@ -33,8 +33,8 @@
*
************************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_LM_SYSCONTROL_H
#define __ARCH_ARM_SRC_TIVA_LM_SYSCONTROL_H
#ifndef __ARCH_ARM_SRC_TIVA_TIVA_SYSCONTROL_H
#define __ARCH_ARM_SRC_TIVA_TIVA_SYSCONTROL_H
/************************************************************************************
* Included Files
@@ -70,7 +70,7 @@ extern "C"
****************************************************************************/
/****************************************************************************
* Name: lm_clockconfig
* Name: tiva_clockconfig
*
* Description:
* Called to change to new clock based on desired rcc and rcc2 settings.
@@ -79,7 +79,7 @@ extern "C"
*
****************************************************************************/
void lm_clockconfig(uint32_t newrcc, uint32_t newrcc2);
void tiva_clockconfig(uint32_t newrcc, uint32_t newrcc2);
/****************************************************************************
* Name: up_clockconfig
@@ -97,4 +97,4 @@ void up_clockconfig(void);
#endif
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_ARM_SRC_TIVA_LM_SYSCONTROL_H */
#endif /* __ARCH_ARM_SRC_TIVA_TIVA_SYSCONTROL_H */
arch/arm/src/tiva/lm_timerisr.c → arch/arm/src/tiva/tiva_timerisr.c
+2 -2
View File
@@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/tiva/lm_timerisr.c
* arch/arm/src/tiva/tiva_timerisr.c
*
* Copyright (C) 2009 Gregory Nutt. All rights reserved.
* Copyright (C) 2009, 2014 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
arch/arm/src/tiva/lm_userspace.c → arch/arm/src/tiva/tiva_userspace.c
+6 -7
View File
@@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/tiva/lm_userspace.c
* arch/arm/src/tiva/tiva_userspace.c
*
* Copyright (C) 2013 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@@ -44,8 +44,8 @@
#include <nuttx/userspace.h>
#include "lm_mpuinit.h"
#include "lm_userspace.h"
#include "tiva_mpuinit.h"
#include "tiva_userspace.h"
#ifdef CONFIG_NUTTX_KERNEL
@@ -66,7 +66,7 @@
****************************************************************************/
/****************************************************************************
* Name: lm_userspace
* Name: tiva_userspace
*
* Description:
* For the case of the separate user-/kernel-space build, perform whatever
@@ -76,7 +76,7 @@
*
****************************************************************************/
void lm_userspace(void)
void tiva_userspace(void)
{
uint8_t *src;
uint8_t *dest;
@@ -112,8 +112,7 @@ void lm_userspace(void)
/* Configure the MPU to permit user-space access to its FLASH and RAM */
lm_mpuinitialize();
tiva_mpuinitialize();
}
#endif /* CONFIG_NUTTX_KERNEL */
arch/arm/src/tiva/lm_userspace.h → arch/arm/src/tiva/tiva_userspace.h
+4 -4
View File
@@ -1,7 +1,7 @@
/************************************************************************************
* arch/arm/src/tiva/lm_userspace.h
* arch/arm/src/tiva/tiva_userspace.h
*
* Copyright (C) 2013 Gregory Nutt. All rights reserved.
* Copyright (C) 2013-2014 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@@ -59,7 +59,7 @@
************************************************************************************/
/****************************************************************************
* Name: lm_userspace
* Name: tiva_userspace
*
* Description:
* For the case of the separate user-/kernel-space build, perform whatever
@@ -70,7 +70,7 @@
****************************************************************************/
#ifdef CONFIG_NUTTX_KERNEL
void lm_userspace(void);
void tiva_userspace(void);
#endif
#endif /* __ARCH_ARM_SRC_TIVA_LM_USERSPACE_H */
arch/arm/src/tiva/lm_vectors.S → arch/arm/src/tiva/tiva_vectors.S
+30 -31
View File
@@ -1,8 +1,7 @@
/************************************************************************************
* arch/arm/src/tiva/lm_vectors.S
* arch/arm/src/chip/lm_vectors.S
* arch/arm/src/tiva/tiva_vectors.S
*
* Copyright (C) 2009-2010, 2013 Gregory Nutt. All rights reserved.
* Copyright (C) 2009-2010, 2013-2014 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@@ -104,7 +103,7 @@
.syntax unified
.thumb
.file "lm_vectors.S"
.file "tiva_vectors.S"
/* Check if common ARMv7 interrupt vectoring is used (see arch/arm/src/armv7-m/up_vectors.S) */
@@ -145,20 +144,20 @@ _vectors:
.word IDLE_STACK /* Vector 0: Reset stack pointer */
.word __start /* Vector 1: Reset vector */
.word lm_nmi /* Vector 2: Non-Maskable Interrupt (NMI) */
.word lm_hardfault /* Vector 3: Hard fault */
.word lm_mpu /* Vector 4: Memory management (MPU) */
.word lm_busfault /* Vector 5: Bus fault */
.word lm_usagefault /* Vector 6: Usage fault */
.word lm_reserved /* Vector 7: Reserved */
.word lm_reserved /* Vector 8: Reserved */
.word lm_reserved /* Vector 9: Reserved */
.word lm_reserved /* Vector 10: Reserved */
.word lm_svcall /* Vector 11: SVC call */
.word lm_dbgmonitor /* Vector 12: Debug monitor */
.word lm_reserved /* Vector 13: Reserved */
.word lm_pendsv /* Vector 14: Pendable system service request */
.word lm_systick /* Vector 15: System tick */
.word tiva_nmi /* Vector 2: Non-Maskable Interrupt (NMI) */
.word tiva_hardfault /* Vector 3: Hard fault */
.word tiva_mpu /* Vector 4: Memory management (MPU) */
.word tiva_busfault /* Vector 5: Bus fault */
.word tiva_usagefault /* Vector 6: Usage fault */
.word tiva_reserved /* Vector 7: Reserved */
.word tiva_reserved /* Vector 8: Reserved */
.word tiva_reserved /* Vector 9: Reserved */
.word tiva_reserved /* Vector 10: Reserved */
.word tiva_svcall /* Vector 11: SVC call */
.word tiva_dbgmonitor /* Vector 12: Debug monitor */
.word tiva_reserved /* Vector 13: Reserved */
.word tiva_pendsv /* Vector 14: Pendable system service request */
.word tiva_systick /* Vector 15: System tick */
/* External Interrupts */
@@ -168,9 +167,9 @@ _vectors:
#define VECTOR(l,i) .word l
#undef UNUSED
#define UNUSED(i) .word lm_reserved
#define UNUSED(i) .word tiva_reserved
#include "chip/chip/lm_vectors.h"
#include "chip/chip/tiva_vectors.h"
.size _vectors, .-_vectors
/************************************************************************************
@@ -181,16 +180,16 @@ _vectors:
.type handlers, function
.thumb_func
handlers:
HANDLER lm_reserved, LM_IRQ_RESERVED /* Unexpected/reserved vector */
HANDLER lm_nmi, LM_IRQ_NMI /* Vector 2: Non-Maskable Interrupt (NMI) */
HANDLER lm_hardfault, LM_IRQ_HARDFAULT /* Vector 3: Hard fault */
HANDLER lm_mpu, LM_IRQ_MEMFAULT /* Vector 4: Memory management (MPU) */
HANDLER lm_busfault, LM_IRQ_BUSFAULT /* Vector 5: Bus fault */
HANDLER lm_usagefault, LM_IRQ_USAGEFAULT /* Vector 6: Usage fault */
HANDLER lm_svcall, LM_IRQ_SVCALL /* Vector 11: SVC call */
HANDLER lm_dbgmonitor, LM_IRQ_DBGMONITOR /* Vector 12: Debug Monitor */
HANDLER lm_pendsv, LM_IRQ_PENDSV /* Vector 14: Penable system service request */
HANDLER lm_systick, LM_IRQ_SYSTICK /* Vector 15: System tick */
HANDLER tiva_reserved, LM_IRQ_RESERVED /* Unexpected/reserved vector */
HANDLER tiva_nmi, LM_IRQ_NMI /* Vector 2: Non-Maskable Interrupt (NMI) */
HANDLER tiva_hardfault, LM_IRQ_HARDFAULT /* Vector 3: Hard fault */
HANDLER tiva_mpu, LM_IRQ_MEMFAULT /* Vector 4: Memory management (MPU) */
HANDLER tiva_busfault, LM_IRQ_BUSFAULT /* Vector 5: Bus fault */
HANDLER tiva_usagefault, LM_IRQ_USAGEFAULT /* Vector 6: Usage fault */
HANDLER tiva_svcall, LM_IRQ_SVCALL /* Vector 11: SVC call */
HANDLER tiva_dbgmonitor, LM_IRQ_DBGMONITOR /* Vector 12: Debug Monitor */
HANDLER tiva_pendsv, LM_IRQ_PENDSV /* Vector 14: Penable system service request */
HANDLER tiva_systick, LM_IRQ_SYSTICK /* Vector 15: System tick */
#undef VECTOR
#define VECTOR(l,i) HANDLER l, i
@@ -198,7 +197,7 @@ handlers:
#undef UNUSED
#define UNUSED(i)
#include "chip/chip/lm_vectors.h"
#include "chip/chip/tiva_vectors.h"
/* Common IRQ handling logic. On entry here, the return stack is on either
* the PSP or the MSP and looks like the following: