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@@ -136,6 +136,17 @@ config ARCH_SINGLE_SECURITY_STATE
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GIC or other ARM architecture feature will with different
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configure
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config ARM64_SMP_BUSY_WAIT
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bool "Busy wait when SMP boot"
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default n
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depends on SMP
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---help---
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Enables busy wait when SMP boot
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config ARM64_SMP_BUSY_WAIT_FLAG_ADDR
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hex "Busy wait flag address"
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depends on ARM64_SMP_BUSY_WAIT
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config ARCH_HAVE_EL3
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bool
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default n
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@@ -207,6 +207,12 @@ int up_cpu_start(int cpu)
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sched_note_cpu_start(this_task(), cpu);
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#endif
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#ifdef CONFIG_ARM64_SMP_BUSY_WAIT
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uint32_t *address = (uint32_t *)CONFIG_ARM64_SMP_BUSY_WAIT_FLAG_ADDR;
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*address = 1;
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up_flush_dcache((uintptr_t)address, sizeof(address));
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#endif
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arm64_start_cpu(cpu);
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return 0;
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@@ -144,6 +144,16 @@ real_start:
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cmp x1, #0
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beq primary_core
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/* Wait until cpu0 notify */
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#ifdef CONFIG_ARM64_SMP_BUSY_WAIT
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ldr x2, =CONFIG_ARM64_SMP_BUSY_WAIT_FLAG_ADDR
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1:
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ldr x3, [x2, #0]
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cmp x3, #0
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beq 1b
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#endif
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/* we can now load our stack pointer value and move on */
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ldr x24, =g_cpu_idlestackalloc
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