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Young
2016-09-21 16:31:22 +08:00
parent e30a3b780c 1c20376e39
commit 8d85fe435f
586 changed files with 33642 additions and 1999 deletions
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ChangeLog
+188 -3
View File
@@ -10536,8 +10536,7 @@
nuttx/libc/mqueue to nuttx/sched/mqueue. Also add syscall support
for mq_setattr() and mq_getattr(). This is necessary in protected and
kernel builds because in those cases the message queue structure is
protected and cannot be accessed directly from user mode code. Noted
by Jouko Holopainen (2015-06-03).
protected and cannot be accessed directly from user mode code (2015-06-03).
* drivers/net/tun.c: TUN driver bug fix. From Max Neklyudov (2015-06-03.
* drivers/net/Kconfig, include/nuttx/net/mii.h, and
arch/arm/src/lpc17xx/lpc17_ethernet.c: Add support for the Micrel
@@ -12394,7 +12393,6 @@
(2016-07-23).
* Freedom-K64F: Add PWM support. From Jordan MacIntyre (2016-07-25).
7.18 2016-xx-xx Gregory Nutt <gnutt@nuttx.org>
* drivers/serial/pty.c, serial.c, usbdev/cdcacm.c, include/nuttx/fs/ioctl.h:
@@ -12487,3 +12485,190 @@
2016-08-01).
* drivers/sensors: Add KXJT9 Accelerometer driver from the Motorola
Moto Z MDK (2016-08-02).
* arch/arm/sim: Add a simulated I/O Expander driver (2016-08-03).
* configs/sim: Add logic to set the simulated I/O expander for testing
with apps/examples/gpio (2016-08-03).
* fs/fat: FAT performance improvement. In large files, seeking to a
position from the beginning of the file can be very time consuming.
ftell does lssek(fd, 0, SET_CURR). In that case, that is wasted time
since we are going to seek to the same position. This fix short-
circutes fat_seek() in all cases where we attempt to seek to current
position. Suggested by Nate Weibley (2016-08-03).
* tools/sethost.sh: Add sethost.sh. This is a script that you can use
to quickly change the host platform from Linux to Windows/Cygwin.
Might save you a lot of headaches (2016-08-03).
* arch/arm/src/tiva: Add tiva PWM lower-half driver implementation.
From Young (2016-08-05).
* drivers/spi/spi_transfer.c: Add a helper function that encapsulates
and manages a sequence of SPI transfers (2016-08-05).
* drivers/spi: Add an SPI character driver that will permit access to
the SPI bus for testing purposes. This driver is a simple wrapper
around spi_transfer() (2016-08-05).
* drivers/wireless: Add MFRC522 RFID ISO14443 and Mifare transceiver
driver. From Alan Carvalho de Assis (2016-08-06).
* configs/stm32f103-minimum: Add board support to MFRC522 driver. From
Alan Carvalho de Assis (2016-08-06).
* arch/renesas: Rename arch/sh to arch/renesas (2016-08-06).
* arch/arm/src/efm32, stm32, stm32l4: STM32 and EFM32 SPI drivers
adopted an incompatible conventions somewhere along the line. The
set the number of bits to negative when calling SPI_SETBITS which had
the magical side-effect of setting LSB first order of bit
transmission. This is not only a hokey way to pass control
information but is supported by no other SPI drivers. This change
three things: (1) It adds HWFEAT_LSBFIRST as a new H/W feature.
(2) It changes the implementations of SPI_SETBITS in the STM32 and
EFM32 derivers so that negated bit numbers are simply errors and it
adds the SPI_HWFEATURES method that can set the LSB bit order, and
(3) It changes all calls with negative number of bits from all
drivers: The number of bits is now always positive and SPI_HWFEATURES
is called with HWFEAT_LSBFIRST to set the bit order (2016-08-08).
* arch/arm/src/stm32: Add missing SPI2 and SPI3 support for STM32F3F3.
Add STM32F37XX DMA channel configuration. For STM32F37XX,
SYSCFG_EXTICR_PORTE defined twice. From Alan Carvalho de Assis
(2016-08-08).
* arch/arm/src/stm32: Make stm32_pwr_enablebkp thread safe. From
Max Neklyudov (2016-08-09).
* arch/arm/src/stm32: SAM3/4 GPIO: Enable peripheral clock for GPIO port
when GPIO is configured as input. The value of a GPIO input is only
sampled when the peripheral clock for the port controller the GPIO
resides in is enabled. Therefore we need to enable the clock even when
polling a GPIO. From Wolfgang Reissnegger (2016-08-09).
* arch/arm/src/tiva: Fix two bugs of tiva pwm lower-half driver
implementation. From Young (2016-08-10).
* sched/group: Explicitly initialize the group tg_exitsem with
sem_init(). The existing logic worked because the correct
initialization value is all zero, but it is better to initialize the
semaphore explicitly (2016-08-10).
* arch/arm/stm32: Fix bad pllmul values for STM32F1XX connectivity line.
STM32F1XX connectivity line supports only x4, x5, x6, x7, x8, x9 and
x6.5 values. From Michał Łyszczek (2016-08-11).
* include/nuttx/timers: Add oneshot timer lower half interface
(2016-08-11).
* arch/arm/src/stm32: Add a experimental oneshot, lower-half driver for
STM32 (2016-08-11).
* arch/arm/src/samv7: Add option to support oneshot timer without free-
running timer. Add oneshot lower half driver (2016-08-11).
* arch/arm/src/sama5: Add option to support oneshot timer without free-
running timer. Add oneshot lower half driver (2016-08-11).
* arch/arm/src/sam34: SAM4CM: Add option to support oneshot timer without
free-running timer. Add oneshot lower half driver (2016-08-11).
* arch/arm/src/stm32l4: Add oneshot lower half driver (2016-08-11).
* libc/stdlib: strtod() was not returning endptr on error conditions
(2016-08-11).
* libc/math: floor(), floorf(), and floorl(): Fix logic error. Was not
correctly handling negative integral value (2016-08-11).
* configs/sim: Add a configuration useful for testing Mini Basic
(2016-08-12).
* drivers/timers: Add an upper-half, oneshot timer character driver
(2016-08-12).
* arch/sim/src: Add a simulated oneshot lowerhalf driver (2016-08-12).
* arch/arm/src/stm32: STM32F3 SPI: Fix the number of bit setting for
the F3. That and data packing work differently on the STM32F3 than
for other STM32 parts (2016-08-12).
* arch/arm/stm32 and stm32l4: Enabling SPI DMA loses other bits in CR2
(2016-08-13).
* arch/arm/src/stm32: STM32F3 SPI: Cannot write always 16-bit value to
DR register because of how the F3 implements data packing (2016-08-13).
* Kinetis: Add support for I2C and RTC. From v01d (phreakuencies)
(2016-08-13).
* teensy 3.x i2c. From v01d (phreakuencies) (2016-08-13).
* SH1106 0.96 OLED module support (SSD1306 compatible) + I2C fixes.
From v01d (phreakuencies) (2016-08-13).
* Add support for SAMV7 DACC module. From iotr Mienkowski (2016-08-15).
* Add oneshot board initialization to stm32f103-minimum. From Alan
Carvalho de Assis (2016-08-15).
* drivers/audio/tone.c: Add Audio Tone Generator for NuttX. From Alan
Carvalho de Assis (2016-08-16).
* configs/stm32f103-minimum: Add board configuration to initialize Audio
Tone Generator. From Alan Carvalho de Assis (2016-08-16).
* STM32F411 and STM32F446 map i2c2_sda_4 to different alternate function
numbers. From Konstantin Berezenko (2016-08-17).
* STM32 DMA Fix: Change stm32 adc dma callback to send channel number
instead of index. From Konstantin Berezenko (2016-08-17).
* SAMA5: Add missing oneshot max_delay method (2016-08-18).
* configs/stm32bufferfly2: Add support for the Kamami stm32butterfly2
development board with optional ETH phy. From Michał Łyszczek
(2016-08-19).
* libc/misc: Separate XorShift128 PRNG from /dev/urandom and make it
generally available (2016-08-20).
* sched/sched_cpuload_oneshot: Use the oneshot timer with optional
entropy to measure cPU load if so configured (2016-08-20).
* drivers/usbhost/usbhost_composite.c: An an EXPERIMENTAL prototype of
how USB host support for composite devices might be implemented. This
feature is EXPERIMENTAL because (1) it is untested and (2) has some
know design issues that must be addressed before it can be of use
(2016-08-28).
* CXXFLAGS: add -fcheck-new whenever -fno-exceptions is used. From Beat
Küng (2016-08-23).
* tools/mkfsdata.pl was still generating the old-style apps/include
inclusion paths (2016-08-23).
* drivers/sensors: Add drvier for the LIS3MDL 3 axis magnetometer. From
Alexander Entinger (2016-08-23).
* drivers/sensors: Add driver for the MLX90393 3 axis magnetometer.
From Alexander Entinger (2016-08-23).
* drivers/mtd: Add Fujistu MB85RS256B ramtron support. From Beat Küng
(2016-08-23).
* drivers/sensors: Add driver for the LIS3DSH 3 axis accelerometer. From
Alexander Entinger (2016-08-24).
* drivers/sensors: Add driver for the Bosch BMG160 3 axis gyroscope.
From Alexander Entinger (2016-08-24).
* STM32: Add IAR-style STM32F1xx vectors. Tested on STM32F103RB and
STM32F107RC. From Aleksandr Vyhovanec (2016-08-24).
* libc/header files: Add POSIX type sig_atomic_t. From Sebastien
Lorquet (2016-08-24).
* libc/header files: isatty() should be prototypes in unstid.h, not
termios.h. From Sebastien Lorquet (2016-08-24).
* Documentation: Update to NuttX C coding style document with additions
discussing long comments on the right side of a statement or data
definition (2016-08-24).
* LPC43xx serial: Fix typos in LPC43 serial driver. Found by Vytautas
Lukenskas (2016-08-24).
* libc/time: This commit adds the difftime() function. The function
depends on the toolchain-dependent CONFIG_HAVE_DOUBLE so is not
available on tiny platforms. From Sebastien Lorquet (2016-08-24).
* libc/stdio: Add support for remove(). From Sebastien Lorquet
(2016-08-25).
* STM32 OTGFS device: Fix for lost first word from FIFO
1) Do not overwrite Reserved Bits in GINTSTS (per ref manual)*
2) Acknowledge all pending int on entry to ISR that are Only rc_w1*
3) Do not disable RXFVL*
4) Loop until RXFVL is cleared*
5) Only clear the NAK on the endpoint on the
OTGFS_GRXSTSD_PKTSTS_SETUPDONE to not loose the first WORD of
FIFO all the data (Bug Fix)
Changed marked *are just driver clean up and ensure ints are not lost.
The bug fix is #5
Test case open putty and observer the Set/Get LineCoding. Without this
fix #5 the Get will not match the Set, and in fact the data might be
skewed by 4 bytes, that are lost from the FIFO if the
OTGFS_DOEPCTL0_CNAK bit is set in the OTGFS_GRXSTSD_PKTSTS_SETUPRECVD
as opposed to the OTGFS_GRXSTSD_PKTSTS_SETUPDONE
Set Line Coding DATA1: 4B | 00 c2 01 00 00 00 08 | c8 1B
Get Line Coding DATA1: 4B | .. .. .. .. 00 00 08 c8 .. 00 00 07 | 7a 72
From David Sidrane (2016-08-25).
* Add system() to stdlib.h. Actual implementation is in
apps/system/system (2016-08-25).
* include/nuttx/input: Add missing prototype for btn_lower_initialize()
(2016-08-27).
* configs/stm32f103-minimum: Add board config support to SPI LCD module
JLX12864G-086. From Alan Carvalho de Assis (2016-08-28).
* net/tcp: tcp_ipvX_bind() not actually using the ported selected with
port==0. Also removes duplicate call to pkt_input(). Issues noted by
Pascal Speck (2016-08-30).
* STM32 F7: Remove duplicate call to pkt_input from Ethernet driver.
Issues noted by Pascal Speck (2016-08-30).
* STM32L4 OTGFS device: Apply stm32 fix to stm32l4. From Sebastien
Lorquet (2016-08-31).
* drivers/contactless: Remove contactless drivers from drivers/wireless
to drivers contactless. From Sebastien Lorquet (2016-08-31).
* USB host composite is at least partially functional. No longer depends
on CONFIG_EXPERIMENTAL (2016-09-02).
* MTD: Fixed cloned typos in several FLASH drivers. From Aleksandr
Vyhovanec (2016-09-02).
* MTD: SPI-based driver for Macronix MX25L3233F or MX25L6433F. From
Aleksandr Vyhovanec (2016-09-02).
Documentation/NuttXCCodingStandard.html
+38 -4
View File
@@ -12,7 +12,7 @@
<h1><big><font color="#3c34ec">
<i>NuttX C Coding Standard</i>
</font></big></h1>
<p>Last Updated: July 28, 2015</p>
<p>Last Updated: August 24, 2016</p>
</td>
</tr>
</table>
@@ -498,8 +498,8 @@
<p>
<b>Comments to the Right of Statements</b>.
Comments to the right of statements in C source files are discouraged
If such comments are used, they should at least be aligned so that the comment begins in the same comment on each line.
Comments to the right of statements in C source files are discouraged.
If such comments are used, they should be (1) very short so that they do not exceed the line width (typically 78 characters), (2) fit on one line, and (3) be aligned so that the comment begins in the same comment on each line.
</p>
<center><table width="60%" border=1>
<tr><td bgcolor="white">
@@ -538,7 +538,7 @@
<p>
<b>Comments to the Right of Data Definitions</b>.
Comments to the right of a declaration with an enumeration or structure, on the other hand, are encourage.
Comments to the right of a declaration with an enumeration or structure, on the other hand, are encouraged, provided that the comments are short and do not exceed the maximum line width (usually 78 characters).
Columnar alignment of comments is very desireable (but often cannot be achieved without violating the line width).
</p>
<center><table width="60%" border=1>
@@ -586,6 +586,40 @@ struct animals_s
</td></tr>
</table></center>
<p>
<b>Long Comments on the Right</b>.
Comments on the right of statements or data definitions must be short and fit on the same line without exceeding the maximum line length.
If a longer comment is needed, then it should appear above the statement of definition rather than to the right of the definition.
</p>
<center><table width="60%" border=1>
<tr><td bgcolor="white">
<p><font color="red"><b>Incorrect</b></p>
<ul><pre>
dog = cat; /* This assignment will convert what was at one time a lowly dog into a ferocious feline. */
</ul></pre></font>
</td></tr>
<tr><td bgcolor="white">
<p><font color="blue"><b>Acceptable</b></p>
<ul><pre>
dog = cat; /* This assignment will convert what was at one time a
* lowly dog into a ferocious feline. */
</ul></pre></font>
</td></tr>
<tr><td bgcolor="white">
<p><font color="green"><b>Preferred</b></p>
<ul><pre>
/* This assignment will convert what was at one time a lowly dog into a
* ferocious feline.
*/
dog = cat;
</ul></pre></font>
</td></tr>
</table></center>
<p>
<b>Note</b> that if the comment is continued on multiple lines, the comment alignment and multi-line comment rules still apply with one exception: The closing <code>*/</code> appears on the same line as the final text of the comment. This exception to the rule is enforced to keep the statements and definitions from becoming to spread out.
</p>
<p>
<b>Block comments</b>.
Block comments are only used to delimit groupings with the overall <a href="#fileorganization">file organization</a> and should not be used unless the usage is consistent with delimiting logical groupings in the program.
Documentation/NuttxPortingGuide.html
+103 -8
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@@ -12,7 +12,7 @@
<h1><big><font color="#3c34ec">
<i>NuttX RTOS Porting Guide</i>
</font></big></h1>
<p>Last Updated: June 22, 2016</p>
<p>Last Updated: August 31, 2016</p>
</td>
</tr>
</table>
@@ -948,22 +948,46 @@ drivers/
| |-- Kconfig
| |-- Make.defs
| `-- <i>(Common ADC and DAC driver source files)</i>
|-- audio/
| |-- Kconfig
| |-- Make.defs
| `-- <i>(Common audio device source files)</i>
|-- bch/
| |-- Kconfig
| |-- Make.defs
| `-- <i>(bch driver source files)</i>
|-- contactless/
| |-- Kconfig
| |-- Make.defs
| `-- <i>(Common contactless device driver source files)</i>
|-- input/
| |-- Kconfig
| |-- Make.defs
| `-- <i>(Common touchscreen and keypad driver source files)</i>
|-- ioexpander/
| |-- Kconfig
| |-- Make.defs
| `-- <i>(Common I/O expander and GPIO-related driver source files)</i>
|-- lcd/
| |-- Kconfig
| |-- Make.defs
| `-- <i>(Common LCD driver source files)</i>
|-- leds/
| |-- Kconfig
| |-- Make.defs
| `-- <i>(Common LED device driver source files)</i>
|-- loop/
| |-- Kconfig
| |-- Make.defs
| `-- <i>(Common loop device driver source files)</i>
|-- mmcsd/
| |-- Kconfig
| |-- Make.defs
| `-- <i>(Common MMC/SD card driver source files)</i>
|-- modem/
| |-- Kconfig
| |-- Make.defs
| `-- <i>(Common modem driver source files)</i>
|-- mtd/
| |-- Kconfig
| |-- Make.defs
@@ -972,11 +996,19 @@ drivers/
| |-- Kconfig
| |-- Make.defs
| `-- <i>(Common network driver source files)</i>
|-- pipes/
| |-- Kconfig
| |-- Make.defs
| `-- <i>(Common pipe and FIFO driver source files)</i>
|-- power/
| |-- Kconfig
| |-- Make.defs
| `-- <i>(Common power-related driver source files)</i>
|-- sensors/
| |-- Kconfig
| |-- Make.defs
| `-- <i>(Common sensor driver source files)</i>
|-- serial/
|-- sercomm/
| |-- Kconfig
| |-- Make.defs
| `-- <i>(Files for the Calypso SERCOMM driver)</i>
@@ -984,6 +1016,18 @@ drivers/
| |-- Kconfig
| |-- Make.defs
| `-- <i>(Common front-end character drivers for chip-specific UARTs)</i>
|-- spi/
| |-- Kconfig
| |-- Make.defs
| `-- <i>(Common SPI-related drivers and helper fuctions)</i>
|-- syslog/
| |-- Kconfig
| |-- Make.defs
| `-- <i>(System logging device support)</i>
|-- timers/
| |-- Kconfig
| |-- Make.defs
| `-- <i>(Timer-based device driver support)</i>
|-- usbdev/
| |-- Kconfig
| |-- Make.defs
@@ -992,6 +1036,10 @@ drivers/
| |-- Kconfig
| |-- Make.defs
| `-- <i>(Common USB host driver source files)</i>
|-- usbmonitor/
| |-- Kconfig
| |-- Make.defs
| `-- <i>(USB monitor source files)</i>
|-- wireless/
| |-- Kconfig
| |-- Make.defs
@@ -1088,16 +1136,32 @@ include/
| | `-- <i>(Audio driver header files)</i>
| |-binfmt/
| | `-- <i>(Binary format header files)</i>
| |-contactless/
| | `-- <i>(Contactless driver header files)</i>
| |-crypto/
| | `-- <i>(Cryptographic support header files)</i>
| |-drivers/
| | `-- <i>(Miscellaneous driver header files)</i>
| |-eeprom/
| | `-- <i>(EEPROM driver header files)</i>
| |-fs/
| | `-- <i>(File System header files)</i>
| |-input/
| | `-- <i>(Input device driver header files)</i>
| |-ioexpander/
| | `-- <i>(I/O exander and GPIO drvier header files)</i>
| |-lcd/
| | `-- <i>(LCD driver header files)</i>
| |-leds/
| | `-- <i>(LED driver header files)</i>
| |-lib/
| | `-- <i>(Non-standard C library driver header files)</i>
| |-mm/
| | `-- <i>(Memory management header files)</i>
| |-modem/
| | `-- <i>(Modem driver header files)</i>
| |-mtd/
| | `-- <i>(Memory technology device header files)</i>
| |-serial/
| | `-- <i>(Serial driver header files)</i>
| |-net/
| | `-- <i>(Networking header files)</i>
| |-nx/
@@ -1114,8 +1178,12 @@ include/
| | `-- <i>(SPI driver header files)</i>
| |-syslog/
| | `-- <i>(SYSLOG header files)</i>
| |-timers/
| | `-- <i>(Timer-related driver header files)</i>
| |-usb/
| | `-- <i>(USB driver header files)</i>
| |-video/
| | `-- <i>(Video-related driver header files)</i>
| `-wireless/
| `-- <i>(Wireless device driver header files)</i>
`- sys/
@@ -1148,16 +1216,28 @@ include/
</p>
<ul><pre>
libc/
|-- aio/
| `-- <i>(Implementation of functions from aio.h)</i>
|-- audio/
| `-- <i>(Implementation of audio-related functions)</i>
|-- dirent/
| `-- <i>(Implementation of functions from dirent.h)</i>
|-- fixedmath/
| `-- <i>(Implementation of functions from fixedmath.h)</i>
|-- hex2bin/
| `-- <i>(Implementation of functions from hex2bin.h)</i>
|-- libgen/
| `-- <i>(Implementation of functions from libgen.h)</i>
|-- math/
| `-- <i>(Implementation of functions from fixedmath.h)</i>
|-- misc/
| `-- <i>(Implementation of miscellaneous library functions)</i>
|-- mqueue/
| `-- <i>(Implementation of some functions from mqueue.h)</i>
|-- net/
| `-- <i>(Implementation of network-related library functions)</i>
|-- netdb/
| `-- <i>(Implementation of functions from netdb.h)</i>
|-- pthread/
| `-- <i>(Implementation of functions from pthread.h)</i>
|-- queue/
| `-- <i>(Implementation of functions from queue.h)</i>
|-- sched/
@@ -1166,16 +1246,31 @@ libc/
| `-- <i>(Implementation of some functions from semaphore.h)</i>
|-- signal/
| `-- <i>(Implementation of some functions from signal.h)</i>
|-- spawn/
| `-- <i>(Implementation of some functions from spawn.h)</i>
|-- stdio/
| `-- <i>(Implementation of functions from stdio.h)</i>
|-- stdlib/
| `-- <i>(Implementation of functions from stdlib.h)</i>
|-- string/
| `-- <i>(Implementation of functions from string.h)</i>
|-- symtab/
| `-- <i>(Implementation of symbol-table library functions)</i>
|-- syslog/
| `-- <i>(Implementation of functions from syslog.h)</i>
|-- termios/
| `-- <i>(Implementation of functions from termios.h)</i>
|-- time/
| `-- <i>(Implementation of some functions from time.h)</i>
`-- unistd/
`-- <i>(Implementation of some functions from unistd.h)</i>
|-- tls/
| `-- <i>(Implementation of some functions from tls.h)</i>
|-- wqueue/
| `-- <i>(Implementation of some functions from wqueue.h)</i>
|-- unistd/
| `-- <i>(Implementation of some functions from unistd.h)</i>
`-- zoneinfo/
`-- <i>(Implementation of timezone database)</i>
</pre></ul>
<h2>2.13 <a name="DirStructLibXX">nuttx/libxx</a></h2>
Documentation/README.html
+2
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@@ -265,6 +265,8 @@ nuttx/
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/stm32f429i-disco/README.txt" target="_blank"><b><i>README.txt</i></b></a>
| |- stm32f746g-disco/
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/stm32f746g-disco/README.txt" target="_blank"><b><i>README.txt</i></b></a>
| |- stm32l476-mdk/
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/stm32l476vg-mdk/README.txt" target="_blank"><b><i>README.txt</i></b></a>
| |- stm32l476vg-disco/
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/stm32l476vg-disco/README.txt" target="_blank"><b><i>README.txt</i></b></a>
| |- stm32ldiscovery/
Kconfig
-1
View File
@@ -1367,7 +1367,6 @@ endif # DEBUG_SPI
config DEBUG_TIMER
bool "Timer Debug Features"
default n
depends on TIMER
---help---
Enable timer debug features.
README.txt
+2
View File
@@ -1481,6 +1481,8 @@ nuttx/
| | `- README.txt
| |- stm32f746g-disco/
| | `- README.txt
| |- stm32l476-mdk/
| | `- README.txt
| |- stm32l476vg-disco/
| | `- README.txt
| |- stm32ldiscovery/
ReleaseNotes
+1 -1
View File
@@ -9063,7 +9063,7 @@ detailed bugfix information):
for mq_setattr() and mq_getattr(). This is necessary in protected
and kernel builds because in those cases the message queue
structure is protected and cannot be accessed directly from user
mode code. Noted by Jouko Holopainen.
mode code.
* File Systems/Block Drivers/MTD:
TODO
+2 -3
View File
@@ -219,7 +219,7 @@ o Task/Scheduler (sched/)
Description: Task control information is retained in simple lists. This
is completely appropriate for small embedded systems where
the number of tasks, N, is relatively small. Most list
operations are O(N). This could become as issue if N gets
operations are O(N). This could become an issue if N gets
very large.
In that case, these simple lists should be replaced with
@@ -927,8 +927,7 @@ o Network (net/, drivers/net)
CONFIG_NET_NOINTS). This is really a very bad use of CPU
resources; All of the network stack processing should be
modified to use a work queue (and, all use of CONFIG_NET_NOINTS=n
should be eliminated). This applies to almost all Ethernet
drivers:
should be eliminated). This applies to many Ethernet drivers:
ARCHITECTURE CONFIG_NET_NOINTS? ADDRESS FILTER SUPPORT?
C5471 NO NO
arch/arm/src/kinetis/Kconfig
+55
View File
@@ -37,94 +37,130 @@ config ARCH_CHIP_MK20DX128VLH5
config ARCH_CHIP_MK20DX64VLH7
bool "MK20DX64VLH7"
select ARCH_FAMILY_K20
select KINETIS_HAVE_I2C1
config ARCH_CHIP_MK20DX128VLH7
bool "MK20DX128VLH7"
select ARCH_FAMILY_K20
select KINETIS_HAVE_I2C1
config ARCH_CHIP_MK20DX256VLH7
bool "MK20DX256VLH7"
select ARCH_FAMILY_K20
select KINETIS_HAVE_I2C1
config ARCH_CHIP_MK40N512VLQ100
bool "MK40N512VLQ100"
select ARCH_FAMILY_K40
select KINETIS_HAVE_I2C1
config ARCH_CHIP_MK40N512VMD100
bool "MK40N512VMD100"
select ARCH_FAMILY_K40
select KINETIS_HAVE_I2C1
config ARCH_CHIP_MK40X128VLQ100
bool "MK40X128VLQ100"
select ARCH_FAMILY_K40
select KINETIS_HAVE_I2C1
config ARCH_CHIP_MK40X128VMD100
bool "MK40X128VMD100"
select ARCH_FAMILY_K40
select KINETIS_HAVE_I2C1
config ARCH_CHIP_MK40X256VLQ100
bool "MK40X256VLQ100"
select ARCH_FAMILY_K40
select KINETIS_HAVE_I2C1
config ARCH_CHIP_MK40X256VMD100
bool "MK40X256VMD100"
select ARCH_FAMILY_K40
select KINETIS_HAVE_I2C1
config ARCH_CHIP_MK60N256VLQ100
bool "MK60N256VLQ100"
select ARCH_FAMILY_K60
select KINETIS_HAVE_I2C1
config ARCH_CHIP_MK60N256VMD100
bool "MK60N256VMD100"
select ARCH_FAMILY_K60
select KINETIS_HAVE_I2C1
select KINETIS_HAVE_I2C2
config ARCH_CHIP_MK60N512VLL100
bool "MK60N512VLL100"
select ARCH_FAMILY_K60
select KINETIS_HAVE_I2C1
select KINETIS_HAVE_I2C2
config ARCH_CHIP_MK60N512VLQ100
bool "MK60N512VLQ100"
select ARCH_FAMILY_K60
select KINETIS_HAVE_I2C1
select KINETIS_HAVE_I2C2
config ARCH_CHIP_MK60N512VMD100
bool "MK60N512VMD100"
select ARCH_FAMILY_K60
select KINETIS_HAVE_I2C1
select KINETIS_HAVE_I2C2
config ARCH_CHIP_MK60X256VLQ100
bool "MK60X256VLQ100"
select ARCH_FAMILY_K60
select KINETIS_HAVE_I2C1
select KINETIS_HAVE_I2C2
config ARCH_CHIP_MK60X256VMD100
bool "MK60X256VMD100"
select ARCH_FAMILY_K60
select KINETIS_HAVE_I2C1
select KINETIS_HAVE_I2C2
config ARCH_CHIP_MK64FN1M0VLL12
bool "MK64FN1M0VLL12"
select ARCH_FAMILY_K64
select KINETIS_HAVE_I2C1
select KINETIS_HAVE_I2C2
config ARCH_CHIP_MK64FX512VLL12
bool "MK64FX512VLL12"
select ARCH_FAMILY_K64
select KINETIS_HAVE_I2C1
select KINETIS_HAVE_I2C2
config ARCH_CHIP_MK64FX512VDC12
bool "MK64FX512VDC12"
select ARCH_FAMILY_K64
select KINETIS_HAVE_I2C1
select KINETIS_HAVE_I2C2
config ARCH_CHIP_MK64FN1M0VDC12
bool "MK64FN1M0VDC12"
select ARCH_FAMILY_K64
select KINETIS_HAVE_I2C1
select KINETIS_HAVE_I2C2
config ARCH_CHIP_MK64FX512VLQ12
bool "MK64FX512VLQ12"
select ARCH_FAMILY_K64
select KINETIS_HAVE_I2C1
select KINETIS_HAVE_I2C2
config ARCH_CHIP_MK64FX512VMD12
bool "MK64FX512VMD12"
select ARCH_FAMILY_K64
select KINETIS_HAVE_I2C1
select KINETIS_HAVE_I2C2
config ARCH_CHIP_MK64FN1M0VMD12
bool "MK64FN1M0VMD12"
select ARCH_FAMILY_K64
select KINETIS_HAVE_I2C1
select KINETIS_HAVE_I2C2
endchoice
@@ -148,6 +184,14 @@ config ARCH_FAMILY_K64
menu "Kinetis Peripheral Support"
config KINETIS_HAVE_I2C1
bool
default n
config KINETIS_HAVE_I2C2
bool
default n
config KINETIS_TRACE
bool "Trace"
default n
@@ -255,12 +299,23 @@ config KINETIS_SPI2
config KINETIS_I2C0
bool "I2C0"
default n
select I2C
---help---
Support I2C0
config KINETIS_I2C1
bool "I2C1"
default n
select I2C
depends on KINETIS_HAVE_I2C1
---help---
Support I2C1
config KINETIS_I2C2
bool "I2C2"
default n
select I2C
depends on KINETIS_HAVE_I2C2
---help---
Support I2C1
arch/arm/src/kinetis/Make.defs
+9 -1
View File
@@ -1,7 +1,7 @@
############################################################################
# arch/arm/src/kinetis/Make.defs
#
# Copyright (C) 2011, 2013-2015 Gregory Nutt. All rights reserved.
# Copyright (C) 2011, 2013-2016 Gregory Nutt. All rights reserved.
# Author: Gregory Nutt <gnutt@nuttx.org>
#
# Redistribution and use in source and binary forms, with or without
@@ -131,6 +131,14 @@ ifeq ($(CONFIG_PWM),y)
CHIP_CSRCS += kinetis_pwm.c
endif
ifeq ($(CONFIG_I2C),y)
CHIP_CSRCS += kinetis_i2c.c
endif
ifeq ($(CONFIG_RTC),y)
CHIP_CSRCS += kinetis_rtc.c
endif
ifeq ($(CONFIG_NET),y)
ifeq ($(CONFIG_KINETIS_ENET),y)
CHIP_CSRCS += kinetis_enet.c
arch/arm/src/kinetis/chip/kinetis_i2c.h
+123 -26
View File
@@ -78,31 +78,35 @@
#define KINETIS_I2C0_SLTH (KINETIS_I2C0_BASE+KINETIS_I2C_SLTH_OFFSET)
#define KINETIS_I2C0_SLTL (KINETIS_I2C0_BASE+KINETIS_I2C_SLTL_OFFSET)
#define KINETIS_I2C1_A1 (KINETIS_I2C1_BASE+KINETIS_I2C_A1_OFFSET)
#define KINETIS_I2C1_F (KINETIS_I2C1_BASE+KINETIS_I2C_F_OFFSET)
#define KINETIS_I2C1_C1 (KINETIS_I2C1_BASE+KINETIS_I2C_C1_OFFSET)
#define KINETIS_I2C1_S (KINETIS_I2C1_BASE+KINETIS_I2C_S_OFFSET)
#define KINETIS_I2C1_D (KINETIS_I2C1_BASE+KINETIS_I2C_D_OFFSET)
#define KINETIS_I2C1_C2 (KINETIS_I2C1_BASE+KINETIS_I2C_C2_OFFSET)
#define KINETIS_I2C1_FLT (KINETIS_I2C1_BASE+KINETIS_I2C_FLT_OFFSET)
#define KINETIS_I2C1_RA (KINETIS_I2C1_BASE+KINETIS_I2C_RA_OFFSET)
#define KINETIS_I2C1_SMB (KINETIS_I2C1_BASE+KINETIS_I2C_SMB_OFFSET)
#define KINETIS_I2C1_A2 (KINETIS_I2C1_BASE+KINETIS_I2C_A2_OFFSET)
#define KINETIS_I2C1_SLTH (KINETIS_I2C1_BASE+KINETIS_I2C_SLTH_OFFSET)
#define KINETIS_I2C1_SLTL (KINETIS_I2C1_BASE+KINETIS_I2C_SLTL_OFFSET)
#ifdef CONFIG_KINETIS_HAVE_I2C1
# define KINETIS_I2C1_A1 (KINETIS_I2C1_BASE+KINETIS_I2C_A1_OFFSET)
# define KINETIS_I2C1_F (KINETIS_I2C1_BASE+KINETIS_I2C_F_OFFSET)
# define KINETIS_I2C1_C1 (KINETIS_I2C1_BASE+KINETIS_I2C_C1_OFFSET)
# define KINETIS_I2C1_S (KINETIS_I2C1_BASE+KINETIS_I2C_S_OFFSET)
# define KINETIS_I2C1_D (KINETIS_I2C1_BASE+KINETIS_I2C_D_OFFSET)
# define KINETIS_I2C1_C2 (KINETIS_I2C1_BASE+KINETIS_I2C_C2_OFFSET)
# define KINETIS_I2C1_FLT (KINETIS_I2C1_BASE+KINETIS_I2C_FLT_OFFSET)
# define KINETIS_I2C1_RA (KINETIS_I2C1_BASE+KINETIS_I2C_RA_OFFSET)
# define KINETIS_I2C1_SMB (KINETIS_I2C1_BASE+KINETIS_I2C_SMB_OFFSET)
# define KINETIS_I2C1_A2 (KINETIS_I2C1_BASE+KINETIS_I2C_A2_OFFSET)
# define KINETIS_I2C1_SLTH (KINETIS_I2C1_BASE+KINETIS_I2C_SLTH_OFFSET)
# define KINETIS_I2C1_SLTL (KINETIS_I2C1_BASE+KINETIS_I2C_SLTL_OFFSET)
#endif
#define KINETIS_I2C2_A1 (KINETIS_I2C2_BASE+KINETIS_I2C_A1_OFFSET)
#define KINETIS_I2C2_F (KINETIS_I2C2_BASE+KINETIS_I2C_F_OFFSET)
#define KINETIS_I2C2_C1 (KINETIS_I2C2_BASE+KINETIS_I2C_C1_OFFSET)
#define KINETIS_I2C2_S (KINETIS_I2C2_BASE+KINETIS_I2C_S_OFFSET)
#define KINETIS_I2C2_D (KINETIS_I2C2_BASE+KINETIS_I2C_D_OFFSET)
#define KINETIS_I2C2_C2 (KINETIS_I2C2_BASE+KINETIS_I2C_C2_OFFSET)
#define KINETIS_I2C2_FLT (KINETIS_I2C2_BASE+KINETIS_I2C_FLT_OFFSET)
#define KINETIS_I2C2_RA (KINETIS_I2C2_BASE+KINETIS_I2C_RA_OFFSET)
#define KINETIS_I2C2_SMB (KINETIS_I2C2_BASE+KINETIS_I2C_SMB_OFFSET)
#define KINETIS_I2C2_A2 (KINETIS_I2C2_BASE+KINETIS_I2C_A2_OFFSET)
#define KINETIS_I2C2_SLTH (KINETIS_I2C2_BASE+KINETIS_I2C_SLTH_OFFSET)
#define KINETIS_I2C2_SLTL (KINETIS_I2C2_BASE+KINETIS_I2C_SLTL_OFFSET)
#ifdef CONFIG_KINETIS_HAVE_I2C2
# define KINETIS_I2C2_A1 (KINETIS_I2C2_BASE+KINETIS_I2C_A1_OFFSET)
# define KINETIS_I2C2_F (KINETIS_I2C2_BASE+KINETIS_I2C_F_OFFSET)
# define KINETIS_I2C2_C1 (KINETIS_I2C2_BASE+KINETIS_I2C_C1_OFFSET)
# define KINETIS_I2C2_S (KINETIS_I2C2_BASE+KINETIS_I2C_S_OFFSET)
# define KINETIS_I2C2_D (KINETIS_I2C2_BASE+KINETIS_I2C_D_OFFSET)
# define KINETIS_I2C2_C2 (KINETIS_I2C2_BASE+KINETIS_I2C_C2_OFFSET)
# define KINETIS_I2C2_FLT (KINETIS_I2C2_BASE+KINETIS_I2C_FLT_OFFSET)
# define KINETIS_I2C2_RA (KINETIS_I2C2_BASE+KINETIS_I2C_RA_OFFSET)
# define KINETIS_I2C2_SMB (KINETIS_I2C2_BASE+KINETIS_I2C_SMB_OFFSET)
# define KINETIS_I2C2_A2 (KINETIS_I2C2_BASE+KINETIS_I2C_A2_OFFSET)
# define KINETIS_I2C2_SLTH (KINETIS_I2C2_BASE+KINETIS_I2C_SLTH_OFFSET)
# define KINETIS_I2C2_SLTL (KINETIS_I2C2_BASE+KINETIS_I2C_SLTL_OFFSET)
#endif
/* Register Bit Definitions *****************************************************************/
@@ -115,12 +119,90 @@
#define I2C_F_ICR_SHIFT (0) /* Bits 0-5: Clock rate */
#define I2C_F_ICR_MASK (0x3f << I2C_F_ICR_SHIFT)
# define I2C_F_ICR(n) ((uint8_t)(n) << I2C_F_ICR_SHIFT)
#define I2C_F_MULT_SHIFT (6) /* Bits 6-7: Multiplier factor */
#define I2C_F_MULT_MASK (3 << I2C_F_MULT_SHIFT)
# define I2C_F_MULT_1 (0 << I2C_F_MULT_SHIFT)
# define I2C_F_MULT_2 (1 << I2C_F_MULT_SHIFT)
# define I2C_F_MULT_4 (2 << I2C_F_MULT_SHIFT)
/* From Table 51-54. I2C divider and hold values. Duplicate divider values differ in hold
* times. Refer to the Table 51-54. in the K64 Sub-Family Reference Manual.
*/
#define I2C_F_DIV20 ((uint8_t)0x00)
#define I2C_F_DIV22 ((uint8_t)0x01)
#define I2C_F_DIV24 ((uint8_t)0x02)
#define I2C_F_DIV26 ((uint8_t)0x03)
#define I2C_F_DIV28 ((uint8_t)0x04)
#define I2C_F_DIV30 ((uint8_t)0x05)
#define I2C_F_DIV34 ((uint8_t)0x06)
#define I2C_F_DIV36 ((uint8_t)0x0a)
#define I2C_F_DIV40_1 ((uint8_t)0x07)
#define I2C_F_DIV41 ((uint8_t)0x08)
#define I2C_F_DIV32 ((uint8_t)0x09)
#define I2C_F_DIV36 ((uint8_t)0x0a)
#define I2C_F_DIV40_2 ((uint8_t)0x0b)
#define I2C_F_DIV44 ((uint8_t)0x0c)
#define I2C_F_DIV48_1 ((uint8_t)0x0d)
#define I2C_F_DIV56_1 ((uint8_t)0x0e)
#define I2C_F_DIV68 ((uint8_t)0x0f)
#define I2C_F_DIV48_2 ((uint8_t)0x10)
#define I2C_F_DIV56_2 ((uint8_t)0x11)
#define I2C_F_DIV64 ((uint8_t)0x12)
#define I2C_F_DIV72 ((uint8_t)0x13)
#define I2C_F_DIV80_1 ((uint8_t)0x14)
#define I2C_F_DIV88 ((uint8_t)0x15)
#define I2C_F_DIV104 ((uint8_t)0x16)
#define I2C_F_DIV128_1 ((uint8_t)0x17)
#define I2C_F_DIV80_2 ((uint8_t)0x18)
#define I2C_F_DIV96 ((uint8_t)0x19)
#define I2C_F_DIV112 ((uint8_t)0x1a)
#define I2C_F_DIV128_2 ((uint8_t)0x1b)
#define I2C_F_DIV144 ((uint8_t)0x1c)
#define I2C_F_DIV160_1 ((uint8_t)0x1d)
#define I2C_F_DIV192_1 ((uint8_t)0x1e)
#define I2C_F_DIV240 ((uint8_t)0x1f)
#define I2C_F_DIV160_2 ((uint8_t)0x20)
#define I2C_F_DIV192_2 ((uint8_t)0x1e)
#define I2C_F_DIV224 ((uint8_t)0x22)
#define I2C_F_DIV256 ((uint8_t)0x23)
#define I2C_F_DIV288 ((uint8_t)0x24)
#define I2C_F_DIV320_1 ((uint8_t)0x25)
#define I2C_F_DIV384_1 ((uint8_t)0x26)
#define I2C_F_DIV480 ((uint8_t)0x27)
#define I2C_F_DIV320_2 ((uint8_t)0x28)
#define I2C_F_DIV384_2 ((uint8_t)0x29)
#define I2C_F_DIV448 ((uint8_t)0x2a)
#define I2C_F_DIV512 ((uint8_t)0x2b)
#define I2C_F_DIV576 ((uint8_t)0x2c)
#define I2C_F_DIV640_1 ((uint8_t)0x2d)
#define I2C_F_DIV768_1 ((uint8_t)0x2e)
#define I2C_F_DIV960 ((uint8_t)0x2f)
#define I2C_F_DIV640_2 ((uint8_t)0x30)
#define I2C_F_DIV768_3 ((uint8_t)0x31)
#define I2C_F_DIV896 ((uint8_t)0x32)
#define I2C_F_DIV1024 ((uint8_t)0x33)
#define I2C_F_DIV1152 ((uint8_t)0x34)
#define I2C_F_DIV1280_1 ((uint8_t)0x35)
#define I2C_F_DIV1536_1 ((uint8_t)0x36)
#define I2C_F_DIV1920 ((uint8_t)0x37)
#define I2C_F_DIV1280_2 ((uint8_t)0x38)
#define I2C_F_DIV1536_2 ((uint8_t)0x39)
#define I2C_F_DIV1792 ((uint8_t)0x3a)
#define I2C_F_DIV2048 ((uint8_t)0x3b)
#define I2C_F_DIV2304 ((uint8_t)0x3c)
#define I2C_F_DIV2560 ((uint8_t)0x3d)
#define I2C_F_DIV3072 ((uint8_t)0x3e)
#define I2C_F_DIV3840 ((uint8_t)0x3f)
/* I2C Control Register 1 (8-bit) */
#define I2C_C1_DMAEN (1 << 0) /* Bit 0: DMA enable */
@@ -149,6 +231,7 @@
#define I2C_C2_AD_SHIFT (0) /* Bits 0-2: Slave address */
#define I2C_C2_AD_MASK (7 << I2C_C2_AD_SHIFT)
# define I2C_C2_AD(n) ((uint8_t)(n) << I2C_C2_AD_SHIFT)
#define I2C_C2_RMEN (1 << 3) /* Bit 3: Range address matching enable */
#define I2C_C2_SBRC (1 << 4) /* Bit 4: Slave baud rate control */
#define I2C_C2_HDRS (1 << 5) /* Bit 5: High drive select */
@@ -156,9 +239,23 @@
#define I2C_C2_GCAEN (1 << 7) /* Bit 7: General call address enable */
/* I2C Programmable Input Glitch Filter register (8-bit) */
#if defined(KINETIS_K20) || defined(KINETIS_K40) || defined(KINETIS_K60)
# define I2C_FLT_SHIFT (0) /* Bits 0-4: I2C programmable filter factor */
# define I2C_FLT_MASK (31 << I2C_FLT_SHIFT)
# define I2C_FLT(n) ((uint8_t)(n) << I2C_FLT_SHIFT)
/* Bits 5-7: Reserved */
#define I2C_FLT_SHIFT (0) /* Bits 0-4: I2C programmable filter factor */
#define I2C_FLT_MASK (31 << I2C_FLT_SHIFT)
#endif
#ifdef KINETIS_K64
# define I2C_FLT_SHIFT (0) /* Bits 0-3: I2C programmable filter factor */
# define I2C_FLT_MASK (15 << I2C_FLT_SHIFT)
# define I2C_FLT(n) ((uint8_t)(n) << I2C_FLT_SHIFT)
# define I2C_FLT_STARTF (1 << 4) /* I2C bus start detect flag */
# define I2C_FLT_SSIE (1 << 5) /* I2C bus stop or start interrupt enable */
# define I2C_FLT_STOPF (1 << 6) /* I2C bus stop detect flag */
# define I2C_FLT_SHEN (1 << 7) /* Stop hold enable */
#endif
/* I2C Range Address register (8-bit) */
/* Bit 0: Reserved */
arch/arm/src/kinetis/chip/kinetis_rtc.h
+4 -4
View File
@@ -59,7 +59,7 @@
#define KINETIS_RTC_CR_OFFSET 0x0010 /* RTC Control Register */
#define KINETIS_RTC_SR_OFFSET 0x0014 /* RTC Status Register */
#define KINETIS_RTC_LR_OFFSET 0x0018 /* RTC Lock Register */
#if defined(KINETIS_K40) || defined(KINETIS_K64)
#if defined(KINETIS_K20) || defined(KINETIS_K40) || defined(KINETIS_K64)
# define KINETIS_RTC_IER_OFFSET 0x001c /* RTC Interrupt Enable Register (K40) */
#endif
#ifdef KINETIS_K60
@@ -77,7 +77,7 @@
#define KINETIS_RTC_CR (KINETIS_RTC_BASE+KINETIS_RTC_CR_OFFSET)
#define KINETIS_RTC_SR (KINETIS_RTC_BASE+KINETIS_RTC_SR_OFFSET)
#define KINETIS_RTC_LR (KINETIS_RTC_BASE+KINETIS_RTC_LR_OFFSET)
#if defined(KINETIS_K40) || defined(KINETIS_K64)
#if defined(KINETIS_K20) || defined(KINETIS_K40) || defined(KINETIS_K64)
# define KINETIS_RTC_IER (KINETIS_RTC_BASE+KINETIS_RTC_IER_OFFSET)
#endif
#ifdef KINETIS_K60
@@ -135,13 +135,13 @@
#define RTC_LR_TCL (1 << 3) /* Bit 3: Time Compensation Lock */
#define RTC_LR_CRL (1 << 4) /* Bit 4: Control Register Lock */
#define RTC_LR_SRL (1 << 5) /* Bit 5: Status Register Lock */
#ifdef KINETIS_K40
#if defined(KINETIS_K20) || defined(KINETIS_K40)
# define RTC_LR_LRL (1 << 6) /* Bit 6: Lock Register Lock (K40) */
#endif
/* Bits 7-31: Reserved */
/* RTC Interrupt Enable Register (32-bits, K40) */
#if defined(KINETIS_K40) || defined(KINETIS_K64)
#if defined(KINETIS_K20) || defined(KINETIS_K40) || defined(KINETIS_K64)
# define RTC_IER_TIIE (1 << 0) /* Bit 0: Time Invalid Interrupt Enable */
# define RTC_IER_TOIE (1 << 1) /* Bit 1: Time Overflow Interrupt Enable */
# define RTC_IER_TAIE (1 << 2) /* Bit 2: Time Alarm Interrupt Enable */
arch/arm/src/kinetis/kinetis_alarm.h
+113
View File
@@ -0,0 +1,113 @@
/****************************************************************************
* arch/arm/src/kinetis/kinetis_alarm.h
*
* Copyright (C) 2016 Gregory Nutt. All rights reserved.
* Author: Matias v01d <phreakuencies@gmail.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_KINETIS_ALARM_H
#define __ARCH_ARM_SRC_KINETIS_ALARM_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include "chip.h"
#ifdef CONFIG_RTC_ALARM
/****************************************************************************
* Public Types
****************************************************************************/
#ifndef __ASSEMBLY__
/* The form of an alarm callback */
typedef CODE void (*alarmcb_t)(void);
/****************************************************************************
* Public Functions
****************************************************************************/
#undef EXTERN
#if defined(__cplusplus)
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
/****************************************************************************
* Name: kinetis_rtc_setalarm
*
* Description:
* Set up an alarm.
*
* Input Parameters:
* tp - the time to set the alarm
* callback - the function to call when the alarm expires.
*
* Returned Value:
* Zero (OK) on success; a negated errno on failure
*
****************************************************************************/
struct timespec;
int kinetis_rtc_setalarm(FAR const struct timespec *tp, alarmcb_t callback);
/****************************************************************************
* Name: kinetis_rtc_cancelalarm
*
* Description:
* Cancel a pending alarm alarm
*
* Input Parameters:
* none
*
* Returned Value:
* Zero (OK) on success; a negated errno on failure
*
****************************************************************************/
int kinetis_rtc_cancelalarm(void);
#undef EXTERN
#if defined(__cplusplus)
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* CONFIG_RTC_ALARM */
#endif /* __ARCH_ARM_SRC_KINETIS_ALARM_H */
arch/arm/src/kinetis/kinetis_i2c.c
+1151
View File
File diff suppressed because it is too large Load Diff
arch/arm/src/kinetis/kinetis_i2c.h
+87
View File
@@ -0,0 +1,87 @@
/****************************************************************************
* arch/arm/src/kinetis/kinetis_i2c.h
*
* Copyright (C) 2016 Gregory Nutt. All rights reserved.
* Author: Matias v01d <phreakuencies@gmail.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_I2C_H
#define __ARCH_ARM_SRC_KINETIS_KINETIS_I2C_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/i2c/i2c_master.h>
#include "chip/kinetis_i2c.h"
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
/****************************************************************************
* Name: kinetis_i2cbus_initialize
*
* Description:
* Initialize the selected I2C port. And return a unique instance of struct
* struct i2c_master_s. This function may be called to obtain multiple
* instances of the interface, each of which may be set up with a
* different frequency and slave address.
*
* Input Parameter:
* Port number (for hardware that has multiple I2C interfaces)
*
* Returned Value:
* Valid I2C device structure reference on succcess; a NULL on failure
*
****************************************************************************/
FAR struct i2c_master_s *kinetis_i2cbus_initialize(int port);
/****************************************************************************
* Name: kinetis_i2cbus_uninitialize
*
* Description:
* De-initialize the selected I2C port, and power down the device.
*
* Input Parameter:
* Device structure as returned by the lpc43_i2cbus_initialize()
*
* Returned Value:
* OK on success, ERROR when internal reference count mismatch or dev
* points to invalid hardware device.
*
****************************************************************************/
int kinetis_i2cbus_uninitialize(FAR struct i2c_master_s *dev);
#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_I2C_H */
arch/arm/src/kinetis/kinetis_rtc.c
+373
View File
@@ -0,0 +1,373 @@
/****************************************************************************
* arch/arm/src/kinetis/kinetis_rtc.c
*
* Copyright (C) 2016 Gregory Nutt. All rights reserved.
* Author: Matias v01d <phreakuencies@gmail.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/arch.h>
#include <nuttx/irq.h>
#include <nuttx/timers/rtc.h>
#include <arch/board/board.h>
#include <stdlib.h>
#include <stdint.h>
#include <stdbool.h>
#include <stdio.h>
#include <errno.h>
#include "up_arch.h"
#include "kinetis_config.h"
#include "chip.h"
#include "chip/kinetis_rtc.h"
#include "chip/kinetis_sim.h"
#include "kinetis.h"
#include "kinetis_alarm.h"
#if defined(CONFIG_RTC)
/****************************************************************************
* Private Data
****************************************************************************/
#ifdef CONFIG_RTC_ALARM
static alarmcb_t g_alarmcb;
#endif
/****************************************************************************
* Public Data
****************************************************************************/
volatile bool g_rtc_enabled = false;
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: kinetis_rtc_interrupt
*
* Description:
* RTC interrupt service routine
*
* Input Parameters:
* irq - The IRQ number that generated the interrupt
* context - Architecture specific register save information.
*
* Returned Value:
* Zero (OK) on success; A negated errno value on failure.
*
****************************************************************************/
#if defined(CONFIG_RTC_ALARM)
static int kinetis_rtc_interrupt(int irq, void *context)
{
if (g_alarmcb != NULL)
{
/* Alarm callback */
g_alarmcb();
g_alarmcb = NULL;
}
/* Clear pending flags, disable alarm */
putreg32(0, KINETIS_RTC_TAR); /* unset alarm (resets flags) */
putreg32(0, KINETIS_RTC_IER); /* disable alarm interrupt */
return 0;
}
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: up_rtc_initialize
*
* Description:
* Initialize the hardware RTC per the selected configuration. This
* function is called once during the OS initialization sequence
*
* Input Parameters:
* None
*
* Returned Value:
* Zero (OK) on success; a negated errno on failure
*
****************************************************************************/
int up_rtc_initialize(void)
{
int regval;
/* Enable RTC module */
regval = getreg32(KINETIS_SIM_SCGC6);
regval |= SIM_SCGC6_RTC;
putreg32(regval, KINETIS_SIM_SCGC6);
/* Disable counters (just in case) */
putreg32(0, KINETIS_RTC_SR);
/* Enable oscilator */
/* capacitance values from teensyduino */
putreg32(RTC_CR_SC16P | RTC_CR_SC4P | RTC_CR_OSCE, KINETIS_RTC_CR);
/* TODO: delay some time (1024 cycles? would be 30ms) */
/* Disable interrupts */
putreg32(0, KINETIS_RTC_IER);
/* Reset flags requires writing the seconds register, the following line
* avoids altering any stored time value.
*/
putreg32(getreg32(KINETIS_RTC_TSR), KINETIS_RTC_TSR);
#if defined(CONFIG_RTC_ALARM)
/* Enable alarm interrupts. REVISIT: This will not work. up_rtc_initialize()
* is called very early in initialization BEFORE the interrupt system will be
* enabled. All interrupts will disabled later when the interrupt system is
* disabled. This must be done later when the alarm is first set.
*/
irq_attach(KINETIS_IRQ_RTC, kinetis_rtc_interrupt);
up_enable_irq(KINETIS_IRQ_RTC);
#endif
/* Enable counters */
putreg32(RTC_SR_TCE, KINETIS_RTC_SR);
/* Mark RTC enabled */
g_rtc_enabled = true;
return OK;
}
/****************************************************************************
* Name: up_rtc_time
*
* Description:
* Get the current time in seconds. This is similar to the standard
* time() function. This interface is only required if the low-resolution
* RTC/counter hardware implementation selected. It is only used by the
* RTOS during initialization to set up the system time when CONFIG_RTC is
* set but neither CONFIG_RTC_HIRES nor CONFIG_RTC_DATETIME are set.
*
* Input Parameters:
* None
*
* Returned Value:
* The current time in seconds
*
****************************************************************************/
#ifndef CONFIG_RTC_HIRES
time_t up_rtc_time(void)
{
return getreg32(KINETIS_RTC_TSR);
}
#endif
/****************************************************************************
* Name: up_rtc_gettime
*
* Description:
* Get the current time from the high resolution RTC clock/counter. This
* interface is only supported by the high-resolution RTC/counter hardware
* implementation. It is used to replace the system timer.
*
* Input Parameters:
* tp - The location to return the high resolution time value.
*
* Returned Value:
* Zero (OK) on success; a negated errno on failure
*
****************************************************************************/
#ifdef CONFIG_RTC_HIRES
int up_rtc_gettime(FAR struct timespec *tp)
{
irqstate_t flags;
uint32_t seconds, prescaler, prescaler2;
/* Get prescaler and seconds register. this is in a loop which ensures that
* registers will be re-read if during the reads the prescaler has
* wrapped-around.
*/
flags = enter_critical_section();
do
{
prescaler = getreg32(KINETIS_RTC_TPR);
seconds = getreg32(KINETIS_RTC_TSR);
prescaler2 = getreg32(KINETIS_RTC_TPR);
}
while (prescaler > prescaler2);
leave_critical_section(flags);
/* Build seconds + nanoseconds from seconds and prescaler register */
tp->tv_sec = seconds;
tp->tv_nsec = prescaler * (1000000000 / CONFIG_RTC_FREQUENCY);
return OK;
}
#endif
/****************************************************************************
* Name: up_rtc_settime
*
* Description:
* Set the RTC to the provided time. All RTC implementations must be able
* to set their time based on a standard timespec.
*
* Input Parameters:
* tp - the time to use
*
* Returned Value:
* Zero (OK) on success; a negated errno on failure
*
****************************************************************************/
int up_rtc_settime(FAR const struct timespec *tp)
{
irqstate_t flags;
uint32_t seconds, prescaler;
seconds = tp->tv_sec;
prescaler = tp->tv_nsec * (CONFIG_RTC_FREQUENCY / 1000000000);
flags = enter_critical_section();
putreg32(0, KINETIS_RTC_SR); /* Disable counter */
putreg32(prescaler, KINETIS_RTC_TPR); /* Always write prescaler first */
putreg32(seconds, KINETIS_RTC_TSR);
putreg32(RTC_SR_TCE, KINETIS_RTC_SR); /* Re-enable counter */
leave_critical_section(flags);
return OK;
}
/****************************************************************************
* Name: kinetis_rtc_setalarm
*
* Description:
* Set up an alarm.
*
* Input Parameters:
* tp - the time to set the alarm
* callback - the function to call when the alarm expires.
*
* Returned Value:
* Zero (OK) on success; a negated errno on failure
*
****************************************************************************/
#ifdef CONFIG_RTC_ALARM
int kinetis_rtc_setalarm(FAR const struct timespec *tp, alarmcb_t callback)
{
/* Is there already something waiting on the ALARM? */
if (g_alarmcb == NULL)
{
/* No.. Save the callback function pointer */
g_alarmcb = callback;
/* Enable and set RTC alarm */
putreg32(tp->tv_sec, KINETIS_RTC_TAR); /* Set alarm (also resets
* flags) */
putreg32(RTC_IER_TAIE, KINETIS_RTC_IER); /* Enable alarm interrupt */
return OK;
}
else
{
return -EBUSY;
}
}
#endif
/****************************************************************************
* Name: kinetis_rtc_cancelalarm
*
* Description:
* Cancel a pending alarm alarm
*
* Input Parameters:
* none
*
* Returned Value:
* Zero (OK) on success; a negated errno on failure
*
****************************************************************************/
#ifdef CONFIG_RTC_ALARM
int kinetis_rtc_cancelalarm(void)
{
if (g_alarmcb != NULL)
{
/* Cancel the global callback function */
g_alarmcb = NULL;
/* Unset the alarm */
putreg32(0, KINETIS_RTC_IER); /* disable alarm interrupt */
return OK;
}
else
{
return -ENODATA;
}
}
#endif
#endif /* KINETIS_RTC */
arch/arm/src/lpc43xx/lpc43_serial.c
+4 -4
View File
@@ -170,7 +170,7 @@ static struct up_dev_s g_uart0priv =
.bits = CONFIG_USART0_BITS,
.stopbits2 = CONFIG_USART0_2STOP,
#if defined(CONFIG_USART0_RS485MODE) && defined(CONFIG_USART0_RS485_DTRDIR)
.dtrdir = true;
.dtrdir = true,
#endif
};
@@ -205,7 +205,7 @@ static struct up_dev_s g_uart1priv =
.bits = CONFIG_UART1_BITS,
.stopbits2 = CONFIG_UART1_2STOP,
#if defined(CONFIG_UART1_RS485MODE) && defined(CONFIG_UART1_RS485_DTRDIR)
.dtrdir = true;
.dtrdir = true,
#endif
};
@@ -240,7 +240,7 @@ static struct up_dev_s g_uart2priv =
.bits = CONFIG_USART2_BITS,
.stopbits2 = CONFIG_USART2_2STOP,
#if defined(CONFIG_USART2_RS485MODE) && defined(CONFIG_USART2_RS485_DTRDIR)
.dtrdir = true;
.dtrdir = true,
#endif
};
@@ -275,7 +275,7 @@ static struct up_dev_s g_uart3priv =
.bits = CONFIG_USART3_BITS,
.stopbits2 = CONFIG_USART3_2STOP,
#if defined(CONFIG_USART3_RS485MODE) && defined(CONFIG_USART3_RS485_DTRDIR)
.dtrdir = true;
.dtrdir = true,
#endif
};
arch/arm/src/sam34/Kconfig
-1
View File
@@ -1060,7 +1060,6 @@ config SAM34_TC5_TIOB
config SAM34_ONESHOT
bool "TC one-shot wrapper"
depends on SAM34_FREERUN
default n if !SCHED_TICKLESS
default y if SCHED_TICKLESS
---help---
arch/arm/src/sam34/Make.defs
+1 -1
View File
@@ -199,7 +199,7 @@ ifeq ($(CONFIG_ARCH_CHIP_SAM4CM),y)
ifeq ($(CONFIG_SAM34_TC),y)
CHIP_CSRCS += sam4cm_tc.c
ifeq ($(CONFIG_SAM34_ONESHOT),y)
CHIP_CSRCS += sam4cm_oneshot.c
CHIP_CSRCS += sam4cm_oneshot.c sam4cm_oneshot_lowerhalf.c
endif
ifeq ($(CONFIG_SAM34_FREERUN),y)
CHIP_CSRCS += sam4cm_freerun.c
arch/arm/src/sam34/sam4cm_freerun.c
+2 -2
View File
@@ -59,7 +59,7 @@
#include "sam4cm_freerun.h"
#ifdef CONFIG_SAM34_ONESHOT
#ifdef CONFIG_SAM34_FREERUN
/****************************************************************************
* Private Functions
@@ -316,4 +316,4 @@ int sam_freerun_uninitialize(struct sam_freerun_s *freerun)
return OK;
}
#endif /* CONFIG_SAM34_ONESHOT */
#endif /* CONFIG_SAM34_FREERUN */
arch/arm/src/sam34/sam4cm_oneshot.c
+21 -6
View File
@@ -111,7 +111,9 @@ static void sam_oneshot_handler(TC_HANDLE tch, void *arg, uint32_t sr)
oneshot->handler = NULL;
oneshot_arg = (void *)oneshot->arg;
oneshot->arg = NULL;
#ifdef CONFIG_SAM34_FREERUN
oneshot->start_count = 0;
#endif
oneshot_handler(oneshot_arg);
}
@@ -212,7 +214,10 @@ int sam_oneshot_initialize(struct sam_oneshot_s *oneshot, int chan,
oneshot->running = false;
oneshot->handler = NULL;
oneshot->arg = NULL;
#ifdef CONFIG_SAM34_FREERUN
oneshot->start_count = 0;
#endif
return OK;
}
@@ -251,8 +256,10 @@ int sam_oneshot_max_delay(struct sam_oneshot_s *oneshot, uint64_t *usec)
*
****************************************************************************/
int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freerun,
oneshot_handler_t handler, void *arg, const struct timespec *ts)
int sam_oneshot_start(struct sam_oneshot_s *oneshot,
struct sam_freerun_s *freerun,
oneshot_handler_t handler, void *arg,
const struct timespec *ts)
{
uint64_t usec;
uint64_t regval;
@@ -309,6 +316,7 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freer
sam_tc_start(oneshot->tch);
#ifdef CONFIG_SAM34_FREERUN
/* The function sam_tc_start() starts the timer/counter by setting the
* bits TC_CCR_CLKEN and TC_CCR_SWTRG in the channel control register.
* The first one enables the timer/counter the latter performs an
@@ -327,7 +335,11 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freer
* vanishes at least if compiled with no optimisation.
*/
oneshot->start_count = sam_tc_getcounter(freerun->tch);
if (freerun != NULL)
{
oneshot->start_count = sam_tc_getcounter(freerun->tch);
}
#endif
/* Enable interrupts. We should get the callback when the interrupt
* occurs.
@@ -363,8 +375,8 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freer
*
****************************************************************************/
int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freerun,
struct timespec *ts)
int sam_oneshot_cancel(struct sam_oneshot_s *oneshot,
struct sam_freerun_s *freerun, struct timespec *ts)
{
irqstate_t flags;
uint64_t usec;
@@ -405,16 +417,19 @@ int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct sam_freerun_s *free
count = sam_tc_getcounter(oneshot->tch);
rc = sam_tc_getregister(oneshot->tch, TC_REGC);
#ifdef CONFIG_SAM34_FREERUN
/* In the case the timer/counter was canceled very short after its start,
* the counter register can hold the wrong value (the value of the last
* run). To prevent this the counter value is set to zero if not at
* least on tick passed since the start of the timer/counter.
*/
if (count > 0 && sam_tc_getcounter(freerun->tch) == oneshot->start_count)
if (count > 0 && freerun != NULL &&
sam_tc_getcounter(freerun->tch) == oneshot->start_count)
{
count = 0;
}
#endif
/* Now we can disable the interrupt and stop the timer. */
arch/arm/src/sam34/sam4cm_oneshot.h
+22 -7
View File
@@ -46,7 +46,6 @@
#include <time.h>
#include "sam4cm_tc.h"
#include "sam4cm_freerun.h"
#ifdef CONFIG_SAM34_ONESHOT
@@ -83,11 +82,13 @@ struct sam_oneshot_s
volatile oneshot_handler_t handler; /* Oneshot expiration callback */
volatile void *arg; /* The argument that will accompany
* the callback */
#ifdef CONFIG_SAM34_FREERUN
volatile uint32_t start_count; /* Stores the value of the freerun counter,
* at each start of the onshot timer. Is neccesary
* to find out if the onshot counter was updated
* correctly at the time of the call to
* sam_oneshot_cancel or not. */
#endif
};
/****************************************************************************
@@ -130,6 +131,14 @@ extern "C"
int sam_oneshot_initialize(struct sam_oneshot_s *oneshot, int chan,
uint16_t resolution);
/****************************************************************************
* Name: sam_oneshot_max_delay
*
* Description:
* Determine the maximum delay of the one-shot timer (in microseconds)
*
****************************************************************************/
int sam_oneshot_max_delay(struct sam_oneshot_s *oneshot, uint64_t *usec);
/****************************************************************************
@@ -144,7 +153,8 @@ int sam_oneshot_max_delay(struct sam_oneshot_s *oneshot, uint64_t *usec);
* sam_oneshot_initialize();
* freerun Caller allocated instance of the freerun state structure. This
* structure must have been previously initialized via a call to
* sam_freerun_initialize();
* sam_freerun_initialize(). May be NULL if there is no matching
* free-running timer.
* handler The function to call when when the oneshot timer expires.
* arg An opaque argument that will accompany the callback.
* ts Provides the duration of the one shot timer.
@@ -155,8 +165,11 @@ int sam_oneshot_max_delay(struct sam_oneshot_s *oneshot, uint64_t *usec);
*
****************************************************************************/
int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freerun,
oneshot_handler_t handler, void *arg, const struct timespec *ts);
struct sam_freerun_s;
int sam_oneshot_start(struct sam_oneshot_s *oneshot,
struct sam_freerun_s *freerun,
oneshot_handler_t handler, void *arg,
const struct timespec *ts);
/****************************************************************************
* Name: sam_oneshot_cancel
@@ -173,7 +186,8 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freer
* sam_oneshot_initialize();
* freerun Caller allocated instance of the freerun state structure. This
* structure must have been previously initialized via a call to
* sam_freerun_initialize();
* sam_freerun_initialize(). May be NULL if there is no matching
* free-running timer.
* ts The location in which to return the time remaining on the
* oneshot timer. A time of zero is returned if the timer is
* not running.
@@ -185,8 +199,9 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freer
*
****************************************************************************/
int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freerun,
struct timespec *ts);
struct sam_freerun_s;
int sam_oneshot_cancel(struct sam_oneshot_s *oneshot,
struct sam_freerun_s *freerun, struct timespec *ts);
#undef EXTERN
#ifdef __cplusplus
arch/arm/src/sam34/sam4cm_oneshot_lowerhalf.c
+345
View File
@@ -0,0 +1,345 @@
/****************************************************************************
* arch/arm/src/sam/sam_oneshot_lowerhalf.c
*
* Copyright (C) 2016 Gregory Nutt. All rights reserved.
* Authors: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <time.h>
#include <assert.h>
#include <debug.h>
#include <nuttx/irq.h>
#include <nuttx/kmalloc.h>
#include <nuttx/timers/oneshot.h>
#include "sam_oneshot.h"
/****************************************************************************
* Private Types
****************************************************************************/
/* This structure describes the state of the oneshot timer lower-half driver */
struct sam_oneshot_lowerhalf_s
{
/* This is the part of the lower half driver that is visible to the upper-
* half client of the driver. This must be the first thing in this
* structure so that pointers to struct oneshot_lowerhalf_s are cast
* compatible to struct sam_oneshot_lowerhalf_s and vice versa.
*/
struct oneshot_lowerhalf_s lh; /* Common lower-half driver fields */
/* Private lower half data follows */
struct sam_oneshot_s oneshot; /* SAM-specific oneshot state */
oneshot_callback_t callback; /* internal handler that receives callback */
FAR void *arg; /* Argument that is passed to the handler */
};
/****************************************************************************
* Private Function Prototypes
****************************************************************************/
static void sam_oneshot_handler(void *arg);
static int sam_max_delay(FAR struct oneshot_lowerhalf_s *lower,
FAR struct timespec *ts);
static int sam_start(FAR struct oneshot_lowerhalf_s *lower,
oneshot_callback_t callback, FAR void *arg,
FAR const struct timespec *ts);
static int sam_cancel(FAR struct oneshot_lowerhalf_s *lower,
FAR struct timespec *ts);
/****************************************************************************
* Private Data
****************************************************************************/
/* Lower half operations */
static const struct oneshot_operations_s g_oneshot_ops =
{
.max_delay = sam_max_delay,
.start = sam_start,
.cancel = sam_cancel,
};
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: sam_oneshot_handler
*
* Description:
* Timer expiration handler
*
* Input Parameters:
* arg - Should be the same argument provided when sam_oneshot_start()
* was called.
*
* Returned Value:
* None
*
****************************************************************************/
static void sam_oneshot_handler(void *arg)
{
FAR struct sam_oneshot_lowerhalf_s *priv =
(FAR struct sam_oneshot_lowerhalf_s *)arg;
oneshot_callback_t callback;
FAR void *cbarg;
DEBUGASSERT(priv != NULL);
/* Perhaps the callback was nullified in a race condition with
* sam_cancel?
*/
if (priv->callback)
{
/* Sample and nullify BEFORE executing callback (in case the callback
* restarts the oneshot).
*/
callback = priv->callback;
cbarg = priv->arg;
priv->callback = NULL;
priv->arg = NULL;
/* Then perform the callback */
callback(&priv->lh, cbarg);
}
}
/****************************************************************************
* Name: sam_max_delay
*
* Description:
* Determine the maximum delay of the one-shot timer (in microseconds)
*
* Input Parameters:
* lower An instance of the lower-half oneshot state structure. This
* structure must have been previously initialized via a call to
* oneshot_initialize();
* ts The location in which to return the maxumum delay.
*
* Returned Value:
* Zero (OK) is returned on success; a negated errno value is returned
* on failure.
*
****************************************************************************/
static int sam_max_delay(FAR struct oneshot_lowerhalf_s *lower,
FAR struct timespec *ts)
{
FAR struct sam_oneshot_lowerhalf_s *priv =
(FAR struct sam_oneshot_lowerhalf_s *)lower;
uint64_t usecs;
int ret;
DEBUGASSERT(priv != NULL && ts != NULL);
ret = sam_oneshot_max_delay(&priv->oneshot, &usecs);
if (ret >= 0)
{
uint64_t sec = usecs / 1000000;
usecs -= 1000000 * sec;
ts->tv_sec = (time_t)sec;
ts->tv_nsec = (long)(usecs * 1000);
}
return ret;
}
/****************************************************************************
* Name: sam_start
*
* Description:
* Start the oneshot timer
*
* Input Parameters:
* lower An instance of the lower-half oneshot state structure. This
* structure must have been previously initialized via a call to
* oneshot_initialize();
* handler The function to call when when the oneshot timer expires.
* arg An opaque argument that will accompany the callback.
* ts Provides the duration of the one shot timer.
*
* Returned Value:
* Zero (OK) is returned on success; a negated errno value is returned
* on failure.
*
****************************************************************************/
static int sam_start(FAR struct oneshot_lowerhalf_s *lower,
oneshot_callback_t callback, FAR void *arg,
FAR const struct timespec *ts)
{
FAR struct sam_oneshot_lowerhalf_s *priv =
(FAR struct sam_oneshot_lowerhalf_s *)lower;
irqstate_t flags;
int ret;
DEBUGASSERT(priv != NULL && callback != NULL && ts != NULL);
/* Save the callback information and start the timer */
flags = enter_critical_section();
priv->callback = callback;
priv->arg = arg;
ret = sam_oneshot_start(&priv->oneshot, NULL,
sam_oneshot_handler, priv, ts);
leave_critical_section(flags);
if (ret < 0)
{
tmrerr("ERROR: sam_oneshot_start failed: %d\n", flags);
}
return ret;
}
/****************************************************************************
* Name: sam_cancel
*
* Description:
* Cancel the oneshot timer and return the time remaining on the timer.
*
* NOTE: This function may execute at a high rate with no timer running (as
* when pre-emption is enabled and disabled).
*
* Input Parameters:
* lower Caller allocated instance of the oneshot state structure. This
* structure must have been previously initialized via a call to
* oneshot_initialize();
* ts The location in which to return the time remaining on the
* oneshot timer. A time of zero is returned if the timer is
* not running.
*
* Returned Value:
* Zero (OK) is returned on success. A call to up_timer_cancel() when
* the timer is not active should also return success; a negated errno
* value is returned on any failure.
*
****************************************************************************/
static int sam_cancel(FAR struct oneshot_lowerhalf_s *lower,
FAR struct timespec *ts)
{
FAR struct sam_oneshot_lowerhalf_s *priv =
(FAR struct sam_oneshot_lowerhalf_s *)lower;
irqstate_t flags;
int ret;
DEBUGASSERT(priv != NULL);
/* Cancel the timer */
flags = enter_critical_section();
ret = sam_oneshot_cancel(&priv->oneshot, NULL, ts);
priv->callback = NULL;
priv->arg = NULL;
leave_critical_section(flags);
if (ret < 0)
{
tmrerr("ERROR: sam_oneshot_cancel failed: %d\n", flags);
}
return ret;
}
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: oneshot_initialize
*
* Description:
* Initialize the oneshot timer and return a oneshot lower half driver
* instance.
*
* Input Parameters:
* chan Timer counter channel to be used.
* resolution The required resolution of the timer in units of
* microseconds. NOTE that the range is restricted to the
* range of uint16_t (excluding zero).
*
* Returned Value:
* On success, a non-NULL instance of the oneshot lower-half driver is
* returned. NULL is return on any failure.
*
****************************************************************************/
FAR struct oneshot_lowerhalf_s *oneshot_initialize(int chan,
uint16_t resolution)
{
FAR struct sam_oneshot_lowerhalf_s *priv;
int ret;
/* Allocate an instance of the lower half driver */
priv = (FAR struct sam_oneshot_lowerhalf_s *)
kmm_zalloc(sizeof(struct sam_oneshot_lowerhalf_s));
if (priv == NULL)
{
tmrerr("ERROR: Failed to initialized state structure\n");
return NULL;
}
/* Initialize the lower-half driver structure */
priv->lh.ops = &g_oneshot_ops;
/* Initialize the contained SAM oneshot timer */
ret = sam_oneshot_initialize(&priv->oneshot, chan, resolution);
if (ret < 0)
{
tmrerr("ERROR: sam_oneshot_initialize failed: %d\n", ret);
kmm_free(priv);
return NULL;
}
return &priv->lh;
}
arch/arm/src/sam34/sam_emac.c
+17 -12
View File
@@ -207,18 +207,7 @@
#endif
/* EMAC buffer sizes, number of buffers, and number of descriptors.
*
* REVISIT: The CONFIG_NET_MULTIBUFFER might be useful. It might be possible
* to use this option to send and receive messages directly into the DMA
* buffers, saving a copy. There might be complications on the receiving
* side, however, where buffers may wrap and where the size of the received
* frame will typically be smaller than a full packet.
*/
#ifdef CONFIG_NET_MULTIBUFFER
# error CONFIG_NET_MULTIBUFFER must not be set
#endif
/* EMAC buffer sizes, number of buffers, and number of descriptors. *********/
#define EMAC_RX_UNITSIZE 128 /* Fixed size for RX buffer */
#define EMAC_TX_UNITSIZE CONFIG_NET_ETH_MTU /* MAX size for Ethernet packet */
@@ -312,6 +301,19 @@ struct sam_emac_s
static struct sam_emac_s g_emac;
#ifdef CONFIG_NET_MULTIBUFFER
/* A single packet buffer is used
*
* REVISIT: It might be possible to use this option to send and receive
* messages directly into the DMA buffers, saving a copy. There might be
* complications on the receiving side, however, where buffers may wrap
* and where the size of the received frame will typically be smaller than
* a full packet.
*/
static uint8_t g_pktbuf[MAX_NET_DEV_MTU + CONFIG_NET_GUARDSIZE];
#endif
#ifdef CONFIG_SAM34_EMAC_PREALLOCATE
/* Preallocated data */
/* TX descriptors list */
@@ -3806,6 +3808,9 @@ void up_netinitialize(void)
/* Initialize the driver structure */
memset(priv, 0, sizeof(struct sam_emac_s));
#ifdef CONFIG_NET_MULTIBUFFER
priv->dev.d_buf = g_pktbuf; /* Single packet buffer */
#endif
priv->dev.d_ifup = sam_ifup; /* I/F up (new IP address) callback */
priv->dev.d_ifdown = sam_ifdown; /* I/F down callback */
priv->dev.d_txavail = sam_txavail; /* New TX data callback */
arch/arm/src/sam34/sam_gpio.c
+43
View File
@@ -118,6 +118,7 @@ static inline int sam_gpiopin(gpio_pinset_t cfgset)
* - If glitch filtering is enabled
* - If necessary to read the input value on an open drain output (this
* may be done in TWI logic to detect hangs on the I2C bus).
* - If necessary to read the input value on peripheral pins.
*
****************************************************************************/
@@ -189,6 +190,14 @@ static inline int sam_configinput(uintptr_t base, uint32_t pin,
if ((cfgset & GPIO_CFG_PULLUP) != 0)
{
#ifdef GPIO_HAVE_PULLDOWN
/* The pull-up on a pin can not be enabled if its pull-down is still
* active. Therefore, we need to disable the pull-down first before
* enabling the pull-up.
*/
putreg32(pin, base + SAM_PIO_PPDDR_OFFSET);
#endif
putreg32(pin, base + SAM_PIO_PUER_OFFSET);
}
else
@@ -201,6 +210,12 @@ static inline int sam_configinput(uintptr_t base, uint32_t pin,
if ((cfgset & GPIO_CFG_PULLDOWN) != 0)
{
/* The pull-down on a pin can not be enabled if its pull-up is still
* active. Therefore, we need to disable the pull-up first before
* enabling the pull-down.
*/
putreg32(pin, base + SAM_PIO_PUDR_OFFSET);
putreg32(pin, base + SAM_PIO_PPDER_OFFSET);
}
else
@@ -273,6 +288,14 @@ static inline int sam_configoutput(uintptr_t base, uint32_t pin,
if ((cfgset & GPIO_CFG_PULLUP) != 0)
{
#ifdef GPIO_HAVE_PULLDOWN
/* The pull-up on a pin can not be enabled if its pull-down is still
* active. Therefore, we need to disable the pull-down first before
* enabling the pull-up.
*/
putreg32(pin, base + SAM_PIO_PPDDR_OFFSET);
#endif
putreg32(pin, base + SAM_PIO_PUER_OFFSET);
}
else
@@ -285,6 +308,12 @@ static inline int sam_configoutput(uintptr_t base, uint32_t pin,
if ((cfgset & GPIO_CFG_PULLDOWN) != 0)
{
/* The pull-down on a pin can not be enabled if its pull-up is still
* active. Therefore, we need to disable the pull-up first before
* enabling the pull-down.
*/
putreg32(pin, base + SAM_PIO_PUDR_OFFSET);
putreg32(pin, base + SAM_PIO_PPDER_OFFSET);
}
else
@@ -344,6 +373,14 @@ static inline int sam_configperiph(uintptr_t base, uint32_t pin,
if ((cfgset & GPIO_CFG_PULLUP) != 0)
{
#ifdef GPIO_HAVE_PULLDOWN
/* The pull-up on a pin can not be enabled if its pull-down is still
* active. Therefore, we need to disable the pull-down first before
* enabling the pull-up.
*/
putreg32(pin, base + SAM_PIO_PPDDR_OFFSET);
#endif
putreg32(pin, base + SAM_PIO_PUER_OFFSET);
}
else
@@ -356,6 +393,12 @@ static inline int sam_configperiph(uintptr_t base, uint32_t pin,
if ((cfgset & GPIO_CFG_PULLDOWN) != 0)
{
/* The pull-down on a pin can not be enabled if its pull-up is still
* active. Therefore, we need to disable the pull-up first before
* enabling the pull-down.
*/
putreg32(pin, base + SAM_PIO_PUDR_OFFSET);
putreg32(pin, base + SAM_PIO_PPDER_OFFSET);
}
else
arch/arm/src/sam34/sam_wdt.c
+2 -2
View File
@@ -554,7 +554,7 @@ static xcpt_t sam34_capture(FAR struct watchdog_lowerhalf_s *lower,
regval |= WWDG_CFR_EWI;
sam34_putreg(regval, SAM_WDT_CFR);
up_enable_irq(STM32_IRQ_WWDG);
up_enable_irq(SAM_IRQ_WWDG);
}
else
{
@@ -563,7 +563,7 @@ static xcpt_t sam34_capture(FAR struct watchdog_lowerhalf_s *lower,
regval &= ~WWDG_CFR_EWI;
sam34_putreg(regval, SAM_WDT_CFR);
up_disable_irq(STM32_IRQ_WWDG);
up_disable_irq(SAM_IRQ_WWDG);
}
leave_critical_section(flags);
arch/arm/src/sam34/sam_wdt.h
+1 -1
View File
@@ -95,4 +95,4 @@ void sam_wdtinitialize(FAR const char *devpath);
#endif /* __ASSEMBLY__ */
#endif /* CONFIG_WATCHDOG */
#endif /* __ARCH_ARM_SRC_STM32_STM32_WDG_H */
#endif /* __ARCH_ARM_SRC_SAM34_WDT_H */
arch/arm/src/sama5/Kconfig
-1
View File
@@ -3866,7 +3866,6 @@ endif # SAMA5_TC2
config SAMA5_ONESHOT
bool "TC one-shot wrapper"
depends on SAMA5_FREERUN
default n if !SCHED_TICKLESS
default y if SCHED_TICKLESS
---help---
arch/arm/src/sama5/Make.defs
+2 -2
View File
@@ -1,7 +1,7 @@
############################################################################
# arch/arm/sama5/Make.defs
#
# Copyright (C) 2013-2014 Gregory Nutt. All rights reserved.
# Copyright (C) 2013-2014, 2016 Gregory Nutt. All rights reserved.
# Author: Gregory Nutt <gnutt@nuttx.org>
#
# Redistribution and use in source and binary forms, with or without
@@ -292,7 +292,7 @@ endif
ifeq ($(CONFIG_SAMA5_HAVE_TC),y)
CHIP_CSRCS += sam_tc.c
ifeq ($(CONFIG_SAMA5_ONESHOT),y)
CHIP_CSRCS += sam_oneshot.c
CHIP_CSRCS += sam_oneshot.c sam_oneshot_lowerhalf.c
endif
ifeq ($(CONFIG_SAMA5_FREERUN),y)
CHIP_CSRCS += sam_freerun.c
arch/arm/src/sama5/sam_emaca.c
+17 -12
View File
@@ -199,18 +199,7 @@
#endif
/* EMAC buffer sizes, number of buffers, and number of descriptors.
*
* REVISIT: The CONFIG_NET_MULTIBUFFER might be useful. It might be possible
* to use this option to send and receive messages directly into the DMA
* buffers, saving a copy. There might be complications on the receiving
* side, however, where buffers may wrap and where the size of the received
* frame will typically be smaller than a full packet.
*/
#ifdef CONFIG_NET_MULTIBUFFER
# error CONFIG_NET_MULTIBUFFER must not be set
#endif
/* EMAC buffer sizes, number of buffers, and number of descriptors. *********/
#define EMAC_RX_UNITSIZE 128 /* Fixed size for RX buffer */
#define EMAC_TX_UNITSIZE CONFIG_NET_ETH_MTU /* MAX size for Ethernet packet */
@@ -301,6 +290,19 @@ struct sam_emac_s
static struct sam_emac_s g_emac;
#ifdef CONFIG_NET_MULTIBUFFER
/* A single packet buffer is used
*
* REVISIT: It might be possible to use this option to send and receive
* messages directly into the DMA buffers, saving a copy. There might be
* complications on the receiving side, however, where buffers may wrap
* and where the size of the received frame will typically be smaller than
* a full packet.
*/
static uint8_t g_pktbuf[MAX_NET_DEV_MTU + CONFIG_NET_GUARDSIZE];
#endif
#ifdef CONFIG_SAMA5_EMACA_PREALLOCATE
/* Preallocated data */
/* TX descriptors list */
@@ -3484,6 +3486,9 @@ int sam_emac_initialize(void)
/* Initialize the driver structure */
memset(priv, 0, sizeof(struct sam_emac_s));
#ifdef CONFIG_NET_MULTIBUFFER
priv->dev.d_buf = g_pktbuf; /* Single packet buffer */
#endif
priv->dev.d_ifup = sam_ifup; /* I/F up (new IP address) callback */
priv->dev.d_ifdown = sam_ifdown; /* I/F down callback */
priv->dev.d_txavail = sam_txavail; /* New TX data callback */
arch/arm/src/sama5/sam_emacb.c
+45 -12
View File
@@ -305,18 +305,7 @@
# define sam_dumppacket(m,a,n)
#endif
/* EMAC buffer sizes, number of buffers, and number of descriptors **********
*
* REVISIT: The CONFIG_NET_MULTIBUFFER might be useful. It might be possible
* to use this option to send and receive messages directly into the DMA
* buffers, saving a copy. There might be complications on the receiving
* side, however, where buffers may wrap and where the size of the received
* frame will typically be smaller than a full packet.
*/
#ifdef CONFIG_NET_MULTIBUFFER
# error CONFIG_NET_MULTIBUFFER must not be set
#endif
/* EMAC buffer sizes, number of buffers, and number of descriptors **********/
#define EMAC_RX_UNITSIZE 128 /* Fixed size for RX buffer */
#define EMAC_TX_UNITSIZE CONFIG_NET_ETH_MTU /* MAX size for Ethernet packet */
@@ -709,6 +698,21 @@ static const struct sam_emacattr_s g_emac0_attr =
#endif
};
#ifdef CONFIG_NET_MULTIBUFFER
/* A single packet buffer is used
*
* REVISIT: It might be possible to use this option to send and receive
* messages directly into the DMA buffers, saving a copy. There might be
* complications on the receiving side, however, where buffers may wrap
* and where the size of the received frame will typically be smaller than
* a full packet.
*/
static uint8_t g_pktbuf0[MAX_NET_DEV_MTU + CONFIG_NET_GUARDSIZE];
#endif
/* EMAC0 peripheral state */
static struct sam_emac_s g_emac0;
#endif
@@ -777,6 +781,21 @@ static const struct sam_emacattr_s g_emac1_attr =
#endif
};
#ifdef CONFIG_NET_MULTIBUFFER
/* A single packet buffer is used
*
* REVISIT: It might be possible to use this option to send and receive
* messages directly into the DMA buffers, saving a copy. There might be
* complications on the receiving side, however, where buffers may wrap
* and where the size of the received frame will typically be smaller than
* a full packet.
*/
static uint8_t g_pktbuf1[MAX_NET_DEV_MTU + CONFIG_NET_GUARDSIZE];
#endif
/* EMAC1 peripheral state */
static struct sam_emac_s g_emac1;
#endif
@@ -4515,6 +4534,9 @@ int sam_emac_initialize(int intf)
{
struct sam_emac_s *priv;
const struct sam_emacattr_s *attr;
#ifdef CONFIG_NET_MULTIBUFFER
uint8_t *pktbuf;
#endif
#if defined(CONFIG_NETDEV_PHY_IOCTL) && defined(CONFIG_ARCH_PHY_INTERRUPT)
uint8_t phytype;
#endif
@@ -4526,6 +4548,10 @@ int sam_emac_initialize(int intf)
priv = &g_emac0;
attr = &g_emac0_attr;
#ifdef CONFIG_NET_MULTIBUFFER
pktbuf = g_pktbuf0;
#endif
#if defined(CONFIG_NETDEV_PHY_IOCTL) && defined(CONFIG_ARCH_PHY_INTERRUPT)
phytype = SAMA5_EMAC0_PHY_TYPE;
#endif
@@ -4538,6 +4564,10 @@ int sam_emac_initialize(int intf)
priv = &g_emac1;
attr = &g_emac1_attr;
#ifdef CONFIG_NET_MULTIBUFFER
pktbuf = g_pktbuf1;
#endif
#if defined(CONFIG_NETDEV_PHY_IOCTL) && defined(CONFIG_ARCH_PHY_INTERRUPT)
phytype = SAMA5_EMAC1_PHY_TYPE;
#endif
@@ -4553,6 +4583,9 @@ int sam_emac_initialize(int intf)
memset(priv, 0, sizeof(struct sam_emac_s));
priv->attr = attr; /* Save the constant attributes */
#ifdef CONFIG_NET_MULTIBUFFER
priv->dev.d_buf = pktbuf; /* Single packet buffer */
#endif
priv->dev.d_ifup = sam_ifup; /* I/F up (new IP address) callback */
priv->dev.d_ifdown = sam_ifdown; /* I/F down callback */
priv->dev.d_txavail = sam_txavail; /* New TX data callback */
arch/arm/src/sama5/sam_freerun.c
+3 -18
View File
@@ -60,27 +60,12 @@
#include "sam_freerun.h"
#ifdef CONFIG_SAMA5_ONESHOT
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Private Types
****************************************************************************/
/****************************************************************************
* Private Function Prototypes
****************************************************************************/
/****************************************************************************
* Private Data
****************************************************************************/
#ifdef CONFIG_SAMA5_FREERUN
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: sam_freerun_handler
*
@@ -333,4 +318,4 @@ int sam_freerun_uninitialize(struct sam_freerun_s *freerun)
return OK;
}
#endif /* CONFIG_SAMA5_ONESHOT */
#endif /* CONFIG_SAMA5_FREERUN */
arch/arm/src/sama5/sam_gmac.c
+17 -12
View File
@@ -118,18 +118,7 @@
# error Unknown PHY
#endif
/* GMAC buffer sizes, number of buffers, and number of descriptors.
*
* REVISIT: The CONFIG_NET_MULTIBUFFER might be useful. It might be possible
* to use this option to send and receive messages directly into the DMA
* buffers, saving a copy. There might be complications on the receiving
* side, however, where buffers may wrap and where the size of the received
* frame will typically be smaller than a full packet.
*/
#ifdef CONFIG_NET_MULTIBUFFER
# error CONFIG_NET_MULTIBUFFER must not be set
#endif
/* GMAC buffer sizes, number of buffers, and number of descriptors. *********/
#define GMAC_RX_UNITSIZE 128 /* Fixed size for RX buffer */
#define GMAC_TX_UNITSIZE CONFIG_NET_ETH_MTU /* MAX size for Ethernet packet */
@@ -227,6 +216,19 @@ struct sam_gmac_s
static struct sam_gmac_s g_gmac;
#ifdef CONFIG_NET_MULTIBUFFER
/* A single packet buffer is used
*
* REVISIT: It might be possible to use this option to send and receive
* messages directly into the DMA buffers, saving a copy. There might be
* complications on the receiving side, however, where buffers may wrap
* and where the size of the received frame will typically be smaller than
* a full packet.
*/
static uint8_t g_pktbuf[MAX_NET_DEV_MTU + CONFIG_NET_GUARDSIZE];
#endif
#ifdef CONFIG_SAMA5_GMAC_PREALLOCATE
/* Preallocated data */
/* TX descriptors list */
@@ -3556,6 +3558,9 @@ int sam_gmac_initialize(void)
/* Initialize the driver structure */
memset(priv, 0, sizeof(struct sam_gmac_s));
#ifdef CONFIG_NET_MULTIBUFFER
priv->dev.d_buf = g_pktbuf; /* Single packet buffer */
#endif
priv->dev.d_ifup = sam_ifup; /* I/F up (new IP address) callback */
priv->dev.d_ifdown = sam_ifdown; /* I/F down callback */
priv->dev.d_txavail = sam_txavail; /* New TX data callback */
arch/arm/src/sama5/sam_oneshot.c
+47 -22
View File
@@ -63,22 +63,6 @@
#ifdef CONFIG_SAMA5_ONESHOT
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Private Types
****************************************************************************/
/****************************************************************************
* Private Function Prototypes
****************************************************************************/
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
@@ -128,7 +112,9 @@ static void sam_oneshot_handler(TC_HANDLE tch, void *arg, uint32_t sr)
oneshot->handler = NULL;
oneshot_arg = (void *)oneshot->arg;
oneshot->arg = NULL;
#ifdef CONFIG_SAMA5_FREERUN
oneshot->start_count = 0;
#endif
oneshot_handler(oneshot_arg);
}
@@ -229,7 +215,36 @@ int sam_oneshot_initialize(struct sam_oneshot_s *oneshot, int chan,
oneshot->running = false;
oneshot->handler = NULL;
oneshot->arg = NULL;
#ifdef CONFIG_SAMA5_FREERUN
oneshot->start_count = 0;
#endif
return OK;
}
/****************************************************************************
* Name: sam_oneshot_max_delay
*
* Description:
* Return the maximum delay supported by the one shot timer (in
* microseconds).
*
* Input Parameters:
* oneshot Caller allocated instance of the oneshot state structure. This
* structure must have been previously initialized via a call to
* sam_oneshot_initialize();
* usec The location in which to return the maximum delay.
*
* Returned Value:
* Zero (OK) is returned on success; a negated errno value is returned
* on failure.
*
****************************************************************************/
int sam_oneshot_max_delay(struct sam_oneshot_s *oneshot, uint64_t *usec)
{
DEBUGASSERT(oneshot != NULL && usec != NULL);
*usec = (0xffffull * USEC_PER_SEC) / (uint64_t)sam_tc_divfreq(oneshot->tch);
return OK;
}
@@ -253,8 +268,10 @@ int sam_oneshot_initialize(struct sam_oneshot_s *oneshot, int chan,
*
****************************************************************************/
int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freerun,
oneshot_handler_t handler, void *arg, const struct timespec *ts)
int sam_oneshot_start(struct sam_oneshot_s *oneshot,
struct sam_freerun_s *freerun,
oneshot_handler_t handler, void *arg,
const struct timespec *ts)
{
uint64_t usec;
uint64_t regval;
@@ -311,6 +328,7 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freer
sam_tc_start(oneshot->tch);
#ifdef CONFIG_SAMA5_FREERUN
/* The function sam_tc_start() starts the timer/counter by setting the
* bits TC_CCR_CLKEN and TC_CCR_SWTRG in the channel control register.
* The first one enables the timer/counter the latter performs an
@@ -329,7 +347,11 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freer
* vanishes at least if compiled with no optimisation.
*/
oneshot->start_count = sam_tc_getcounter(freerun->tch);
if (freerun != NULL)
{
oneshot->start_count = sam_tc_getcounter(freerun->tch);
}
#endif
/* Enable interrupts. We should get the callback when the interrupt
* occurs.
@@ -365,8 +387,8 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freer
*
****************************************************************************/
int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freerun,
struct timespec *ts)
int sam_oneshot_cancel(struct sam_oneshot_s *oneshot,
struct sam_freerun_s *freerun, struct timespec *ts)
{
irqstate_t flags;
uint64_t usec;
@@ -407,16 +429,19 @@ int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct sam_freerun_s *free
count = sam_tc_getcounter(oneshot->tch);
rc = sam_tc_getregister(oneshot->tch, TC_REGC);
#ifdef CONFIG_SAMA5_FREERUN
/* In the case the timer/counter was canceled very short after its start,
* the counter register can hold the wrong value (the value of the last
* run). To prevent this the counter value is set to zero if not at
* least on tick passed since the start of the timer/counter.
*/
if (count > 0 && sam_tc_getcounter(freerun->tch) == oneshot->start_count)
if (count > 0 && freerun != NULL &&
sam_tc_getcounter(freerun->tch) == oneshot->start_count)
{
count = 0;
}
#endif
/* Now we can disable the interrupt and stop the timer. */
arch/arm/src/sama5/sam_oneshot.h
+35 -7
View File
@@ -46,7 +46,6 @@
#include <time.h>
#include "sam_tc.h"
#include "sam_freerun.h"
#ifdef CONFIG_SAMA5_ONESHOT
@@ -83,11 +82,13 @@ struct sam_oneshot_s
volatile oneshot_handler_t handler; /* Oneshot expiration callback */
volatile void *arg; /* The argument that will accompany
* the callback */
#ifdef CONFIG_SAMA5_FREERUN
volatile uint32_t start_count; /* Stores the value of the freerun counter,
* at each start of the onshot timer. Is neccesary
* to find out if the onshot counter was updated
* correctly at the time of the call to
* sam_oneshot_cancel or not. */
#endif
};
/****************************************************************************
@@ -130,6 +131,27 @@ extern "C"
int sam_oneshot_initialize(struct sam_oneshot_s *oneshot, int chan,
uint16_t resolution);
/****************************************************************************
* Name: sam_oneshot_max_delay
*
* Description:
* Return the maximum delay supported by the one shot timer (in
* microseconds).
*
* Input Parameters:
* oneshot Caller allocated instance of the oneshot state structure. This
* structure must have been previously initialized via a call to
* sam_oneshot_initialize();
* usec The location in which to return the maximum delay.
*
* Returned Value:
* Zero (OK) is returned on success; a negated errno value is returned
* on failure.
*
****************************************************************************/
int sam_oneshot_max_delay(struct sam_oneshot_s *oneshot, uint64_t *usec);
/****************************************************************************
* Name: sam_oneshot_start
*
@@ -142,7 +164,8 @@ int sam_oneshot_initialize(struct sam_oneshot_s *oneshot, int chan,
* sam_oneshot_initialize();
* freerun Caller allocated instance of the freerun state structure. This
* structure must have been previously initialized via a call to
* sam_freerun_initialize();
* sam_freerun_initialize(). May be NULL if there is no matching
* free-running timer.
* handler The function to call when when the oneshot timer expires.
* arg An opaque argument that will accompany the callback.
* ts Provides the duration of the one shot timer.
@@ -153,8 +176,11 @@ int sam_oneshot_initialize(struct sam_oneshot_s *oneshot, int chan,
*
****************************************************************************/
int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freerun,
oneshot_handler_t handler, void *arg, const struct timespec *ts);
struct sam_freerun_s;
int sam_oneshot_start(struct sam_oneshot_s *oneshot,
struct sam_freerun_s *freerun,
oneshot_handler_t handler, void *arg,
const struct timespec *ts);
/****************************************************************************
* Name: sam_oneshot_cancel
@@ -171,7 +197,8 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freer
* sam_oneshot_initialize();
* freerun Caller allocated instance of the freerun state structure. This
* structure must have been previously initialized via a call to
* sam_freerun_initialize();
* sam_freerun_initialize(). May be NULL if there is no matching
* free-running timer.
* ts The location in which to return the time remaining on the
* oneshot timer. A time of zero is returned if the timer is
* not running.
@@ -183,8 +210,9 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freer
*
****************************************************************************/
int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freerun,
struct timespec *ts);
struct sam_freerun_s;
int sam_oneshot_cancel(struct sam_oneshot_s *oneshot,
struct sam_freerun_s *freerun, struct timespec *ts);
#undef EXTERN
#ifdef __cplusplus
arch/arm/src/sama5/sam_oneshot_lowerhalf.c
+347
View File
@@ -0,0 +1,347 @@
/****************************************************************************
* arch/arm/src/sam/sam_oneshot_lowerhalf.c
*
* Copyright (C) 2016 Gregory Nutt. All rights reserved.
* Authors: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <time.h>
#include <limits.h>
#include <assert.h>
#include <errno.h>
#include <debug.h>
#include <nuttx/irq.h>
#include <nuttx/kmalloc.h>
#include <nuttx/timers/oneshot.h>
#include "sam_oneshot.h"
/****************************************************************************
* Private Types
****************************************************************************/
/* This structure describes the state of the oneshot timer lower-half driver */
struct sam_oneshot_lowerhalf_s
{
/* This is the part of the lower half driver that is visible to the upper-
* half client of the driver. This must be the first thing in this
* structure so that pointers to struct oneshot_lowerhalf_s are cast
* compatible to struct sam_oneshot_lowerhalf_s and vice versa.
*/
struct oneshot_lowerhalf_s lh; /* Common lower-half driver fields */
/* Private lower half data follows */
struct sam_oneshot_s oneshot; /* SAM-specific oneshot state */
oneshot_callback_t callback; /* internal handler that receives callback */
FAR void *arg; /* Argument that is passed to the handler */
};
/****************************************************************************
* Private Function Prototypes
****************************************************************************/
static void sam_oneshot_handler(void *arg);
static int sam_max_delay(FAR struct oneshot_lowerhalf_s *lower,
FAR struct timespec *ts);
static int sam_start(FAR struct oneshot_lowerhalf_s *lower,
oneshot_callback_t callback, FAR void *arg,
FAR const struct timespec *ts);
static int sam_cancel(FAR struct oneshot_lowerhalf_s *lower,
FAR struct timespec *ts);
/****************************************************************************
* Private Data
****************************************************************************/
/* Lower half operations */
static const struct oneshot_operations_s g_oneshot_ops =
{
.max_delay = sam_max_delay,
.start = sam_start,
.cancel = sam_cancel,
};
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: sam_oneshot_handler
*
* Description:
* Timer expiration handler
*
* Input Parameters:
* arg - Should be the same argument provided when sam_oneshot_start()
* was called.
*
* Returned Value:
* None
*
****************************************************************************/
static void sam_oneshot_handler(void *arg)
{
FAR struct sam_oneshot_lowerhalf_s *priv =
(FAR struct sam_oneshot_lowerhalf_s *)arg;
oneshot_callback_t callback;
FAR void *cbarg;
DEBUGASSERT(priv != NULL);
/* Perhaps the callback was nullified in a race condition with
* sam_cancel?
*/
if (priv->callback)
{
/* Sample and nullify BEFORE executing callback (in case the callback
* restarts the oneshot).
*/
callback = priv->callback;
cbarg = priv->arg;
priv->callback = NULL;
priv->arg = NULL;
/* Then perform the callback */
callback(&priv->lh, cbarg);
}
}
/****************************************************************************
* Name: sam_max_delay
*
* Description:
* Determine the maximum delay of the one-shot timer (in microseconds)
*
* Input Parameters:
* lower An instance of the lower-half oneshot state structure. This
* structure must have been previously initialized via a call to
* oneshot_initialize();
* ts The location in which to return the maxumum delay.
*
* Returned Value:
* Zero (OK) is returned on success; a negated errno value is returned
* on failure.
*
****************************************************************************/
static int sam_max_delay(FAR struct oneshot_lowerhalf_s *lower,
FAR struct timespec *ts)
{
FAR struct sam_oneshot_lowerhalf_s *priv =
(FAR struct sam_oneshot_lowerhalf_s *)lower;
uint64_t usecs;
int ret;
DEBUGASSERT(priv != NULL && ts != NULL);
ret = sam_oneshot_max_delay(&priv->oneshot, &usecs);
if (ret >= 0)
{
uint64_t sec = usecs / 1000000;
usecs -= 1000000 * sec;
ts->tv_sec = (time_t)sec;
ts->tv_nsec = (long)(usecs * 1000);
}
return ret;
}
/****************************************************************************
* Name: sam_start
*
* Description:
* Start the oneshot timer
*
* Input Parameters:
* lower An instance of the lower-half oneshot state structure. This
* structure must have been previously initialized via a call to
* oneshot_initialize();
* handler The function to call when when the oneshot timer expires.
* arg An opaque argument that will accompany the callback.
* ts Provides the duration of the one shot timer.
*
* Returned Value:
* Zero (OK) is returned on success; a negated errno value is returned
* on failure.
*
****************************************************************************/
static int sam_start(FAR struct oneshot_lowerhalf_s *lower,
oneshot_callback_t callback, FAR void *arg,
FAR const struct timespec *ts)
{
FAR struct sam_oneshot_lowerhalf_s *priv =
(FAR struct sam_oneshot_lowerhalf_s *)lower;
irqstate_t flags;
int ret;
DEBUGASSERT(priv != NULL && callback != NULL && ts != NULL);
/* Save the callback information and start the timer */
flags = enter_critical_section();
priv->callback = callback;
priv->arg = arg;
ret = sam_oneshot_start(&priv->oneshot, NULL,
sam_oneshot_handler, priv, ts);
leave_critical_section(flags);
if (ret < 0)
{
tmrerr("ERROR: sam_oneshot_start failed: %d\n", flags);
}
return ret;
}
/****************************************************************************
* Name: sam_cancel
*
* Description:
* Cancel the oneshot timer and return the time remaining on the timer.
*
* NOTE: This function may execute at a high rate with no timer running (as
* when pre-emption is enabled and disabled).
*
* Input Parameters:
* lower Caller allocated instance of the oneshot state structure. This
* structure must have been previously initialized via a call to
* oneshot_initialize();
* ts The location in which to return the time remaining on the
* oneshot timer. A time of zero is returned if the timer is
* not running.
*
* Returned Value:
* Zero (OK) is returned on success. A call to up_timer_cancel() when
* the timer is not active should also return success; a negated errno
* value is returned on any failure.
*
****************************************************************************/
static int sam_cancel(FAR struct oneshot_lowerhalf_s *lower,
FAR struct timespec *ts)
{
FAR struct sam_oneshot_lowerhalf_s *priv =
(FAR struct sam_oneshot_lowerhalf_s *)lower;
irqstate_t flags;
int ret;
DEBUGASSERT(priv != NULL);
/* Cancel the timer */
flags = enter_critical_section();
ret = sam_oneshot_cancel(&priv->oneshot, NULL, ts);
priv->callback = NULL;
priv->arg = NULL;
leave_critical_section(flags);
if (ret < 0)
{
tmrerr("ERROR: sam_oneshot_cancel failed: %d\n", flags);
}
return ret;
}
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: oneshot_initialize
*
* Description:
* Initialize the oneshot timer and return a oneshot lower half driver
* instance.
*
* Input Parameters:
* chan Timer counter channel to be used.
* resolution The required resolution of the timer in units of
* microseconds. NOTE that the range is restricted to the
* range of uint16_t (excluding zero).
*
* Returned Value:
* On success, a non-NULL instance of the oneshot lower-half driver is
* returned. NULL is return on any failure.
*
****************************************************************************/
FAR struct oneshot_lowerhalf_s *oneshot_initialize(int chan,
uint16_t resolution)
{
FAR struct sam_oneshot_lowerhalf_s *priv;
int ret;
/* Allocate an instance of the lower half driver */
priv = (FAR struct sam_oneshot_lowerhalf_s *)
kmm_zalloc(sizeof(struct sam_oneshot_lowerhalf_s));
if (priv == NULL)
{
tmrerr("ERROR: Failed to initialized state structure\n");
return NULL;
}
/* Initialize the lower-half driver structure */
priv->lh.ops = &g_oneshot_ops;
/* Initialize the contained SAM oneshot timer */
ret = sam_oneshot_initialize(&priv->oneshot, chan, resolution);
if (ret < 0)
{
tmrerr("ERROR: sam_oneshot_initialize failed: %d\n", ret);
kmm_free(priv);
return NULL;
}
return &priv->lh;
}
arch/arm/src/sama5/sama5d3x4x_pio.c
+42
View File
@@ -349,6 +349,14 @@ static inline int sam_configinput(uintptr_t base, uint32_t pin,
if ((cfgset & PIO_CFG_PULLUP) != 0)
{
#ifdef PIO_HAVE_PULLDOWN
/* The pull-up on a pin can not be enabled if its pull-down is still
* active. Therefore, we need to disable the pull-down first before
* enabling the pull-up.
*/
putreg32(pin, base + SAM_PIO_PPDDR_OFFSET);
#endif
putreg32(pin, base + SAM_PIO_PUER_OFFSET);
}
else
@@ -361,6 +369,12 @@ static inline int sam_configinput(uintptr_t base, uint32_t pin,
if ((cfgset & PIO_CFG_PULLDOWN) != 0)
{
/* The pull-down on a pin can not be enabled if its pull-up is still
* active. Therefore, we need to disable the pull-up first before
* enabling the pull-down.
*/
putreg32(pin, base + SAM_PIO_PUDR_OFFSET);
putreg32(pin, base + SAM_PIO_PPDER_OFFSET);
}
else
@@ -464,6 +478,14 @@ static inline int sam_configoutput(uintptr_t base, uint32_t pin,
if ((cfgset & PIO_CFG_PULLUP) != 0)
{
#ifdef PIO_HAVE_PULLDOWN
/* The pull-up on a pin can not be enabled if its pull-down is still
* active. Therefore, we need to disable the pull-down first before
* enabling the pull-up.
*/
putreg32(pin, base + SAM_PIO_PPDDR_OFFSET);
#endif
putreg32(pin, base + SAM_PIO_PUER_OFFSET);
}
else
@@ -476,6 +498,12 @@ static inline int sam_configoutput(uintptr_t base, uint32_t pin,
if ((cfgset & PIO_CFG_PULLDOWN) != 0)
{
/* The pull-down on a pin can not be enabled if its pull-up is still
* active. Therefore, we need to disable the pull-up first before
* enabling the pull-down.
*/
putreg32(pin, base + SAM_PIO_PUDR_OFFSET);
putreg32(pin, base + SAM_PIO_PPDER_OFFSET);
}
else
@@ -546,6 +574,14 @@ static inline int sam_configperiph(uintptr_t base, uint32_t pin,
if ((cfgset & PIO_CFG_PULLUP) != 0)
{
#ifdef PIO_HAVE_PULLDOWN
/* The pull-up on a pin can not be enabled if its pull-down is still
* active. Therefore, we need to disable the pull-down first before
* enabling the pull-up.
*/
putreg32(pin, base + SAM_PIO_PPDDR_OFFSET);
#endif
putreg32(pin, base + SAM_PIO_PUER_OFFSET);
}
else
@@ -558,6 +594,12 @@ static inline int sam_configperiph(uintptr_t base, uint32_t pin,
if ((cfgset & PIO_CFG_PULLDOWN) != 0)
{
/* The pull-down on a pin can not be enabled if its pull-up is still
* active. Therefore, we need to disable the pull-up first before
* enabling the pull-down.
*/
putreg32(pin, base + SAM_PIO_PUDR_OFFSET);
putreg32(pin, base + SAM_PIO_PPDER_OFFSET);
}
else
arch/arm/src/samv7/Kconfig
+66 -5
View File
@@ -102,7 +102,7 @@ config ARCH_CHIP_SAME70Q
default n
select ARCH_CHIP_SAME70
select SAMV7_HAVE_MCAN1
select SAMV7_HAVE_DAC1
select SAMV7_HAVE_DAC1 if !SAMV7_EMAC0
select SAMV7_HAVE_EBI
select SAMV7_HAVE_HSMCI0
select SAMV7_HAVE_SDRAMC
@@ -119,7 +119,7 @@ config ARCH_CHIP_SAME70N
default n
select ARCH_CHIP_SAME70
select SAMV7_HAVE_MCAN1
select SAMV7_HAVE_DAC1
select SAMV7_HAVE_DAC1 if !SAMV7_EMAC0
select SAMV7_HAVE_HSMCI0
select SAMV7_HAVE_SPI0
select SAMV7_HAVE_TWIHS2
@@ -152,7 +152,7 @@ config ARCH_CHIP_SAMV71Q
default n
select ARCH_CHIP_SAMV71
select SAMV7_HAVE_MCAN1
select SAMV7_HAVE_DAC1
select SAMV7_HAVE_DAC1 if !SAMV7_EMAC0
select SAMV7_HAVE_EBI
select SAMV7_HAVE_HSMCI0
select SAMV7_HAVE_SDRAMC
@@ -169,7 +169,7 @@ config ARCH_CHIP_SAMV71N
default n
select ARCH_CHIP_SAMV71
select SAMV7_HAVE_MCAN1
select SAMV7_HAVE_DAC1
select SAMV7_HAVE_DAC1 if !SAMV7_EMAC0
select SAMV7_HAVE_HSMCI0
select SAMV7_HAVE_SPI0
select SAMV7_HAVE_TWIHS2
@@ -196,6 +196,10 @@ config SAMV7_HAVE_MCAN1
bool
default n
config SAMV7_DAC
bool
default n
config SAMV7_HAVE_DAC1
bool
default n
@@ -334,10 +338,12 @@ config SAMV7_MCAN1
config SAMV7_DAC0
bool "Digital To Analog Converter 0 (DAC0)"
default n
select SAMV7_DAC
config SAMV7_DAC1
bool "Digital To Analog Converter 1 (DAC1)"
default n
select SAMV7_DAC
depends on SAMV7_HAVE_DAC1
config SAMV7_EBI
@@ -1600,7 +1606,6 @@ endif # SAMV7_TC3
config SAMV7_ONESHOT
bool "TC one-shot wrapper"
depends on SAMV7_FREERUN
default n if !SCHED_TICKLESS
default y if SCHED_TICKLESS
---help---
@@ -1658,6 +1663,62 @@ config SAMV7_TC_REGDEBUG
endmenu # Timer/counter Configuration
endif # SAMV7_HAVE_TC
menu "DAC device driver configuration"
depends on SAMV7_DAC
config SAMV7_DAC_PRESCAL
int "DAC MCK prescaler"
default 7
range 0 15
---help---
Define PRESCALER (Peripheral Clock to DAC Clock Ratio)
0 -> 2 periods of DAC Clock
1 -> 3 periods of DAC Clock
2 -> 4 periods of DAC Clock
3 -> 5 periods of DAC Clock
4 -> 6 periods of DAC Clock
5 -> 7 periods of DAC Clock
6 -> 8 periods of DAC Clock
7 -> 9 periods of DAC Clock
8 -> 10 periods of DAC Clock
9 -> 11 periods of DAC Clock
10 -> 12 periods of DAC Clock
11 -> 13 periods of DAC Clock
12 -> 14 periods of DAC Clock
13 -> 15 periods of DAC Clock
14 -> 16 periods of DAC Clock
15 -> 17 periods of DAC Clock
config SAMV7_DAC_TRIGGER
bool "DAC trigger mode"
default n
---help---
Enable DAC trigger mode
if SAMV7_DAC_TRIGGER
config SAMV7_DAC_TRIGGER_FREQUENCY
int "DAC trigger frequency"
default 1000
---help---
Define DAC trigger frequency
config SAMV7_DAC_TRIGGER_SELECT
int "DAC trigger source"
default 3
range 1 3
---help---
Define DAC trigger source. Snly support for TC0, TC1, TC2 output is
currently implemented:
1 -> TC0
2 -> TC1
3 -> TC2
endif # SAMV7_DAC_TRIGGER
endmenu # DAC device driver configuration
menu "HSMCI device driver options"
depends on SAMV7_HSMCI
arch/arm/src/samv7/Make.defs
+5 -1
View File
@@ -181,7 +181,7 @@ endif
ifeq ($(CONFIG_SAMV7_HAVE_TC),y)
CHIP_CSRCS += sam_tc.c
ifeq ($(CONFIG_SAMV7_ONESHOT),y)
CHIP_CSRCS += sam_oneshot.c
CHIP_CSRCS += sam_oneshot.c sam_oneshot_lowerhalf.c
endif
ifeq ($(CONFIG_SAMV7_FREERUN),y)
CHIP_CSRCS += sam_freerun.c
@@ -214,3 +214,7 @@ endif
ifeq ($(CONFIG_SAMV7_PROGMEM),y)
CHIP_CSRCS += sam_progmem.c
endif
ifeq ($(CONFIG_SAMV7_DAC),y)
CHIP_CSRCS += sam_dac.c
endif
arch/arm/src/samv7/chip/sam_dacc.h
+226
View File
@@ -0,0 +1,226 @@
/****************************************************************************************
* arch/arm/src/samv7/chip/sam_dacc.h
* Digital-to-Analog Converter Controller (DACC) for the SAMV7
*
* Copyright (C) 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMV7_CHIP_SAM_DACC_H
#define __ARCH_ARM_SRC_SAMV7_CHIP_SAM_DACC_H
/****************************************************************************************
* Included Files
****************************************************************************************/
#include <nuttx/config.h>
#include "chip.h"
#include "chip/sam_memorymap.h"
/****************************************************************************************
* Pre-processor Definitions
****************************************************************************************/
/* DACC register offsets *****************************************************************/
#define SAM_DACC_CR_OFFSET 0x0000 /* Control Register */
#define SAM_DACC_MR_OFFSET 0x0004 /* Mode Register */
#define SAM_DACC_TRIGR_OFFSET 0x0008 /* Trigger Register */
#define SAM_DACC_CHER_OFFSET 0x0010 /* Channel Enable Register */
#define SAM_DACC_CHDR_OFFSET 0x0014 /* Channel Disable Register */
#define SAM_DACC_CHSR_OFFSET 0x0018 /* Channel Status Register */
#define SAM_DACC_CDR0_OFFSET 0x001c /* Conversion Data Register 0 */
#define SAM_DACC_CDR1_OFFSET 0x0020 /* Conversion Data Register 1 */
#define SAM_DACC_IER_OFFSET 0x0024 /* Interrupt Enable Register */
#define SAM_DACC_IDR_OFFSET 0x0028 /* Interrupt Disable Register */
#define SAM_DACC_IMR_OFFSET 0x002c /* Interrupt Mask Register */
#define SAM_DACC_ISR_OFFSET 0x0030 /* Interrupt Status Register */
#define SAM_DACC_ACR_OFFSET 0x0094 /* Analog Current Register */
#define SAM_DACC_WPMR_OFFSET 0x00e4 /* Write Protect Mode register */
#define SAM_DACC_WPSR_OFFSET 0x00e8 /* Write Protect Status register */
/* DACC register addresses **************************************************************/
#define SAM_DACC_CR (SAM_DACC_BASE+SAM_DACC_CR_OFFSET)
#define SAM_DACC_MR (SAM_DACC_BASE+SAM_DACC_MR_OFFSET)
#define SAM_DACC_TRIGR (SAM_DACC_BASE+SAM_DACC_TRIGR_OFFSET)
#define SAM_DACC_CHER (SAM_DACC_BASE+SAM_DACC_CHER_OFFSET)
#define SAM_DACC_CHDR (SAM_DACC_BASE+SAM_DACC_CHDR_OFFSET)
#define SAM_DACC_CHSR (SAM_DACC_BASE+SAM_DACC_CHSR_OFFSET)
#define SAM_DACC_CDR0 (SAM_DACC_BASE+SAM_DACC_CDR0_OFFSET)
#define SAM_DACC_CDR1 (SAM_DACC_BASE+SAM_DACC_CDR1_OFFSET)
#define SAM_DACC_IER (SAM_DACC_BASE+SAM_DACC_IER_OFFSET)
#define SAM_DACC_IDR (SAM_DACC_BASE+SAM_DACC_IDR_OFFSET)
#define SAM_DACC_IMR (SAM_DACC_BASE+SAM_DACC_IMR_OFFSET)
#define SAM_DACC_ISR (SAM_DACC_BASE+SAM_DACC_ISR_OFFSET)
#define SAM_DACC_ACR (SAM_DACC_BASE+SAM_DACC_ACR_OFFSET)
#define SAM_DACC_WPMR (SAM_DACC_BASE+SAM_DACC_WPMR_OFFSET)
#define SAM_DACC_WPSR (SAM_DACC_BASE+SAM_DACC_WPSR_OFFSET)
/* DACC register bit definitions ********************************************************/
/* Control Register */
#define DACC_CR_SWRST (1 << 0) /* Bit 0: Software reset */
/* Mode Register */
#define DACC_MR_MAXS0 (1 << 0) /* Max Speed Mode for Channel 0 */
# define DACC_MR_MAXS0_TRIG_EVENT (0 << 0) /* External trigger mode or Free-running mode enabled */
# define DACC_MR_MAXS0_MAXIMUM (1 << 0) /* Max speed mode enabled */
#define DACC_MR_MAXS1 (1 << 1) /* Max Speed Mode for Channel 1 */
# define DACC_MR_MAXS1_TRIG_EVENT (0 << 1) /* External trigger mode or Free-running mode enabled */
# define DACC_MR_MAXS1_MAXIMUM (1 << 1) /* Max speed mode enabled */
#define DACC_MR_WORD (1 << 4) /* Word Transfer Mode */
# define DACC_MR_WORD_DISABLED (0 << 4) /* One data to convert is written to the FIFO per access to DACC */
# define DACC_MR_WORD_ENABLED (1 << 4) /* Two data to convert are written to the FIFO per access to DACC */
#define DACC_MR_ZERO (1 << 5) /* Must always be written to 0 */
#define DACC_MR_DIFF (1 << 23) /* Differential Mode */
# define DACC_MR_DIFF_DISABLED (0 << 23) /* DAC0 and DAC1 are single-ended outputs */
# define DACC_MR_DIFF_ENABLED (1 << 23) /* DACP and DACN are differential outputs. The differential level is configured by the channel 0 value. */
#define DACC_MR_PRESCALER_SHIFT (24)
#define DACC_MR_PRESCALER_MASK (0xfu << DACC_MR_PRESCALER_SHIFT) /* Peripheral Clock to DAC Clock Ratio */
#define DACC_MR_PRESCALER(value) ((DACC_MR_PRESCALER_MASK & ((value) << DACC_MR_PRESCALER_SHIFT)))
# define DACC_MR_PRESCALER_2 (0 << DACC_MR_PRESCALER_SHIFT) /* 2 periods of DAC Clock */
# define DACC_MR_PRESCALER_3 (1 << DACC_MR_PRESCALER_SHIFT) /* 3 periods of DAC Clock */
# define DACC_MR_PRESCALER_4 (2 << DACC_MR_PRESCALER_SHIFT) /* 4 periods of DAC Clock */
# define DACC_MR_PRESCALER_5 (3 << DACC_MR_PRESCALER_SHIFT) /* 5 periods of DAC Clock */
# define DACC_MR_PRESCALER_6 (4 << DACC_MR_PRESCALER_SHIFT) /* 6 periods of DAC Clock */
# define DACC_MR_PRESCALER_7 (5 << DACC_MR_PRESCALER_SHIFT) /* 7 periods of DAC Clock */
# define DACC_MR_PRESCALER_8 (6 << DACC_MR_PRESCALER_SHIFT) /* 8 periods of DAC Clock */
# define DACC_MR_PRESCALER_9 (7 << DACC_MR_PRESCALER_SHIFT) /* 9 periods of DAC Clock */
# define DACC_MR_PRESCALER_10 (8 << DACC_MR_PRESCALER_SHIFT) /* 10 periods of DAC Clock */
# define DACC_MR_PRESCALER_11 (9 << DACC_MR_PRESCALER_SHIFT) /* 11 periods of DAC Clock */
# define DACC_MR_PRESCALER_12 (10 << DACC_MR_PRESCALER_SHIFT) /* 12 periods of DAC Clock */
# define DACC_MR_PRESCALER_13 (11 << DACC_MR_PRESCALER_SHIFT) /* 13 periods of DAC Clock */
# define DACC_MR_PRESCALER_14 (12 << DACC_MR_PRESCALER_SHIFT) /* 14 periods of DAC Clock */
# define DACC_MR_PRESCALER_15 (13 << DACC_MR_PRESCALER_SHIFT) /* 15 periods of DAC Clock */
# define DACC_MR_PRESCALER_16 (14 << DACC_MR_PRESCALER_SHIFT) /* 16 periods of DAC Clock */
# define DACC_MR_PRESCALER_17 (15 << DACC_MR_PRESCALER_SHIFT) /* 17 periods of DAC Clock */
/* Trigger Register */
#define DACC_TRIGR_TRGEN0 (1 << 0) /* Trigger Enable of Channel 0 */
# define DACC_TRIGR_TRGEN0_DIS (0 << 0) /* External trigger mode disabled. DACC is in Free-running mode or Max speed mode. */
# define DACC_TRIGR_TRGEN0_EN (1 << 0) /* External trigger mode enabled. */
#define DACC_TRIGR_TRGEN1 (1 << 1) /* Trigger Enable of Channel 1 */
# define DACC_TRIGR_TRGEN1_DIS (0 << 1) /* External trigger mode disabled. DACC is in Free-running mode or Max speed mode. */
# define DACC_TRIGR_TRGEN1_EN (1 << 1) /* External trigger mode enabled. */
#define DACC_TRIGR_TRGSEL0_SHIFT (4)
#define DACC_TRIGR_TRGSEL0_MASK (0x7u << DACC_TRIGR_TRGSEL0_SHIFT) /* Trigger Selection of Channel 0 */
#define DACC_TRIGR_TRGSEL0(value) ((DACC_TRIGR_TRGSEL0_MASK & ((value) << DACC_TRIGR_TRGSEL0_SHIFT)))
# define DACC_TRIGR_TRGSEL0_DATRG (0 << 4) /* DATRG output */
# define DACC_TRIGR_TRGSEL0_TC0 (1 << 4) /* TC0 output */
# define DACC_TRIGR_TRGSEL0_TC1 (2 << 4) /* TC1 output */
# define DACC_TRIGR_TRGSEL0_TC2 (3 << 4) /* TC2 output */
# define DACC_TRIGR_TRGSEL0_PWM0EV0 (4 << 4) /* PWM0 event 0 */
# define DACC_TRIGR_TRGSEL0_PWM0EV1 (5 << 4) /* PWM0 event 1 */
# define DACC_TRIGR_TRGSEL0_PWM1EV0 (6 << 4) /* PWM1 event 0 */
# define DACC_TRIGR_TRGSEL0_PWM1EV1 (7 << 4) /* PWM1 event 1 */
#define DACC_TRIGR_TRGSEL1_SHIFT (8)
#define DACC_TRIGR_TRGSEL1_MASK (0x7u << DACC_TRIGR_TRGSEL1_SHIFT) /* Trigger Selection of Channel 1 */
#define DACC_TRIGR_TRGSEL1(value) ((DACC_TRIGR_TRGSEL1_MASK & ((value) << DACC_TRIGR_TRGSEL1_SHIFT)))
# define DACC_TRIGR_TRGSEL1_DATRG (0 << 8) /* DATRG output */
# define DACC_TRIGR_TRGSEL1_TC0 (1 << 8) /* TC0 output */
# define DACC_TRIGR_TRGSEL1_TC1 (2 << 8) /* TC1 output */
# define DACC_TRIGR_TRGSEL1_TC2 (3 << 8) /* TC2 output */
# define DACC_TRIGR_TRGSEL1_PWM0EV0 (4 << 8) /* PWM0 event 0 */
# define DACC_TRIGR_TRGSEL1_PWM0EV1 (5 << 8) /* PWM0 event 1 */
# define DACC_TRIGR_TRGSEL1_PWM1EV0 (6 << 8) /* PWM1 event 0 */
# define DACC_TRIGR_TRGSEL1_PWM1EV1 (7 << 8) /* PWM1 event 1 */
#define DACC_TRIGR_OSR0_SHIFT (16)
#define DACC_TRIGR_OSR0_MASK (0x7u << DACC_TRIGR_OSR0_SHIFT) /* Over Sampling Ratio of Channel 0 */
#define DACC_TRIGR_OSR0(value) ((DACC_TRIGR_OSR0_MASK & ((value) << DACC_TRIGR_OSR0_SHIFT)))
# define DACC_TRIGR_OSR0_OSR_1 (0 << 16) /* OSR = 1 */
# define DACC_TRIGR_OSR0_OSR_2 (1 << 16) /* OSR = 2 */
# define DACC_TRIGR_OSR0_OSR_4 (2 << 16) /* OSR = 4 */
# define DACC_TRIGR_OSR0_OSR_8 (3 << 16) /* OSR = 8 */
# define DACC_TRIGR_OSR0_OSR_16 (4 << 16) /* OSR = 16 */
# define DACC_TRIGR_OSR0_OSR_32 (5 << 16) /* OSR = 32 */
#define DACC_TRIGR_OSR1_SHIFT (20)
#define DACC_TRIGR_OSR1_MASK (0x7u << DACC_TRIGR_OSR1_SHIFT) /* Over Sampling Ratio of Channel 1 */
#define DACC_TRIGR_OSR1(value) ((DACC_TRIGR_OSR1_MASK & ((value) << DACC_TRIGR_OSR1_SHIFT)))
# define DACC_TRIGR_OSR1_OSR_1 (0 << 20) /* OSR = 1 */
# define DACC_TRIGR_OSR1_OSR_2 (1 << 20) /* OSR = 2 */
# define DACC_TRIGR_OSR1_OSR_4 (2 << 20) /* OSR = 4 */
# define DACC_TRIGR_OSR1_OSR_8 (3 << 20) /* OSR = 8 */
# define DACC_TRIGR_OSR1_OSR_16 (4 << 20) /* OSR = 16 */
# define DACC_TRIGR_OSR1_OSR_32 (5 << 20) /* OSR = 32 */
/* Channel Enable, Channel Disable, and Channel Status Registers */
#define DACC_CH0 (1 << 0) /* Channel 0 */
#define DACC_CH1 (1 << 1) /* Channel 1 */
#define DACC_CHSR_DACRDY0 (1 << 8) /* DAC Ready Flag */
#define DACC_CHSR_DACRDY1 (1 << 9) /* DAC Ready Flag */
/* Conversion Data Register -- 32-bit data */
#define DACC_CDR_DATA0_SHIFT (0)
#define DACC_CDR_DATA0_MASK (0xffffu << DACC_CDR_DATA0_SHIFT) /* Data to Convert for channel 0 */
#define DACC_CDR_DATA0(value) ((DACC_CDR_DATA0_MASK & ((value) << DACC_CDR_DATA0_SHIFT)))
#define DACC_CDR_DATA1_SHIFT (16)
#define DACC_CDR_DATA1_MASK (0xffffu << DACC_CDR_DATA1_SHIFT) /* Data to Convert for channel 1 */
#define DACC_CDR_DATA1(value) ((DACC_CDR_DATA1_MASK & ((value) << DACC_CDR_DATA1_SHIFT)))
/* Interrupt Enable, Interrupt Disable, Interrupt Mask, and Interrupt Status Register */
#define DACC_INT_TXRDY0 (1 << 0) /* Transmit Ready Interrupt of channel 0 */
#define DACC_INT_TXRDY1 (1 << 1) /* Transmit Ready Interrupt of channel 1 */
#define DACC_INT_EOC0 (1 << 4) /* End of Conversion Interrupt of channel 0 */
#define DACC_INT_EOC1 (1 << 5) /* End of Conversion Interrupt of channel 1 */
#define DACC_INT_ALL (0xffffffffu) /* All interrupts */
/* Analog Current Register */
#define DACC_ACR_IBCTLCH0_SHIFT (0)
#define DACC_ACR_IBCTLCH0_MASK (0x3u << DACC_ACR_IBCTLCH0_SHIFT) /* Analog Output Current Control */
#define DACC_ACR_IBCTLCH0(value) ((DACC_ACR_IBCTLCH0_MASK & ((value) << DACC_ACR_IBCTLCH0_SHIFT)))
#define DACC_ACR_IBCTLCH1_SHIFT (2)
#define DACC_ACR_IBCTLCH1_MASK (0x3u << DACC_ACR_IBCTLCH1_SHIFT) /* Analog Output Current Control */
#define DACC_ACR_IBCTLCH1(value) ((DACC_ACR_IBCTLCH1_MASK & ((value) << DACC_ACR_IBCTLCH1_SHIFT)))
/* Write Protect Mode register */
#define DACC_WPMR_WPEN (1 << 0) /* Write Protection Enable */
#define DACC_WPMR_WPKEY_SHIFT (8)
#define DACC_WPMR_WPKEY_MASK (0xffffffu << DACC_WPMR_WPKEY_SHIFT) /* Write Protect Key */
#define DACC_WPMR_WPKEY(value) ((DACC_WPMR_WPKEY_MASK & ((value) << DACC_WPMR_WPKEY_SHIFT)))
# define DACC_WPMR_WPKEY_PASSWD (0x444143u << 8) /* Writing any other value in this field aborts the write operation of bit WPEN. Always reads as 0. */
/* Write Protect Status register */
#define DACC_WPSR_WPVS (1 << 0) /* Write Protection Violation Status */
#define DACC_WPSR_WPVSRC_SHIFT (8)
#define DACC_WPSR_WPVSRC_MASK (0xffu << DACC_WPSR_WPVSRC_SHIFT) /* Write Protection Violation Source */
#endif /* __ARCH_ARM_SRC_SAMV7_CHIP_SAM_DACC_H */
arch/arm/src/samv7/sam_dac.c
+658
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File diff suppressed because it is too large Load Diff
arch/arm/src/samv7/sam_dac.h
+129
View File
@@ -0,0 +1,129 @@
/****************************************************************************
* arch/arm/src/samv7/sam_dac.h
*
* Copyright (C) 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMV7_SAM_DAC_H
#define __ARCH_ARM_SRC_SAMV7_SAM_DAC_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/analog/dac.h>
#include "chip/sam_dacc.h"
#if defined(CONFIG_SAMV7_DAC0) || defined(CONFIG_SAMV7_DAC1)
/****************************************************************************
* Pre-processor definitions
****************************************************************************/
/* Default configuration settings may be overridden in the board configuration
* file.
*/
#if !defined(CONFIG_SAMV7_DAC_DMA_BUFFER_SIZE)
# define CONFIG_SAMV7_DAC_DMA_BUFFER_SIZE 8
#elif CONFIG_SAMV7_DAC_DMA_BUFFER_SIZE > 65535
# warning "CONFIG_SAMV7_DAC_DMA_BUFFER_SIZE value does not fit into uint16_t, limiting it to 65535"
# undef CONFIG_SAMV7_DAC_DMA_BUFFER_SIZE
# define CONFIG_SAMV7_DAC_DMA_BUFFER_SIZE (65535)
#endif
#if !defined(CONFIG_SAMV7_DAC_TRIGGER_FREQUENCY)
# define CONFIG_SAMV7_DAC_TRIGGER_FREQUENCY 8000
#endif
/* PRESCAL = (MCK / DACClock) - 2
*
* Given:
* MCK = 150MHz
* DACClock = 16MHz
* Then:
* PRESCAL = 7
*/
#if !defined(CONFIG_SAMV7_DAC_PRESCAL)
#define CONFIG_SAMV7_DAC_PRESCAL (7)
#elif CONFIG_SAMV7_DAC_PRESCAL > 15
# warning "Maximum valid CONFIG_SAMV7_DAC_PRESCAL value is 15"
#endif
#if !defined(CONFIG_SAMV7_DAC_TRIGGER_SELECT)
#define CONFIG_SAMV7_DAC_TRIGGER_SELECT (3)
#elif CONFIG_SAMV7_DAC_TRIGGER_SELECT < 1 || CONFIG_SAMV7_DAC_TRIGGER_SELECT > 3
# warning "Only CONFIG_SAMV7_DAC_TRIGGER_SELECT == [1-3] is supported"
#endif
/****************************************************************************
* Public Types
****************************************************************************/
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
#undef EXTERN
#if defined(__cplusplus)
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
/****************************************************************************
* Name: sam_dac_initialize
*
* Description:
* Initialize the DAC
*
* Input Parameters:
* intf - The DAC interface number.
*
* Returned Value:
* Valid DAC device structure reference on success; a NULL on failure
*
****************************************************************************/
struct dac_dev_s;
FAR struct dac_dev_s *sam_dac_initialize(int intf);
#undef EXTERN
#ifdef __cplusplus
}
#endif
#endif /* CONFIG_SAMV7_DAC0 || CONFIG_SAMV7_DAC1 */
#endif /* __ARCH_ARM_SRC_SAMV7_SAM_DAC_H */
arch/arm/src/samv7/sam_emac.c
+45 -12
View File
@@ -317,18 +317,7 @@
# undef CONFIG_SAMV7_EMAC_REGDEBUG
#endif
/* EMAC buffer sizes, number of buffers, and number of descriptors ***********
*
* REVISIT: The CONFIG_NET_MULTIBUFFER might be useful. It might be possible
* to use this option to send and receive messages directly into the DMA
* buffers, saving a copy. There might be complications on the receiving
* side, however, where buffers may wrap and where the size of the received
* frame will typically be smaller than a full packet.
*/
#ifdef CONFIG_NET_MULTIBUFFER
# error CONFIG_NET_MULTIBUFFER must not be set
#endif
/* EMAC buffer sizes, number of buffers, and number of descriptors **********/
/* Queue identifiers/indices */
@@ -855,6 +844,21 @@ static const struct sam_emacattr_s g_emac0_attr =
#endif
};
#ifdef CONFIG_NET_MULTIBUFFER
/* A single packet buffer is used
*
* REVISIT: It might be possible to use this option to send and receive
* messages directly into the DMA buffers, saving a copy. There might be
* complications on the receiving side, however, where buffers may wrap
* and where the size of the received frame will typically be smaller than
* a full packet.
*/
static uint8_t g_pktbuf0[MAX_NET_DEV_MTU + CONFIG_NET_GUARDSIZE];
#endif
/* EMAC0 peripheral state */
static struct sam_emac_s g_emac0;
#endif
@@ -923,6 +927,21 @@ static const struct sam_emacattr_s g_emac1_attr =
#endif
};
#ifdef CONFIG_NET_MULTIBUFFER
/* A single packet buffer is used
*
* REVISIT: It might be possible to use this option to send and receive
* messages directly into the DMA buffers, saving a copy. There might be
* complications on the receiving side, however, where buffers may wrap
* and where the size of the received frame will typically be smaller than
* a full packet.
*/
static uint8_t g_pktbuf1[MAX_NET_DEV_MTU + CONFIG_NET_GUARDSIZE];
#endif
/* EMAC1 peripheral state */
static struct sam_emac_s g_emac1;
#endif
@@ -5081,6 +5100,9 @@ int sam_emac_initialize(int intf)
{
struct sam_emac_s *priv;
const struct sam_emacattr_s *attr;
#ifdef CONFIG_NET_MULTIBUFFER
uint8_t *pktbuf;
#endif
#if defined(CONFIG_NETDEV_PHY_IOCTL) && defined(CONFIG_ARCH_PHY_INTERRUPT)
uint8_t phytype;
#endif
@@ -5092,6 +5114,10 @@ int sam_emac_initialize(int intf)
priv = &g_emac0;
attr = &g_emac0_attr;
#ifdef CONFIG_NET_MULTIBUFFER
pktbuf = g_pktbuf0;
#endif
#if defined(CONFIG_NETDEV_PHY_IOCTL) && defined(CONFIG_ARCH_PHY_INTERRUPT)
phytype = SAMV7_EMAC0_PHY_TYPE;
#endif
@@ -5104,6 +5130,10 @@ int sam_emac_initialize(int intf)
priv = &g_emac1;
attr = &g_emac1_attr;
#ifdef CONFIG_NET_MULTIBUFFER
pktbuf = g_pktbuf1;
#endif
#if defined(CONFIG_NETDEV_PHY_IOCTL) && defined(CONFIG_ARCH_PHY_INTERRUPT)
phytype = SAMV7_EMAC1_PHY_TYPE;
#endif
@@ -5119,6 +5149,9 @@ int sam_emac_initialize(int intf)
memset(priv, 0, sizeof(struct sam_emac_s));
priv->attr = attr; /* Save the constant attributes */
#ifdef CONFIG_NET_MULTIBUFFER
priv->dev.d_buf = pktbuf; /* Single packet buffer */
#endif
priv->dev.d_ifup = sam_ifup; /* I/F up (new IP address) callback */
priv->dev.d_ifdown = sam_ifdown; /* I/F down callback */
priv->dev.d_txavail = sam_txavail; /* New TX data callback */
arch/arm/src/samv7/sam_freerun.c
+2 -2
View File
@@ -61,7 +61,7 @@
#include "sam_freerun.h"
#ifdef CONFIG_SAMV7_ONESHOT
#ifdef CONFIG_SAMV7_FREERUN
/****************************************************************************
* Private Functions
@@ -319,4 +319,4 @@ int sam_freerun_uninitialize(struct sam_freerun_s *freerun)
return OK;
}
#endif /* CONFIG_SAMV7_ONESHOT */
#endif /* CONFIG_SAMV7_FREERUN */
arch/arm/src/samv7/sam_gpio.c
+42
View File
@@ -152,6 +152,14 @@ static inline int sam_configinput(uintptr_t base, uint32_t pin,
if ((cfgset & GPIO_CFG_PULLUP) != 0)
{
#ifdef GPIO_HAVE_PULLDOWN
/* The pull-up on a pin can not be enabled if its pull-down is still
* active. Therefore, we need to disable the pull-down first before
* enabling the pull-up.
*/
putreg32(pin, base + SAM_PIO_PPDDR_OFFSET);
#endif
putreg32(pin, base + SAM_PIO_PUER_OFFSET);
}
else
@@ -164,6 +172,12 @@ static inline int sam_configinput(uintptr_t base, uint32_t pin,
if ((cfgset & GPIO_CFG_PULLDOWN) != 0)
{
/* The pull-down on a pin can not be enabled if its pull-up is still
* active. Therefore, we need to disable the pull-up first before
* enabling the pull-down.
*/
putreg32(pin, base + SAM_PIO_PUDR_OFFSET);
putreg32(pin, base + SAM_PIO_PPDER_OFFSET);
}
else
@@ -243,6 +257,14 @@ static inline int sam_configoutput(uintptr_t base, uint32_t pin,
if ((cfgset & GPIO_CFG_PULLUP) != 0)
{
#ifdef GPIO_HAVE_PULLDOWN
/* The pull-up on a pin can not be enabled if its pull-down is still
* active. Therefore, we need to disable the pull-down first before
* enabling the pull-up.
*/
putreg32(pin, base + SAM_PIO_PPDDR_OFFSET);
#endif
putreg32(pin, base + SAM_PIO_PUER_OFFSET);
}
else
@@ -255,6 +277,12 @@ static inline int sam_configoutput(uintptr_t base, uint32_t pin,
if ((cfgset & GPIO_CFG_PULLDOWN) != 0)
{
/* The pull-down on a pin can not be enabled if its pull-up is still
* active. Therefore, we need to disable the pull-up first before
* enabling the pull-down.
*/
putreg32(pin, base + SAM_PIO_PUDR_OFFSET);
putreg32(pin, base + SAM_PIO_PPDER_OFFSET);
}
else
@@ -330,6 +358,14 @@ static inline int sam_configperiph(uintptr_t base, uint32_t pin,
if ((cfgset & GPIO_CFG_PULLUP) != 0)
{
#ifdef GPIO_HAVE_PULLDOWN
/* The pull-up on a pin can not be enabled if its pull-down is still
* active. Therefore, we need to disable the pull-down first before
* enabling the pull-up.
*/
putreg32(pin, base + SAM_PIO_PPDDR_OFFSET);
#endif
putreg32(pin, base + SAM_PIO_PUER_OFFSET);
}
else
@@ -342,6 +378,12 @@ static inline int sam_configperiph(uintptr_t base, uint32_t pin,
if ((cfgset & GPIO_CFG_PULLDOWN) != 0)
{
/* The pull-down on a pin can not be enabled if its pull-up is still
* active. Therefore, we need to disable the pull-up first before
* enabling the pull-down.
*/
putreg32(pin, base + SAM_PIO_PUDR_OFFSET);
putreg32(pin, base + SAM_PIO_PPDER_OFFSET);
}
else
arch/arm/src/samv7/sam_oneshot.c
+54 -56
View File
@@ -64,22 +64,6 @@
#ifdef CONFIG_SAMV7_ONESHOT
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Private Types
****************************************************************************/
/****************************************************************************
* Private Function Prototypes
****************************************************************************/
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
@@ -129,7 +113,9 @@ static void sam_oneshot_handler(TC_HANDLE tch, void *arg, uint32_t sr)
oneshot->handler = NULL;
oneshot_arg = (void *)oneshot->arg;
oneshot->arg = NULL;
#ifdef CONFIG_SAMV7_FREERUN
oneshot->start_count = 0;
#endif
oneshot_handler(oneshot_arg);
}
@@ -230,7 +216,36 @@ int sam_oneshot_initialize(struct sam_oneshot_s *oneshot, int chan,
oneshot->running = false;
oneshot->handler = NULL;
oneshot->arg = NULL;
#ifdef CONFIG_SAMV7_FREERUN
oneshot->start_count = 0;
#endif
return OK;
}
/****************************************************************************
* Name: sam_oneshot_max_delay
*
* Description:
* Return the maximum delay supported by the one shot timer (in
* microseconds).
*
* Input Parameters:
* oneshot Caller allocated instance of the oneshot state structure. This
* structure must have been previously initialized via a call to
* sam_oneshot_initialize();
* usec The location in which to return the maximum delay.
*
* Returned Value:
* Zero (OK) is returned on success; a negated errno value is returned
* on failure.
*
****************************************************************************/
int sam_oneshot_max_delay(struct sam_oneshot_s *oneshot, uint64_t *usec)
{
DEBUGASSERT(oneshot != NULL && usec != NULL);
*usec = (0xffffull * USEC_PER_SEC) / (uint64_t)sam_tc_divfreq(oneshot->tch);
return OK;
}
@@ -254,8 +269,10 @@ int sam_oneshot_initialize(struct sam_oneshot_s *oneshot, int chan,
*
****************************************************************************/
int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freerun,
oneshot_handler_t handler, void *arg, const struct timespec *ts)
int sam_oneshot_start(struct sam_oneshot_s *oneshot,
struct sam_freerun_s *freerun,
oneshot_handler_t handler, void *arg,
const struct timespec *ts)
{
uint64_t usec;
uint64_t regval;
@@ -285,7 +302,8 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freer
usec = (uint64_t)ts->tv_sec * USEC_PER_SEC + (uint64_t)(ts->tv_nsec / NSEC_PER_USEC);
/* Get the timer counter frequency and determine the number of counts need to achieve the requested delay.
/* Get the timer counter frequency and determine the number of counts
* needed to achieve the requested delay.
*
* frequency = ticks / second
* ticks = seconds * frequency
@@ -312,6 +330,7 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freer
sam_tc_start(oneshot->tch);
#ifdef CONFIG_SAMV7_FREERUN
/* The function sam_tc_start() starts the timer/counter by setting the
* bits TC_CCR_CLKEN and TC_CCR_SWTRG in the channel control register.
* The first one enables the timer/counter the latter performs an
@@ -325,12 +344,16 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freer
* the counter value of the freerun timer/counter is stored at each start
* of the oneshot timer/counter.
*
* The function up_timer_gettime() could also be used for this but it takes
* too long. If up_timer_gettime() is called within this function the problem
* vanishes at least if compiled with no optimisation.
* The function up_timer_gettime() could also be used for this but it
* takes too long. If up_timer_gettime() is called within this function
* the problem vanishes at least if compiled with no optimisation.
*/
oneshot->start_count = sam_tc_getcounter(freerun->tch);
if (freerun != NULL)
{
oneshot->start_count = sam_tc_getcounter(freerun->tch);
}
#endif
/* Enable interrupts. We should get the callback when the interrupt
* occurs.
@@ -347,8 +370,8 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freer
* Description:
* Cancel the oneshot timer and return the time remaining on the timer.
*
* NOTE: This function may execute at a high rate with no timer running (as
* when pre-emption is enabled and disabled).
* NOTE: This function may execute at a high rate with no timer running
* (as when pre-emption is enabled and disabled).
*
* Input Parameters:
* oneshot Caller allocated instance of the oneshot state structure. This
@@ -366,8 +389,8 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freer
*
****************************************************************************/
int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freerun,
struct timespec *ts)
int sam_oneshot_cancel(struct sam_oneshot_s *oneshot,
struct sam_freerun_s *freerun, struct timespec *ts)
{
irqstate_t flags;
uint64_t usec;
@@ -408,16 +431,19 @@ int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct sam_freerun_s *free
count = sam_tc_getcounter(oneshot->tch);
rc = sam_tc_getregister(oneshot->tch, TC_REGC);
#ifdef CONFIG_SAMV7_FREERUN
/* In the case the timer/counter was canceled very short after its start,
* the counter register can hold the wrong value (the value of the last
* run). To prevent this the counter value is set to zero if not at
* least on tick passed since the start of the timer/counter.
*/
if (count > 0 && sam_tc_getcounter(freerun->tch) == oneshot->start_count)
if (count > 0 && freerun != NULL &&
sam_tc_getcounter(freerun->tch) == oneshot->start_count)
{
count = 0;
}
#endif
/* Now we can disable the interrupt and stop the timer. */
@@ -491,32 +517,4 @@ int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct sam_freerun_s *free
return OK;
}
/****************************************************************************
* Name: sam_oneshot_max_delay
*
* Description:
* Return the maximum delay supported by the one shot timer (in
* microseconds).
*
* Input Parameters:
* oneshot Caller allocated instance of the oneshot state structure. This
* structure must have been previously initialized via a call to
* sam_oneshot_initialize();
* usec The location in which to return the maximum delay.
*
* Returned Value:
* Zero (OK) is returned on success; a negated errno value is returned
* on failure.
*
****************************************************************************/
#ifdef CONFIG_SCHED_TICKLESS_LIMIT_MAX_SLEEP
int sam_oneshot_max_delay(struct sam_oneshot_s *oneshot, uint64_t *usec)
{
DEBUGASSERT(oneshot && usec);
*usec = (0xffffull * USEC_PER_SEC) / (uint64_t)sam_tc_divfreq(oneshot->tch);
return OK;
}
#endif
#endif /* CONFIG_SAMV7_ONESHOT */
arch/arm/src/samv7/sam_oneshot.h
+14 -9
View File
@@ -46,7 +46,6 @@
#include <time.h>
#include "sam_tc.h"
#include "sam_freerun.h"
#ifdef CONFIG_SAMV7_ONESHOT
@@ -83,11 +82,13 @@ struct sam_oneshot_s
volatile oneshot_handler_t handler; /* Oneshot expiration callback */
volatile void *arg; /* The argument that will accompany
* the callback */
#ifdef CONFIG_SAMV7_FREERUN
volatile uint32_t start_count; /* Stores the value of the freerun counter,
* at each start of the onshot timer. Is neccesary
* to find out if the onshot counter was updated
* correctly at the time of the call to
* sam_oneshot_cancel or not. */
#endif
};
/****************************************************************************
@@ -149,9 +150,7 @@ int sam_oneshot_initialize(struct sam_oneshot_s *oneshot, int chan,
*
****************************************************************************/
#ifdef CONFIG_SCHED_TICKLESS_LIMIT_MAX_SLEEP
int sam_oneshot_max_delay(struct sam_oneshot_s *oneshot, uint64_t *usec);
#endif
/****************************************************************************
* Name: sam_oneshot_start
@@ -165,7 +164,8 @@ int sam_oneshot_max_delay(struct sam_oneshot_s *oneshot, uint64_t *usec);
* sam_oneshot_initialize();
* freerun Caller allocated instance of the freerun state structure. This
* structure must have been previously initialized via a call to
* sam_freerun_initialize();
* sam_freerun_initialize(). May be NULL if there is no matching
* free-running timer.
* handler The function to call when when the oneshot timer expires.
* arg An opaque argument that will accompany the callback.
* ts Provides the duration of the one shot timer.
@@ -176,8 +176,11 @@ int sam_oneshot_max_delay(struct sam_oneshot_s *oneshot, uint64_t *usec);
*
****************************************************************************/
int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freerun,
oneshot_handler_t handler, void *arg, const struct timespec *ts);
struct sam_freerun_s;
int sam_oneshot_start(struct sam_oneshot_s *oneshot,
struct sam_freerun_s *freerun,
oneshot_handler_t handler, void *arg,
const struct timespec *ts);
/****************************************************************************
* Name: sam_oneshot_cancel
@@ -194,7 +197,8 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freer
* sam_oneshot_initialize();
* freerun Caller allocated instance of the freerun state structure. This
* structure must have been previously initialized via a call to
* sam_freerun_initialize();
* sam_freerun_initialize(). May be NULL if there is no matching
* free-running timer.
* ts The location in which to return the time remaining on the
* oneshot timer. A time of zero is returned if the timer is
* not running.
@@ -206,8 +210,9 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freer
*
****************************************************************************/
int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freerun,
struct timespec *ts);
struct sam_freerun_s;
int sam_oneshot_cancel(struct sam_oneshot_s *oneshot,
struct sam_freerun_s *freerun, struct timespec *ts);
#undef EXTERN
#ifdef __cplusplus
arch/arm/src/samv7/sam_oneshot_lowerhalf.c
+345
View File
@@ -0,0 +1,345 @@
/****************************************************************************
* arch/arm/src/sam/sam_oneshot_lowerhalf.c
*
* Copyright (C) 2016 Gregory Nutt. All rights reserved.
* Authors: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <time.h>
#include <assert.h>
#include <debug.h>
#include <nuttx/irq.h>
#include <nuttx/kmalloc.h>
#include <nuttx/timers/oneshot.h>
#include "sam_oneshot.h"
/****************************************************************************
* Private Types
****************************************************************************/
/* This structure describes the state of the oneshot timer lower-half driver */
struct sam_oneshot_lowerhalf_s
{
/* This is the part of the lower half driver that is visible to the upper-
* half client of the driver. This must be the first thing in this
* structure so that pointers to struct oneshot_lowerhalf_s are cast
* compatible to struct sam_oneshot_lowerhalf_s and vice versa.
*/
struct oneshot_lowerhalf_s lh; /* Common lower-half driver fields */
/* Private lower half data follows */
struct sam_oneshot_s oneshot; /* SAMV7-specific oneshot state */
oneshot_callback_t callback; /* internal handler that receives callback */
FAR void *arg; /* Argument that is passed to the handler */
};
/****************************************************************************
* Private Function Prototypes
****************************************************************************/
static void sam_oneshot_handler(void *arg);
static int sam_max_delay(FAR struct oneshot_lowerhalf_s *lower,
FAR struct timespec *ts);
static int sam_start(FAR struct oneshot_lowerhalf_s *lower,
oneshot_callback_t callback, FAR void *arg,
FAR const struct timespec *ts);
static int sam_cancel(FAR struct oneshot_lowerhalf_s *lower,
FAR struct timespec *ts);
/****************************************************************************
* Private Data
****************************************************************************/
/* Lower half operations */
static const struct oneshot_operations_s g_oneshot_ops =
{
.max_delay = sam_max_delay,
.start = sam_start,
.cancel = sam_cancel,
};
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: sam_oneshot_handler
*
* Description:
* Timer expiration handler
*
* Input Parameters:
* arg - Should be the same argument provided when sam_oneshot_start()
* was called.
*
* Returned Value:
* None
*
****************************************************************************/
static void sam_oneshot_handler(void *arg)
{
FAR struct sam_oneshot_lowerhalf_s *priv =
(FAR struct sam_oneshot_lowerhalf_s *)arg;
oneshot_callback_t callback;
FAR void *cbarg;
DEBUGASSERT(priv != NULL);
/* Perhaps the callback was nullified in a race condition with
* sam_cancel?
*/
if (priv->callback)
{
/* Sample and nullify BEFORE executing callback (in case the callback
* restarts the oneshot).
*/
callback = priv->callback;
cbarg = priv->arg;
priv->callback = NULL;
priv->arg = NULL;
/* Then perform the callback */
callback(&priv->lh, cbarg);
}
}
/****************************************************************************
* Name: sam_max_delay
*
* Description:
* Determine the maximum delay of the one-shot timer (in microseconds)
*
* Input Parameters:
* lower An instance of the lower-half oneshot state structure. This
* structure must have been previously initialized via a call to
* oneshot_initialize();
* ts The location in which to return the maxumum delay.
*
* Returned Value:
* Zero (OK) is returned on success; a negated errno value is returned
* on failure.
*
****************************************************************************/
static int sam_max_delay(FAR struct oneshot_lowerhalf_s *lower,
FAR struct timespec *ts)
{
FAR struct sam_oneshot_lowerhalf_s *priv =
(FAR struct sam_oneshot_lowerhalf_s *)lower;
uint64_t usecs;
int ret;
DEBUGASSERT(priv != NULL && ts != NULL);
ret = sam_oneshot_max_delay(&priv->oneshot, &usecs);
if (ret >= 0)
{
uint64_t sec = usecs / 1000000;
usecs -= 1000000 * sec;
ts->tv_sec = (time_t)sec;
ts->tv_nsec = (long)(usecs * 1000);
}
return ret;
}
/****************************************************************************
* Name: sam_start
*
* Description:
* Start the oneshot timer
*
* Input Parameters:
* lower An instance of the lower-half oneshot state structure. This
* structure must have been previously initialized via a call to
* oneshot_initialize();
* handler The function to call when when the oneshot timer expires.
* arg An opaque argument that will accompany the callback.
* ts Provides the duration of the one shot timer.
*
* Returned Value:
* Zero (OK) is returned on success; a negated errno value is returned
* on failure.
*
****************************************************************************/
static int sam_start(FAR struct oneshot_lowerhalf_s *lower,
oneshot_callback_t callback, FAR void *arg,
FAR const struct timespec *ts)
{
FAR struct sam_oneshot_lowerhalf_s *priv =
(FAR struct sam_oneshot_lowerhalf_s *)lower;
irqstate_t flags;
int ret;
DEBUGASSERT(priv != NULL && callback != NULL && ts != NULL);
/* Save the callback information and start the timer */
flags = enter_critical_section();
priv->callback = callback;
priv->arg = arg;
ret = sam_oneshot_start(&priv->oneshot, NULL,
sam_oneshot_handler, priv, ts);
leave_critical_section(flags);
if (ret < 0)
{
tmrerr("ERROR: sam_oneshot_start failed: %d\n", flags);
}
return ret;
}
/****************************************************************************
* Name: sam_cancel
*
* Description:
* Cancel the oneshot timer and return the time remaining on the timer.
*
* NOTE: This function may execute at a high rate with no timer running (as
* when pre-emption is enabled and disabled).
*
* Input Parameters:
* lower Caller allocated instance of the oneshot state structure. This
* structure must have been previously initialized via a call to
* oneshot_initialize();
* ts The location in which to return the time remaining on the
* oneshot timer. A time of zero is returned if the timer is
* not running.
*
* Returned Value:
* Zero (OK) is returned on success. A call to up_timer_cancel() when
* the timer is not active should also return success; a negated errno
* value is returned on any failure.
*
****************************************************************************/
static int sam_cancel(FAR struct oneshot_lowerhalf_s *lower,
FAR struct timespec *ts)
{
FAR struct sam_oneshot_lowerhalf_s *priv =
(FAR struct sam_oneshot_lowerhalf_s *)lower;
irqstate_t flags;
int ret;
DEBUGASSERT(priv != NULL);
/* Cancel the timer */
flags = enter_critical_section();
ret = sam_oneshot_cancel(&priv->oneshot, NULL, ts);
priv->callback = NULL;
priv->arg = NULL;
leave_critical_section(flags);
if (ret < 0)
{
tmrerr("ERROR: sam_oneshot_cancel failed: %d\n", flags);
}
return ret;
}
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: oneshot_initialize
*
* Description:
* Initialize the oneshot timer and return a oneshot lower half driver
* instance.
*
* Input Parameters:
* chan Timer counter channel to be used.
* resolution The required resolution of the timer in units of
* microseconds. NOTE that the range is restricted to the
* range of uint16_t (excluding zero).
*
* Returned Value:
* On success, a non-NULL instance of the oneshot lower-half driver is
* returned. NULL is return on any failure.
*
****************************************************************************/
FAR struct oneshot_lowerhalf_s *oneshot_initialize(int chan,
uint16_t resolution)
{
FAR struct sam_oneshot_lowerhalf_s *priv;
int ret;
/* Allocate an instance of the lower half driver */
priv = (FAR struct sam_oneshot_lowerhalf_s *)
kmm_zalloc(sizeof(struct sam_oneshot_lowerhalf_s));
if (priv == NULL)
{
tmrerr("ERROR: Failed to initialized state structure\n");
return NULL;
}
/* Initialize the lower-half driver structure */
priv->lh.ops = &g_oneshot_ops;
/* Initialize the contained SAM oneshot timer */
ret = sam_oneshot_initialize(&priv->oneshot, chan, resolution);
if (ret < 0)
{
tmrerr("ERROR: sam_oneshot_initialize failed: %d\n", ret);
kmm_free(priv);
return NULL;
}
return &priv->lh;
}
arch/arm/src/stm32/Kconfig
+1 -1
View File
@@ -2076,7 +2076,7 @@ config STM32_SPI6
config STM32_SYSCFG
bool "SYSCFG"
default y
depends on STM32_STM32L15XX || STM32_STM32F30XX || STM32_STM32F37XX || STM32_STM32F207 || STM32_STM32F40XX
depends on STM32_STM32L15XX || STM32_STM32F30XX || STM32_STM32F37XX || STM32_STM32F207 || STM32_STM32F40XX || STM32_CONNECTIVITYLINE
config STM32_TIM1
bool "TIM1"
arch/arm/src/stm32/Make.defs
+2 -2
View File
@@ -1,7 +1,7 @@
############################################################################
# arch/arm/src/stm32/Make.defs
#
# Copyright (C) 2009, 2011-2015 Gregory Nutt. All rights reserved.
# Copyright (C) 2009, 2011-2016 Gregory Nutt. All rights reserved.
# Author: Gregory Nutt <gnutt@nuttx.org>
#
# Redistribution and use in source and binary forms, with or without
@@ -125,7 +125,7 @@ CHIP_CSRCS += stm32_tickless.c
endif
ifeq ($(CONFIG_STM32_ONESHOT),y)
CHIP_CSRCS += stm32_oneshot.c
CHIP_CSRCS += stm32_oneshot.c stm32_oneshot_lowerhalf.c
endif
ifeq ($(CONFIG_STM32_FREERUN),y)

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