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include: fix double include pre-processor guards

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Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
This commit is contained in:
Petro Karashchenko
2022-01-15 04:44:35 +02:00
committed by Alan Carvalho de Assis
parent 1adee3d657
commit 8d3bf05fd2
684 changed files with 2242 additions and 2252 deletions
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boards/arm/imxrt/teensy-4.x/include/board.h
+3 -3
View File
@@ -18,8 +18,8 @@
*
****************************************************************************/
#ifndef __BOARDS_ARM_IMXRT_TEENSY_4_INCLUDE_BOARD_H
#define __BOARDS_ARM_IMXRT_TEENSY_4_INCLUDE_BOARD_H
#ifndef __BOARDS_ARM_IMXRT_TEENSY_4X_INCLUDE_BOARD_H
#define __BOARDS_ARM_IMXRT_TEENSY_4X_INCLUDE_BOARD_H
/****************************************************************************
* Included Files
@@ -306,4 +306,4 @@ extern "C"
#endif
#endif /* __ASSEMBLY__ */
#endif /* __BOARDS_ARM_IMXRT_TEENSY_4_INCLUDE_BOARD_H */
#endif /* __BOARDS_ARM_IMXRT_TEENSY_4X_INCLUDE_BOARD_H */
boards/arm/imxrt/teensy-4.x/src/imxrt_flexspi_nor_boot.h
+66 -66
View File
@@ -25,7 +25,7 @@
* Included Files
****************************************************************************/
# include <stdint.h>
#include <stdint.h>
/****************************************************************************
* Pre-processor Definitions
@@ -33,66 +33,66 @@
/* IVT Data */
# define IVT_MAJOR_VERSION 0x4
# define IVT_MAJOR_VERSION_SHIFT 0x4
# define IVT_MAJOR_VERSION_MASK 0xf
# define IVT_MINOR_VERSION 0x1
# define IVT_MINOR_VERSION_SHIFT 0x0
# define IVT_MINOR_VERSION_MASK 0xf
#define IVT_MAJOR_VERSION 0x4
#define IVT_MAJOR_VERSION_SHIFT 0x4
#define IVT_MAJOR_VERSION_MASK 0xf
#define IVT_MINOR_VERSION 0x1
#define IVT_MINOR_VERSION_SHIFT 0x0
#define IVT_MINOR_VERSION_MASK 0xf
# define IVT_VERSION(major, minor) \
#define IVT_VERSION(major, minor) \
((((major) & IVT_MAJOR_VERSION_MASK) << IVT_MAJOR_VERSION_SHIFT) | \
(((minor) & IVT_MINOR_VERSION_MASK) << IVT_MINOR_VERSION_SHIFT))
# define IVT_TAG_HEADER (0xd1) /* Image Vector Table */
# define IVT_SIZE 0x2000
# define IVT_PAR IVT_VERSION(IVT_MAJOR_VERSION, IVT_MINOR_VERSION)
#define IVT_TAG_HEADER (0xd1) /* Image Vector Table */
#define IVT_SIZE 0x2000
#define IVT_PAR IVT_VERSION(IVT_MAJOR_VERSION, IVT_MINOR_VERSION)
# define IVT_HEADER (IVT_TAG_HEADER | (IVT_SIZE << 8) | (IVT_PAR << 24))
# define IVT_RSVD (uint32_t)(0x00000000)
#define IVT_HEADER (IVT_TAG_HEADER | (IVT_SIZE << 8) | (IVT_PAR << 24))
#define IVT_RSVD (uint32_t)(0x00000000)
/* DCD Data */
# define DCD_TAG_HEADER (0xd2)
# define DCD_TAG_HEADER_SHIFT (24)
# define DCD_VERSION (0x41)
# define DCD_ARRAY_SIZE 1
#define DCD_TAG_HEADER (0xd2)
#define DCD_TAG_HEADER_SHIFT (24)
#define DCD_VERSION (0x41)
#define DCD_ARRAY_SIZE 1
# define FLASH_BASE 0x60000000
# define FLASH_END 0x7f7fffff
#define FLASH_BASE 0x60000000
#define FLASH_END 0x7f7fffff
/* This needs to take into account the memory configuration at
* boot bootloader
*/
# define ROM_BOOTLOADER_OCRAM_RES 0x8000
# define OCRAM_BASE (0x20200000 + ROM_BOOTLOADER_OCRAM_RES)
# define OCRAM_END (OCRAM_BASE + (512 * 1024) + (256 * 1024) \
#define ROM_BOOTLOADER_OCRAM_RES 0x8000
#define OCRAM_BASE (0x20200000 + ROM_BOOTLOADER_OCRAM_RES)
#define OCRAM_END (OCRAM_BASE + (512 * 1024) + (256 * 1024) \
- ROM_BOOTLOADER_OCRAM_RES)
# define SCLK 1
# if defined(CONFIG_BOOT_RUNFROMFLASH)
# define IMAGE_DEST FLASH_BASE
# define IMAGE_DEST_END FLASH_END
# define IMAGE_DEST_OFFSET 0
# else
# define IMAGE_DEST OCRAM_BASE
# define IMAGE_DEST_END OCRAM_END
# define IMAGE_DEST_OFFSET IVT_SIZE
# endif
#define SCLK 1
#if defined(CONFIG_BOOT_RUNFROMFLASH)
# define IMAGE_DEST FLASH_BASE
# define IMAGE_DEST_END FLASH_END
# define IMAGE_DEST_OFFSET 0
#else
# define IMAGE_DEST OCRAM_BASE
# define IMAGE_DEST_END OCRAM_END
# define IMAGE_DEST_OFFSET IVT_SIZE
#endif
# define LOCATE_IN_DEST(x) (((uint32_t)(x)) - FLASH_BASE + IMAGE_DEST)
# define LOCATE_IN_SRC(x) (((uint32_t)(x)) - IMAGE_DEST + FLASH_BASE)
#define LOCATE_IN_DEST(x) (((uint32_t)(x)) - FLASH_BASE + IMAGE_DEST)
#define LOCATE_IN_SRC(x) (((uint32_t)(x)) - IMAGE_DEST + FLASH_BASE)
# define DCD_ADDRESS 0
# define BOOT_DATA_ADDRESS LOCATE_IN_DEST(&g_boot_data)
# define CSF_ADDRESS 0
# define PLUGIN_FLAG (uint32_t)0
#define DCD_ADDRESS 0
#define BOOT_DATA_ADDRESS LOCATE_IN_DEST(&g_boot_data)
#define CSF_ADDRESS 0
#define PLUGIN_FLAG (uint32_t)0
/* Located in Destination Memory */
# define IMAGE_ENTRY_ADDRESS ((uint32_t)&_vectors)
# define IMAG_VECTOR_TABLE LOCATE_IN_DEST(&g_image_vector_table)
#define IMAGE_ENTRY_ADDRESS ((uint32_t)&_vectors)
#define IMAG_VECTOR_TABLE LOCATE_IN_DEST(&g_image_vector_table)
/****************************************************************************
* Public Types
@@ -101,50 +101,50 @@
/* IVT Data */
struct ivt_s
{
/* Header with tag #HAB_TAG_IVT, length and HAB version fields */
{
/* Header with tag #HAB_TAG_IVT, length and HAB version fields */
uint32_t hdr;
uint32_t hdr;
/* Absolute address of the first instr. to execute from the image */
/* Absolute address of the first instr. to execute from the image */
uint32_t entry;
uint32_t entry;
/* Reserved in this version of HAB: should be NULL. */
/* Reserved in this version of HAB: should be NULL. */
uint32_t reserved1;
uint32_t reserved1;
/* Absolute address of the image DCD: may be NULL. */
/* Absolute address of the image DCD: may be NULL. */
uint32_t dcd;
uint32_t dcd;
/* Absolute address of the Boot Data: may be NULL */
/* Absolute address of the Boot Data: may be NULL */
uint32_t boot_data;
uint32_t boot_data;
/* Absolute address of the IVT. */
/* Absolute address of the IVT. */
uint32_t self;
uint32_t self;
/* Absolute address of the image CSF. */
/* Absolute address of the image CSF. */
uint32_t csf;
uint32_t csf;
/* Reserved in this version of HAB: should be zero. */
/* Reserved in this version of HAB: should be zero. */
uint32_t reserved2;
};
uint32_t reserved2;
};
/* Boot Data */
struct boot_data_s
{
uint32_t start; /* boot start location */
uint32_t size; /* size */
uint32_t plugin; /* plugin flag - 1 if downloaded application is
* plugin */
uint32_t placeholder; /* placeholder to make even 0x10 size */
};
{
uint32_t start; /* boot start location */
uint32_t size; /* size */
uint32_t plugin; /* plugin flag - 1 if downloaded application is
* plugin */
uint32_t placeholder; /* placeholder to make even 0x10 size */
};
/****************************************************************************
* Public Data
@@ -154,4 +154,4 @@ extern const struct boot_data_s g_boot_data;
extern const uint8_t g_dcd_data[];
extern const uint32_t _vectors[];
#endif /* __BOARDS_ARM_IMXRT_TEENSY_4_SRC_IMXRT_FLEXSPI_NOR_BOOT_H */
#endif /* __BOARDS_ARM_IMXRT_TEENSY_4_SRC_IMXRT_FLEXSPI_NOR_BOOT_H */
boards/arm/imxrt/teensy-4.x/src/imxrt_flexspi_nor_flash.h
+85 -85
View File
@@ -24,8 +24,8 @@
* Included Files
****************************************************************************/
# include <stdint.h>
# include <stdbool.h>
#include <stdint.h>
#include <stdbool.h>
/****************************************************************************
* Pre-processor Definitions
@@ -33,153 +33,153 @@
/* FLEXSPI memory config block related definitions */
# define FLEXSPI_CFG_BLK_TAG (0x42464346ul)
# define FLEXSPI_CFG_BLK_VERSION (0x56010100ul)
# define FLEXSPI_CFG_BLK_SIZE (512)
#define FLEXSPI_CFG_BLK_TAG (0x42464346ul)
#define FLEXSPI_CFG_BLK_VERSION (0x56010100ul)
#define FLEXSPI_CFG_BLK_SIZE (512)
/* FLEXSPI Feature related definitions */
# define FLEXSPI_FEATURE_HAS_PARALLEL_MODE 1
#define FLEXSPI_FEATURE_HAS_PARALLEL_MODE 1
/* Lookup table related definitions */
# define CMD_INDEX_READ 0
# define CMD_INDEX_READSTATUS 1
# define CMD_INDEX_WRITEENABLE 2
# define CMD_INDEX_WRITE 4
#define CMD_INDEX_READ 0
#define CMD_INDEX_READSTATUS 1
#define CMD_INDEX_WRITEENABLE 2
#define CMD_INDEX_WRITE 4
# define CMD_LUT_SEQ_IDX_READ 0
# define CMD_LUT_SEQ_IDX_READSTATUS 1
# define CMD_LUT_SEQ_IDX_WRITEENABLE 3
# define CMD_LUT_SEQ_IDX_WRITE 9
#define CMD_LUT_SEQ_IDX_READ 0
#define CMD_LUT_SEQ_IDX_READSTATUS 1
#define CMD_LUT_SEQ_IDX_WRITEENABLE 3
#define CMD_LUT_SEQ_IDX_WRITE 9
# define CMD_SDR 0x01
# define CMD_DDR 0x21
# define RADDR_SDR 0x02
# define RADDR_DDR 0x22
# define CADDR_SDR 0x03
# define CADDR_DDR 0x23
# define MODE1_SDR 0x04
# define MODE1_DDR 0x24
# define MODE2_SDR 0x05
# define MODE2_DDR 0x25
# define MODE4_SDR 0x06
# define MODE4_DDR 0x26
# define MODE8_SDR 0x07
# define MODE8_DDR 0x27
# define WRITE_SDR 0x08
# define WRITE_DDR 0x28
# define READ_SDR 0x09
# define READ_DDR 0x29
# define LEARN_SDR 0x0a
# define LEARN_DDR 0x2a
# define DATSZ_SDR 0x0b
# define DATSZ_DDR 0x2b
# define DUMMY_SDR 0x0c
# define DUMMY_DDR 0x2c
# define DUMMY_RWDS_SDR 0x0d
# define DUMMY_RWDS_DDR 0x2d
# define JMP_ON_CS 0x1f
# define STOP 0
#define CMD_SDR 0x01
#define CMD_DDR 0x21
#define RADDR_SDR 0x02
#define RADDR_DDR 0x22
#define CADDR_SDR 0x03
#define CADDR_DDR 0x23
#define MODE1_SDR 0x04
#define MODE1_DDR 0x24
#define MODE2_SDR 0x05
#define MODE2_DDR 0x25
#define MODE4_SDR 0x06
#define MODE4_DDR 0x26
#define MODE8_SDR 0x07
#define MODE8_DDR 0x27
#define WRITE_SDR 0x08
#define WRITE_DDR 0x28
#define READ_SDR 0x09
#define READ_DDR 0x29
#define LEARN_SDR 0x0a
#define LEARN_DDR 0x2a
#define DATSZ_SDR 0x0b
#define DATSZ_DDR 0x2b
#define DUMMY_SDR 0x0c
#define DUMMY_DDR 0x2c
#define DUMMY_RWDS_SDR 0x0d
#define DUMMY_RWDS_DDR 0x2d
#define JMP_ON_CS 0x1f
#define STOP 0
# define FLEXSPI_1PAD 0
# define FLEXSPI_2PAD 1
# define FLEXSPI_4PAD 2
# define FLEXSPI_8PAD 3
#define FLEXSPI_1PAD 0
#define FLEXSPI_2PAD 1
#define FLEXSPI_4PAD 2
#define FLEXSPI_8PAD 3
# define FLEXSPI_LUT_OPERAND0_MASK (0xffu)
# define FLEXSPI_LUT_OPERAND0_SHIFT (0U)
# define FLEXSPI_LUT_OPERAND0(x) (((uint32_t) \
#define FLEXSPI_LUT_OPERAND0_MASK (0xffu)
#define FLEXSPI_LUT_OPERAND0_SHIFT (0U)
#define FLEXSPI_LUT_OPERAND0(x) (((uint32_t) \
(((uint32_t)(x)) << FLEXSPI_LUT_OPERAND0_SHIFT)) & \
FLEXSPI_LUT_OPERAND0_MASK)
# define FLEXSPI_LUT_NUM_PADS0_MASK (0x300u)
# define FLEXSPI_LUT_NUM_PADS0_SHIFT (8u)
# define FLEXSPI_LUT_NUM_PADS0(x) (((uint32_t) \
#define FLEXSPI_LUT_NUM_PADS0_MASK (0x300u)
#define FLEXSPI_LUT_NUM_PADS0_SHIFT (8u)
#define FLEXSPI_LUT_NUM_PADS0(x) (((uint32_t) \
(((uint32_t)(x)) << FLEXSPI_LUT_NUM_PADS0_SHIFT)) & \
FLEXSPI_LUT_NUM_PADS0_MASK)
# define FLEXSPI_LUT_OPCODE0_MASK (0xfc00u)
# define FLEXSPI_LUT_OPCODE0_SHIFT (10u)
# define FLEXSPI_LUT_OPCODE0(x) (((uint32_t) \
#define FLEXSPI_LUT_OPCODE0_MASK (0xfc00u)
#define FLEXSPI_LUT_OPCODE0_SHIFT (10u)
#define FLEXSPI_LUT_OPCODE0(x) (((uint32_t) \
(((uint32_t)(x)) << FLEXSPI_LUT_OPCODE0_SHIFT)) & \
FLEXSPI_LUT_OPCODE0_MASK)
# define FLEXSPI_LUT_OPERAND1_MASK (0xff0000u)
# define FLEXSPI_LUT_OPERAND1_SHIFT (16U)
# define FLEXSPI_LUT_OPERAND1(x) (((uint32_t) \
#define FLEXSPI_LUT_OPERAND1_MASK (0xff0000u)
#define FLEXSPI_LUT_OPERAND1_SHIFT (16U)
#define FLEXSPI_LUT_OPERAND1(x) (((uint32_t) \
(((uint32_t)(x)) << FLEXSPI_LUT_OPERAND1_SHIFT)) & \
FLEXSPI_LUT_OPERAND1_MASK)
# define FLEXSPI_LUT_NUM_PADS1_MASK (0x3000000u)
# define FLEXSPI_LUT_NUM_PADS1_SHIFT (24u)
# define FLEXSPI_LUT_NUM_PADS1(x) (((uint32_t) \
#define FLEXSPI_LUT_NUM_PADS1_MASK (0x3000000u)
#define FLEXSPI_LUT_NUM_PADS1_SHIFT (24u)
#define FLEXSPI_LUT_NUM_PADS1(x) (((uint32_t) \
(((uint32_t)(x)) << FLEXSPI_LUT_NUM_PADS1_SHIFT)) & \
FLEXSPI_LUT_NUM_PADS1_MASK)
# define FLEXSPI_LUT_OPCODE1_MASK (0xfc000000u)
# define FLEXSPI_LUT_OPCODE1_SHIFT (26u)
# define FLEXSPI_LUT_OPCODE1(x) (((uint32_t)(((uint32_t)(x)) << FLEXSPI_LUT_OPCODE1_SHIFT)) & \
#define FLEXSPI_LUT_OPCODE1_MASK (0xfc000000u)
#define FLEXSPI_LUT_OPCODE1_SHIFT (26u)
#define FLEXSPI_LUT_OPCODE1(x) (((uint32_t)(((uint32_t)(x)) << FLEXSPI_LUT_OPCODE1_SHIFT)) & \
FLEXSPI_LUT_OPCODE1_MASK)
# define FLEXSPI_LUT_SEQ(cmd0, pad0, op0, cmd1, pad1, op1) \
#define FLEXSPI_LUT_SEQ(cmd0, pad0, op0, cmd1, pad1, op1) \
(FLEXSPI_LUT_OPERAND0(op0) | FLEXSPI_LUT_NUM_PADS0(pad0) | \
FLEXSPI_LUT_OPCODE0(cmd0) | FLEXSPI_LUT_OPERAND1(op1) | \
FLEXSPI_LUT_NUM_PADS1(pad1) | FLEXSPI_LUT_OPCODE1(cmd1))
/* */
# define NOR_CMD_INDEX_READ CMD_INDEX_READ
# define NOR_CMD_INDEX_READSTATUS CMD_INDEX_READSTATUS
# define NOR_CMD_INDEX_WRITEENABLE CMD_INDEX_WRITEENABLE
# define NOR_CMD_INDEX_ERASESECTOR 3
# define NOR_CMD_INDEX_PAGEPROGRAM CMD_INDEX_WRITE
# define NOR_CMD_INDEX_CHIPERASE 5
# define NOR_CMD_INDEX_DUMMY 6
# define NOR_CMD_INDEX_ERASEBLOCK 7
#define NOR_CMD_INDEX_READ CMD_INDEX_READ
#define NOR_CMD_INDEX_READSTATUS CMD_INDEX_READSTATUS
#define NOR_CMD_INDEX_WRITEENABLE CMD_INDEX_WRITEENABLE
#define NOR_CMD_INDEX_ERASESECTOR 3
#define NOR_CMD_INDEX_PAGEPROGRAM CMD_INDEX_WRITE
#define NOR_CMD_INDEX_CHIPERASE 5
#define NOR_CMD_INDEX_DUMMY 6
#define NOR_CMD_INDEX_ERASEBLOCK 7
/* READ LUT sequence id in lookupTable stored in config block */
# define NOR_CMD_LUT_SEQ_IDX_READ CMD_LUT_SEQ_IDX_READ
#define NOR_CMD_LUT_SEQ_IDX_READ CMD_LUT_SEQ_IDX_READ
/* Read Status LUT sequence id in lookupTable stored in config block */
# define NOR_CMD_LUT_SEQ_IDX_READSTATUS CMD_LUT_SEQ_IDX_READSTATUS
#define NOR_CMD_LUT_SEQ_IDX_READSTATUS CMD_LUT_SEQ_IDX_READSTATUS
/* 2 Read status DPI/QPI/OPI sequence id in LUT stored in config block */
# define NOR_CMD_LUT_SEQ_IDX_READSTATUS_XPI 2
#define NOR_CMD_LUT_SEQ_IDX_READSTATUS_XPI 2
/* 3 Write Enable sequence id in lookupTable stored in config block */
# define NOR_CMD_LUT_SEQ_IDX_WRITEENABLE CMD_LUT_SEQ_IDX_WRITEENABLE
#define NOR_CMD_LUT_SEQ_IDX_WRITEENABLE CMD_LUT_SEQ_IDX_WRITEENABLE
/* 4 Write Enable DPI/QPI/OPI sequence id in LUT stored in config block */
# define NOR_CMD_LUT_SEQ_IDX_WRITEENABLE_XPI 4
#define NOR_CMD_LUT_SEQ_IDX_WRITEENABLE_XPI 4
/* 5 Erase Sector sequence id in lookupTable stored in config block */
# define NOR_CMD_LUT_SEQ_IDX_ERASESECTOR 5
#define NOR_CMD_LUT_SEQ_IDX_ERASESECTOR 5
/* 8 Erase Block sequence id in lookupTable stored in config block */
# define NOR_CMD_LUT_SEQ_IDX_ERASEBLOCK 8
#define NOR_CMD_LUT_SEQ_IDX_ERASEBLOCK 8
/* 9 Program sequence id in lookupTable stored in config block */
# define NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM CMD_LUT_SEQ_IDX_WRITE
#define NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM CMD_LUT_SEQ_IDX_WRITE
/* 11 Chip Erase sequence in lookupTable id stored in config block */
# define NOR_CMD_LUT_SEQ_IDX_CHIPERASE 11
#define NOR_CMD_LUT_SEQ_IDX_CHIPERASE 11
/* 13 Read SFDP sequence in lookupTable id stored in config block */
# define NOR_CMD_LUT_SEQ_IDX_READ_SFDP 13
#define NOR_CMD_LUT_SEQ_IDX_READ_SFDP 13
/* 14 Restore 0-4-4/0-8-8 mode sequence id in LUT stored in config block */
# define NOR_CMD_LUT_SEQ_IDX_RESTORE_NOCMD 14
#define NOR_CMD_LUT_SEQ_IDX_RESTORE_NOCMD 14
/* 15 Exit 0-4-4/0-8-8 mode sequence id in LUT stored in config blobk */
# define NOR_CMD_LUT_SEQ_IDX_EXIT_NOCMD 15
#define NOR_CMD_LUT_SEQ_IDX_EXIT_NOCMD 15
/****************************************************************************
* Public Types
boards/arm/imxrt/teensy-4.x/src/teensy-4.h
+20 -20
View File
@@ -19,23 +19,23 @@
****************************************************************************/
#ifndef __BOARDS_ARM_IMXRT_TEENSY_4X_SRC_TEENSY_4_H
# define __BOARDS_ARM_IMXRT_TEENSY_4X_SRC_TEENSY_4_H
#define __BOARDS_ARM_IMXRT_TEENSY_4X_SRC_TEENSY_4_H
/****************************************************************************
* Included Files
****************************************************************************/
# include <nuttx/config.h>
#include <nuttx/config.h>
# include <stdint.h>
# include <stdbool.h>
#include <stdint.h>
#include <stdbool.h>
# include <arch/irq.h>
# include <nuttx/irq.h>
#include <arch/irq.h>
#include <nuttx/irq.h>
# include "imxrt_gpio.h"
# include "imxrt_iomuxc.h"
# include "hardware/imxrt_pinmux.h"
#include "imxrt_gpio.h"
#include "imxrt_iomuxc.h"
#include "hardware/imxrt_pinmux.h"
/****************************************************************************
* Pre-processor Definitions
@@ -57,33 +57,33 @@
* Only a single LED, D3, is under software control.
*/
# define GPIO_LED (GPIO_OUTPUT | IOMUX_LED_DEFAULT | \
#define GPIO_LED (GPIO_OUTPUT | IOMUX_LED_DEFAULT | \
GPIO_OUTPUT_ZERO | GPIO_PORT2 | GPIO_PIN3) /* BO_03 */
# define LED_DRIVER_PATH "/dev/userleds"
#define LED_DRIVER_PATH "/dev/userleds"
/* LPSPI3 CS: GPIO_AD_B1_12 */
# define IOMUX_LPSPI3_CS (IOMUX_SLEW_FAST | IOMUX_DRIVE_50OHM | \
#define IOMUX_LPSPI3_CS (IOMUX_SLEW_FAST | IOMUX_DRIVE_50OHM | \
IOMUX_SPEED_MEDIUM | IOMUX_PULL_UP_100K | \
_IOMUX_PULL_ENABLE)
# define GPIO_LPSPI3_CS (GPIO_OUTPUT | GPIO_OUTPUT_ONE | \
#define GPIO_LPSPI3_CS (GPIO_OUTPUT | GPIO_OUTPUT_ONE | \
GPIO_PORT1 | GPIO_PIN28 | IOMUX_LPSPI3_CS)
/* LPSPI4 CS: GPIO_B0_00 */
# define IOMUX_LPSPI4_CS (IOMUX_SLEW_FAST | IOMUX_DRIVE_50OHM | \
#define IOMUX_LPSPI4_CS (IOMUX_SLEW_FAST | IOMUX_DRIVE_50OHM | \
IOMUX_SPEED_MEDIUM | IOMUX_PULL_UP_100K | \
_IOMUX_PULL_ENABLE)
# define GPIO_LPSPI4_CS (GPIO_OUTPUT | GPIO_OUTPUT_ONE | \
#define GPIO_LPSPI4_CS (GPIO_OUTPUT | GPIO_OUTPUT_ONE | \
GPIO_PORT2 | GPIO_PIN0 | IOMUX_LPSPI4_CS)
/* LCD dispay */
# define GPIO_LCD_RST (GPIO_OUTPUT | GPIO_OUTPUT_ONE | \
#define GPIO_LCD_RST (GPIO_OUTPUT | GPIO_OUTPUT_ONE | \
GPIO_PORT2 | GPIO_PIN18 | IOMUX_LPSPI4_CS) /* B1_02 */
# define GPIO_LCD_CD (GPIO_OUTPUT | GPIO_OUTPUT_ONE | \
#define GPIO_LCD_CD (GPIO_OUTPUT | GPIO_OUTPUT_ONE | \
GPIO_PORT2 | GPIO_PIN19 | IOMUX_LPSPI4_CS) /* B1_03 */
/* USB OTG ID Pin： GPIO_AD_B1_02 */
@@ -135,7 +135,7 @@
* Public Data
****************************************************************************/
# ifndef __ASSEMBLY__
#ifndef __ASSEMBLY__
/****************************************************************************
* Name: imxrt_bringup
@@ -145,9 +145,9 @@
*
****************************************************************************/
# if defined(CONFIG_BOARDCTL) || defined(CONFIG_BOARD_LATE_INITIALIZE)
#if defined(CONFIG_BOARDCTL) || defined(CONFIG_BOARD_LATE_INITIALIZE)
int imxrt_bringup(void);
# endif
#endif
/****************************************************************************
* Name: imxrt_spidev_initialize