include: fix double include pre-processor guards

Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
This commit is contained in:
Petro Karashchenko
2022-01-15 04:44:35 +02:00
committed by Alan Carvalho de Assis
parent 1adee3d657
commit 8d3bf05fd2
684 changed files with 2242 additions and 2252 deletions
+3 -3
View File
@@ -18,8 +18,8 @@
*
****************************************************************************/
#ifndef __ARCH_ARM_INCLUDE_ARM7_M_NVICPRI_H
#define __ARCH_ARM_INCLUDE_ARM7_M_NVICPRI_H
#ifndef __ARCH_ARM_INCLUDE_ARMV7_M_NVICPRI_H
#define __ARCH_ARM_INCLUDE_ARMV7_M_NVICPRI_H
/****************************************************************************
* Included Files
@@ -78,4 +78,4 @@
#define NVIC_SYSH_DISABLE_PRIORITY NVIC_SYSH_PRIORITY_DEFAULT
#define NVIC_SYSH_SVCALL_PRIORITY (NVIC_SYSH_PRIORITY_DEFAULT - 1*NVIC_SYSH_PRIORITY_STEP)
#endif /* __ARCH_ARM_INCLUDE_ARM7_M_NVICPRI_H */
#endif /* __ARCH_ARM_INCLUDE_ARMV7_M_NVICPRI_H */
+3 -3
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@@ -18,8 +18,8 @@
*
****************************************************************************/
#ifndef __ARCH_ARM_INCLUDE_ARM8_M_NVICPRI_H
#define __ARCH_ARM_INCLUDE_ARM8_M_NVICPRI_H
#ifndef __ARCH_ARM_INCLUDE_ARMV8_M_NVICPRI_H
#define __ARCH_ARM_INCLUDE_ARMV8_M_NVICPRI_H
/****************************************************************************
* Included Files
@@ -78,4 +78,4 @@
#define NVIC_SYSH_DISABLE_PRIORITY NVIC_SYSH_PRIORITY_DEFAULT
#define NVIC_SYSH_SVCALL_PRIORITY (NVIC_SYSH_PRIORITY_DEFAULT - 1*NVIC_SYSH_PRIORITY_STEP)
#endif /* __ARCH_ARM_INCLUDE_ARM8_M_NVICPRI_H */
#endif /* __ARCH_ARM_INCLUDE_ARMV8_M_NVICPRI_H */
+3 -3
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@@ -22,8 +22,8 @@
* through nuttx/irq.h
*/
#ifndef __ARCH_ARM_INCLUDE_EFM32G_IRQ_H
#define __ARCH_ARM_INCLUDE_EFM32G_IRQ_H
#ifndef __ARCH_ARM_INCLUDE_EFM32_EFM32G_IRQ_H
#define __ARCH_ARM_INCLUDE_EFM32_EFM32G_IRQ_H
/****************************************************************************
* Included Files
@@ -105,4 +105,4 @@ extern "C"
#endif
#endif
#endif /* __ARCH_ARM_INCLUDE_EFM32G_IRQ_H */
#endif /* __ARCH_ARM_INCLUDE_EFM32_EFM32G_IRQ_H */
+3 -3
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@@ -22,8 +22,8 @@
* through nuttx/irq.h
*/
#ifndef __ARCH_ARM_INCLUDE_EFM32GG_IRQ_H
#define __ARCH_ARM_INCLUDE_EFM32GG_IRQ_H
#ifndef __ARCH_ARM_INCLUDE_EFM32_EFM32GG_IRQ_H
#define __ARCH_ARM_INCLUDE_EFM32_EFM32GG_IRQ_H
/****************************************************************************
* Included Files
@@ -113,4 +113,4 @@ extern "C"
#endif
#endif
#endif /* __ARCH_ARM_INCLUDE_EFM32GG_IRQ_H */
#endif /* __ARCH_ARM_INCLUDE_EFM32_EFM32GG_IRQ_H */
+3 -3
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@@ -22,8 +22,8 @@
* through nuttx/irq.h
*/
#ifndef __ARCH_ARM_INCLUDE_EFM32TG_IRQ_H
#define __ARCH_ARM_INCLUDE_EFM32TG_IRQ_H
#ifndef __ARCH_ARM_INCLUDE_EFM32_EFM32TG_IRQ_H
#define __ARCH_ARM_INCLUDE_EFM32_EFM32TG_IRQ_H
/****************************************************************************
* Included Files
@@ -97,4 +97,4 @@ extern "C"
#endif
#endif
#endif /* __ARCH_ARM_INCLUDE_EFM32TG_IRQ_H */
#endif /* __ARCH_ARM_INCLUDE_EFM32_EFM32TG_IRQ_H */
+3 -3
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@@ -22,8 +22,8 @@
* only indirectly through nuttx/irq.h
*/
#ifndef __ARCH_ARM_INCLUDE_KINETIS_KINETIS_40KIRQ_H
#define __ARCH_ARM_INCLUDE_KINETIS_KINETIS_40KIRQ_H
#ifndef __ARCH_ARM_INCLUDE_KINETIS_KINETIS_K40IRQ_H
#define __ARCH_ARM_INCLUDE_KINETIS_KINETIS_K40IRQ_H
/****************************************************************************
* Included Files
@@ -182,4 +182,4 @@ extern "C"
#endif
#endif
#endif /* __ARCH_ARM_INCLUDE_KINETIS_KINETIS_40KIRQ_H */
#endif /* __ARCH_ARM_INCLUDE_KINETIS_KINETIS_K40IRQ_H */
+3 -3
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@@ -22,8 +22,8 @@
* only indirectly through nuttx/irq.h
*/
#ifndef __ARCH_ARM_INCLUDE_KINETIS_KINETIS_60KIRQ_H
#define __ARCH_ARM_INCLUDE_KINETIS_KINETIS_60KIRQ_H
#ifndef __ARCH_ARM_INCLUDE_KINETIS_KINETIS_K60IRQ_H
#define __ARCH_ARM_INCLUDE_KINETIS_KINETIS_K60IRQ_H
/****************************************************************************
* Included Files
@@ -182,4 +182,4 @@ extern "C"
#endif
#endif
#endif /* __ARCH_ARM_INCLUDE_KINETIS_KINETIS_60KIRQ_H */
#endif /* __ARCH_ARM_INCLUDE_KINETIS_KINETIS_K60IRQ_H */
+3 -3
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@@ -22,8 +22,8 @@
* only indirectly through nuttx/irq.h
*/
#ifndef __ARCH_ARM_INCLUDE_KINETIS_KINETIS_64KIRQ_H
#define __ARCH_ARM_INCLUDE_KINETIS_KINETIS_64KIRQ_H
#ifndef __ARCH_ARM_INCLUDE_KINETIS_KINETIS_K64IRQ_H
#define __ARCH_ARM_INCLUDE_KINETIS_KINETIS_K64IRQ_H
/****************************************************************************
* Included Files
@@ -172,4 +172,4 @@ extern "C"
#endif
#endif
#endif /* __ARCH_ARM_INCLUDE_KINETIS_KINETIS_64KIRQ_H */
#endif /* __ARCH_ARM_INCLUDE_KINETIS_KINETIS_K64IRQ_H */
@@ -22,8 +22,8 @@
* only indirectly through nuttx/irq.h
*/
#ifndef __ARCH_ARM_INCLUDE_LPC17XX_40XX_LPC178X_IRQ_H
#define __ARCH_ARM_INCLUDE_LPC17XX_40XX_LPC178X_IRQ_H
#ifndef __ARCH_ARM_INCLUDE_LPC17XX_40XX_LPC178X_40XX_IRQ_H
#define __ARCH_ARM_INCLUDE_LPC17XX_40XX_LPC178X_40XX_IRQ_H
/****************************************************************************
* Included Files
@@ -272,4 +272,4 @@
* Public Function Prototypes
****************************************************************************/
#endif /* __ARCH_ARM_INCLUDE_LPC17XX_40XX_LPC178X_IRQ_H */
#endif /* __ARCH_ARM_INCLUDE_LPC17XX_40XX_LPC178X_40XX_IRQ_H */
+3 -3
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@@ -18,8 +18,8 @@
*
****************************************************************************/
#ifndef __ARCH_ARM_INCLUDE_LPC54XX_LPC543X_IRQ_H
#define __ARCH_ARM_INCLUDE_LPC54XX_LPC543X_IRQ_H
#ifndef __ARCH_ARM_INCLUDE_LPC54XX_LPC546X_IRQ_H
#define __ARCH_ARM_INCLUDE_LPC54XX_LPC546X_IRQ_H
/****************************************************************************
* Included Files
@@ -96,4 +96,4 @@
#define NR_IRQS LPC54_IRQ_NIRQS
#endif /* __ARCH_ARM_INCLUDE_LPC54XX_LPC543X_IRQ_H */
#endif /* __ARCH_ARM_INCLUDE_LPC54XX_LPC546X_IRQ_H */
+3 -3
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@@ -22,8 +22,8 @@
* only indirectly through nuttx/irq.h
*/
#ifndef __ARCH_ARM_INCLUDE_MAX326_IRQ_H
#define __ARCH_ARM_INCLUDE_MAX326_IRQ_H
#ifndef __ARCH_ARM_INCLUDE_MAX326XX_IRQ_H
#define __ARCH_ARM_INCLUDE_MAX326XX_IRQ_H
/****************************************************************************
* Included Files
@@ -99,4 +99,4 @@ extern "C"
#endif
#endif
#endif /* __ARCH_ARM_INCLUDE_MAX326_IRQ_H */
#endif /* __ARCH_ARM_INCLUDE_MAX326XX_IRQ_H */
+3 -3
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@@ -22,8 +22,8 @@
* through nuttx/irq.h
*/
#ifndef __ARCH_ARM_INCLUDE_PHYPLUS_PHY62XX_IRQ_H
#define __ARCH_ARM_INCLUDE_PHYPLUS_PHY62XX_IRQ_H
#ifndef __ARCH_ARM_INCLUDE_PHY62XX_PHY62XX_IRQ_H
#define __ARCH_ARM_INCLUDE_PHY62XX_PHY62XX_IRQ_H
/****************************************************************************
* Included Files
@@ -101,4 +101,4 @@ extern "C"
#endif
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_ARM_INCLUDE_STM32F0L0G0_STM32F0_IRQ_H */
#endif /* __ARCH_ARM_INCLUDE_PHY62XX_PHY62XX_IRQ_H */
+3 -3
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@@ -22,8 +22,8 @@
* only indirectly through nuttx/irq.h
*/
#ifndef __ARCH_ARM_INCLUDE_SAMD5E5_SAM4L_IRQ_H
#define __ARCH_ARM_INCLUDE_SAMD5E5_SAM4L_IRQ_H
#ifndef __ARCH_ARM_INCLUDE_SAMD5E5_SAMD5E5_IRQ_H
#define __ARCH_ARM_INCLUDE_SAMD5E5_SAMD5E5_IRQ_H
/****************************************************************************
* Included Files
@@ -229,4 +229,4 @@ extern "C"
#endif
#endif
#endif /* __ARCH_ARM_INCLUDE_SAMD5E5_SAM4L_IRQ_H */
#endif /* __ARCH_ARM_INCLUDE_SAMD5E5_SAMD5E5_IRQ_H */
+3 -3
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@@ -18,8 +18,8 @@
*
****************************************************************************/
#ifndef __ARCH_ARM_INCLUDE_TIVA_CC13X2_CC26x2_IRQ_H
#define __ARCH_ARM_INCLUDE_TIVA_CC13X2_CC26x2_IRQ_H
#ifndef __ARCH_ARM_INCLUDE_TIVA_CC13X2_CC26X2_IRQ_H
#define __ARCH_ARM_INCLUDE_TIVA_CC13X2_CC26X2_IRQ_H
/****************************************************************************
* Included Files
@@ -128,4 +128,4 @@
#define NR_GPIO_IRQS (_NGPIOTIRQS - NR_IRQS)
#endif /* __ARCH_ARM_INCLUDE_TIVA_CC13X2_CC26x2_IRQ_H */
#endif /* __ARCH_ARM_INCLUDE_TIVA_CC13X2_CC26X2_IRQ_H */
+3 -3
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@@ -18,8 +18,8 @@
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_COMMON_ARM_H
#define __ARCH_ARM_SRC_COMMON_ARM_H
#ifndef __ARCH_ARM_SRC_ARM_ARM_H
#define __ARCH_ARM_SRC_ARM_ARM_H
/****************************************************************************
* Included Files
@@ -450,4 +450,4 @@ extern "C"
#endif
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_ARM_SRC_COMMON_ARM_H */
#endif /* __ARCH_ARM_SRC_ARM_ARM_H */
+3 -3
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@@ -18,8 +18,8 @@
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_COMMON_ARMV6_M_NVIC_H
#define __ARCH_ARM_SRC_COMMON_ARMV6_M_NVIC_H
#ifndef __ARCH_ARM_SRC_ARMV6_M_NVIC_H
#define __ARCH_ARM_SRC_ARMV6_M_NVIC_H
/****************************************************************************
* Included Files
@@ -388,4 +388,4 @@ void arm_dumpnvic(FAR const char *msg);
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_ARM_SRC_COMMON_ARMV6_M_NVIC_H */
#endif /* __ARCH_ARM_SRC_ARMV6_M_NVIC_H */
+3 -3
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@@ -18,8 +18,8 @@
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_COMMON_ARMV6_M_PSR_H
#define __ARCH_ARM_SRC_COMMON_ARMV6_M_PSR_H
#ifndef __ARCH_ARM_SRC_ARMV6_M_PSR_H
#define __ARCH_ARM_SRC_ARMV6_M_PSR_H
/****************************************************************************
* Included Files
@@ -59,4 +59,4 @@
* Inline Functions
****************************************************************************/
#endif /* __ARCH_ARM_SRC_COMMON_ARMV6_M_PSR_H */
#endif /* __ARCH_ARM_SRC_ARMV6_M_PSR_H */
+3 -3
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@@ -18,8 +18,8 @@
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_COMMON_ARMV7_A_BARRIERS_H
#define __ARCH_ARM_SRC_COMMON_ARMV7_A_BARRIERS_H
#ifndef __ARCH_ARM_SRC_ARMV7_A_BARRIERS_H
#define __ARCH_ARM_SRC_ARMV7_A_BARRIERS_H
/****************************************************************************
* Included Files
@@ -39,4 +39,4 @@
#define ARM_ISB() arm_isb(15)
#define ARM_DMB() arm_dmb(15)
#endif /* __ARCH_ARM_SRC_COMMON_ARMV7_A_BARRIERS_H */
#endif /* __ARCH_ARM_SRC_ARMV7_A_BARRIERS_H */
+3 -3
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@@ -18,8 +18,8 @@
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_COMMON_ARMV7_M_BARRIERS_H
#define __ARCH_ARM_SRC_COMMON_ARMV7_M_BARRIERS_H
#ifndef __ARCH_ARM_SRC_ARMV7_M_BARRIERS_H
#define __ARCH_ARM_SRC_ARMV7_M_BARRIERS_H
/****************************************************************************
* Included Files
@@ -39,4 +39,4 @@
#define ARM_ISB() arm_isb(15)
#define ARM_DMB() arm_dmb(15)
#endif /* __ARCH_ARM_SRC_COMMON_ARMV7_M_BARRIERS_H */
#endif /* __ARCH_ARM_SRC_ARMV7_M_BARRIERS_H */
+3 -3
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@@ -18,8 +18,8 @@
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_ARMV&-M_FPB_H
#define __ARCH_ARM_SRC_ARMV&-M_FPB_H
#ifndef __ARCH_ARM_SRC_ARMV7_M_FPB_H
#define __ARCH_ARM_SRC_ARMV7_M_FPB_H
/****************************************************************************
* Pre-processor Definitions
@@ -164,4 +164,4 @@
#define FPB_COMP0_ENABLE_SHIFT 0
# define FPB_COMP0_ENABLE 0x00000001
#endif /* __ARCH_ARM_SRC_ARMV&-M_FPB_H */
#endif /* __ARCH_ARM_SRC_ARMV7_M_FPB_H */
+3 -3
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@@ -18,8 +18,8 @@
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_ARMV7M_MPU_H
#define __ARCH_ARM_SRC_ARMV7M_MPU_H
#ifndef __ARCH_ARM_SRC_ARMV7_M_MPU_H
#define __ARCH_ARM_SRC_ARMV7_M_MPU_H
/****************************************************************************
* Included Files
@@ -473,4 +473,4 @@ void mpu_configure_region(uintptr_t base, size_t size,
#endif /* __ASSEMBLY__ */
#endif /* CONFIG_ARM_MPU */
#endif /* __ARCH_ARM_SRC_ARMV7M_MPU_H */
#endif /* __ARCH_ARM_SRC_ARMV7_M_MPU_H */
+3 -3
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@@ -18,8 +18,8 @@
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_COMMON_ARMV7_M_NVIC_H
#define __ARCH_ARM_SRC_COMMON_ARMV7_M_NVIC_H
#ifndef __ARCH_ARM_SRC_ARMV7_M_NVIC_H
#define __ARCH_ARM_SRC_ARMV7_M_NVIC_H
/****************************************************************************
* Included Files
@@ -778,4 +778,4 @@
* Public Function Prototypes
****************************************************************************/
#endif /* __ARCH_ARM_SRC_COMMON_ARMV7_M_NVIC_H */
#endif /* __ARCH_ARM_SRC_ARMV7_M_NVIC_H */
+3 -3
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@@ -18,8 +18,8 @@
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_COMMON_ARMV7_M_PSR_H
#define __ARCH_ARM_SRC_COMMON_ARMV7_M_PSR_H
#ifndef __ARCH_ARM_SRC_ARMV7_M_PSR_H
#define __ARCH_ARM_SRC_ARMV7_M_PSR_H
/****************************************************************************
* Included Files
@@ -69,4 +69,4 @@
* Inline Functions
****************************************************************************/
#endif /* __ARCH_ARM_SRC_COMMON_ARMV7_M_PSR_H */
#endif /* __ARCH_ARM_SRC_ARMV7_M_PSR_H */
+3 -3
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@@ -18,8 +18,8 @@
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_COMMON_ARMV7_M_RAM_VECTORS_H
#define __ARCH_ARM_SRC_COMMON_ARMV7_M_RAM_VECTORS_H
#ifndef __ARCH_ARM_SRC_ARMV7_M_RAM_VECTORS_H
#define __ARCH_ARM_SRC_ARMV7_M_RAM_VECTORS_H
/****************************************************************************
* Included Files
@@ -100,4 +100,4 @@ void exception_common(void);
int arm_ramvec_attach(int irq, up_vector_t vector);
#endif /* CONFIG_ARCH_RAMVECTORS */
#endif /* __ARCH_ARM_SRC_COMMON_ARMV7_M_RAM_VECTORS_H */
#endif /* __ARCH_ARM_SRC_ARMV7_M_RAM_VECTORS_H */
+3 -3
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@@ -25,8 +25,8 @@
* All rights reserved. ARM DDI 0406C.c (ID051414)
*/
#ifndef __ARCH_ARM_SRC_ARMV7_R_CPSR_H
#define __ARCH_ARM_SRC_ARMV7_R_CPSR_H
#ifndef __ARCH_ARM_SRC_ARMV7_R_ARM_H
#define __ARCH_ARM_SRC_ARMV7_R_ARM_H
/****************************************************************************
* Included Files
@@ -154,4 +154,4 @@ void arm_data_initialize(void);
#endif
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_ARM_SRC_ARMV7_R_CPSR_H */
#endif /* __ARCH_ARM_SRC_ARMV7_R_ARM_H */
+3 -3
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@@ -18,8 +18,8 @@
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_COMMON_ARMV7_R_BARRIERS_H
#define __ARCH_ARM_SRC_COMMON_ARMV7_R_BARRIERS_H
#ifndef __ARCH_ARM_SRC_ARMV7_R_BARRIERS_H
#define __ARCH_ARM_SRC_ARMV7_R_BARRIERS_H
/****************************************************************************
* Included Files
@@ -39,4 +39,4 @@
#define ARM_ISB() arm_isb(15)
#define ARM_DMB() arm_dmb(15)
#endif /* __ARCH_ARM_SRC_COMMON_ARMV7_R_BARRIERS_H */
#endif /* __ARCH_ARM_SRC_ARMV7_R_BARRIERS_H */
+3 -3
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@@ -18,8 +18,8 @@
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_ARMV7R_MPU_H
#define __ARCH_ARM_SRC_ARMV7R_MPU_H
#ifndef __ARCH_ARM_SRC_ARMV7_R_MPU_H
#define __ARCH_ARM_SRC_ARMV7_R_MPU_H
/****************************************************************************
* Included Files
@@ -845,4 +845,4 @@ static inline void mpu_user_intsram_wb(uintptr_t base, size_t size)
#endif
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_ARM_SRC_ARMV7R_MPU_H */
#endif /* __ARCH_ARM_SRC_ARMV7_R_MPU_H */
+3 -3
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@@ -18,8 +18,8 @@
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_COMMON_ARMV8_M_BARRIERS_H
#define __ARCH_ARM_SRC_COMMON_ARMV8_M_BARRIERS_H
#ifndef __ARCH_ARM_SRC_ARMV8_M_BARRIERS_H
#define __ARCH_ARM_SRC_ARMV8_M_BARRIERS_H
/****************************************************************************
* Included Files
@@ -39,4 +39,4 @@
#define ARM_ISB() arm_isb(15)
#define ARM_DMB() arm_dmb(15)
#endif /* __ARCH_ARM_SRC_COMMON_ARMV8_M_BARRIERS_H */
#endif /* __ARCH_ARM_SRC_ARMV8_M_BARRIERS_H */
+3 -3
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@@ -18,8 +18,8 @@
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_ARMV8-M_FPB_H
#define __ARCH_ARM_SRC_ARMV8-M_FPB_H
#ifndef __ARCH_ARM_SRC_ARMV8_M_FPB_H
#define __ARCH_ARM_SRC_ARMV8_M_FPB_H
/****************************************************************************
* Pre-processor Definitions
@@ -173,4 +173,4 @@
#define FPB_COMP0_ENABLE_SHIFT 0
# define FPB_COMP0_ENABLE 0x00000001
#endif /* __ARCH_ARM_SRC_ARMV8-M_FPB_H */
#endif /* __ARCH_ARM_SRC_ARMV8_M_FPB_H */
+3 -3
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@@ -18,8 +18,8 @@
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_ARMV8M_MPU_H
#define __ARCH_ARM_SRC_ARMV8M_MPU_H
#ifndef __ARCH_ARM_SRC_ARMV8_M_MPU_H
#define __ARCH_ARM_SRC_ARMV8_M_MPU_H
/****************************************************************************
* Included Files
@@ -436,4 +436,4 @@ void mpu_configure_region(uintptr_t base, size_t size,
#endif /* __ASSEMBLY__ */
#endif /* CONFIG_ARM_MPU */
#endif /* __ARCH_ARM_SRC_ARMV8M_MPU_H */
#endif /* __ARCH_ARM_SRC_ARMV8_M_MPU_H */
+3 -3
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@@ -18,8 +18,8 @@
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_COMMON_ARMV8_M_NVIC_H
#define __ARCH_ARM_SRC_COMMON_ARMV8_M_NVIC_H
#ifndef __ARCH_ARM_SRC_ARMV8_M_NVIC_H
#define __ARCH_ARM_SRC_ARMV8_M_NVIC_H
/****************************************************************************
* Included Files
@@ -896,4 +896,4 @@
* Public Function Prototypes
****************************************************************************/
#endif /* __ARCH_ARM_SRC_COMMON_ARMV8_M_NVIC_H */
#endif /* __ARCH_ARM_SRC_ARMV8_M_NVIC_H */
+3 -3
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@@ -18,8 +18,8 @@
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_COMMON_ARMV8_M_PSR_H
#define __ARCH_ARM_SRC_COMMON_ARMV8_M_PSR_H
#ifndef __ARCH_ARM_SRC_ARMV8_M_PSR_H
#define __ARCH_ARM_SRC_ARMV8_M_PSR_H
/****************************************************************************
* Included Files
@@ -117,4 +117,4 @@
* Inline Functions
****************************************************************************/
#endif /* __ARCH_ARM_SRC_COMMON_ARMV8_M_PSR_H */
#endif /* __ARCH_ARM_SRC_ARMV8_M_PSR_H */
+3 -3
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@@ -18,8 +18,8 @@
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_COMMON_ARMV8_M_RAM_VECTORS_H
#define __ARCH_ARM_SRC_COMMON_ARMV8_M_RAM_VECTORS_H
#ifndef __ARCH_ARM_SRC_ARMV8_M_RAM_VECTORS_H
#define __ARCH_ARM_SRC_ARMV8_M_RAM_VECTORS_H
/****************************************************************************
* Included Files
@@ -100,4 +100,4 @@ void exception_common(void);
int arm_ramvec_attach(int irq, up_vector_t vector);
#endif /* CONFIG_ARCH_RAMVECTORS */
#endif /* __ARCH_ARM_SRC_COMMON_ARMV8_M_RAM_VECTORS_H */
#endif /* __ARCH_ARM_SRC_ARMV8_M_RAM_VECTORS_H */
+3 -3
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@@ -18,8 +18,8 @@
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_ARMV8M_SAU_H
#define __ARCH_ARM_SRC_ARMV8M_SAU_H
#ifndef __ARCH_ARM_SRC_ARMV8_M_SAU_H
#define __ARCH_ARM_SRC_ARMV8_M_SAU_H
/****************************************************************************
* Included Files
@@ -188,4 +188,4 @@ void sau_configure_region(uintptr_t base, size_t size, uint32_t flags);
#endif
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_ARM_SRC_ARMV8M_SAU_H */
#endif /* __ARCH_ARM_SRC_ARMV8_M_SAU_H */
+3 -3
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@@ -18,8 +18,8 @@
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_CXD56_CXD56_I2C_BITBANG_H
#define __ARCH_ARM_SRC_CXD56_CXD56_I2C_BITBANG_H
#ifndef __ARCH_ARM_SRC_CXD56XX_CXD56_I2C_BITBANG_H
#define __ARCH_ARM_SRC_CXD56XX_CXD56_I2C_BITBANG_H
/****************************************************************************
* Included Files
@@ -48,4 +48,4 @@ struct i2c_master_s *cxd56_i2c_bitbang_initialize(uint32_t sda_pin,
}
#endif
#endif /* __ARCH_ARM_SRC_CXD56_CXD56_I2C_BITBANG_H */
#endif /* __ARCH_ARM_SRC_CXD56XX_CXD56_I2C_BITBANG_H */
+2 -2
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@@ -18,8 +18,8 @@
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_CXD56XX_CXD56_GE2D_H
#define __ARCH_ARM_SRC_CXD56XX_CXD56_GE2D_H
#ifndef __ARCH_ARM_SRC_CXD56XX_HARDWARE_CXD56_GE2D_H
#define __ARCH_ARM_SRC_CXD56XX_HARDWARE_CXD56_GE2D_H
/****************************************************************************
* Included Files
+3 -3
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@@ -18,8 +18,8 @@
*
****************************************************************************/
#ifndef __ARCH_ARM_EFM32_EFM32_SPI_H
#define __ARCH_ARM_EFM32_EFM32_SPI_H
#ifndef __ARCH_ARM_SRC_EFM32_EFM32_SPI_H
#define __ARCH_ARM_SRC_EFM32_EFM32_SPI_H
/****************************************************************************
* Included Files
@@ -108,4 +108,4 @@ int efm32_spi2_cmddata(struct spi_dev_s *dev, uint32_t devid,
bool cmd);
#endif
#endif /* __ARCH_ARM_EFM32_EFM32_SPI_H */
#endif /* __ARCH_ARM_SRC_EFM32_EFM32_SPI_H */
+3 -3
View File
@@ -18,8 +18,8 @@
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_EFM32_EFM32_OTGFS_H
#define __ARCH_ARM_SRC_EFM32_EFM32_OTGFS_H
#ifndef __ARCH_ARM_SRC_EFM32_EFM32_USB_H
#define __ARCH_ARM_SRC_EFM32_EFM32_USB_H
/****************************************************************************
* Included Files
@@ -200,4 +200,4 @@ void efm32_usbsuspend(FAR struct usbdev_s *dev, bool resume);
#endif /* __ASSEMBLY__ */
#endif /* CONFIG_EFM32_OTGFS */
#endif /* __ARCH_ARM_SRC_EFM32_EFM32_OTGFS_H */
#endif /* __ARCH_ARM_SRC_EFM32_EFM32_USB_H */
+3 -3
View File
@@ -58,8 +58,8 @@
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_EFM32_CHIP_EFM32_ACMP_H
#define __ARCH_ARM_SRC_EFM32_CHIP_EFM32_ACMP_H
#ifndef __ARCH_ARM_SRC_EFM32_HARDWARE_EFM32_ACMP_H
#define __ARCH_ARM_SRC_EFM32_HARDWARE_EFM32_ACMP_H
/****************************************************************************
* Included Files
@@ -400,4 +400,4 @@
#define ACMP_ROUTE_LOCATION_LOC1 (_ACMP_ROUTE_LOCATION_LOC1 << 8) /* Shifted mode LOC1 for ACMP_ROUTE */
#define ACMP_ROUTE_LOCATION_LOC2 (_ACMP_ROUTE_LOCATION_LOC2 << 8) /* Shifted mode LOC2 for ACMP_ROUTE */
#endif /* __ARCH_ARM_SRC_EFM32_CHIP_EFM32_ACMP_H */
#endif /* __ARCH_ARM_SRC_EFM32_HARDWARE_EFM32_ACMP_H */
+3 -3
View File
@@ -58,8 +58,8 @@
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_EFM32_CHIP_EFM32_ADC_H
#define __ARCH_ARM_SRC_EFM32_CHIP_EFM32_ADC_H
#ifndef __ARCH_ARM_SRC_EFM32_HARDWARE_EFM32_ADC_H
#define __ARCH_ARM_SRC_EFM32_HARDWARE_EFM32_ADC_H
/****************************************************************************
* Included Files
@@ -749,4 +749,4 @@
#define _ADC_BIASPROG_COMPBIAS_DEFAULT 0x00000007UL /* Mode DEFAULT for ADC_BIASPROG */
#define ADC_BIASPROG_COMPBIAS_DEFAULT (_ADC_BIASPROG_COMPBIAS_DEFAULT << 8) /* Shifted mode DEFAULT for ADC_BIASPROG */
#endif /* __ARCH_ARM_SRC_EFM32_CHIP_EFM32_ADC_H */
#endif /* __ARCH_ARM_SRC_EFM32_HARDWARE_EFM32_ADC_H */
+3 -3
View File
@@ -58,8 +58,8 @@
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_EFM32_CHIP_EFM32_AES_H_
#define __ARCH_ARM_SRC_EFM32_CHIP_EFM32_AES_H_
#ifndef __ARCH_ARM_SRC_EFM32_HARDWARE_EFM32_AES_H_
#define __ARCH_ARM_SRC_EFM32_HARDWARE_EFM32_AES_H_
/****************************************************************************
* Included Files
@@ -325,4 +325,4 @@
#define _AES_KEYHD_KEYHD_DEFAULT 0x00000000UL /* Mode DEFAULT for AES_KEYHD */
#define AES_KEYHD_KEYHD_DEFAULT (_AES_KEYHD_KEYHD_DEFAULT << 0) /* Shifted mode DEFAULT for AES_KEYHD */
#endif /* __ARCH_ARM_SRC_EFM32_CHIP_EFM32_AES_H_ */
#endif /* __ARCH_ARM_SRC_EFM32_HARDWARE_EFM32_AES_H_ */
+3 -3
View File
@@ -58,8 +58,8 @@
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_EFM32_CHIP_EFM32_BURTC_H
#define __ARCH_ARM_SRC_EFM32_CHIP_EFM32_BURTC_H
#ifndef __ARCH_ARM_SRC_EFM32_HARDWARE_EFM32_BURTC_H
#define __ARCH_ARM_SRC_EFM32_HARDWARE_EFM32_BURTC_H
/****************************************************************************
* Included Files
@@ -468,4 +468,4 @@
#define _BURTC_RET_REG_REG_DEFAULT 0x00000000UL /* Mode DEFAULT for BURTC_RET_REG */
#define BURTC_RET_REG_REG_DEFAULT (_BURTC_RET_REG_REG_DEFAULT << 0) /* Shifted mode DEFAULT for BURTC_RET_REG */
#endif /* __ARCH_ARM_SRC_EFM32_CHIP_EFM32_BURTC_H */
#endif /* __ARCH_ARM_SRC_EFM32_HARDWARE_EFM32_BURTC_H */
@@ -58,8 +58,8 @@
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_EFM32_CHIP_EFM32_CALIBRATE_H
#define __ARCH_ARM_SRC_EFM32_CHIP_EFM32_CALIBRATE_H
#ifndef __ARCH_ARM_SRC_EFM32_HARDWARE_EFM32_CALIBRATE_H
#define __ARCH_ARM_SRC_EFM32_HARDWARE_EFM32_CALIBRATE_H
/****************************************************************************
* Included Files
@@ -90,4 +90,4 @@ struct efm32_calibrate_s
const uint32_t value; /* Default value for calibration register */
};
#endif /* __ARCH_ARM_SRC_EFM32_CHIP_EFM32_CALIBRATE_H */
#endif /* __ARCH_ARM_SRC_EFM32_HARDWARE_EFM32_CALIBRATE_H */
+3 -3
View File
@@ -58,8 +58,8 @@
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_EFM32_CHIP_EFM32_CMU_H
#define __ARCH_ARM_SRC_EFM32_CHIP_EFM32_CMU_H
#ifndef __ARCH_ARM_SRC_EFM32_HARDWARE_EFM32_CMU_H
#define __ARCH_ARM_SRC_EFM32_HARDWARE_EFM32_CMU_H
/****************************************************************************
* Included Files
@@ -1653,4 +1653,4 @@
#define CMU_LOCK_LOCKKEY_LOCKED (_CMU_LOCK_LOCKKEY_LOCKED << 0) /* Shifted mode LOCKED for CMU_LOCK */
#define CMU_LOCK_LOCKKEY_UNLOCK (_CMU_LOCK_LOCKKEY_UNLOCK << 0) /* Shifted mode UNLOCK for CMU_LOCK */
#endif /* __ARCH_ARM_SRC_EFM32_CHIP_EFM32_CMU_H */
#endif /* __ARCH_ARM_SRC_EFM32_HARDWARE_EFM32_CMU_H */
+3 -3
View File
@@ -58,8 +58,8 @@
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_EFM32_CHIP_EFM32_DAC_H
#define __ARCH_ARM_SRC_EFM32_CHIP_EFM32_DAC_H
#ifndef __ARCH_ARM_SRC_EFM32_HARDWARE_EFM32_DAC_H
#define __ARCH_ARM_SRC_EFM32_HARDWARE_EFM32_DAC_H
/****************************************************************************
* Included Files
@@ -881,4 +881,4 @@
#define DAC_OPA2MUX_RESSEL_RES6 (_DAC_OPA2MUX_RESSEL_RES6 << 28) /* Shifted mode RES6 for DAC_OPA2MUX */
#define DAC_OPA2MUX_RESSEL_RES7 (_DAC_OPA2MUX_RESSEL_RES7 << 28) /* Shifted mode RES7 for DAC_OPA2MUX */
#endif /* __ARCH_ARM_SRC_EFM32_CHIP_EFM32_DAC_H */
#endif /* __ARCH_ARM_SRC_EFM32_HARDWARE_EFM32_DAC_H */
+3 -3
View File
@@ -58,8 +58,8 @@
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_EFM32_CHIP_EFM32_DEVINFO_H
#define __ARCH_ARM_SRC_EFM32_CHIP_EFM32_DEVINFO_H
#ifndef __ARCH_ARM_SRC_EFM32_HARDWARE_EFM32_DEVINFO_H
#define __ARCH_ARM_SRC_EFM32_HARDWARE_EFM32_DEVINFO_H
/****************************************************************************
* Included Files
@@ -224,4 +224,4 @@
* Public Type Definitions
****************************************************************************/
#endif /* __ARCH_ARM_SRC_EFM32_CHIP_EFM32_DEVINFO_H */
#endif /* __ARCH_ARM_SRC_EFM32_HARDWARE_EFM32_DEVINFO_H */
+3 -3
View File
@@ -58,8 +58,8 @@
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_EFM32_CHIP_EFM32_DMA_H
#define __ARCH_ARM_SRC_EFM32_CHIP_EFM32_DMA_H
#ifndef __ARCH_ARM_SRC_EFM32_HARDWARE_EFM32_DMA_H
#define __ARCH_ARM_SRC_EFM32_HARDWARE_EFM32_DMA_H
/****************************************************************************
* Included Files
@@ -2285,4 +2285,4 @@ struct dma_descriptor_s
volatile uint32_t user; /* DMA padding register, available for user */
};
#endif /* __ARCH_ARM_SRC_EFM32_CHIP_EFM32_DMA_H */
#endif /* __ARCH_ARM_SRC_EFM32_HARDWARE_EFM32_DMA_H */
+3 -3
View File
@@ -58,8 +58,8 @@
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_EFM32_CHIP_EFM32_EMU_H
#define __ARCH_ARM_SRC_EFM32_CHIP_EFM32_EMU_H
#ifndef __ARCH_ARM_SRC_EFM32_HARDWARE_EFM32_EMU_H
#define __ARCH_ARM_SRC_EFM32_HARDWARE_EFM32_EMU_H
/****************************************************************************
* Included Files
@@ -440,4 +440,4 @@
#define _EMU_BUBODUNREGCAL_RANGE_DEFAULT 0x00000001UL /* Mode DEFAULT for EMU_BUBODUNREGCAL */
#define EMU_BUBODUNREGCAL_RANGE_DEFAULT (_EMU_BUBODUNREGCAL_RANGE_DEFAULT << 3) /* Shifted mode DEFAULT for EMU_BUBODUNREGCAL */
#endif /* __ARCH_ARM_SRC_EFM32_CHIP_EFM32_EMU_H */
#endif /* __ARCH_ARM_SRC_EFM32_HARDWARE_EFM32_EMU_H */
+3 -3
View File
@@ -18,8 +18,8 @@
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_EFM32_CHIP_EFM32_FLASH_H
#define __ARCH_ARM_SRC_EFM32_CHIP_EFM32_FLASH_H
#ifndef __ARCH_ARM_SRC_EFM32_HARDWARE_EFM32_FLASH_H
#define __ARCH_ARM_SRC_EFM32_HARDWARE_EFM32_FLASH_H
/****************************************************************************
* Pre-processor Definitions
@@ -39,4 +39,4 @@
# define EFM32_FLASH_PAGESIZE 512
#endif
#endif /* __ARCH_ARM_SRC_EFM32_CHIP_EFM32_FLASH_H */
#endif /* __ARCH_ARM_SRC_EFM32_HARDWARE_EFM32_FLASH_H */
+3 -3
View File
@@ -58,8 +58,8 @@
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_EFM32_CHIP_EFM32_GPIO_H
#define __ARCH_ARM_SRC_EFM32_CHIP_EFM32_GPIO_H
#ifndef __ARCH_ARM_SRC_EFM32_HARDWARE_EFM32_GPIO_H
#define __ARCH_ARM_SRC_EFM32_HARDWARE_EFM32_GPIO_H
/****************************************************************************
* Included Files
@@ -1483,4 +1483,4 @@
#define GPIO_EM4WUCAUSE_EM4WUCAUSE_F2 (_GPIO_EM4WUCAUSE_EM4WUCAUSE_F2 << 0) /* Shifted mode F2 for GPIO_EM4WUCAUSE */
#define GPIO_EM4WUCAUSE_EM4WUCAUSE_E13 (_GPIO_EM4WUCAUSE_EM4WUCAUSE_E13 << 0) /* Shifted mode E13 for GPIO_EM4WUCAUSE */
#endif /* __ARCH_ARM_SRC_EFM32_CHIP_EFM32_GPIO_H */
#endif /* __ARCH_ARM_SRC_EFM32_HARDWARE_EFM32_GPIO_H */

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