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SAMA5D3 Xplained: Has no NOR flash. Remove all NOR support from board configuration

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This commit is contained in:
Gregory Nutt
2014-03-29 15:05:09 -06:00
parent 09fb2a1893
commit 8bc70e38ab
21 changed files with 30 additions and 1994 deletions
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arch/arm/src/sama5/Kconfig
-1
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@@ -3513,7 +3513,6 @@ config SAMA5_BOOT_ISRAM
config SAMA5_BOOT_SDRAM
bool "Running from external SDRAM"
depends on SAMA5_DDRCS
config SAMA5_BOOT_CS0FLASH
bool "Running in external FLASH CS0"
arch/arm/src/sama5/sam_boot.c
+3 -2
View File
@@ -140,13 +140,14 @@ static const struct section_mapping_s section_mapping[] =
* I have found that in the test environments that I use, I cannot always
* be assured of that physical address mapping.
*
* So we do both here. If we are exectuing from FLASH, then we provide
* So we do both here. If we are executing from FLASH, then we provide
* the MMU to map the physical address of FLASH to address 0x0000:0000;
* if we are executing from the internal SRAM, then we trust the bootload
* to setup the AXI MATRIX mapping.
*/
#if defined(CONFIG_ARCH_LOWVECTORS) && !defined(CONFIG_SAMA5_BOOT_ISRAM)
#if defined(CONFIG_ARCH_LOWVECTORS) && !defined(CONFIG_SAMA5_BOOT_ISRAM) && \
!defined(CONFIG_SAMA5_BOOT_SDRAM)
{ CONFIG_FLASH_VSTART, 0x00000000,
MMU_ROMFLAGS, 1
},
configs/sama5d3-xplained/Kconfig
-20
View File
@@ -22,26 +22,6 @@ config SAMA5D3XPLAINED_MT47H64M16HR
endchoice # SAMA5D3-Xplained DRAM Type
config SAMA5D3XPLAINED_NOR_MAIN
bool "Build nor_main"
default n
depends on SAMA5_BOOT_ISRAM
---help---
nor_main is a tiny program that runs in ISRAM. nor_main will enable
NOR flash then either (1) jump to the program in NOR flash or (2)
wait for you to break in with GDB to debug the NOR program.
config SAMA5D3XPLAINED_NOR_START
bool "Start NOR program"
default n
depends on SAMA5D3XPLAINED_NOR_MAIN
---help---
The default behavior of the NOR boot program is to initialize the
NOR FLASH at CS0, then patiently wait for you to break into the
program with GDB. An alternative behvior is enabled with this
option: If SAMA5D3XPLAINED_NOR_START is defined, then it will not wait but
will, instead, immediately start the program in NOR FLASH.
config SAMA5D3XPLAINED_NAND_AUTOMOUNT
bool "NAND FLASH auto-mount"
default n
configs/sama5d3-xplained/README.txt
+12 -203
View File
@@ -58,7 +58,6 @@ Contents
- NXFLAT Toolchain
- Loading Code into SRAM with J-Link
- Writing to FLASH using SAM-BA
- Creating and Using NORBOOT
- Buttons and LEDs
- Serial Console
- Networking
@@ -324,105 +323,6 @@ Writing to FLASH using SAM-BA
re-open the terminal emulator program.
10. Power cycle the board.
Creating and Using NORBOOT
==========================
In order to have more control of debugging code that runs out of NOR FLASH,
I created the sama5d3-xplained/norboot configuration. That configuration is
described below under "Configurations."
Here are some general instructions on how to build an use norboot:
Building:
1. Remove any old configurations (if applicable).
cd <nuttx>
make distclean
2. Install and build the norboot configuration. This steps will establish
the norboot configuration and setup the PATH variable in order to do
the build:
cd tools
./configure.sh sama5d3-xplained/<subdir>
cd -
. ./setenv.sh
Before sourcing the setenv.sh file above, you should examine it and
perform edits as necessary so that TOOLCHAIN_BIN is the correct path
to the directory than holds your toolchain binaries.
NOTE: Be aware that the default norboot also disables the watchdog.
Since you will not be able to re-enable the watchdog later, you may
need to set CONFIG_SAMA5_WDT=y in the NuttX configuration file.
Then make norboot:
make
This will result in an ELF binary called 'nuttx' and also HEX and
binary versions called 'nuttx.hex' and 'nuttx.bin'.
3. Rename the binaries. Since you will need two versions of NuttX: this
norboot version that runs in internal SRAM and another under test in
NOR FLASH, I rename the resulting binary files so that they can be
distinguished:
mv nuttx norboot
mv nuttx.hex norboot.hex
mv nuttx.bin norboot.bin
4. Build your NOR configuration and write this into NOR FLASH. Here, for
example, is how you would create the NSH NOR configuration:
cd <nuttx>
make distclean # Remove the norboot configuration
cd tools
./configure.sh sama5d3-xplained/nsh # Establish the NSH configuration
cd -
make # Build the NSH configuration
Then use SAM-BA to write the nuttx.bin binary into NOR FLASH. This
will involve holding the CS_BOOT button and power cycling to start
the ROM loader. The SAM-BA serial connection will be on the device
USB port, not the debug USB port. Follow the SAM-BA instruction to
write the nuttx.bin binary to NOR FLASH.
5. Restart the system without holding CS_BOOT to get back to the normal
debug setup.
6. Then start the J-Link GDB server and GDB. In GDB, I do the following:
(gdb) mon reset # Reset and halt the CPU
(gdb) load norboot # Load norboot into internal SRAM
(gdb) mon go # Start norboot
(gdb) mon halt # Break in
(gdb) mon reg pc = 0x10000040 # Set the PC to NOR flash entry point
(gdb) mon go # And jump into NOR flash
The norboot program can also be configured to jump directly into
NOR FLASH without requiring the final halt and go by setting
CONFIG_SAMA5D3XPLAINED_NOR_START=y in the NuttX configuration. However,
since I have been debugging the early boot sequence, the above
sequence has been most convenient for me since it allows me to
step into the program in NOR.
7. An option is to use the SAM-BA tool to write the NORBOOT image into
Serial FLASH. Then, the system will boot from Serial FLASH by
copying the NORBOOT image in SRAM which will run and then start the
image in NOR FLASH automatically. This is a very convenient usage!
NOTES: (1) There is jumper on the CM module that must be closed to
enable use of the AT25 Serial Flash. (2) If using SAM-BA, make sure
that you load the NOR boot program into the boot area via the pull-
down menu.
STATUS:
2014-7-30: I have been unable to execute these configurations from NOR
FLASH by closing the BMS jumper (J9). As far as I can tell, this
jumper does nothing on my board??? So I have been using the norboot
configuration exclusively to start the program-under-test in NOR FLASH.
Buttons and LEDs
================
@@ -1203,37 +1103,6 @@ USB High-Speed Host
serial console. However, the debug output will be asynchronous with the
trace output and, hence, difficult to interpret.
NOR FLASH Support
=================
Most of these configurations execute out of CS0 NOR flash and can only be
loaded via SAM-BA. These are the relevant configuration options the
define the NOR FLASH configuration:
CONFIG_SAMA5_BOOT_CS0FLASH=y : Boot from FLASH on CS0
CONFIG_BOOT_RUNFROMFLASH=y : Run in place on FLASH (vs copying to RAM)
CONFIG_SAMA5_EBICS0=y : Enable CS0 external memory
CONFIG_SAMA5_EBICS0_SIZE=134217728 : Memory size is 128KB
CONFIG_SAMA5_EBICS0_NOR=y : Memory type is NOR FLASH
CONFIG_FLASH_START=0x10000000 : Physical FLASH start address
CONFIG_FLASH_VSTART=0x10000000 : Virtual FLASH start address
CONFIG_FLASH_SIZE=134217728 : FLASH size (again)
CONFIG_RAM_START=0x00300400 : Data stored after page table
CONFIG_RAM_VSTART=0x00300400
CONFIG_RAM_SIZE=114688 : Available size of 128KB - 16KB for page table
NOTE: In order to boot in this configuration, you need to close the BMS
jumper.
STATUS: I have been unable to execute these configurations from NOR FLASH
by closing the BMS jumper (J9). As far as I can tell, this jumper does
nothing on my board??? So I have been using the norboot configuration
exclusively to start the program-under-test in NOR FLASH (see the section
entitled "Creating and Using NORBOOT" above.)
SDRAM Support
=============
@@ -1392,18 +1261,7 @@ NAND Support
entering any data on the DBG serial port. I have not tried this.
Instead, I just changed to boot from Serial Flash:
2. Booting from Serial Flash. The work around for this case is to put
the NORBOOT image into Serial FLASH. Then, the system will boot from
Serial FLASH by copying the NORBOOT image in SRAM which will run and
then start the image in NOR FLASH. See the discussion of the NORBOOT
configuration in the "Creating and Using NORBOOT" section above.
NOTE that there is jumper on the CM module that must be closed to enable
use of the AT25 Serial Flash. Also, if you are using using SAM-BA,
make sure that you load the NOR boot program into the boot area via
the pull-down menu.
3. Unfortunately, there are no appropriate NAND file system in NuttX as
2. Unfortunately, there are no appropriate NAND file system in NuttX as
of this writing. The following sections discussion issues/problems
with using NXFFS and FAT.
@@ -2085,10 +1943,6 @@ Watchdog Timer
the WDT, we cannot disable the watchdog time if CONFIG_SAMA5_WDT=y. So,
be forewarned: You have only 16 seconds to run your watchdog timer test!
NOTE: If you are using the norboot program to run from FLASH as I did,
beware that the default version also disables the watchdog. You will
need a special version of norboot with CONFIG_SAMA5_WDT=y.
TRNG and /dev/random
====================
@@ -2457,11 +2311,6 @@ Configurations
Summary: Some of the descriptions below are long and wordy. Here is the
concise summary of the available SAMA5D3-Xplained configurations:
norboot:
This is a little program to help debug of code in NOR flash. I wrote
it because I don't yet understand how to get the SAMA5 to boot from
NOR FLASH. See the description below and the section above entitled
"Creating and Using NORBOOT" for more information
nsh: This is another NSH configuration, not too different from the
demo configuration. The nsh configuration is, however, bare bones.
It is the simplest possible NSH configuration and is useful as a
@@ -2472,39 +2321,6 @@ Configurations
Now for the gory details:
norboot:
This is a little program to help debug of code in NOR flash. It
does the following:
- It enables and configures NOR FLASH, then
- Waits for you to break in with GDB.
At that point, you can set the PC and begin executing from NOR FLASH
under debug control. See the section entitled "Creating and Using
NORBOOT" above.
NOTES:
1. This program derives from the hello configuration. All of the
notes there apply to this configuration as well.
2. The default norboot program initializes the NOR memory,
displays a message and halts. The norboot program can also be
configured to jump directly into NOR FLASH without requiring the
final halt and go by setting CONFIG_SAMA5D3XPLAINED_NOR_START=y in the
NuttX configuration.
3. Be aware that the default norboot also disables the watchdog.
Since you will not be able to re-enable the watchdog later, you may
need to set CONFIG_SAMA5_WDT=y in the NuttX configuration file.
4. If you put norboot on the Serial FLASH, you can automatically
boot to NOR on reset. See the section "Creating and Using NORBOOT"
above.
STATUS:
See the To-Do list below
nsh:
This configuration directory provide the NuttShell (NSH). There are
@@ -2536,9 +2352,8 @@ Configurations
the warning in the section "Information Common to All Configurations"
for further information.
3. This configuration executes out of CS0 NOR flash and can only
be loaded via SAM-BA. The are the relevant configuration options
are provided above in the section entitled "NOR FLASH Support".
3. This configuration executes out of NAND flash and can only
be loaded via BareBox.
4. This configuration has support for NSH built-in applications enabled.
However, no built-in applications are selected in the base configuration.
@@ -2610,22 +2425,16 @@ To-Do List
1) Currently the SAMA5Dx is running at 396MHz in these configurations. This
is because the timing for the PLLs, NOR FLASH, and SDRAM came from the
Atmel NoOS sample code which runs at that rate. The SAMA5Dx is capable
of running at 528MHz, however. The setup for that configuration exists
in the Bareboard assembly language setup and should be incorporated.
of running at 536MHz, however. The setup for that configuration exists
in the BareBox assembly language setup and should be incorporated.
2) Most of these configurations execute from NOR FLASH. I have been unable
to execute these configurations from NOR FLASH by closing the BMS jumper
(J9). As far as I can tell, this jumper does nothing on my board??? I
have been using the norboot configuration to start the program in NOR
FLASH (see just above). See "Creating and Using NORBOOT" above.
3) Neither USB OHCI nor EHCI support Isochronous endpoints. Interrupt
2) Neither USB OHCI nor EHCI support Isochronous endpoints. Interrupt
endpoint support in the EHCI driver is untested (but works in similar
EHCI drivers).
4) HSCMI TX DMA support is currently commented out.
3) HSCMI TX DMA support is currently commented out.
5) I believe that there is an issue when the internal AT25 FLASH is
4) I believe that there is an issue when the internal AT25 FLASH is
formatted by NuttX. That format works fine with Linux, but does not
appear to work with Windows. Reformatting on Windows can resolve this.
NOTE: This is not a SAMA5Dx issue.
@@ -2634,20 +2443,20 @@ To-Do List
formatting function (mkfatfs). It is likely that these fixes will
eliminate this issue, but that has not yet been verified.
6) CAN testing has not yet been performed due to issues with cabling. I
5) CAN testing has not yet been performed due to issues with cabling. I
just do not have a good test bed (or sufficient CAN knowledge) for
good CAN testing.
7) The NxWM example does not work well. This example was designed to work
6) The NxWM example does not work well. This example was designed to work
with much smaller displays and does not look good or work well with the
SAMA5D3-Xplained's 800x480 display. See above for details.
8) I have a Camera, but there is still no ISI driver. I am not sure what to
7) I have a Camera, but there is still no ISI driver. I am not sure what to
do with the camera. NuttX needs something like V4L to provide the
definition for what a camera driver is supposed to do.
I will probably develop a test harness for ISI, but it is of only
minimal value with no OS infrastructure to deal with images and video.
9) GMAC has only been tested on a 10/100Base-T network. I don't have a
8) GMAC has only been tested on a 10/100Base-T network. I don't have a
1000Base-T network to support additional testing.
configs/sama5d3-xplained/norboot/Make.defs
-146
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@@ -1,146 +0,0 @@
############################################################################
# configs/sama5d3-xplained/norboot/Make.defs
#
# Copyright (C) 2014-2014 Gregory Nutt. All rights reserved.
# Author: Gregory Nutt <gnutt@nuttx.org>
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# 1. Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in
# the documentation and/or other materials provided with the
# distribution.
# 3. Neither the name NuttX nor the names of its contributors may be
# used to endorse or promote products derived from this software
# without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
############################################################################
include ${TOPDIR}/.config
include ${TOPDIR}/tools/Config.mk
include ${TOPDIR}$(DELIM)arch$(DELIM)arm$(DELIM)src$(DELIM)armv7-a$(DELIM)Toolchain.defs
ifeq ($(CONFIG_SAMA5_BOOT_ISRAM),y)
LDSCRIPT = isram.ld
endif
ifeq ($(CONFIG_SAMA5_BOOT_SDRAM),y)
LDSCRIPT = ddram.ld
endif
ifeq ($(CONFIG_SAMA5_BOOT_CS0FLASH),y)
ifeq ($(CONFIG_BOOT_SDRAM_DATA),y)
LDSCRIPT = nor-ddram.ld
else
LDSCRIPT = nor-isram.ld
endif
endif
ifeq ($(CONFIG_SAMA5_BOOT_CS1FLASH),y)
# LDSCRIPT = cs1flash.ld
endif
ifeq ($(CONFIG_SAMA5_BOOT_CS2FLASH),y)
# LDSCRIPT = cs2flash.ld
endif
ifeq ($(CONFIG_SAMA5_BOOT_CS3FLASH),y)
# LDSCRIPT = cs3flash.ld
endif
ifeq ($(WINTOOL),y)
# Windows-native toolchains
ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include}"
ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include}" -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include$(DELIM)cxx}"
ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)$(LDSCRIPT)}"
else
# Linux/Cygwin-native toolchain
ARCHINCLUDES = -I. -isystem $(TOPDIR)$(DELIM)include
ARCHXXINCLUDES = -I. -isystem $(TOPDIR)$(DELIM)include -isystem $(TOPDIR)$(DELIM)include$(DELIM)cxx
ARCHSCRIPT = -T$(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)$(LDSCRIPT)
endif
CC = $(CROSSDEV)gcc
CXX = $(CROSSDEV)g++
CPP = $(CROSSDEV)gcc -E
LD = $(CROSSDEV)ld
AR = $(ARCROSSDEV)ar rcs
NM = $(ARCROSSDEV)nm
OBJCOPY = $(CROSSDEV)objcopy
OBJDUMP = $(CROSSDEV)objdump
ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
ARCHOPTIMIZATION = -g
endif
ifneq ($(CONFIG_DEBUG_NOOPT),y)
ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
endif
ARCHCPUFLAGS = -mcpu=cortex-a5 -mfpu=vfpv4-d16
ARCHCFLAGS = -fno-builtin
ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow
ARCHWARNINGSXX = -Wall -Wshadow
ARCHDEFINES =
ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES)
AFLAGS = $(CFLAGS) -D__ASSEMBLY__
NXFLATLDFLAGS1 = -r -d -warn-common
NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -no-check-sections
LDNXFLATFLAGS = -e main -s 2048
OBJEXT = .o
LIBEXT = .a
EXEEXT =
ifneq ($(CROSSDEV),arm-nuttx-elf-)
LDFLAGS += -nostartfiles -nodefaultlibs
endif
ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
LDFLAGS += -g
endif
HOSTCC = gcc
HOSTINCLUDES = -I.
HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -g -pipe
HOSTLDFLAGS =
ifeq ($(CONFIG_HOST_WINDOWS),y)
HOSTEXEEXT = .exe
else
HOSTEXEEXT =
endif
ifeq ($(WINTOOL),y)
# Windows-native host tools
DIRLINK = $(TOPDIR)$(DELIM)tools$(DELIM)copydir.sh
DIRUNLINK = $(TOPDIR)$(DELIM)tools$(DELIM)unlink.sh
MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mknulldeps.sh
else
# Linux/Cygwin-native host tools
MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mkdeps$(HOSTEXEEXT)
endif
configs/sama5d3-xplained/norboot/defconfig
-736
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File diff suppressed because it is too large Load Diff
configs/sama5d3-xplained/norboot/setenv.sh
-76
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@@ -1,76 +0,0 @@
#!/bin/bash
# configs/sama5d3-xplained/norboot/setenv.sh
#
# Copyright (C) 2014 Gregory Nutt. All rights reserved.
# Author: Gregory Nutt <gnutt@nuttx.org>
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# 1. Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in
# the documentation and/or other materials provided with the
# distribution.
# 3. Neither the name NuttX nor the names of its contributors may be
# used to endorse or promote products derived from this software
# without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
if [ "$_" = "$0" ] ; then
echo "You must source this script, not run it!" 1>&2
exit 1
fi
WD=`pwd`
if [ ! -x "setenv.sh" ]; then
echo "This script must be executed from the top-level NuttX build directory"
exit 1
fi
if [ -z "${PATH_ORIG}" ]; then
export PATH_ORIG="${PATH}"
fi
# This is the Cygwin path to the location where I installed the Atmel GCC
# toolchain under Windows. You will also have to edit this if you install
# this toolchain in any other location
#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atmel/Atmel Toolchain/ARM GCC/Native/4.7.3.99/arm-gnu-toolchain/bin"
# This is the Cygwin path to the location where I installed the CodeSourcery
# toolchain under windows. You will also have to edit this if you install
# the CodeSourcery toolchain in any other location
#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin"
export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin"
# These are the Cygwin paths to the locations where I installed the Atollic
# toolchain under windows. You will also have to edit this if you install
# the Atollic toolchain in any other location. /usr/bin is added before
# the Atollic bin path because there is are binaries named gcc.exe and g++.exe
# at those locations as well.
#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin"
#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin"
# This is the Cygwin path to the location where I build the buildroot
# toolchain.
#export TOOLCHAIN_BIN="${WD}/../misc/buildroot/build_arm/staging_dir/bin"
# Add the path to the toolchain to the PATH varialble
export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}"
echo "PATH : ${PATH}"
configs/sama5d3-xplained/nsh/Make.defs
-20
View File
@@ -45,26 +45,6 @@ ifeq ($(CONFIG_SAMA5_BOOT_SDRAM),y)
LDSCRIPT = ddram.ld
endif
ifeq ($(CONFIG_SAMA5_BOOT_CS0FLASH),y)
ifeq ($(CONFIG_BOOT_SDRAM_DATA),y)
LDSCRIPT = nor-ddram.ld
else
LDSCRIPT = nor-isram.ld
endif
endif
ifeq ($(CONFIG_SAMA5_BOOT_CS1FLASH),y)
# LDSCRIPT = cs1flash.ld
endif
ifeq ($(CONFIG_SAMA5_BOOT_CS2FLASH),y)
# LDSCRIPT = cs2flash.ld
endif
ifeq ($(CONFIG_SAMA5_BOOT_CS3FLASH),y)
# LDSCRIPT = cs3flash.ld
endif
ifeq ($(WINTOOL),y)
# Windows-native toolchains
ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include}"
configs/sama5d3-xplained/nsh/defconfig
+7 -18
View File
@@ -185,22 +185,14 @@ CONFIG_SAMA5_USART1=y
#
# External Memory Configuration
#
CONFIG_SAMA5_EBICS0=y
CONFIG_SAMA5_EBICS0_SIZE=134217728
# CONFIG_SAMA5_EBICS0_SRAM is not set
# CONFIG_SAMA5_EBICS0_PSRAM is not set
# CONFIG_SAMA5_EBICS0_PROM is not set
# CONFIG_SAMA5_EBICS0_EEPROM is not set
# CONFIG_SAMA5_EBICS0_EPROM is not set
# CONFIG_SAMA5_EBICS0_LCD is not set
CONFIG_SAMA5_EBICS0_NOR=y
# CONFIG_SAMA5_EBICS0 is not set
# CONFIG_SAMA5_EBICS1 is not set
# CONFIG_SAMA5_EBICS2 is not set
# CONFIG_SAMA5_EBICS3 is not set
# CONFIG_SAMA5_HAVE_NAND is not set
# CONFIG_SAMA5_HAVE_PMECC is not set
# CONFIG_SAMA5_BOOT_ISRAM is not set
CONFIG_SAMA5_BOOT_CS0FLASH=y
CONFIG_SAMA5_BOOT_SDRAM=y
#
# Heap Configuration
@@ -244,20 +236,17 @@ CONFIG_ARCH_INTERRUPTSTACK=2048
# Boot options
#
# CONFIG_BOOT_RUNFROMEXTSRAM is not set
CONFIG_BOOT_RUNFROMFLASH=y
# CONFIG_BOOT_RUNFROMFLASH is not set
# CONFIG_BOOT_RUNFROMISRAM is not set
# CONFIG_BOOT_RUNFROMSDRAM is not set
CONFIG_BOOT_RUNFROMSDRAM=y
# CONFIG_BOOT_COPYTORAM is not set
#
# Boot Memory Configuration
#
CONFIG_RAM_START=0x00304000
CONFIG_RAM_VSTART=0x00304000
CONFIG_RAM_SIZE=114688
CONFIG_FLASH_START=0x10000000
CONFIG_FLASH_VSTART=0x10000000
CONFIG_FLASH_SIZE=134217728
CONFIG_RAM_START=0x20000000
CONFIG_RAM_VSTART=0x20000000
CONFIG_RAM_SIZE=268435456
# CONFIG_ARCH_HAVE_SDRAM is not set
#
configs/sama5d3-xplained/scripts/ddram.ld
+3 -3
View File
@@ -33,8 +33,8 @@
*
****************************************************************************/
/* The SAMA5D3 has 128 KB of ISRAM beginning at virtual address 0x0030:0000.
* This memory configuration, however, loads into the 64 MB SDRAM on board
/* The SAMA5D36 has 128 KB of ISRAM beginning at virtual address 0x0030:0000.
* This memory configuration, however, loads into the 256 MB SDRAM on board
* the SAMA5D3-Xplained which lies at 0x2000:0000
*
* Vectors in low memory are assumed and 16KB of ISRAM is reserved at the
@@ -44,7 +44,7 @@
MEMORY
{
isram (W!RX) : ORIGIN = 0x300000, LENGTH = 128K - 16K
sdram (W!RX) : ORIGIN = 0x20000000, LENGTH = 64M
sdram (W!RX) : ORIGIN = 0x20000000, LENGTH = 256M
}
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
configs/sama5d3-xplained/scripts/isram.ld
+1 -1
View File
@@ -33,7 +33,7 @@
*
****************************************************************************/
/* The SAMA5D3 has 128 KB of ISRAM beginning at virtual address 0x0030:0000.
/* The SAMA5D36 has 128 KB of ISRAM beginning at virtual address 0x0030:0000.
*
* Vectors in low memory are assumed and 16KB of ISRAM is reserved at the
* high end of ISRAM for the page table.
configs/sama5d3-xplained/scripts/nor-ddram.ld
-131
View File
@@ -1,131 +0,0 @@
/****************************************************************************
* configs/sama5d3-xplained/scripts/nor-ddram.ld
*
* Copyright (C) 2014 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/* The SAMA5D3-Xplained has 128MB of NOR flash at CS0 (0x1000:0000). In this
* configuration, the .text and a copy of the .data section will be loaded
* into NOR flash. NuttX .data, .bss, the IDLE stack, and the primary
* heap will be allocated in SRAM. The SAMA5D3 has 128 KB of ISRAM beginning
* at virtual address 0x0030:0000.
*
* The SAMA5D3 has 128 KB of ISRAM beginning at virtual address 0x0030:0000
* And 256Mb of SDRAm at address 0x2000:0000. This script assumes ISRAM used
* only for the page table. All variables are retained in SDRAM.
*
* Vectors in low memory are assumed to reside at the beginning of NOR flash.
*/
MEMORY
{
norflash (W!RX) : ORIGIN = 0x10000000, LENGTH = 128M
isram (WR) : ORIGIN = 0x00304000, LENGTH = 128K - 16K
sdram (W!RX) : ORIGIN = 0x20000000, LENGTH = 256K
}
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(entry)
ENTRY(_stext)
SECTIONS
{
.text : {
_stext = ABSOLUTE(.);
*(.vectors)
*(.text .text.*)
*(.fixup)
*(.gnu.warning)
*(.rodata .rodata.*)
*(.gnu.linkonce.t.*)
*(.glue_7)
*(.glue_7t)
*(.got)
*(.gcc_except_table)
*(.gnu.linkonce.r.*)
*(.ARM.extab*)
*(.gnu.linkonce.armextab.*)
_etext = ABSOLUTE(.);
} > norflash
.init_section : {
_sinit = ABSOLUTE(.);
*(.init_array .init_array.*)
_einit = ABSOLUTE(.);
} > norflash
.ARM.extab : {
*(.ARM.extab*)
} > norflash
/* .ARM.exidx is sorted, so has to go in its own output section. */
PROVIDE_HIDDEN (__exidx_start = .);
.ARM.exidx :
{
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
} > norflash
PROVIDE_HIDDEN (__exidx_end = .);
.data : {
_sdata = ABSOLUTE(.);
*(.data .data.*)
*(.gnu.linkonce.d.*)
CONSTRUCTORS
_edata = ABSOLUTE(.);
} > sdram AT > norflash
_eronly = LOADADDR(.data);
.bss : {
_sbss = ABSOLUTE(.);
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
_ebss = ABSOLUTE(.);
} > sdram
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_info 0 : { *(.debug_info) }
.debug_line 0 : { *(.debug_line) }
.debug_pubnames 0 : { *(.debug_pubnames) }
.debug_aranges 0 : { *(.debug_aranges) }
}
configs/sama5d3-xplained/scripts/nor-isram.ld
-127
View File
@@ -1,127 +0,0 @@
/****************************************************************************
* configs/sama5d3-xplained/scripts/nor-isram.ld
*
* Copyright (C) 2014 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/* The SAMA5D3-Xplained has 128MB of NOR flash at CS0 (0x1000:0000). In this
* configuration, the .text and a copy of the .data section will be loaded
* into NOR flash. NuttX .data, .bss, the IDLE stack, and the primary
* heap will be allocated in SRAM. The SAMA5D3 has 128 KB of ISRAM beginning
* at virtual address 0x0030:0000.
*
* Vectors in low memory are assumed to reside at the beginning of NOR flash
* 16KB of ISRAM is reserved at the beginning of ISRAM for the page table.
*/
MEMORY
{
norflash (W!RX) : ORIGIN = 0x10000000, LENGTH = 128M
isram (WR) : ORIGIN = 0x00304000, LENGTH = 128K - 16K
}
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(entry)
ENTRY(_stext)
SECTIONS
{
.text : {
_stext = ABSOLUTE(.);
*(.vectors)
*(.text .text.*)
*(.fixup)
*(.gnu.warning)
*(.rodata .rodata.*)
*(.gnu.linkonce.t.*)
*(.glue_7)
*(.glue_7t)
*(.got)
*(.gcc_except_table)
*(.gnu.linkonce.r.*)
*(.ARM.extab*)
*(.gnu.linkonce.armextab.*)
_etext = ABSOLUTE(.);
} > norflash
.init_section : {
_sinit = ABSOLUTE(.);
*(.init_array .init_array.*)
_einit = ABSOLUTE(.);
} > norflash
.ARM.extab : {
*(.ARM.extab*)
} > norflash
/* .ARM.exidx is sorted, so has to go in its own output section. */
PROVIDE_HIDDEN (__exidx_start = .);
.ARM.exidx :
{
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
} > norflash
PROVIDE_HIDDEN (__exidx_end = .);
.data : {
_sdata = ABSOLUTE(.);
*(.data .data.*)
*(.gnu.linkonce.d.*)
CONSTRUCTORS
_edata = ABSOLUTE(.);
} > isram AT > norflash
_eronly = LOADADDR(.data);
.bss : {
_sbss = ABSOLUTE(.);
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
_ebss = ABSOLUTE(.);
} > isram
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_info 0 : { *(.debug_info) }
.debug_line 0 : { *(.debug_line) }
.debug_pubnames 0 : { *(.debug_pubnames) }
.debug_aranges 0 : { *(.debug_aranges) }
}
configs/sama5d3-xplained/scripts/pg-sram.ld
-158
View File
@@ -1,158 +0,0 @@
/****************************************************************************
* configs/sama5d3-xplained/scripts/pg-isram.ld
*
* Copyright (C) 2014 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/* The SAMA5D3 has 128 KB of ISRAM beginning at virtual address 0x0030:0000.
* The .text vitual address space begins at the same location as the physical
* address space: 0x0030:0000. The virtual space is broken up into three
* regions:
*
* PHYSICAL VIRTUAL
* NAME DESCRIPTION SIZE START SIZE START
* -------- -------------------------- ----- ----------- ------- -----------
* locked Pages locked in memory. 40KB 0x0030:0000 40KB 0x0030:0000
* paged Pages in nonvolatile store. 48KB 0x0030:a000 48KB 0x0030:a000
* data .data/.bss/heap. 24KB 0x0031:6000 24KB 0x0031:6000
* Reserved for page table 16KB 0x0031:c000 16KB 0x0031:c000
* -------- -------------------------- ----- ----------- ------- -----------
* 128KB 0x0032 0000 128KB 0x0032 0000
*
* These region sizes must match the size in pages specified for each region
* in the NuttX configuration file: CONFIG_PAGING_NLOCKED, CONFIG_PAGING_NVPAGED,
* and CONFIG_PAGING_NDATA.
*
* NOTE 1: The locked region is should be big here so that you can enable lots of
* debug output without overflowing the locked region. 32KB would probably be
* plenty if this were a real, optimized application.
*
* NOTE 2: Different compilers will compile the code to different sizes. If you
* get a link time error saying that the locked region is full, you may have to
* re-organize this memory layout (here and in defconfig) to make the locked
* region even bigger.
*
* NOTE 3: Vectors in low memory are assumed and 16KB of ISRAM is reserved at
* the high end of ISRAM for the page table (?).
*/
MEMORY
{
locked (rx) : ORIGIN = 0x00300000, LENGTH = 40K
paged (rx) : ORIGIN = 0x0030a000, LENGTH = 48K
data (rw) : ORIGIN = 0x00316000, LENGTH = 24K
}
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(entry)
ENTRY(_stext)
SECTIONS
{
.locked : {
_slocked = ABSOLUTE(.);
*(.vectors)
up_head.o locked.r (.text .text.*)
up_head.o locked.r (.fixup)
up_head.o locked.r (.gnu.warning)
up_head.o locked.r (.rodata .rodata.*)
up_head.o locked.r (.gnu.linkonce.t.*)
up_head.o locked.r (.glue_7)
up_head.o locked.r (.glue_7t)
up_head.o locked.r (.got)
up_head.o locked.r (.gcc_except_table)
up_head.o locked.r (.gnu.linkonce.r.*)
_elocked = ABSOLUTE(.);
} >locked
.init_section : {
_sinit = ABSOLUTE(.);
*(.init_array .init_array.*)
_einit = ABSOLUTE(.);
} > locked
/* .ARM.exidx is sorted, so has to go in its own output section. */
PROVIDE_HIDDEN (__exidx_start = .);
.ARM.exidx :
{
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
} > isram
PROVIDE_HIDDEN (__exidx_end = .);
.paged : {
_spaged = ABSOLUTE(.);
*(.text .text.*)
*(.fixup)
*(.gnu.warning)
*(.rodata .rodata.*)
*(.gnu.linkonce.t.*)
*(.glue_7)
*(.glue_7t)
*(.got)
*(.gcc_except_table)
*(.gnu.linkonce.r.*)
*(.ARM.extab*)
*(.gnu.linkonce.armextab.*)
_epaged = ABSOLUTE(.);
} > paged
.data : {
_sdata = ABSOLUTE(.);
*(.data .data.*)
*(.gnu.linkonce.d.*)
CONSTRUCTORS
_edata = ABSOLUTE(.);
} > data AT > locked
.bss : {
_sbss = ABSOLUTE(.);
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
_ebss = ABSOLUTE(.);
} > data
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_info 0 : { *(.debug_info) }
.debug_line 0 : { *(.debug_line) }
.debug_pubnames 0 : { *(.debug_pubnames) }
.debug_aranges 0 : { *(.debug_aranges) }
}
configs/sama5d3-xplained/src/Makefile
-8
View File
@@ -58,18 +58,10 @@ ifeq ($(CONFIG_SAMA5_DDRCS),y)
CSRCS += sam_sdram.c
endif
ifeq ($(CONFIG_SAMA5_EBICS0_NOR),y)
CSRCS += sam_norflash.c
endif
ifeq ($(CONFIG_SAMA5_EBICS3_NAND),y)
CSRCS += sam_nandflash.c
endif
ifeq ($(CONFIG_SAMA5D3XPLAINED_NOR_MAIN),y)
CSRCS += nor_main.c
endif
ifeq ($(CONFIG_MTD_AT25),y)
ifeq ($(CONFIG_SAMA5_SPI0),y)
CSRCS += sam_at25.c
configs/sama5d3-xplained/src/nor_main.c
-195
View File
@@ -1,195 +0,0 @@
/*****************************************************************************
* configs/sama5d3-xplained/src/nor_main.c
*
* Copyright (C) 2014 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdio.h>
#include <debug.h>
#include <arch/irq.h>
#include "up_arch.h"
#include "mmu.h"
#include "cache.h"
#include "sam_periphclks.h"
#include "chip/sam_hsmc.h"
#include "chip/sam_matrix.h"
#include "chip/sam_aximx.h"
#include "sama5d3-xplained.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#define NOR_ENTRY ((nor_entry_t)SAM_EBICS0_VSECTION)
/****************************************************************************
* Private Types
****************************************************************************/
typedef void (*nor_entry_t)(void);
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: nor_main
*
* Description:
* nor_main is a tiny program that runs in ISRAM. nor_main will enable
* NOR flash then jump to the program in NOR flash
*
****************************************************************************/
int nor_main(int argc, char *argv)
{
uint32_t regval;
#ifdef CONFIG_SAMA5D3XPLAINED_NOR_START
printf("Configuring and booting from NOR FLASH on CS0\n");
#else
printf("Configuring NOR FLASH on CS0 and halting\n");
#endif
/* Make sure that the SMC peripheral is enabled (But of course it is... we
* are executing from NOR FLASH now).
*/
sam_hsmc_enableclk();
/* The SAMA5D3-Xplained has 118MB of 16-bit NOR FLASH at CS0. The NOR FLASH
* has already been configured by the first level ROM bootloader... we
* simply need to modify the timing here.
*/
regval = HSMC_SETUP_NWE_SETUP(1) | HSMC_SETUP_NCS_WRSETUP(0) |
HSMC_SETUP_NRD_SETUP(2) | HSMC_SETUP_NCS_RDSETUP(0);
putreg32(regval, SAM_HSMC_SETUP(HSMC_CS0));
regval = HSMC_PULSE_NWE_PULSE(10) | HSMC_PULSE_NCS_WRPULSE(10) |
HSMC_PULSE_NRD_PULSE(11) | HSMC_PULSE_NCS_RDPULSE(11);
putreg32(regval, SAM_HSMC_PULSE(HSMC_CS0));
regval = HSMC_CYCLE_NWE_CYCLE(11) | HSMC_CYCLE_NRD_CYCLE(14);
putreg32(regval, SAM_HSMC_CYCLE(HSMC_CS0));
regval = HSMC_TIMINGS_TCLR(0) | HSMC_TIMINGS_TADL(0) |
HSMC_TIMINGS_TAR(0) | HSMC_TIMINGS_TRR(0) |
HSMC_TIMINGS_TWB(0) | HSMC_TIMINGS_RBNSEL(0);
putreg32(regval, SAM_HSMC_TIMINGS(HSMC_CS0));
regval = HSMC_MODE_READMODE | HSMC_MODE_WRITEMODE |
HSMC_MODE_EXNWMODE_DISABLED | HSMC_MODE_BIT_16 |
HSMC_MODE_TDFCYCLES(1);
putreg32(regval, SAM_HSMC_MODE(HSMC_CS0));
/* Interrupts must be disabled through the following. In this configuration,
* there should only be timer interrupts. Your NuttX configuration must use
* CONFIG_SERIAL_LOWCONSOLE=y or printf() will hang when the interrupts
* are disabled!
*/
(void)irqsave();
/* Disable MATRIX write protection */
#if 0 /* Disabled on reset */
putreg32(MATRIX_WPMR_WPKEY, SAM_MATRIX_WPMR);
#endif
/* Set remap state 1.
*
* Boot state: ROM is seen at address 0x00000000
* Remap State 0: SRAM is seen at address 0x00000000 (through AHB slave
* interface) instead of ROM.
* Remap State 1: HEBI is seen at address 0x00000000 (through AHB slave
* interface) instead of ROM for external boot.
*
* REVISIT: This does not work. No matter what I do, the internal
* SRAM is always visible at address zero. I am missing something.
*/
putreg32(MATRIX_MRCR_RCB0, SAM_MATRIX_MRCR); /* Enable remap */
putreg32(AXIMX_REMAP_REMAP1, SAM_AXIMX_REMAP); /* Remap HEBI */
/* Restore MATRIX write protection */
#if 0 /* Disabled on reset */
putreg32(MATRIX_WPMR_WPKEY | MATRIX_WPMR_WPEN, SAM_MATRIX_WPMR);
#endif
/* Disable the caches and the MMU. Disabling the MMU should be safe here
* because there is a 1-to-1 identity mapping between the physical and
* virtual addressing.
*/
/* NOTE: This generates crashes and lots of error, but does leave the
* system in the proper state to run from NOR: very ugly but usable.
* Better than the alternative.
*/
cp15_disable_mmu();
cp15_disable_caches();
/* Invalidate caches and TLBs */
cp15_invalidate_icache();
cp15_invalidate_dcache_all();
cp15_invalidate_tlbs();
#ifdef CONFIG_SAMA5D3XPLAINED_NOR_START
/* Then jump into NOR flash */
NOR_ENTRY();
#else
/* Or just wait patiently for the user to break in with GDB. */
for (;;);
#endif
return 0; /* We should not get here in either case */
}
configs/sama5d3-xplained/src/sam_autoleds.c
+1 -1
View File
@@ -64,7 +64,7 @@
* LED_IDLE N/A MCU is is sleep mode Not used
*
* Thus if the blue LED is statically on, NuttX has successfully booted and
* is, apparently, running normmally. If the red is flashing at
* is, apparently, running normally. If the red is flashing at
* approximately 2Hz, then a fatal error has been detected and the system
* has halted.
*/
configs/sama5d3-xplained/src/sam_nandflash.c
+1 -1
View File
@@ -1,5 +1,5 @@
/****************************************************************************
* configs/sama5d3-xplained/src/sam_norflash.c
* configs/sama5d3-xplained/src/sam_nandflash.c
*
* Copyright (C) 2014 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
configs/sama5d3-xplained/src/sam_norflash.c
-145
View File
@@ -1,145 +0,0 @@
/****************************************************************************
* configs/sama5d3-xplained/src/sam_norflash.c
*
* Copyright (C) 2014 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Most of this file derives from Atmel sample code for the SAMA5D3-Xplained
* board. That sample code has licensing that is compatible with the NuttX
* modified BSD license:
*
* Copyright (c) 2012, Atmel Corporation
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor Atmel nor the names of its contributors may
* be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <debug.h>
#include "up_arch.h"
#include "sam_periphclks.h"
#include "chip/sam_hsmc.h"
#include "sama5d3-xplained.h"
#ifdef CONFIG_SAMA5_BOOT_CS0FLASH
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_norflash_config
*
* Description:
* If CONFIG_SAMA5_BOOT_CS0FLASH, then the system is boot directly off
* CS0 NOR FLASH. In this case, we assume that we get here from the
* primary boot loader under these conditions:
*
* "If BMS signal is tied to 0, BMS_BIT is read at 1. The ROM Code
* allows execution of the code contained into the memory connected to
* Chip Select 0 of the External Bus Interface.
*
* "To achieve that, the following sequence is preformed by the ROM
* Code:
*
* - The main clock is the on-chip 12 MHz RC oscillator,
* - The Static Memory Controller is configured with timing allowing
* code execution inCS0 external memory at 12 MHz
* - AXI matrix is configured to remap EBI CS0 address at 0x0
* - 0x0 is loaded in the Program Counter register
*
* "The user software in the external memory must perform the next
* operation in order to complete the clocks and SMC timings
* configuration to run at a higher clock frequency:
*
* - Enable the 32768 Hz oscillator if best accuracy is needed
* - Reprogram the SMC setup, cycle, hold, mode timing registers
* for EBI CS0, to adapt them to the new clock
* - Program the PMC (Main Oscillator Enable or Bypass mode)
* - Program and Start the PLL
* - Switch the system clock to the new value"
*
* This function provides the board-specific implementation of the logic
* to reprogram the SMC.
*
****************************************************************************/
void board_norflash_config(void)
{
uint32_t regval;
/* Make sure that the SMC peripheral is enabled (But of course it is... we
* are executing from NOR FLASH now).
*/
sam_hsmc_enableclk();
/* The SAMA5D3-Xplained has 118MB of 16-bit NOR FLASH at CS0. The NOR FLASH
* has already been configured by the first level ROM bootloader... we
* simply need to modify the timing here.
*/
regval = HSMC_SETUP_NWE_SETUP(1) | HSMC_SETUP_NCS_WRSETUP(0) |
HSMC_SETUP_NRD_SETUP(2) | HSMC_SETUP_NCS_RDSETUP(0);
putreg32(regval, SAM_HSMC_SETUP(HSMC_CS0));
regval = HSMC_PULSE_NWE_PULSE(10) | HSMC_PULSE_NCS_WRPULSE(10) |
HSMC_PULSE_NRD_PULSE(11) | HSMC_PULSE_NCS_RDPULSE(11);
putreg32(regval, SAM_HSMC_PULSE(HSMC_CS0));
regval = HSMC_CYCLE_NWE_CYCLE(11) | HSMC_CYCLE_NRD_CYCLE(14);
putreg32(regval, SAM_HSMC_CYCLE(HSMC_CS0));
regval = HSMC_TIMINGS_TCLR(0) | HSMC_TIMINGS_TADL(0) |
HSMC_TIMINGS_TAR(0) | HSMC_TIMINGS_TRR(0) |
HSMC_TIMINGS_TWB(0) | HSMC_TIMINGS_RBNSEL(0);
putreg32(regval, SAM_HSMC_TIMINGS(HSMC_CS0));
regval = HSMC_MODE_READMODE | HSMC_MODE_WRITEMODE |
HSMC_MODE_EXNWMODE_DISABLED | HSMC_MODE_BIT_16 |
HSMC_MODE_TDFCYCLES(1);
putreg32(regval, SAM_HSMC_MODE(HSMC_CS0));
}
#endif /* CONFIG_SAMA5_BOOT_CS0FLASH */
configs/sama5d3x-ek/src/sam_autoleds.c
+1 -1
View File
@@ -64,7 +64,7 @@
* LED_IDLE N/A MCU is is sleep mode Not used
*
* Thus if the blue LED is statically on, NuttX has successfully booted and
* is, apparently, running normmally. If the red is flashing at
* is, apparently, running normally. If the red is flashing at
* approximately 2Hz, then a fatal error has been detected and the system
* has halted.
*/
configs/sama5d3x-ek/src/sam_nandflash.c
+1 -1
View File
@@ -1,5 +1,5 @@
/****************************************************************************
* configs/sama5d3x-ek/src/sam_norflash.c
* configs/sama5d3x-ek/src/sam_nandflash.c
*
* Copyright (C) 2013 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>