arch: samd5e5:

- Add MTD progmem support.
- NVM USER PAGE IOCTLs support.

boards: metro-m4  Add support for:

- SmartFS inicialization.
- AT24 EEPROM.
- GPIO dev support.
- BQ27426 gauge inicialization.

drives: power
- Add BQ27426 fuel gauge support.

Testing:
- Build check only.

Signed-off-by: Leomar Mateus Radke  <leomar@falker.com.br>
This commit is contained in:
leomarradke
2020-08-27 11:46:50 -03:00
committed by Alan Carvalho de Assis
parent 946601da2f
commit 8a2c480a48
18 changed files with 2761 additions and 22 deletions
+20
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@@ -549,6 +549,26 @@ config SAMD5E5_WDT
bool "Watchdog Timer"
default n
menuconfig SAMD5E5_PROGMEM
bool "FLASH program memory"
default n
select ARCH_HAVE_PROGMEM
---help---
Enable support FLASH interfaces as defined in include/nuttx/progmem.h
if SAMD5E5_PROGMEM
config SAMD5E5_PROGMEM_NSECTORS
int "Number of 32Kbytes sectors"
default 2
range 1 32
---help---
This is the number of 32Kbytes FLASH sectors at the end of the program
flash memory that will be reserved for use with by the interfaces
prototyped in include/nuttx/progmem.h
endif # SAMD5E5_PROGMEM
endmenu # SAMD5x/E5x Peripheral Support
config SAMD5E5_DMAC_NDESC
+4
View File
@@ -177,3 +177,7 @@ endif
ifeq ($(CONFIG_SAMD5E5_RTC),y)
CHIP_CSRCS += sam_rtc.c
endif
ifeq ($(CONFIG_SAMD5E5_PROGMEM),y)
CHIP_CSRCS += sam_progmem.c
endif
+12 -11
View File
@@ -66,11 +66,11 @@
#define SAM_NVMCTRL_SEECFG_OFFSET 0x002a /* SmartEEPROM configuration register */
#define SAM_NVMCTRL_SEESTAT_OFFSET 0x002c /* SmartEEPROM status register */
/* NVMCTRL register addresses ***************************************************************/
#define SAM_NVMCTRL_CTRLA (SAM_NVMCTRL_BASE + SAM_NVMCTRL_CTRLA_OFFSET)
#define SAM_NVMCTRL_CTRLB (SAM_NVMCTRL_BASE + SAM_NVMCTRL_CTRLB_OFFSET)
#define SAM_NVMCTRL_PARAM (SAM_NVMCTRL_BASE + SAM_NVMCTRL_PARAM_OFFSET)
#define SAM_NVMCTRL_INTENCLR (SAM_NVMCTRL_BASE + SAM_NVMCTRL_INTENCLR_OFFSET)
#define SAM_NVMCTRL_INTENSET (SAM_NVMCTRL_BASE + SAM_NVMCTRL_INTENSET_OFFSET)
#define SAM_NVMCTRL_INTFLAG (SAM_NVMCTRL_BASE + SAM_NVMCTRL_INTFLAG_OFFSET)
@@ -95,15 +95,15 @@
# define NVMCTRL_CTRLA_WMODE_MAN (0 << NVMCTRL_CTRLA_WMODE_SHIFT) /* Manual Write */
# define NVMCTRL_CTRLA_WMODE_ADW (1 << NVMCTRL_CTRLA_WMODE_SHIFT) /* Automatic Double Word Write */
# define NVMCTRL_CTRLA_WMODE_AQW (2 << NVMCTRL_CTRLA_WMODE_SHIFT) /* Automatic Quad Word */
# define NVMCTRL_CTRLA_WMODE_AP (2 << NVMCTRL_CTRLA_WMODE_SHIFT) /* Automatic Page Write */
#define NVMCTRL_CTRLA_PRM_SHIFT (8) /* Bits 8-9: Power Reduction Mode during Sleep */
# define NVMCTRL_CTRLA_WMODE_AP (3 << NVMCTRL_CTRLA_WMODE_SHIFT) /* Automatic Page Write */
#define NVMCTRL_CTRLA_PRM_SHIFT (6) /* Bits 8-9: Power Reduction Mode during Sleep */
#define NVMCTRL_CTRLA_PRM_MASK (3 << NVMCTRL_CTRLA_PRM_SHIFT)
# define NVMCTRL_CTRLA_PRM_SEMIAUTO (0 << NVMCTRL_CTRLA_PRM_SHIFT) /* Enter low power on STANDBY/SPRM cmd;
* Exit on first access */
# define NVMCTRL_CTRLA_PRM_FULLAUTO (1 << NVMCTRL_CTRLA_PRM_SHIFT) /* Enter/Exit low power on STANDBY */
# define NVMCTRL_CTRLA_PRM_MANUAL (3 << NVMCTRL_CTRLA_PRM_SHIFT) /* Enter low power only on SPRM cmd;
* Exit on first access */
#define NVMCTRL_CTRLA_RWS_SHIFT (8) /* Bits 8-11: NVM Read Wait States */
#define NVMCTRL_CTRLA_RWS_SHIFT (8) /* Bits 8-11: NVM Read Wait States */
#define NVMCTRL_CTRLA_RWS_MASK (15 << NVMCTRL_CTRLA_RWS_SHIFT)
# define NVMCTRL_CTRLA_RWS(n) ((uint32_t)(n) << NVMCTRL_CTRLA_RWS_SHIFT)
#define NVMCTRL_CTRLA_AHBNS0 (1 << 12) /* Bit 12: Force AHB0 access to Non-Sequential */
@@ -139,7 +139,7 @@
# define NVMCTRL_CTRLB_CMD_USEE (0x35 << NVMCTRL_CTRLB_CMD_SHIFT) /* Unlock SmartEEPROM data*/
# define NVMCTRL_CTRLB_CMD_LSEER (0x36 << NVMCTRL_CTRLB_CMD_SHIFT) /* Lock SmartEEPROM registers */
# define NVMCTRL_CTRLB_CMD_USEER (0x37 << NVMCTRL_CTRLB_CMD_SHIFT) /* Unlock SmartEEPROM registers */
#define NVMCTRL_CTRLB_CMDEX_SHIFT (8) /* Bits 8-15: Command Execution */
#define NVMCTRL_CTRLB_CMDEX_SHIFT (8) /* Bits 8-15: Command Execution */
#define NVMCTRL_CTRLB_CMDEX_MASK (0xff << NVMCTRL_CTRLB_CMDEX_SHIFT)
# define NVMCTRL_CTRLB_CMDEX_KEY (0xa5 << NVMCTRL_CTRLB_CMDEX_SHIFT)
@@ -158,11 +158,12 @@
# define NVMCTRL_PARAM_PSZ_256B (5 << NVMCTRL_PARAM_PSZ_SHIFT) /* 256 bytes */
# define NVMCTRL_PARAM_PSZ_512B (6 << NVMCTRL_PARAM_PSZ_SHIFT) /* 512 bytes */
# define NVMCTRL_PARAM_PSZ_1KB (7 << NVMCTRL_PARAM_PSZ_SHIFT) /* 1024 bytes */
#define NVMCTRL_PARAM_SEE_ (1 << 31) /* Bit 31: SmartEEPROM Supported */
#define NVMCTRL_PARAM_SEE_ (1 << 31) /* Bit 31: SmartEEPROM Supported */
/* Interrupt clear register */
/* Interrupt set register */
/* Interface flags status and clear register */
/* Interrupt clear register
* Interrupt set register
* Interface flags status and clear register
*/
#define NVMCTRL_INT_DONE (1 << 0) /* Bit 0: Command done interrupt */
#define NVMCTRL_INT_ADDRE (1 << 1) /* Bit 1: Address error interrupt */
@@ -208,7 +209,7 @@
# define NVMCTRL_ECCERR_TYPEL_NONE (0 << NVMCTRL_ECCERR_TYPEL_SHIFT) /* No error detected */
# define NVMCTRL_ECCERR_TYPEL_SINGLE (1 << NVMCTRL_ECCERR_TYPEL_SHIFT) /* Single error(s) detected */
# define NVMCTRL_ECCERR_TYPEL_DUAL (2 << NVMCTRL_ECCERR_TYPEL_SHIFT) /* Dual error(s) detected */
#define NVMCTRL_ECCERR_TYPEH_SHIFT (30) /* Bits 30-31: High double-word error type */
#define NVMCTRL_ECCERR_TYPEH_SHIFT (30) /* Bits 30-31: High double-word error type */
#define NVMCTRL_ECCERR_TYPEH_MASK (3 << NVMCTRL_ECCERR_TYPEH_SHIFT)
# define NVMCTRL_ECCERR_TYPEH_NONE (0 << NVMCTRL_ECCERR_TYPEH_SHIFT) /* No error detected */
# define NVMCTRL_ECCERR_TYPEH_SINGLE (1 << NVMCTRL_ECCERR_TYPEH_SHIFT) /* Single error(s) detected */
@@ -247,7 +248,7 @@
********************************************************************************************/
/********************************************************************************************
* Public Functions
* Public Functions Prototypes
********************************************************************************************/
#endif /* __ARCH_ARM_SRC_SAMD5E5_HARDWARE_SAM_NVMCTRL_H */
File diff suppressed because it is too large Load Diff
+55
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@@ -0,0 +1,55 @@
/****************************************************************************
* arch/arm/src/samd5e5/sam_progmem.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMD5E5_SAM_PROGMEM_H
#define __ARCH_ARM_SRC_SAMD5E5_SAM_PROGMEM_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include "arm_arch.h"
#include "hardware/sam_nvmctrl.h"
#include <nuttx/progmem.h>
/****************************************************************************
* Inline Functions
****************************************************************************/
/****************************************************************************
* Name: sam_progmem_initialize
*
* Description:
* Call to initialize FLASH programming memory access
*
* Input Parameters:
* None
*
* Returned Value:
* None
*
****************************************************************************/
void sam_progmem_initialize(void);
#endif /* __ARCH_ARM_SRC_SAMD5E5_SAM_PROGMEM_H */
+30
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@@ -45,6 +45,36 @@ config METRO_M4_32KHZXTAL
slow clock source. This option will select instead XOSC32 as the
slow clock source.
config METRO_M4_AT24_BLOCKMOUNT
bool "AT24 Serial EEPROM auto-mount"
default n
depends on MTD_AT24XX
---help---
Automatically initialize the AT24 I2C EEPROM driver when NSH starts.
choice
prompt "AT24 serial EPPROM configuration"
default METRO_M4_AT24_FTL
depends on METRO_M4_AT24_BLOCKMOUNT
config METRO_M4_AT24_FTL
bool "Create AT24 block driver"
---help---
Create the MTD driver for the AT24 and "wrap" the AT24 as a standard
block driver that could then, for example, be mounted using FAT or
any other file system. Any file system may be used, but there will
be no wear-leveling.
config METRO_M4_AT24_NXFFS
bool "Create AT24 NXFFS file system"
depends on FS_NXFFS
---help---
Create the MTD driver for the AT24 and mount the AT24 device as
a wear-leveling, NuttX FLASH file system (NXFFS). The downside of
NXFFS is that it can be very slow.
endchoice # AT24 serial EPPROM configuration
if FS_AUTOMOUNTER
config METRO_M4_USB_AUTOMOUNT
bool "USB automounter"
+15
View File
@@ -69,6 +69,21 @@ endif
ifeq ($(CONFIG_SAMD5E5_SERCOM5_ISI2C),y)
CSRCS += sam_i2c.c
ifeq ($(CONFIG_MTD_AT24XX),y)
CSRCS += sam_at24.c
endif
endif
ifeq ($(CONFIG_FS_SMARTFS),y)
CSRCS += sam_smartfs.c
endif
ifeq ($(CONFIG_BQ27426),y)
CSRCS += sam_bq27426.c
endif
ifeq ($(CONFIG_DEV_GPIO),y)
CSRCS += sam_gpio.c
endif
include $(TOPDIR)/boards/Board.mk
+53 -2
View File
@@ -68,8 +68,47 @@
* D13 PA16 GPIO output
*/
#define PORT_RED_LED (PORT_OUTPUT | PORT_PULL_NONE | PORT_OUTPUT_SET | \
PORTA | PORT_PIN16)
#define PORT_RED_LED (PORT_OUTPUT | PORT_PULL_NONE | PORT_OUTPUT_SET | PORTA | PORT_PIN16)
#define PORT_D8 (PORT_OUTPUT | PORT_PULL_NONE | PORT_OUTPUT_SET | PORTA | PORT_PIN21)
#define PORT_D9 (PORT_INTERRUPT | PORT_PULL_NONE | PORT_INT_RISING | PORTA | PORT_PIN20)
#define PORT_D10 (PORT_INPUT | PORT_PULL_NONE | PORT_INT_CHANGE | PORTA | PORT_PIN18)
/* GPIO pins used by the GPIO Subsystem */
#define BOARD_NGPIOIN 1 /* Amount of GPIO Input pins */
#define BOARD_NGPIOOUT 1 /* Amount of GPIO Output pins */
#define BOARD_NGPIOINT 1 /* Amount of GPIO Input w/ Interruption pins */
#define HAVE_AT24 1
/* AT24 Serial EEPROM */
#define AT24_I2C_BUS 5 /* AT24C256 connected to I2C5 */
#define AT24_MINOR 0
#if !defined(CONFIG_MTD_AT24XX) || !defined(CONFIG_SAMD5E5_SERCOM5_ISI2C)
# undef HAVE_AT24
#endif
/* Can't support AT24 features if mountpoints are disabled or if we were not
* asked to mount the AT25 part
*/
#if defined(CONFIG_DISABLE_MOUNTPOINT) || \
!defined(CONFIG_METRO_M4_AT24_BLOCKMOUNT)
# undef HAVE_AT24
#endif
/* On-chip Programming Memory */
#if defined(CONFIG_SAMD5E5_PROGMEM) || defined(CONFIG_MTD_PROGMEM)
#define HAVE_PROGMEM_CHARDEV
#endif
/* This is the on-chip progmem memroy driver minor number */
#define PROGMEM_MTD_MINOR 0
/****************************************************************************
* Public Types
@@ -123,5 +162,17 @@ FAR struct i2c_master_s *g_i2c5_dev;
int metro_m4_i2cdev_initialize(void);
#endif
#ifdef CONFIG_FS_SMARTFS
int sam_smartfs_initialize(void);
#endif
#ifdef CONFIG_BQ27426
int sam_bq27426_initialize(FAR const char *devname);
#endif
#ifdef CONFIG_DEV_GPIO
int sam_gpio_initialize(void);
#endif
#endif /* __ASSEMBLY__ */
#endif /* __BOARDS_ARM_SAMD5E5_METRO_M4_SRC_METRO_M4_H */
+126
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@@ -0,0 +1,126 @@
/****************************************************************************
* boards/arm/samd5e5/metro-m4/src/sam_at24.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <sys/mount.h>
#include <stdbool.h>
#include <stdio.h>
#include <errno.h>
#include <debug.h>
#include <nuttx/i2c/i2c_master.h>
#include <nuttx/mtd/mtd.h>
#include <nuttx/fs/nxffs.h>
#include "metro-m4.h"
#ifdef HAVE_AT24
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: sam_at24_automount
*
* Description:
* Initialize and configure the AT24 serial EEPROM
*
****************************************************************************/
extern FAR struct i2c_master_s *g_i2c5_dev;
int sam_at24_automount(int minor)
{
FAR struct mtd_dev_s *mtd;
static bool initialized = false;
int ret;
/* Have we already initialized? */
if (!initialized)
{
/* Now bind the I2C interface to the AT24 I2C EEPROM driver */
finfo("Bind the AT24 EEPROM driver to I2C%d\n", AT24_I2C_BUS);
mtd = at24c_initialize(g_i2c5_dev);
if (!mtd)
{
ferr("ERROR: Failed to bind TWI%d to the AT24 EEPROM driver\n",
AT24_I2C_BUS);
return -ENODEV;
}
#if defined(CONFIG_METRO_M4_AT24_FTL)
/* And finally, use the FTL layer
* to wrap the MTD driver as a block driver
*/
finfo("Initialize the FTL layer to create /dev/mtdblock%d\n",
AT24_MINOR);
ret = ftl_initialize(AT24_MINOR, mtd);
if (ret < 0)
{
ferr("ERROR: Failed to initialize the FTL layer: %d\n", ret);
return ret;
}
#elif defined(CONFIG_METRO_M4_AT24_NXFFS)
/* Initialize to provide NXFFS on the MTD interface */
finfo("Initialize the NXFFS file system\n");
ret = nxffs_initialize(mtd);
if (ret < 0)
{
ferr("ERROR: NXFFS initialization failed: %d\n", ret);
return ret;
}
/* Mount the file system at /mnt/at24 */
finfo("Mount the NXFFS file system at /dev/at24\n");
ret = mount(NULL, "/mnt/at24", "nxffs", 0, NULL);
if (ret < 0)
{
ferr("ERROR: Failed to mount the NXFFS volume: %d\n",
errno);
return ret;
}
#endif
/* Now we are initialized */
initialized = true;
}
return OK;
}
#endif /* HAVE_AT24 */
@@ -0,0 +1,75 @@
/****************************************************************************
* boards/arm/samd5e5/metro-m4/src/sam_bq27426.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <stdbool.h>
#include <debug.h>
#include <errno.h>
#include <nuttx/i2c/i2c_master.h>
#include <nuttx/power/battery_gauge.h>
#include <nuttx/power/bq27426.h>
#include <nuttx/power/battery_ioctl.h>
#include "arm_arch.h"
#include "chip.h"
#include "hardware/sam_i2c_master.h"
#include "metro-m4.h"
#include <arch/board/board.h>
#include "sam_config.h"
/****************************************************************************
* Public Data
****************************************************************************/
#ifdef CONFIG_BQ27426
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: sam_bq24298_initialize
*
* Description:
* Called to configure bq24298
*
****************************************************************************/
int sam_bq27426_initialize(FAR const char *devname)
{
FAR struct battery_gauge_dev_s *bq27426_m4;
bq27426_m4 = (FAR struct battery_gauge_dev_s *)bq27426_initialize(
g_i2c5_dev,
BQ27426_I2C_ADDRESS,
100000);
return battery_gauge_register(devname, bq27426_m4);
}
#endif /* CONFIG_BQ27426 */
+41 -1
View File
@@ -64,6 +64,11 @@
# include <nuttx/usb/usbmonitor.h>
#endif
#ifdef CONFIG_BQ27426
#include <nuttx/power/battery_gauge.h>
#include <nuttx/power/battery_ioctl.h>
#endif
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
@@ -98,7 +103,7 @@ int sam_bringup(void)
ret = mount(NULL, PROCFS_MOUNTPOINT, "procfs", 0, NULL);
if (ret < 0)
{
syslot(LOG_ERR, "ERROR: Failed to mount procfs at %s: %d\n",
syslog(LOG_ERR, "ERROR: Failed to mount procfs at %s: %d\n",
PROCFS_MOUNTPOINT, ret);
}
#endif
@@ -137,12 +142,47 @@ int sam_bringup(void)
}
#endif
#ifdef CONFIG_FS_SMARTFS
/* Initialize Smart File System (SMARTFS) */
ret = sam_smartfs_initialize();
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: Failed to mount smartfs %d\n", ret);
return ret;
}
/* Mount the file system at /mnt/nvm */
ret = mount("/dev/smart0", "/mnt/nvm", "smartfs", 0, NULL);
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: Failed to mount the SmartFS volume: %d\n",
ret);
return ret;
}
#endif
#ifdef CONFIG_FS_AUTOMOUNTER
/* Initialize the auto-mounter */
sam_automount_initialize();
#endif
#ifdef CONFIG_BQ27426
/* Configure and initialize the BQ2426 distance sensor */
ret = sam_bq27426_initialize("/dev/batt1");
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: sam_bq27426_initialize() failed: %d\n", ret);
}
#endif
#ifdef CONFIG_DEV_GPIO
ret = sam_gpio_initialize();
#endif
UNUSED(ret);
return OK;
}
File diff suppressed because it is too large Load Diff
File diff suppressed because it is too large Load Diff
+21
View File
@@ -448,6 +448,27 @@ config MAX1704X
The MAX17040 is configured to operate with a single lithium cell and the
MAX17041 is configured for a dual-cell 2S pack.
config BQ27426
bool "BQ27426 Battery fuel gauge support"
default n
select I2C
depends on BATTERY_GAUGE
---help---
The bq27426 battery fuel gauge accurately predicts the battery capacity and other
operational characteristics of a single, Li-based, rechargeable cell.
It can be interrogated by a system processor to provide cell information,
such as state-of-charge (SOC).
if BQ27426
config DEBUG_BQ27426
bool "BQ27426 Debug Features"
default n
---help---
Enable BQ27426 battery management debug features.
endif # BQ27426
config I2C_BQ2425X
bool
default y if BQ2425X
+6
View File
@@ -152,6 +152,12 @@ ifeq ($(CONFIG_I2C_MAX1704X),y)
CSRCS += max1704x.c
endif
# Add the bq27426 I2C-based battery guage driver
ifeq ($(CONFIG_BQ27426),y)
CSRCS += bq27426.c
endif
endif
# Include battery support in the build
File diff suppressed because it is too large Load Diff
+49 -8
View File
@@ -53,7 +53,9 @@
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Configuration ************************************************************/
/* Configuration */
/* CONFIG_BATTERY_GAUGE - Upper half battery fuel gauge driver support
*
* Specific, lower-half drivers will have other configuration requirements
@@ -63,7 +65,8 @@
* CONFIG_I2C_MAX1704X - The MAX1704x driver must be explicitly selected.
*/
/* IOCTL Commands ***********************************************************/
/* IOCTL Commands */
/* The upper-half battery fuel gauge driver provides a character driver
* "wrapper" * around the lower-half battery driver that does all of the
* real work.
@@ -89,6 +92,7 @@
/****************************************************************************
* Public Types
****************************************************************************/
/* Battery status */
enum battery_gauge_status_e
@@ -100,7 +104,7 @@ enum battery_gauge_status_e
BATTERY_DISCHARGING /* Probably not full, discharging */
};
/* This structure defines the lower half battery interface */
/* This structure defines the lower half battery interface */
struct battery_gauge_dev_s;
struct battery_gauge_operations_s
@@ -129,7 +133,7 @@ struct battery_gauge_dev_s
/* Fields required by the upper-half driver */
FAR const struct battery_gauge_operations_s *ops; /* Battery operations */
sem_t batsem; /* Enforce mutually exclusive access */
sem_t batsem; /* Enforce mutually exclusive access */
/* Data fields specific to the lower-half driver may follow */
};
@@ -151,6 +155,7 @@ extern "C"
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
/****************************************************************************
* Name: battery_gauge_register
*
@@ -171,6 +176,40 @@ extern "C"
int battery_gauge_register(FAR const char *devpath,
FAR struct battery_gauge_dev_s *dev);
/****************************************************************************
* Name: bq27426_initialize
*
* Description:
* Initialize the bq2742 battery driver and return an instance of the
* lower_half interface that may be used with battery_gauge_register();
*
* This driver requires:
*
* CONFIG_BATTERY_GAUGE - Upper half battery fuel gauge driver support
* CONFIG_I2C - I2C support
* CONFIG_BQ27426 - And the driver must be explictly selected.
*
* Input Parameters:
* i2c - An instance of the I2C interface to use to communicate with the
* bq27426
* addr - The I2C address of the bq27426 (Better be 0x55).
* frequency - The I2C frequency
*
* Returned Value:
* A pointer to the initializeed battery driver instance. A NULL pointer
* is returned on a failure to initialize the bq27426 lower half.
*
****************************************************************************/
#if defined(CONFIG_I2C) && defined(CONFIG_BQ27426)
struct i2c_master_s; /* Forward reference */
FAR struct battery_gauge_dev_s *bq27426_initialize(
FAR struct i2c_master_s *i2c,
uint8_t addr,
uint32_t frequency);
#endif
/****************************************************************************
* Name: max1704x_initialize
*
@@ -187,7 +226,8 @@ int battery_gauge_register(FAR const char *devpath,
* chip is on the board in order to scale the voltage correctly.
*
* Input Parameters:
* i2c - An instance of the I2C interface to use to communicate with the MAX1704x
* i2c - An instance of the I2C interface to use to communicate with
* the MAX1704x.
* addr - The I2C address of the MAX1704x (Better be 0x36).
* frequency - The I2C frequency
*
@@ -200,9 +240,10 @@ int battery_gauge_register(FAR const char *devpath,
#if defined(CONFIG_I2C) && defined(CONFIG_I2C_MAX1704X)
struct i2c_master_s; /* Forward reference */
FAR struct battery_gauge_dev_s *max1704x_initialize(FAR struct i2c_master_s *i2c,
uint8_t addr,
uint32_t frequency);
FAR struct battery_gauge_dev_s *max1704x_initialize(
FAR struct i2c_master_s *i2c,
uint8_t addr,
uint32_t frequency);
#endif
#undef EXTERN
File diff suppressed because it is too large Load Diff