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https://github.com/apache/nuttx.git
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Fixes formatting
This commit is contained in:
Anthony Merlino
committed by
Xiang Xiao
Xiang Xiao
parent
c3745c8441
commit
896435e7c9
@@ -700,26 +700,26 @@
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/* Capture/compare enable register */
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#define ATIM_CCER_CC1E (1 << 0) /* Bit 0: Capture/Compare 1 output enable */
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#define ATIM_CCER_CC1P (1 << 1) /* Bit 1: Capture/Compare 1 output Polarity */
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#define ATIM_CCER_CC1NE (1 << 2) /* Bit 2: Capture/Compare 1 Complementary output enable */
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#define ATIM_CCER_CC1NP (1 << 3) /* Bit 3: Capture/Compare 1 Complementary output polarity */
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#define ATIM_CCER_CC2E (1 << 4) /* Bit 4: Capture/Compare 2 output enable */
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#define ATIM_CCER_CC2P (1 << 5) /* Bit 5: Capture/Compare 2 output Polarity */
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#define ATIM_CCER_CC2NE (1 << 6) /* Bit 6: Capture/Compare 2 Complementary output enable */
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#define ATIM_CCER_CC2NP (1 << 7) /* Bit 7: Capture/Compare 2 Complementary output polarity */
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#define ATIM_CCER_CC3E (1 << 8) /* Bit 8: Capture/Compare 3 output enable */
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#define ATIM_CCER_CC3P (1 << 9) /* Bit 9: Capture/Compare 3 output Polarity */
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#define ATIM_CCER_CC3NE (1 << 10) /* Bit 10: Capture/Compare 3 Complementary output enable */
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#define ATIM_CCER_CC3NP (1 << 11) /* Bit 11: Capture/Compare 3 Complementary output polarity */
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#define ATIM_CCER_CC4E (1 << 12) /* Bit 12: Capture/Compare 4 output enable */
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#define ATIM_CCER_CC4P (1 << 13) /* Bit 13: Capture/Compare 4 output Polarity */
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#define ATIM_CCER_CC4NP (1 << 15) /* Bit 15: Capture/Compare 4 Complementary output polarity */
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#define ATIM_CCER_CC5E (1 << 16) /* Bit 16: Capture/Compare 5 output enable */
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#define ATIM_CCER_CC5P (1 << 17) /* Bit 17: Capture/Compare 5 output Polarity */
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#define ATIM_CCER_CC6E (1 << 20) /* Bit 20: Capture/Compare 6 output enable */
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#define ATIM_CCER_CC6P (1 << 21) /* Bit 21: Capture/Compare 6 output Polarity */
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#define ATIM_CCER_CCXBASE(ch) (ch << 2) /* Each channel uses 4-bits */
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#define ATIM_CCER_CC1E (1 << 0) /* Bit 0: Capture/Compare 1 output enable */
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#define ATIM_CCER_CC1P (1 << 1) /* Bit 1: Capture/Compare 1 output Polarity */
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#define ATIM_CCER_CC1NE (1 << 2) /* Bit 2: Capture/Compare 1 Complementary output enable */
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#define ATIM_CCER_CC1NP (1 << 3) /* Bit 3: Capture/Compare 1 Complementary output polarity */
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#define ATIM_CCER_CC2E (1 << 4) /* Bit 4: Capture/Compare 2 output enable */
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#define ATIM_CCER_CC2P (1 << 5) /* Bit 5: Capture/Compare 2 output Polarity */
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#define ATIM_CCER_CC2NE (1 << 6) /* Bit 6: Capture/Compare 2 Complementary output enable */
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#define ATIM_CCER_CC2NP (1 << 7) /* Bit 7: Capture/Compare 2 Complementary output polarity */
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#define ATIM_CCER_CC3E (1 << 8) /* Bit 8: Capture/Compare 3 output enable */
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#define ATIM_CCER_CC3P (1 << 9) /* Bit 9: Capture/Compare 3 output Polarity */
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#define ATIM_CCER_CC3NE (1 << 10) /* Bit 10: Capture/Compare 3 Complementary output enable */
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#define ATIM_CCER_CC3NP (1 << 11) /* Bit 11: Capture/Compare 3 Complementary output polarity */
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#define ATIM_CCER_CC4E (1 << 12) /* Bit 12: Capture/Compare 4 output enable */
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#define ATIM_CCER_CC4P (1 << 13) /* Bit 13: Capture/Compare 4 output Polarity */
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#define ATIM_CCER_CC4NP (1 << 15) /* Bit 15: Capture/Compare 4 Complementary output polarity */
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#define ATIM_CCER_CC5E (1 << 16) /* Bit 16: Capture/Compare 5 output enable */
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#define ATIM_CCER_CC5P (1 << 17) /* Bit 17: Capture/Compare 5 output Polarity */
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#define ATIM_CCER_CC6E (1 << 20) /* Bit 20: Capture/Compare 6 output enable */
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#define ATIM_CCER_CC6P (1 << 21) /* Bit 21: Capture/Compare 6 output Polarity */
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#define ATIM_CCER_CCXBASE(ch) ((ch) << 2) /* Each channel uses 4-bits */
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/* 16-bit counter register */
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@@ -1097,22 +1097,22 @@
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/* Capture/compare enable register (TIM1 and TIM8, TIM2-5 and TIM9-14) */
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#define GTIM_CCER_CC1E (1 << 0) /* Bit 0: Capture/Compare 1 output enable */
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#define GTIM_CCER_CC1P (1 << 1) /* Bit 1: Capture/Compare 1 output polarity */
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#define GTIM_CCER_CC1NE (1 << 2) /* Bit 2: Capture/Compare 1 complementary output enable (TIM1 and TIM8 only) */
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#define GTIM_CCER_CC1NP (1 << 3) /* Bit 3: Capture/Compare 1 output Polarity (F2,F3,F4 and TIM15-17) */
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#define GTIM_CCER_CC2E (1 << 4) /* Bit 4: Capture/Compare 2 output enable (TIM2-5,9&12 only) */
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#define GTIM_CCER_CC2P (1 << 5) /* Bit 5: Capture/Compare 2 output polarity (TIM2-5,9&12 only) */
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#define GTIM_CCER_CC2NE (1 << 6) /* Bit 6: Capture/Compare 2 complementary output enable (TIM1 and TIM8 only) */
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#define GTIM_CCER_CC2NP (1 << 7) /* Bit 7: Capture/Compare 2 output Polarity (F2,F3,F4 and TIM2-5,9,12&15 only) */
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#define GTIM_CCER_CC3E (1 << 8) /* Bit 8: Capture/Compare 3 output enable (TIM2-5 only) */
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#define GTIM_CCER_CC3P (1 << 9) /* Bit 9: Capture/Compare 3 output Polarity (TIM2-5 only) */
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#define GTIM_CCER_CC3NE (1 << 10) /* Bit 10: Capture/Compare 3 complementary output enable (TIM1 and TIM8 only) */
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#define GTIM_CCER_CC3NP (1 << 11) /* Bit 11: Capture/Compare 3 output Polarity (F2,F4 and TIM2-5 only) */
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#define GTIM_CCER_CC4E (1 << 12) /* Bit 12: Capture/Compare 4 output enable (TIM2-5 only) */
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#define GTIM_CCER_CC4P (1 << 13) /* Bit 13: Capture/Compare 4 output Polarity (TIM2-5 only) */
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#define GTIM_CCER_CC4NP (1 << 15) /* Bit 15: Capture/Compare 4 output Polarity */
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#define GTIM_CCER_CCXBASE(ch) (ch << 2) /* Each channel uses 4-bits */
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#define GTIM_CCER_CC1E (1 << 0) /* Bit 0: Capture/Compare 1 output enable */
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#define GTIM_CCER_CC1P (1 << 1) /* Bit 1: Capture/Compare 1 output polarity */
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#define GTIM_CCER_CC1NE (1 << 2) /* Bit 2: Capture/Compare 1 complementary output enable (TIM1 and TIM8 only) */
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#define GTIM_CCER_CC1NP (1 << 3) /* Bit 3: Capture/Compare 1 output Polarity (F2,F3,F4 and TIM15-17) */
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#define GTIM_CCER_CC2E (1 << 4) /* Bit 4: Capture/Compare 2 output enable (TIM2-5,9&12 only) */
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#define GTIM_CCER_CC2P (1 << 5) /* Bit 5: Capture/Compare 2 output polarity (TIM2-5,9&12 only) */
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#define GTIM_CCER_CC2NE (1 << 6) /* Bit 6: Capture/Compare 2 complementary output enable (TIM1 and TIM8 only) */
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#define GTIM_CCER_CC2NP (1 << 7) /* Bit 7: Capture/Compare 2 output Polarity (F2,F3,F4 and TIM2-5,9,12&15 only) */
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#define GTIM_CCER_CC3E (1 << 8) /* Bit 8: Capture/Compare 3 output enable (TIM2-5 only) */
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#define GTIM_CCER_CC3P (1 << 9) /* Bit 9: Capture/Compare 3 output Polarity (TIM2-5 only) */
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#define GTIM_CCER_CC3NE (1 << 10) /* Bit 10: Capture/Compare 3 complementary output enable (TIM1 and TIM8 only) */
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#define GTIM_CCER_CC3NP (1 << 11) /* Bit 11: Capture/Compare 3 output Polarity (F2,F4 and TIM2-5 only) */
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#define GTIM_CCER_CC4E (1 << 12) /* Bit 12: Capture/Compare 4 output enable (TIM2-5 only) */
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#define GTIM_CCER_CC4P (1 << 13) /* Bit 13: Capture/Compare 4 output Polarity (TIM2-5 only) */
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#define GTIM_CCER_CC4NP (1 << 15) /* Bit 15: Capture/Compare 4 output Polarity */
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#define GTIM_CCER_CCXBASE(ch) ((ch) << 2) /* Each channel uses 4-bits */
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/* 16-bit counter register */
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@@ -588,7 +588,8 @@ void up_timer_initialize(void)
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STM32_TIM_ENABLEINT(g_tickless.tch, 0);
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#if defined(CONFIG_ARMV7M_SYSTICK) && defined(CONFIG_CPULOAD_PERIOD)
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nxsched_period_extclk(systick_initialize(true, STM32_CPUCLK_FREQUENCY, -1));
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nxsched_period_extclk(systick_initialize(true,
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STM32_CPUCLK_FREQUENCY, -1));
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#endif
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}
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@@ -274,8 +274,10 @@ static void stm32_tim_enableint(FAR struct stm32_tim_dev_s *dev,
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int source);
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static void stm32_tim_disableint(FAR struct stm32_tim_dev_s *dev,
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int source);
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static void stm32_tim_ackint(FAR struct stm32_tim_dev_s *dev, int source);
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static int stm32_tim_checkint(FAR struct stm32_tim_dev_s *dev, int source);
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static void stm32_tim_ackint(FAR struct stm32_tim_dev_s *dev,
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int source);
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static int stm32_tim_checkint(FAR struct stm32_tim_dev_s *dev,
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int source);
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/****************************************************************************
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* Private Data
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@@ -496,9 +498,9 @@ static void stm32_tim_disable(FAR struct stm32_tim_dev_s *dev)
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stm32_putreg16(dev, STM32_GTIM_CR1_OFFSET, val);
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}
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/*****************************************************************************
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/****************************************************************************
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* Name: stm32_tim_getwidth
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*****************************************************************************/
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****************************************************************************/
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static int stm32_tim_getwidth(FAR struct stm32_tim_dev_s *dev)
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{
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@@ -523,9 +525,9 @@ static int stm32_tim_getwidth(FAR struct stm32_tim_dev_s *dev)
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}
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}
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/*****************************************************************************
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/****************************************************************************
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* Name: stm32_tim_getcounter
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*****************************************************************************/
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****************************************************************************/
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static uint32_t stm32_tim_getcounter(FAR struct stm32_tim_dev_s *dev)
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{
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@@ -535,9 +537,9 @@ static uint32_t stm32_tim_getcounter(FAR struct stm32_tim_dev_s *dev)
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(uint32_t)stm32_getreg16(dev, STM32_BTIM_CNT_OFFSET);
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}
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/*****************************************************************************
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/****************************************************************************
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* Name: stm32_tim_setcounter
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*****************************************************************************/
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****************************************************************************/
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static void stm32_tim_setcounter(FAR struct stm32_tim_dev_s *dev,
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uint32_t count)
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@@ -125,8 +125,13 @@ typedef enum
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/* Output Compare Modes */
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STM32_TIM_CH_OUTPWM = 0x04, /* Enable standard PWM mode, active high when counter < compare */
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STM32_TIM_CH_OUTTOGGLE = 0x08, /* Toggle TIM_CHx output on UEV */
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/* Enable standard PWM mode, active high when counter < compare */
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STM32_TIM_CH_OUTPWM = 0x04,
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/* Toggle TIM_CHx output on UEV */
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STM32_TIM_CH_OUTTOGGLE = 0x08,
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#if 0
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STM32_TIM_CH_OUTCOMPARE = 0x06,
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@@ -134,7 +139,7 @@ typedef enum
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STM32_TIM_CH_INCAPTURE = 0x10,
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STM32_TIM_CH_INPWM = 0x20
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STM32_TIM_CH_DRIVE_OC -- open collector mode
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STM32_TIM_CH_DRIVE_OC - open collector mode
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#endif
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} stm32_tim_channel_t;
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