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https://github.com/apache/nuttx.git
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arch/cortex-[a|r]/Make.defs: unify arch common source include
Signed-off-by: chao.an <anchao@xiaomi.com>
This commit is contained in:
chao.an
Xiang Xiao
@@ -20,70 +20,6 @@
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include armv7-a/Make.defs
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# The vector table is the "head" object, i.e., the one that must forced into
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# the link in order to draw in all of the other components
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HEAD_ASRC = arm_vectortab.S
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ifeq ($(CONFIG_BUILD_KERNEL),y)
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crt0$(OBJEXT): crt0.c
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$(CC) $(CFLAGS) -c armv7-a$(DELIM)crt0.c -o crt0$(OBJEXT)
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STARTUP_OBJS = crt0$(OBJEXT)
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endif
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# Force the start-up logic to be at the beginning of the .text to simplify
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# debug.
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ifeq ($(CONFIG_PAGING),y)
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CMN_ASRCS += arm_pghead.S
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else
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CMN_ASRCS += arm_head.S
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endif
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# Common assembly language files
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CMN_ASRCS += arm_vectors.S arm_vectoraddrexcptn.S arm_fpuconfig.S
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CMN_ASRCS += cp15_coherent_dcache.S cp15_invalidate_dcache.S
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CMN_ASRCS += cp15_clean_dcache.S cp15_flush_dcache.S cp15_invalidate_dcache_all.S
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CMN_ASRCS += cp15_clean_dcache_all.S cp15_flush_dcache_all.S cp15_cache_size.S
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# Common C source files
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CMN_CSRCS += arm_dataabort.c arm_doirq.c arm_initialstate.c arm_mmu.c
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CMN_CSRCS += arm_prefetchabort.c arm_schedulesigaction.c
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CMN_CSRCS += arm_sigdeliver.c arm_syscall.c arm_undefinedinsn.c
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CMN_CSRCS += arm_cache.c arm_tcbinfo.c
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ifeq ($(CONFIG_PAGING),y)
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CMN_CSRCS += arm_allocpage.c arm_checkmapping.c arm_pginitialize.c
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CMN_CSRCS += arm_va2pte.c
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endif
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ifeq ($(CONFIG_ARCH_ADDRENV),y)
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CMN_CSRCS += arm_addrenv.c arm_addrenv_utils.c arm_pgalloc.c
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ifeq ($(CONFIG_ARCH_STACK_DYNAMIC),y)
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CMN_CSRCS += arm_addrenv_ustack.c
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endif
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ifeq ($(CONFIG_ARCH_KERNEL_STACK),y)
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CMN_CSRCS += arm_addrenv_kstack.c
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endif
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ifeq ($(CONFIG_MM_SHM),y)
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CMN_CSRCS += arm_addrenv_shm.c
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endif
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endif
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ifeq ($(CONFIG_MM_PGALLOC),y)
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CMN_CSRCS += arm_physpgaddr.c
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ifeq ($(CONFIG_ARCH_PGPOOL_MAPPING),y)
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CMN_CSRCS += arm_virtpgaddr.c
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endif
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endif
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ifeq ($(CONFIG_ARCH_FPU),y)
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CMN_CSRCS += arm_fpucmp.c
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endif
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# A1x-specific C source files
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CHIP_CSRCS = a1x_boot.c a1x_irq.c a1x_pio.c a1x_lowputc.c a1x_serial.c
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@@ -20,72 +20,6 @@
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include armv7-a/Make.defs
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# The vector table is the "head" object, i.e., the one that must forced into
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# the link in order to draw in all of the other components
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HEAD_ASRC = arm_vectortab.S
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ifeq ($(CONFIG_BUILD_KERNEL),y)
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crt0$(OBJEXT): crt0.c
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$(CC) $(CFLAGS) -c armv7-a$(DELIM)crt0.c -o crt0$(OBJEXT)
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STARTUP_OBJS = crt0$(OBJEXT)
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endif
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# Force the start-up logic to be at the beginning of the .text to simplify
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# debug.
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ifeq ($(CONFIG_PAGING),y)
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CMN_ASRCS += arm_pghead.S
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else
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CMN_ASRCS += arm_head.S
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endif
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# Common assembly language files
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CMN_ASRCS += arm_vectors.S arm_vectoraddrexcptn.S arm_fpuconfig.S
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CMN_ASRCS += cp15_coherent_dcache.S cp15_invalidate_dcache.S
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CMN_ASRCS += cp15_clean_dcache.S cp15_flush_dcache.S cp15_invalidate_dcache_all.S
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CMN_ASRCS += cp15_clean_dcache_all.S cp15_flush_dcache_all.S cp15_cache_size.S
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# Common C source files
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CMN_CSRCS += arm_doirq.c arm_initialstate.c arm_mmu.c arm_prefetchabort.c
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CMN_CSRCS += arm_schedulesigaction.c arm_dataabort.c
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CMN_CSRCS += arm_sigdeliver.c arm_syscall.c arm_undefinedinsn.c
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CMN_CSRCS += arm_cache.c arm_tcbinfo.c
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# Configuration dependent C and assembly language files
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ifeq ($(CONFIG_PAGING),y)
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CMN_CSRCS += arm_allocpage.c arm_checkmapping.c arm_pginitialize.c
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CMN_CSRCS += arm_va2pte.c
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endif
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ifeq ($(CONFIG_ARCH_ADDRENV),y)
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CMN_CSRCS += arm_addrenv.c arm_addrenv_utils.c arm_pgalloc.c
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ifeq ($(CONFIG_ARCH_STACK_DYNAMIC),y)
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CMN_CSRCS += arm_addrenv_ustack.c
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endif
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ifeq ($(CONFIG_ARCH_KERNEL_STACK),y)
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CMN_CSRCS += arm_addrenv_kstack.c
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endif
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ifeq ($(CONFIG_MM_SHM),y)
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CMN_CSRCS += arm_addrenv_shm.c
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endif
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endif
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ifeq ($(CONFIG_MM_PGALLOC),y)
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CMN_CSRCS += arm_physpgaddr.c
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ifeq ($(CONFIG_ARCH_PGPOOL_MAPPING),y)
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CMN_CSRCS += arm_virtpgaddr.c
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endif
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endif
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ifeq ($(CONFIG_ARCH_FPU),y)
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CMN_CSRCS += arm_fpucmp.c
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endif
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# AM335x-specific C source files
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CHIP_CSRCS = am335x_boot.c am335x_clockconfig.c am335x_pinmux.c am335x_irq.c
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@@ -21,3 +21,73 @@
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# Common ARM files
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include common/Make.defs
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# The vector table is the "head" object, i.e., the one that must forced into
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# the link in order to draw in all of the other components
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HEAD_ASRC += arm_vectortab.S
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ifeq ($(CONFIG_BUILD_KERNEL),y)
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crt0$(OBJEXT): crt0.c
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$(CC) $(CFLAGS) -c armv7-a$(DELIM)crt0.c -o crt0$(OBJEXT)
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STARTUP_OBJS = crt0$(OBJEXT)
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endif
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# Common assembly language files
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CMN_ASRCS += arm_cpuhead.S arm_fpuconfig.S arm_vectoraddrexcptn.S
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CMN_ASRCS += arm_vectors.S cp15_cache_size.S cp15_clean_dcache_all.S
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CMN_ASRCS += cp15_clean_dcache.S cp15_coherent_dcache.S
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CMN_ASRCS += cp15_flush_dcache_all.S cp15_flush_dcache.S
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CMN_ASRCS += cp15_invalidate_dcache_all.S cp15_invalidate_dcache.S
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# Common C source files
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CMN_CSRCS += arm_cache.c arm_dataabort.c
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CMN_CSRCS += arm_doirq.c arm_gicv2.c arm_gicv2_dump.c
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CMN_CSRCS += arm_initialstate.c arm_mmu.c arm_prefetchabort.c
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CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c
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CMN_CSRCS += arm_syscall.c arm_tcbinfo.c arm_undefinedinsn.c
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ifeq ($(CONFIG_ARMV7A_L2CC_PL310),y)
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CMN_CSRCS += arm_l2cc_pl310.c
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endif
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ifeq ($(CONFIG_PAGING),y)
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CMN_CSRCS += arm_allocpage.c arm_checkmapping.c arm_pginitialize.c
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CMN_CSRCS += arm_va2pte.c
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CMN_ASRCS += arm_pghead.S
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else
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CMN_ASRCS += arm_head.S
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endif
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ifeq ($(CONFIG_ARCH_ADDRENV),y)
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CMN_CSRCS += arm_addrenv.c arm_addrenv_utils.c arm_pgalloc.c
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ifeq ($(CONFIG_ARCH_STACK_DYNAMIC),y)
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CMN_CSRCS += arm_addrenv_ustack.c
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endif
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ifeq ($(CONFIG_ARCH_KERNEL_STACK),y)
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CMN_CSRCS += arm_addrenv_kstack.c
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endif
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ifeq ($(CONFIG_MM_SHM),y)
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CMN_CSRCS += arm_addrenv_shm.c
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endif
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endif
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ifeq ($(CONFIG_MM_PGALLOC),y)
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CMN_CSRCS += arm_physpgaddr.c
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ifeq ($(CONFIG_ARCH_PGPOOL_MAPPING),y)
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CMN_CSRCS += arm_virtpgaddr.c
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endif
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endif
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ifeq ($(CONFIG_ARCH_FPU),y)
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CMN_CSRCS += arm_fpucmp.c
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endif
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ifeq ($(CONFIG_SMP),y)
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CMN_CSRCS += arm_cpuindex.c arm_cpustart.c arm_cpupause.c arm_cpuidlestack.c
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CMN_CSRCS += arm_scu.c
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endif
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@@ -21,3 +21,38 @@
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# Common ARM files
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include common/Make.defs
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# The vector table is the "head" object, i.e., the one that must forced into
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# the link in order to draw in all of the other components
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HEAD_ASRC += arm_vectortab.S
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# Common assembly language files
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CMN_CSRCS += arm_cache.c arm_dataabort.c arm_doirq.c arm_gicv2.c
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CMN_CSRCS += arm_initialstate.c arm_prefetchabort.c
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CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c
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CMN_CSRCS += arm_syscall.c arm_tcbinfo.c arm_undefinedinsn.c
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# Common C source files
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CMN_ASRCS += arm_fpuconfig.S arm_head.S arm_vectoraddrexcptn.S
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CMN_ASRCS += arm_vectors.S arm_vectortab.S cp15_cache_size.S
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CMN_ASRCS += cp15_clean_dcache_all.S cp15_clean_dcache.S
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CMN_ASRCS += cp15_coherent_dcache.S cp15_flush_dcache_all.S
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CMN_ASRCS += cp15_flush_dcache.S cp15_invalidate_dcache_all.S
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CMN_ASRCS += cp15_invalidate_dcache.S
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ifeq ($(CONFIG_BUILD_PROTECTED),y)
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CMN_CSRCS += arm_mpu.c
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endif
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ifeq ($(CONFIG_ARMV7R_L2CC_PL310),y)
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CMN_CSRCS += arm_l2cc_pl310.c
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endif
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ifeq ($(CONFIG_ARCH_FPU),y)
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CMN_CSRCS += arm_fpucmp.c
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CMN_ASRCS += arm_fpuconfig.S
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endif
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@@ -20,93 +20,6 @@
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include armv7-a/Make.defs
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# The vector table is the "head" object, i.e., the one that must forced into
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# the link in order to draw in all of the other components
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|
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HEAD_ASRC = arm_vectortab.S
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ifeq ($(CONFIG_BUILD_KERNEL),y)
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crt0$(OBJEXT): crt0.c
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$(CC) $(CFLAGS) -c armv7-a$(DELIM)crt0.c -o crt0$(OBJEXT)
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STARTUP_OBJS = crt0$(OBJEXT)
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endif
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# Force the start-up logic to be at the beginning of the .text to simplify
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# debug.
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ifeq ($(CONFIG_PAGING),y)
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CMN_ASRCS += arm_pghead.S
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else
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CMN_ASRCS += arm_head.S
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ifeq ($(CONFIG_SMP),y)
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CMN_ASRCS += arm_cpuhead.S
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endif
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endif
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# Common assembly language files
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CMN_ASRCS += arm_vectors.S arm_fpuconfig.S
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CMN_ASRCS += arm_vectoraddrexcptn.S
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CMN_ASRCS += cp15_coherent_dcache.S cp15_invalidate_dcache.S
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CMN_ASRCS += cp15_clean_dcache.S cp15_flush_dcache.S cp15_invalidate_dcache_all.S
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CMN_ASRCS += cp15_clean_dcache_all.S cp15_flush_dcache_all.S cp15_cache_size.S
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# Common C source files
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CMN_CSRCS += arm_dataabort.c arm_doirq.c arm_gicv2.c arm_initialstate.c
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CMN_CSRCS += arm_mmu.c arm_prefetchabort.c arm_schedulesigaction.c
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CMN_CSRCS += arm_sigdeliver.c arm_syscall.c arm_undefinedinsn.c
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CMN_CSRCS += arm_cache.c arm_tcbinfo.c
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ifneq ($(CONFIG_ARCH_IDLE_CUSTOM),y)
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CMN_CSRCS += imx_idle.c
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endif
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ifeq ($(CONFIG_SMP),y)
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CMN_CSRCS += arm_cpuindex.c arm_cpustart.c arm_cpupause.c arm_cpuidlestack.c
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CMN_CSRCS += arm_scu.c
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endif
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ifeq ($(CONFIG_DEBUG_IRQ_INFO),y)
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CMN_CSRCS += arm_gicv2_dump.c
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endif
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# Configuration dependent C and assembly language files
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ifeq ($(CONFIG_PAGING),y)
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CMN_CSRCS += arm_allocpage.c arm_checkmapping.c arm_pginitialize.c
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CMN_CSRCS += arm_va2pte.c
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endif
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ifeq ($(CONFIG_ARCH_ADDRENV),y)
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CMN_CSRCS += arm_addrenv.c arm_addrenv_utils.c arm_pgalloc.c
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ifeq ($(CONFIG_ARCH_STACK_DYNAMIC),y)
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CMN_CSRCS += arm_addrenv_ustack.c
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endif
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ifeq ($(CONFIG_ARCH_KERNEL_STACK),y)
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CMN_CSRCS += arm_addrenv_kstack.c
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endif
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ifeq ($(CONFIG_MM_SHM),y)
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CMN_CSRCS += arm_addrenv_shm.c
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endif
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endif
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ifeq ($(CONFIG_MM_PGALLOC),y)
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CMN_CSRCS += arm_physpgaddr.c
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ifeq ($(CONFIG_ARCH_PGPOOL_MAPPING),y)
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CMN_CSRCS += arm_virtpgaddr.c
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endif
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endif
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ifeq ($(CONFIG_ARCH_L2CACHE),y)
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CMN_CSRCS += arm_l2cc_pl310.c
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endif
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ifeq ($(CONFIG_ARCH_FPU),y)
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CMN_CSRCS += arm_fpucmp.c
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endif
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# i.MX6-specific C source files
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CHIP_CSRCS = imx_boot.c imx_memorymap.c imx_clockconfig.c imx_irq.c
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|
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@@ -20,77 +20,6 @@
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|
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include armv7-a/Make.defs
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||||
|
||||
# The vector table is the "head" object, i.e., the one that must forced into
|
||||
# the link in order to draw in all of the other components
|
||||
|
||||
HEAD_ASRC = arm_vectortab.S
|
||||
|
||||
ifeq ($(CONFIG_BUILD_KERNEL),y)
|
||||
crt0$(OBJEXT): crt0.c
|
||||
$(CC) $(CFLAGS) -c armv7-a$(DELIM)crt0.c -o crt0$(OBJEXT)
|
||||
|
||||
STARTUP_OBJS = crt0$(OBJEXT)
|
||||
endif
|
||||
|
||||
# Force the start-up logic to be at the beginning of the .text to simplify
|
||||
# debug.
|
||||
|
||||
ifeq ($(CONFIG_PAGING),y)
|
||||
CMN_ASRCS += arm_pghead.S
|
||||
else
|
||||
CMN_ASRCS += arm_head.S
|
||||
endif
|
||||
|
||||
# Common assembly language files
|
||||
|
||||
CMN_ASRCS += arm_vectors.S arm_fpuconfig.S arm_vectoraddrexcptn.S
|
||||
CMN_ASRCS += cp15_coherent_dcache.S cp15_invalidate_dcache.S
|
||||
CMN_ASRCS += cp15_clean_dcache.S cp15_flush_dcache.S cp15_invalidate_dcache_all.S
|
||||
CMN_ASRCS += cp15_clean_dcache_all.S cp15_flush_dcache_all.S cp15_cache_size.S
|
||||
|
||||
# Configuration dependent assembly language files
|
||||
|
||||
# Common C source files
|
||||
|
||||
CMN_CSRCS += arm_dataabort.c arm_doirq.c arm_initialstate.c arm_mmu.c
|
||||
CMN_CSRCS += arm_prefetchabort.c arm_cache.c arm_schedulesigaction.c
|
||||
CMN_CSRCS += arm_sigdeliver.c arm_syscall.c arm_undefinedinsn.c arm_tcbinfo.c
|
||||
|
||||
# Configuration dependent C files
|
||||
|
||||
ifeq ($(CONFIG_ARMV7A_L2CC_PL310),y)
|
||||
CMN_CSRCS += arm_l2cc_pl310.c
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_PAGING),y)
|
||||
CMN_CSRCS += arm_allocpage.c arm_checkmapping.c arm_pginitialize.c
|
||||
CMN_CSRCS += arm_va2pte.c
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_ARCH_ADDRENV),y)
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||||
CMN_CSRCS += arm_addrenv.c arm_addrenv_utils.c arm_pgalloc.c
|
||||
ifeq ($(CONFIG_ARCH_STACK_DYNAMIC),y)
|
||||
CMN_CSRCS += arm_addrenv_ustack.c
|
||||
endif
|
||||
ifeq ($(CONFIG_ARCH_KERNEL_STACK),y)
|
||||
CMN_CSRCS += arm_addrenv_kstack.c
|
||||
endif
|
||||
ifeq ($(CONFIG_MM_SHM),y)
|
||||
CMN_CSRCS += arm_addrenv_shm.c
|
||||
endif
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_MM_PGALLOC),y)
|
||||
CMN_CSRCS += arm_physpgaddr.c
|
||||
ifeq ($(CONFIG_ARCH_PGPOOL_MAPPING),y)
|
||||
CMN_CSRCS += arm_virtpgaddr.c
|
||||
endif
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_ARCH_FPU),y)
|
||||
CMN_CSRCS += arm_fpucmp.c
|
||||
endif
|
||||
|
||||
# SAMA5-specific C source files
|
||||
|
||||
CHIP_CSRCS = sam_allocateheap.c sam_boot.c sam_clockconfig.c sam_irq.c
|
||||
|
||||
@@ -20,46 +20,6 @@
|
||||
|
||||
include armv7-r/Make.defs
|
||||
|
||||
# The vector table is the "head" object, i.e., the one that must forced into
|
||||
# the link in order to draw in all of the other components
|
||||
|
||||
HEAD_ASRC += arm_vectortab.S
|
||||
|
||||
# Common assembly language files
|
||||
|
||||
CMN_ASRCS += arm_vectortab.S arm_vectors.S arm_head.S
|
||||
CMN_ASRCS += arm_vectoraddrexcptn.S
|
||||
CMN_ASRCS += cp15_coherent_dcache.S cp15_invalidate_dcache.S
|
||||
CMN_ASRCS += cp15_clean_dcache.S cp15_flush_dcache.S
|
||||
CMN_ASRCS += cp15_clean_dcache_all.S cp15_flush_dcache_all.S
|
||||
CMN_ASRCS += cp15_invalidate_dcache_all.S cp15_cache_size.S arm_tcbinfo.c
|
||||
|
||||
# Configuration dependent assembly language files
|
||||
|
||||
ifeq ($(CONFIG_ARCH_FPU),y)
|
||||
CMN_ASRCS += arm_fpuconfig.S
|
||||
endif
|
||||
|
||||
# Common C source files
|
||||
|
||||
CMN_CSRCS += arm_dataabort.c arm_doirq.c arm_initialstate.c
|
||||
CMN_CSRCS += arm_prefetchabort.c arm_schedulesigaction.c arm_sigdeliver.c
|
||||
CMN_CSRCS += arm_syscall.c arm_undefinedinsn.c arm_cache.c
|
||||
|
||||
# Configuration dependent C files
|
||||
|
||||
ifeq ($(CONFIG_BUILD_PROTECTED),y)
|
||||
CMN_CSRCS += arm_mpu.c
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_ARMV7R_L2CC_PL310),y)
|
||||
CMN_CSRCS += arm_l2cc_pl310.c
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_ARCH_FPU),y)
|
||||
CMN_CSRCS += arm_fpucmp.c
|
||||
endif
|
||||
|
||||
# SAMA5-specific C source files
|
||||
|
||||
CHIP_CSRCS = tms570_boot.c tms570_clockconfig.c tms570_esm.c tms570_gio.c
|
||||
|
||||
Reference in New Issue
Block a user