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More Kinetis updates

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git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3883 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo
2011-08-15 18:07:54 +00:00
parent 9157835a1d
commit 88d2666a2d
6 changed files with 835 additions and 100 deletions
Download Patch File Download Diff File Expand all files Collapse all files
arch/arm/src/kinetis/kinetis_config.h
+6 -6
View File
@@ -166,22 +166,22 @@
/* Default Priorities */
#ifndef CONFIG_KINETIS_UART0PRIO
# define CONFIG_KINETIS_UART1PRIO NVIC_SYSH_PRIORITY_DEFAULT
# define CONFIG_KINETIS_UART0PRIO NVIC_SYSH_PRIORITY_DEFAULT
#endif
#ifndef CONFIG_KINETIS_UART1PRIO
# define CONFIG_KINETIS_UART2PRIO NVIC_SYSH_PRIORITY_DEFAULT
# define CONFIG_KINETIS_UART1PRIO NVIC_SYSH_PRIORITY_DEFAULT
#endif
#ifndef CONFIG_KINETIS_UART2PRIO
# define CONFIG_KINETIS_UART3PRIO NVIC_SYSH_PRIORITY_DEFAULT
# define CONFIG_KINETIS_UART2PRIO NVIC_SYSH_PRIORITY_DEFAULT
#endif
#ifndef CONFIG_KINETIS_UART3PRIO
# define CONFIG_KINETIS_UART4PRIO NVIC_SYSH_PRIORITY_DEFAULT
# define CONFIG_KINETIS_UART3PRIO NVIC_SYSH_PRIORITY_DEFAULT
#endif
#ifndef CONFIG_KINETIS_UART4PRIO
# define CONFIG_KINETIS_UART5PRIO NVIC_SYSH_PRIORITY_DEFAULT
# define CONFIG_KINETIS_UART4PRIO NVIC_SYSH_PRIORITY_DEFAULT
#endif
#ifndef CONFIG_KINETIS_UART5PRIO
# define CONFIG_KINETIS_UART6PRIO NVIC_SYSH_PRIORITY_DEFAULT
# define CONFIG_KINETIS_UART5PRIO NVIC_SYSH_PRIORITY_DEFAULT
#endif
/************************************************************************************
arch/arm/src/kinetis/kinetis_pinirq.c
+32 -18
View File
@@ -45,7 +45,10 @@
#include <nuttx/arch.h>
#include "up_arch.h"
#include "up_internal.h"
#include "kinetis_internal.h"
#include "kinetis_port.h"
#ifdef CONFIG_GPIO_IRQ
@@ -62,7 +65,7 @@
#if defined (CONFIG_KINETIS_PORTAINTS) || defined (CONFIG_KINETIS_PORTBINTS) || \
defined (CONFIG_KINETIS_PORTCINTS) || defined (CONFIG_KINETIS_PORTDINTS) || \
defined (CONFIG_KINETIS_PORTEINTS)
# undef HAVE_PORTINTS
# define HAVE_PORTINTS 1
#endif
/****************************************************************************
@@ -108,8 +111,8 @@ static xcpt_t g_porteisrs[32];
****************************************************************************/
#ifdef HAVE_PORTINTS
static int kinetis_portainterrupt(int irq, FAR void *context,
uintptr_t addr, xcpt_t **xcpt)
static int kinetis_portinterrupt(int irq, FAR void *context,
uintptr_t addr, xcpt_t *isrtab)
{
uint32_t isfr = getreg32(addr);
int i;
@@ -125,18 +128,18 @@ static int kinetis_portainterrupt(int irq, FAR void *context,
*/
uint32_t bit = (1 << i);
if ((isfr & bit )) != 0)
if ((isfr & bit ) != 0)
{
/* I think that bits may be set in the ISFR for DMA activities
* well. So, no error is declared if there is no registered
* interrupt handler for the pin.
*/
if (xcpt[i])
if (isrtab[i])
{
/* There is a registered interrupt handler... invoke it */
(void)xcpt[i](irq, context);
(void)isrtab[i](irq, context);
}
/* Writing a one to the ISFR register will clear the pending
@@ -258,7 +261,7 @@ void kinetis_pinirqinitialize(void)
xcpt_t kinetis_pinirqconfig(uint32_t pinset, xcpt_t pinisr)
{
#ifdef HAVE_PORTINTS
xcpt_t **table;
xcpt_t *isrtab;
xcpt_t oldisr;
irqstate_t flags;
unsigned int port;
@@ -273,8 +276,8 @@ xcpt_t kinetis_pinirqconfig(uint32_t pinset, xcpt_t pinisr)
/* Get the port number and pin number */
port = (cfgset & _PIN_PORT_MASK) >> _PIN_PORT_SHIFT;
pin = (cfgset & _PIN_MASK) >> _PIN_SHIFT;
port = (pinset & _PIN_PORT_MASK) >> _PIN_PORT_SHIFT;
pin = (pinset & _PIN_MASK) >> _PIN_SHIFT;
/* Get the table associated with this port */
@@ -284,27 +287,27 @@ xcpt_t kinetis_pinirqconfig(uint32_t pinset, xcpt_t pinisr)
{
#ifdef CONFIG_KINETIS_PORTAINTS
case KINETIS_PORTA :
table = g_portaisrs;
isrtab = g_portaisrs;
break;
#endif
#ifdef CONFIG_KINETIS_PORTBINTS
case KINETIS_PORTB :
table = g_portbisrs;
isrtab = g_portbisrs;
break;
#endif
#ifdef CONFIG_KINETIS_PORTCINTS
case KINETIS_PORTC :
table = g_portcisrs;
isrtab = g_portcisrs;
break;
#endif
#ifdef CONFIG_KINETIS_PORTDINTS
case KINETIS_PORTD :
table = g_portdisrs;
isrtab = g_portdisrs;
break;
#endif
#ifdef CONFIG_KINETIS_PORTEINTS
case KINETIS_PORTE :
table = g_porteisrs;
isrtab = g_porteisrs;
break;
#endif
default:
@@ -313,12 +316,15 @@ xcpt_t kinetis_pinirqconfig(uint32_t pinset, xcpt_t pinisr)
/* Get the old PIN ISR and set the new PIN ISR */
oldisr = table[pin];
table[pin] = pinisr;
oldisr = isrtab[pin];
isrtab[pin] = pinisr;
/* And return the old PIN isr address */
return oldisr;
#else
return NULL;
#endif /* HAVE_PORTINTS */
}
/************************************************************************************
@@ -345,6 +351,10 @@ void kinetis_pinirqenable(uint32_t pinset)
DEBUGASSERT(port < KINETIS_NPORTS);
if (port < KINETIS_NPORTS)
{
/* Get the base address of PORT block for this port */
base = KINETIS_PORT_BASE(port);
/* Modify the IRQC field of the port PCR register in order to enable
* the interrupt.
*/
@@ -380,7 +390,7 @@ void kinetis_pinirqenable(uint32_t pinset)
putreg32(regval, base + KINETIS_PORT_PCR_OFFSET(pin));
}
#endif
#endif /* HAVE_PORTINTS */
}
/************************************************************************************
@@ -407,6 +417,10 @@ void kinetis_pinirqdisable(uint32_t pinset)
DEBUGASSERT(port < KINETIS_NPORTS);
if (port < KINETIS_NPORTS)
{
/* Get the base address of PORT block for this port */
base = KINETIS_PORT_BASE(port);
/* Clear the IRQC field of the port PCR register in order to disable
* the interrupt.
*/
@@ -415,6 +429,6 @@ void kinetis_pinirqdisable(uint32_t pinset)
regval &= ~PORT_PCR_IRQC_MASK;
putreg32(regval, base + KINETIS_PORT_PCR_OFFSET(pin));
}
#endif
#endif /* HAVE_PORTINTS */
}
#endif /* CONFIG_GPIO_IRQ */
arch/arm/src/kinetis/kinetis_serial.c
+23 -24
View File
@@ -591,7 +591,7 @@ static void up_disableuartint(struct up_dev_s *priv, uint8_t *ie)
*ie = priv->ie;
}
up_restoreint(priv, 0);
up_restoreuartint(priv, 0);
irqrestore(flags);
}
@@ -611,8 +611,8 @@ static int up_setup(struct uart_dev_s *dev)
/* Configure the UART as an RS-232 UART */
uart_configure(priv->uartbase, priv->baud, priv->clock, priv->parity,
priv->bits);
kinetis_uartconfigure(priv->uartbase, priv->baud, priv->clock,
priv->parity, priv->bits);
#endif
/* Make sure that all interrupts are disabled */
@@ -643,11 +643,11 @@ static void up_shutdown(struct uart_dev_s *dev)
/* Disable interrupts */
up_restoreint(priv, 0);
up_restoreuartint(priv, 0);
/* Reset hardware and disable Rx and Tx */
uart_reset(priv->uartbase);
kinetis_uartreset(priv->uartbase);
}
/****************************************************************************
@@ -709,7 +709,7 @@ static void up_detach(struct uart_dev_s *dev)
/* Disable interrupts */
up_restoreint(priv, 0);
up_restoreuartint(priv, 0);
#ifdef CONFIG_DEBUG
up_disable_irq(priv->irqe);
#endif
@@ -741,42 +741,42 @@ static int up_interrupte(int irq, void *context)
uint8_t regval;
#ifdef CONFIG_KINETIS_UART0
if (g_uart0priv.irq == irqe)
if (g_uart0priv.irqe == irq)
{
dev = &g_uart0port;
}
else
#endif
#ifdef CONFIG_KINETIS_UART1
if (g_uart1priv.irq == irqe)
if (g_uart1priv.irqe == irq)
{
dev = &g_uart1port;
}
else
#endif
#ifdef CONFIG_KINETIS_UART2
if (g_uart2priv.irq == irqe)
if (g_uart2priv.irqe == irq)
{
dev = &g_uart2port;
}
else
#endif
#ifdef CONFIG_KINETIS_UART3
if (g_uart3priv.irq == irqe)
if (g_uart3priv.irqe == irq)
{
dev = &g_uart1port;
}
else
#endif
#ifdef CONFIG_KINETIS_UART4
if (g_uart4priv.irq == irqe)
if (g_uart4priv.irqe == irq)
{
dev = &g_uart1port;
}
else
#endif
#ifdef CONFIG_KINETIS_UART5
if (g_uart5priv.irq == irqe)
if (g_uart5priv.irqe == irq)
{
dev = &g_uart1port;
}
@@ -822,7 +822,6 @@ static int up_interrupts(int irq, void *context)
struct uart_dev_s *dev = NULL;
struct up_dev_s *priv;
int passes;
unsigned int size;
#ifdef CONFIG_KINETIS_UARTFIFOS
unsigned int count;
#else
@@ -831,35 +830,35 @@ static int up_interrupts(int irq, void *context)
bool handled;
#ifdef CONFIG_KINETIS_UART0
if (g_uart0priv.irq == irqs)
if (g_uart0priv.irqs == irq)
{
dev = &g_uart0port;
}
else
#endif
#ifdef CONFIG_KINETIS_UART1
if (g_uart1priv.irq == irqs)
if (g_uart1priv.irqs == irq)
{
dev = &g_uart1port;
}
else
#endif
#ifdef CONFIG_KINETIS_UART2
if (g_uart2priv.irq == irqs)
if (g_uart2priv.irqs == irq)
{
dev = &g_uart2port;
}
else
#endif
#ifdef CONFIG_KINETIS_UART3
if (g_uart3priv.irq == irqs)
if (g_uart3priv.irqs == irq)
{
dev = &g_uart1port;
}
else
#endif
#ifdef CONFIG_KINETIS_UART4
if (g_uart4priv.irq == irqs)
if (g_uart4priv.irqs == irq)
{
dev = &g_uart1port;
}
@@ -1228,21 +1227,21 @@ void up_earlyserialinit(void)
* pic32mx_consoleinit()
*/
up_restoreint(TTYS0_DEV.priv, 0);
up_restoreuartint(TTYS0_DEV.priv, 0);
#ifdef TTYS1_DEV
up_restoreint(TTYS1_DEV.priv, 0);
up_restoreuartint(TTYS1_DEV.priv, 0);
#endif
#ifdef TTYS2_DEV
up_restoreint(TTYS2_DEV.priv, 0);
up_restoreuartint(TTYS2_DEV.priv, 0);
#endif
#ifdef TTYS3_DEV
up_restoreint(TTYS3_DEV.priv, 0);
up_restoreuartint(TTYS3_DEV.priv, 0);
#endif
#ifdef TTYS4_DEV
up_restoreint(TTYS4_DEV.priv, 0);
up_restoreuartint(TTYS4_DEV.priv, 0);
#endif
#ifdef TTYS5_DEV
up_restoreint(TTYS5_DEV.priv, 0);
up_restoreuartint(TTYS5_DEV.priv, 0);
#endif
/* Configuration whichever one is the console */
configs/kwikstik-k40/README.txt
+102 -18
View File
@@ -6,17 +6,25 @@ KwiStick K40. Refer to the Freescale web site for further information
about this part:
http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=KWIKSTIK-K40
The Kwikstik is used with the FreeScale Tower System (mostly just to
provide a simple UART connection)
Contents
========
o Kinetis KwikStik Features
o Kinetis KwikStik-K40 Features
o Kinetis KwikStik-K60 Pin Configuration
- On-Board Connections
- Connections via the General Purpose Tower Plug-in (TWRPI) Socket
- Connections via the Tower Primary Connector Side A
- Connections via the Tower Primary Connector Side B
o Development Environment
o GNU Toolchain Options
o IDEs
o NuttX buildroot Toolchain
Kinetis KwikStik Features:
=========================
Kinetis KwikStik-K40 Features:
==============================
o Kinetis K40 MCU in 144 LQFP
- 100 MHz ARM Cortex-M4 core
@@ -34,6 +42,86 @@ Kinetis KwikStik Features:
o Freescale Tower System connectivity for UART, timers, CAN, SPI, I2C, and DAC
o Freescale Tower plug-in (TWRPI) socket connectivity for ADC, SPI, I2C, and GPIO
Kinetis KwikStik-K40 Pin Configuration
======================================
On-Board Connections
------------------- -------------------------- -------- -------------------
FEATURE CONNECTION PORT/PIN PIN FUNCTION
------------------- -------------------------- -------- -------------------
Audio Jack Output Audio Amp On PTE28 PTE28
Audio Output DAC1_OUT DAC1_OUT
Volume Up PTD10 PTD10
Volume Down PTD11 PTD11
Buzzer Audio Out PTA8 FTM1_CH0
Microphone Microphone input PTA7 ADC0_SE10
SD Card Slot SD Clock PTE2 SDHC0_DCLK
SD Command PTE3 SDHC0_CMD
SD Data0 PTD12 SDHC0_D4
SD Data1 PTD13 SDHC0_D5
SD Data2 PTD14 SDHC0_D6
SD Data3 PTD15 SDHC0_D7
SD Card Detect PTE27 PTE27
SD Card On PTE6 PTE6
Infrared Port IR Transmit PTE4 IR_TX
IR Receive PTA13 CMP2_IN0
Touch Pads E1 / Touch PTB0 TSI0_CH0
E2 / Touch PTA4 TSI0_CH5
E3 / Touch PTA24 PTA24
E4 / Touch PTA25 PTA25
E5 / Touch PTA26 PTA26
E6 / Touch PTA27 PTA27
Connections via the General Purpose Tower Plug-in (TWRPI) Socket
------------------- -------------------------- -------- -------------------
FEATURE CONNECTION PORT/PIN PIN FUNCTION
------------------- -------------------------- -------- -------------------
General Purpose TWRPI AN0 (J8 Pin 8) ? ADC0_DP0/ADC1_DP3
TWRPI Socket TWRPI AN1 (J8 Pin 9) ? ADC0_DM0/ADC1_DM3
TWRPI AN2 (J8 Pin 12) ? ADC1_DP0/ADC0_DP3
TWRPI ID0 (J8 Pin 17) ? ADC0_DP1
TWRPI ID1 (J8 Pin 18) ? ADC0_DM1
TWRPI I2C SCL (J9 Pin 3) PTC10 I2C1_SCL
TWRPI I2C SDA (J9 Pin 4) PTC11 I2C1_SDA
TWRPI SPI MISO (J9 Pin 9) PTB23 SPI2_SIN
TWRPI SPI MOSI (J9 Pin 10) PTB22 SPI2_SOUT
TWRPI SPI SS (J9 Pin 11) PTB20 SPI2_PCS0
TWRPI SPI CLK (J9 Pin 12) PTB21 SPI2_SCK
TWRPI GPIO0 (J9 Pin 15) PTC12 PTC12
TWRPI GPIO1 (J9 Pin 16) PTB9 PTB9
TWRPI GPIO2 (J9 Pin 17) PTB10 PTB10
TWRPI GPIO3 (J9 Pin 18) PTC5 PTC5
TWRPI GPIO4 (J9 Pin 19) PTA5 PTA5
The KwikStik features an expansion card-edge connector that interfaces to the Primary Elevator board in a Tower system (Primary side).
Connections via the Tower Primary Connector Side A
--- -------------------- --------------------------------
PIN NAME USAGE
--- -------------------- --------------------------------
A9 GPIO9 / CTS1 PTE10/UART_CTS
A43 RXD1 PTE9/UART_RX
A44 TXD1 PTE8/UART_TX
A63 RSTOUT_b PTA9/FTM1_CH1
Connections via the Tower Primary Connector Side B
--- -------------------- --------------------------------
PIN NAME USAGE
--- -------------------- --------------------------------
B21 GPIO1 / RTS1 PTE7/UART_RTS
B37 PWM7 PTA8/FTM1_CH0
B38 PWM6 PTA9/FTM1_CH1
B41 CANRX0 PTE25/CAN1_RX
B42 CANTX0 PTE24/CAN1_TX
B44 SPI0_MISO PTA17/SPI0_SIN
B45 SPI0_MOSI PTA16/SPI0_SOUT
B46 SPI0_CS0_b PTA14/SPI0_PCS0
B48 SPI0_CLK PTA15/SPI0_SCK
B50 SCL1 PTE1/I2C1_SCL
B51 SDA1 PTE0/I2C1_SDA
B52 GPIO5 / SD_CARD_DET PTA16
Development Environment
=======================
@@ -298,7 +386,7 @@ KwikStik-K40-specific Configuration Options
CONFIG_KINETIS_PIT -- Support Programmable Interval Timers
CONFIG_ARMV7M_MPU -- Support the MPU
Kinetis interrupt prioritys (Default is the mid priority)
Kinetis interrupt priorities (Default is the mid priority)
CONFIG_KINETIS_UART0PRIO
CONFIG_KINETIS_UART1PRIO
@@ -307,6 +395,16 @@ KwikStik-K40-specific Configuration Options
CONFIG_KINETIS_UART4PRIO
CONFIG_KINETIS_UART5PRIO
PIN Interrupt Support
CONFIG_GPIO_IRQ -- Enable pin interrtup support. Also needs
one or more of the following:
CONFIG_KINETIS_PORTAINTS -- Support 32 Port A interrupts
CONFIG_KINETIS_PORTBINTS -- Support 32 Port B interrupts
CONFIG_KINETIS_PORTCINTS -- Support 32 Port C interrupts
CONFIG_KINETIS_PORTDINTS -- Support 32 Port D interrupts
CONFIG_KINETIS_PORTEINTS -- Support 32 Port E interrupts
Kinetis K40 specific device driver settings
CONFIG_UARTn_SERIAL_CONSOLE - selects the UARTn (n=0..5) for the
@@ -319,20 +417,6 @@ KwikStik-K40-specific Configuration Options
CONFIG_UARTn_BITS - The number of bits. Must be either 8 or 8.
CONFIG_UARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity
CONFIG_KINETIS_SPI_INTERRUPTS - Select to enable interrupt driven SPI
support. Non-interrupt-driven, poll-waiting is recommended if the
interrupt rate would be to high in the interrupt driven case.
CONFIG_KINETIS_SPI_DMA - Use DMA to improve SPI transfer performance.
Cannot be used with CONFIG_KINETIS_SPI_INTERRUPT.
CONFIG_SDIO_DMA - Support DMA data transfers. Requires CONFIG_KINETIS_SDIO
and CONFIG_KINETIS_DMA2.
CONFIG_SDIO_PRI - Select SDIO interrupt prority. Default: 128
CONFIG_SDIO_DMAPRIO - Select SDIO DMA interrupt priority.
Default: Medium
CONFIG_SDIO_WIDTH_D1_ONLY - Select 1-bit transfer mode. Default:
4-bit transfer mode.
KwikStik-K40 LCD Hardware Configuration
CONFIG_LCD_LANDSCAPE - Define for 320x240 display "landscape"
configs/kwikstik-k40/ostest/defconfig
+110 -34
View File
@@ -102,41 +102,112 @@ CONFIG_KINETIS_DFU=y
# Individual subsystems can be enabled:
#
# Individual subsystems can be enabled:
# AHB:
CONFIG_KINETIS_DMA1=n
CONFIG_KINETIS_DMA2=n
CONFIG_KINETIS_CRC=n
CONFIG_KINETIS_FSMC=y
CONFIG_KINETIS_SDIO=n
# APB1:
CONFIG_KINETIS_TIM2=n
CONFIG_KINETIS_TIM3=n
CONFIG_KINETIS_TIM4=n
CONFIG_KINETIS_TIM5=n
CONFIG_KINETIS_TIM6=n
CONFIG_KINETIS_TIM7=n
CONFIG_KINETIS_WWDG=n
CONFIG_KINETIS_SPI2=n
CONFIG_KINETIS_SPI4=n
CONFIG_KINETIS_UART2=y
#
# CONFIG_KINETIS_TRACE - Enable trace clocking on power up.
# CONFIG_KINETIS_FLEXBUS - Enable flexbus clocking on power up.
# CONFIG_KINETIS_UART0 - Support UART0
# CONFIG_KINETIS_UART1 - Support UART1
# CONFIG_KINETIS_UART2 - Support UART2
# CONFIG_KINETIS_UART3 - Support UART3
# CONFIG_KINETIS_UART4 - Support UART4
# CONFIG_KINETIS_UART5 - Support UART5
# CONFIG_KINETIS_ETHERNET - Support Ethernet (K60 only)
# CONFIG_KINETIS_RNGB - Support the random number generator(K60 only)
# CONFIG_KINETIS_FLEXCAN0 - Support FlexCAN0
# CONFIG_KINETIS_FLEXCAN1 - Support FlexCAN1
# CONFIG_KINETIS_SPI0 - Support SPI0
# CONFIG_KINETIS_SPI1 - Support SPI1
# CONFIG_KINETIS_SPI2 - Support SPI2
# CONFIG_KINETIS_I2C0 - Support I2C0
# CONFIG_KINETIS_I2C1 - Support I2C1
# CONFIG_KINETIS_I2S - Support I2S
# CONFIG_KINETIS_DAC0 - Support DAC0
# CONFIG_KINETIS_DAC1 - Support DAC1
# CONFIG_KINETIS_ADC0 - Support ADC0
# CONFIG_KINETIS_ADC1 - Support ADC1
# CONFIG_KINETIS_CMP - Support CMP
# CONFIG_KINETIS_VREF - Support VREF
# CONFIG_KINETIS_SDHC - Support SD host controller
# CONFIG_KINETIS_FTM0 - Support FlexTimer 0
# CONFIG_KINETIS_FTM1 - Support FlexTimer 1
# CONFIG_KINETIS_FTM2 - Support FlexTimer 2
# CONFIG_KINETIS_LPTIMER - Support the low power timer
# CONFIG_KINETIS_RTC - Support RTC
# CONFIG_KINETIS_SLCD - Support the segment LCD (K40 only)
# CONFIG_KINETIS_EWM - Support the external watchdog
# CONFIG_KINETIS_CMT - Support Carrier Modulator Transmitter
# CONFIG_KINETIS_USBOTG - Support USB OTG (see also CONFIG_USBHOST and CONFIG_USBDEV)
# CONFIG_KINETIS_USBDCD - Support the USB Device Charger Detection module
# CONFIG_KINETIS_LLWU - Support the Low Leakage Wake-Up Unit
# CONFIG_KINETIS_TSI - Support the touch screeen interface
# CONFIG_KINETIS_FTFL - Support FLASH
# CONFIG_KINETIS_DMA - Support DMA
# CONFIG_KINETIS_CRC - Support CRC
# CONFIG_KINETIS_PDB - Support the Programmable Delay Block
# CONFIG_KINETIS_PIT - Support Programmable Interval Timers
# CONFIG_ARMV7M_MPU - Support the MPU
CONFIG_KINETIS_TRACE=n
CONFIG_KINETIS_FLEXBUS=n
CONFIG_KINETIS_UART0=y
CONFIG_KINETIS_UART1=y
CONFIG_KINETIS_UART2=n
CONFIG_KINETIS_UART3=n
CONFIG_KINETIS_UART4=n
CONFIG_KINETIS_UART5=n
CONFIG_KINETIS_I2C1=n
CONFIG_KINETIS_I2C2=n
CONFIG_KINETIS_USB=y
CONFIG_KINETIS_CAN=n
CONFIG_KINETIS_BKP=n
CONFIG_KINETIS_PWR=n
CONFIG_KINETIS_DAC=n
# APB2:
CONFIG_KINETIS_ADC1=n
CONFIG_KINETIS_ADC2=n
CONFIG_KINETIS_TIM1=n
CONFIG_KINETIS_ETHERNET=n
CONFIG_KINETIS_RNGB=n
CONFIG_KINETIS_FLEXCAN0=n
CONFIG_KINETIS_FLEXCAN1=n
CONFIG_KINETIS_SPI0=n
CONFIG_KINETIS_SPI1=n
CONFIG_KINETIS_TIM8=n
CONFIG_KINETIS_UART1=y
CONFIG_KINETIS_ADC3=n
CONFIG_KINETIS_SPI2=n
CONFIG_KINETIS_I2C0=n
CONFIG_KINETIS_I2C1=n
CONFIG_KINETIS_I2S=n
CONFIG_KINETIS_DAC0=n
CONFIG_KINETIS_DAC1=n
CONFIG_KINETIS_ADC0=n
CONFIG_KINETIS_ADC1=n
CONFIG_KINETIS_CMP=n
CONFIG_KINETIS_VREF=n
CONFIG_KINETIS_SDHC=n
CONFIG_KINETIS_FTM0=n
CONFIG_KINETIS_FTM1=n
CONFIG_KINETIS_FTM2=n
CONFIG_KINETIS_LPTIMER=n
CONFIG_KINETIS_RTC=n
CONFIG_KINETIS_SLCD=n
CONFIG_KINETIS_EWM=n
CONFIG_KINETIS_CMT=n
CONFIG_KINETIS_USBOTG=n
CONFIG_KINETIS_USBDCD=n
CONFIG_KINETIS_LLWU=n
CONFIG_KINETIS_TSI=n
CONFIG_KINETIS_FTFL=n
CONFIG_KINETIS_DMA=n
CONFIG_KINETIS_CRC=n
CONFIG_KINETIS_PDB=n
CONFIG_KINETIS_PIT=n
CONFIG_ARMV7M_MPU=n
#
# PIN Interrupt Support
#
# CONFIG_GPIO_IRQ -- Enable pin interrtup support. Also needs one or
# more of the following:
# CONFIG_KINETIS_PORTAINTS -- Support 32 Port A interrupts
# CONFIG_KINETIS_PORTBINTS -- Support 32 Port B interrupts
# CONFIG_KINETIS_PORTCINTS -- Support 32 Port C interrupts
# CONFIG_KINETIS_PORTDINTS -- Support 32 Port D interrupts
# CONFIG_KINETIS_PORTEINTS -- Support 32 Port E interrupts
#
CONFIG_GPIO_IRQ=n
CONFIG_KINETIS_PORTAINTS=n
CONFIG_KINETIS_PORTBINTS=n
CONFIG_KINETIS_PORTCINTS=n
CONFIG_KINETIS_PORTDINTS=n
CONFIG_KINETIS_PORTEINTS=n
#
# K40X256VLQ100 specific serial device driver settings
@@ -151,37 +222,42 @@ CONFIG_KINETIS_ADC3=n
# CONFIG_UARTn_BITS - The number of bits. Must be either 8 or 9.
# CONFIG_UARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity
#
CONFIG_UART1_SERIAL_CONSOLE=n
CONFIG_UART1_SERIAL_CONSOLE=y
CONFIG_UART2_SERIAL_CONSOLE=n
CONFIG_UART3_SERIAL_CONSOLE=n
CONFIG_UART4_SERIAL_CONSOLE=n
CONFIG_UART5_SERIAL_CONSOLE=n
CONFIG_UART0_TXBUFSIZE=256
CONFIG_UART1_TXBUFSIZE=256
CONFIG_UART2_TXBUFSIZE=256
CONFIG_UART3_TXBUFSIZE=256
CONFIG_UART4_TXBUFSIZE=256
CONFIG_UART5_TXBUFSIZE=256
CONFIG_UART0_RXBUFSIZE=256
CONFIG_UART1_RXBUFSIZE=256
CONFIG_UART2_RXBUFSIZE=256
CONFIG_UART3_RXBUFSIZE=256
CONFIG_UART4_RXBUFSIZE=256
CONFIG_UART5_RXBUFSIZE=256
CONFIG_UART0_BAUD=115200
CONFIG_UART1_BAUD=115200
CONFIG_UART2_BAUD=115200
CONFIG_UART3_BAUD=115200
CONFIG_UART4_BAUD=115200
CONFIG_UART5_BAUD=115200
CONFIG_UART0_BITS=8
CONFIG_UART1_BITS=8
CONFIG_UART2_BITS=8
CONFIG_UART3_BITS=8
CONFIG_UART4_BITS=8
CONFIG_UART5_BITS=8
CONFIG_UART1_PARITY=0
CONFIG_UART0_PARITY=0
CONFIG_UART2_PARITY=0
CONFIG_UART3_PARITY=0
CONFIG_UART4_PARITY=0
@@ -304,7 +380,7 @@ CONFIG_HAVE_LIBM=n
# handle delayed processing from interrupt handlers. This feature
# is required for some drivers but, if there are not complaints,
# can be safely disabled. The worker thread also performs
# garbage collection -- completing any delayed memory deallocations
# garbage collection--completing any delayed memory deallocations
# from interrupt handlers. If the worker thread is disabled,
# then that clean will be performed by the IDLE thread instead
# (which runs at the lowest of priority and may not be appropriate
@@ -734,7 +810,7 @@ CONFIG_EXAMPLES_OSTEST_NBARRIER_THREADS=3
# specific initialization (nsh_archinitialize()).
#
# If CONFIG_NSH_TELNET is selected:
# CONFIG_NSH_IOBUFFER_SIZE -- Telnetd I/O buffer size
# CONFIG_NSH_IOBUFFER_SIZE - Telnetd I/O buffer size
# CONFIG_NSH_DHCPC - Obtain address using DHCP
# CONFIG_NSH_IPADDR - Provides static IP address
# CONFIG_NSH_DRIPADDR - Provides static router IP address
configs/twr-k60n512/README.txt
+562
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