mirror of
https://github.com/apache/nuttx.git
synced 2026-06-07 01:05:54 +08:00
SAMA5: ADC and touchscreen drivers now build without errors
This commit is contained in:
Gregory Nutt
@@ -176,7 +176,6 @@ endif
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ifeq ($(CONFIG_SAMA5_ADC),y)
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CHIP_CSRCS += sam_adc.c
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else
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ifeq ($(CONFIG_SAMA5_TSD),y)
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CHIP_CSRCS += sam_tsd.c
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endif
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@@ -140,7 +140,7 @@
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#define SAM_ADC_XPOSR (SAM_TSADC_VBASE+SAM_ADC_XPOSR_OFFSET)
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#define SAM_ADC_YPOSR (SAM_TSADC_VBASE+SAM_ADC_YPOSR_OFFSET)
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#define SAM_ADC_PRESSR (SAM_TSADC_VBASE+SAM_ADC_PRESSR_OFFSET)
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#define SAM_ADC_TRGR (SAM_TSADC_VBASE+SAM_ADC_TRGR_OFFSET
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#define SAM_ADC_TRGR (SAM_TSADC_VBASE+SAM_ADC_TRGR_OFFSET)
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#define SAM_ADC_WPMR (SAM_TSADC_VBASE+SAM_ADC_WPMR_OFFSET)
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#define SAM_ADC_WPSR (SAM_TSADC_VBASE+SAM_ADC_WPSR_OFFSET)
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@@ -169,23 +169,23 @@
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#define ADC_MR_PRESCAL_MASK (0xff << ADC_MR_PRESCAL_SHIFT)
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# define ADC_MR_PRESCAL(n) ((uint32_t)(n) << ADC_MR_PRESCAL_SHIFT)
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#define ADC_MR_STARTUP_SHIFT (16) /* Bits 16-19: Start Up Time */
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#define ADC_MR_STARTUP_MASK (15 << ADC_MR_STARTUP_SHIFT
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# define ADC_MR_STARTUP_0 (0 << ADC_MR_STARTUP_SHIFT /* 0 periods of ADCClock */
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# define ADC_MR_STARTUP_8 (1 << ADC_MR_STARTUP_SHIFT /* 8 periods of ADCClock */
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# define ADC_MR_STARTUP_16 (2 << ADC_MR_STARTUP_SHIFT /* 16 periods of ADCClock */
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# define ADC_MR_STARTUP_24 (3 << ADC_MR_STARTUP_SHIFT /* 24 periods of ADCClock */
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# define ADC_MR_STARTUP_64 (4 << ADC_MR_STARTUP_SHIFT /* 64 periods of ADCClock */
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# define ADC_MR_STARTUP_80 (5 << ADC_MR_STARTUP_SHIFT /* 80 periods of ADCClock */
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# define ADC_MR_STARTUP_96 (6 << ADC_MR_STARTUP_SHIFT /* 96 periods of ADCClock */
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# define ADC_MR_STARTUP_112 (7 << ADC_MR_STARTUP_SHIFT /* 112 periods of ADCClock */
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# define ADC_MR_STARTUP_512 (8 << ADC_MR_STARTUP_SHIFT /* 512 periods of ADCClock */
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# define ADC_MR_STARTUP_576 (9 << ADC_MR_STARTUP_SHIFT /* 576 periods of ADCClock */
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# define ADC_MR_STARTUP_640 (10 << ADC_MR_STARTUP_SHIFT /* 640 periods of ADCClock */
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# define ADC_MR_STARTUP_704 (11 << ADC_MR_STARTUP_SHIFT /* 704 periods of ADCClock */
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# define ADC_MR_STARTUP_768 (12 << ADC_MR_STARTUP_SHIFT /* 768 periods of ADCClock */
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# define ADC_MR_STARTUP_832 (13 << ADC_MR_STARTUP_SHIFT /* 832 periods of ADCClock */
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# define ADC_MR_STARTUP_896 (14 << ADC_MR_STARTUP_SHIFT /* 896 periods of ADCClock */
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# define ADC_MR_STARTUP_960 (15 << ADC_MR_STARTUP_SHIFT /* 960 periods of ADCClock */
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#define ADC_MR_STARTUP_MASK (15 << ADC_MR_STARTUP_SHIFT)
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# define ADC_MR_STARTUP_0 (0 << ADC_MR_STARTUP_SHIFT) /* 0 periods of ADCClock */
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# define ADC_MR_STARTUP_8 (1 << ADC_MR_STARTUP_SHIFT) /* 8 periods of ADCClock */
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# define ADC_MR_STARTUP_16 (2 << ADC_MR_STARTUP_SHIFT) /* 16 periods of ADCClock */
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# define ADC_MR_STARTUP_24 (3 << ADC_MR_STARTUP_SHIFT) /* 24 periods of ADCClock */
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# define ADC_MR_STARTUP_64 (4 << ADC_MR_STARTUP_SHIFT) /* 64 periods of ADCClock */
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# define ADC_MR_STARTUP_80 (5 << ADC_MR_STARTUP_SHIFT) /* 80 periods of ADCClock */
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# define ADC_MR_STARTUP_96 (6 << ADC_MR_STARTUP_SHIFT) /* 96 periods of ADCClock */
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# define ADC_MR_STARTUP_112 (7 << ADC_MR_STARTUP_SHIFT) /* 112 periods of ADCClock */
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# define ADC_MR_STARTUP_512 (8 << ADC_MR_STARTUP_SHIFT) /* 512 periods of ADCClock */
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# define ADC_MR_STARTUP_576 (9 << ADC_MR_STARTUP_SHIFT) /* 576 periods of ADCClock */
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# define ADC_MR_STARTUP_640 (10 << ADC_MR_STARTUP_SHIFT) /* 640 periods of ADCClock */
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# define ADC_MR_STARTUP_704 (11 << ADC_MR_STARTUP_SHIFT) /* 704 periods of ADCClock */
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# define ADC_MR_STARTUP_768 (12 << ADC_MR_STARTUP_SHIFT) /* 768 periods of ADCClock */
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# define ADC_MR_STARTUP_832 (13 << ADC_MR_STARTUP_SHIFT) /* 832 periods of ADCClock */
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# define ADC_MR_STARTUP_896 (14 << ADC_MR_STARTUP_SHIFT) /* 896 periods of ADCClock */
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# define ADC_MR_STARTUP_960 (15 << ADC_MR_STARTUP_SHIFT) /* 960 periods of ADCClock */
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#define ADC_MR_SETTLING_SHIFT (20) /* Bits 20-21: Analog Settling Time */
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#define ADC_MR_SETTLING_MASK (15 << ADC_MR_SETTLING_SHIFT)
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# define ADC_MR_SETTLING_3 (0 << ADC_MR_SETTLING_SHIFT) /* 3 periods of ADCClock */
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@@ -291,10 +291,10 @@
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#define ADC_INT_EOC5 (1 << 5) /* Bit 5: End of Conversion 5 */
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#define ADC_INT_EOC6 (1 << 6) /* Bit 6: End of Conversion 6 */
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#define ADC_INT_EOC7 (1 << 7) /* Bit 7: End of Conversion 7 */
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#define ADC_INT_EOC7 (1 << 8) /* Bit 8: End of Conversion 8 */
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#define ADC_INT_EOC7 (1 << 9) /* Bit 9: End of Conversion 9 */
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#define ADC_INT_EOC7 (1 << 10) /* Bit 10: End of Conversion 10 */
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#define ADC_INT_EOC7 (1 << 11) /* Bit 11: End of Conversion 11 */
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#define ADC_INT_EOC8 (1 << 8) /* Bit 8: End of Conversion 8 */
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#define ADC_INT_EOC9 (1 << 9) /* Bit 9: End of Conversion 9 */
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#define ADC_INT_EOC10 (1 << 10) /* Bit 10: End of Conversion 10 */
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#define ADC_INT_EOC11 (1 << 11) /* Bit 11: End of Conversion 11 */
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#define ADC_INT_EOCALL (0x00000fff)
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#define ADC_INT_XRDY (1 << 20) /* Bit 20: TS Measure XPOS Ready Interrupt */
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@@ -378,10 +378,10 @@
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# define ADC_CGR_GAIN9(v) ((uint32_t)(v) << ADC_CGR_GAIN9_SHIFT)
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#define ADC_CGR_GAIN10_SHIFT (20) /* Bits 20-21: User sequence number 10 */
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#define ADC_CGR_GAIN10_MASK (3 << ADC_CGR_GAIN10_SHIFT)
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# define ADC_CGR_GAIN2(v) ((uint32_t)(v) << ADC_CGR_GAIN10_SHIFT)
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# define ADC_CGR_GAIN10(v) ((uint32_t)(v) << ADC_CGR_GAIN10_SHIFT)
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#define ADC_CGR_GAIN11_SHIFT (22) /* Bits 22-23: User sequence number 11 */
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#define ADC_CGR_GAIN11_MASK (3 << ADC_CGR_GAIN11_SHIFT)
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# define ADC_CGR_GAIN3(v) ((uint32_t)(v) << ADC_CGR_GAIN11_SHIFT)
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# define ADC_CGR_GAIN11(v) ((uint32_t)(v) << ADC_CGR_GAIN11_SHIFT)
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/* Channel Offset Register */
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@@ -441,7 +441,7 @@
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# define ADC_TSMR_TSMODE_5WIRE (3 << ADC_TSMR_TSMODE_SHIFT) /* 5-wire Touchscreen */
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#define ADC_TSMR_TSAV_SHIFT (4) /* Bit 4-5: Touchscreen Average */
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#define ADC_TSMR_TSAV_MASK (3 << ADC_TSMR_TSAV_SHIFT)
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# define ADC_TSMR_TSAV_NFILTER (0 << ADC_TSMR_TSAV_SHIFT) /* No Filtering */
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# define ADC_TSMR_TSAV_NOFILTER (0 << ADC_TSMR_TSAV_SHIFT) /* No Filtering */
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# define ADC_TSMR_TSAV_2CONV (1 << ADC_TSMR_TSAV_SHIFT) /* Average 2 ADC conversions */
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# define ADC_TSMR_TSAV_4CONV (2 << ADC_TSMR_TSAV_SHIFT) /* Average 4 ADC conversions */
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# define ADC_TSMR_TSAV_8CONV (3 << ADC_TSMR_TSAV_SHIFT) /* Averages 8 ADC conversions */
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@@ -69,6 +69,7 @@
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#include "chip.h"
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#include "chip/sam_adc.h"
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#include "chip/sam_pmc.h"
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#include "sam_periphclks.h"
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#include "sam_dmac.h"
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#include "sam_tsd.h"
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#include "sam_adc.h"
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@@ -286,12 +287,12 @@
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#ifdef CONFIG_SAMA5_TSD
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# ifdef CONFIG_SAMA5_TSD_5WIRE
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# SAMA5_ADC_CHALL (ADC_CHALL & ~TSD_5WIRE_ALL)
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# define SAMA5_ADC_CHALL (ADC_CHALL & ~TSD_5WIRE_ALL)
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# else
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# SAMA5_ADC_CHALL (ADC_CHALL & ~TSD_4WIRE_ALL)
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# define SAMA5_ADC_CHALL (ADC_CHALL & ~TSD_4WIRE_ALL)
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# endif
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#else
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# SAMA5_ADC_CHALL ADC_CHALL
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# define SAMA5_ADC_CHALL ADC_CHALL
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#endif
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/* DMA configuration flags */
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@@ -409,6 +410,7 @@ static bool sam_adc_checkreg(struct sam_adc_s *priv, bool wr,
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/* DMA helper functions */
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#ifdef SAMA5_ADC_HAVE_CHANNELS
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#ifdef CONFIG_SAMA5_ADC_DMA
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static void sam_adc_dmadone(void *arg);
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static void sam_adc_dmacallback(DMA_HANDLE handle, void *arg, int result);
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@@ -418,7 +420,6 @@ static int sam_adc_dmasetup(struct sam_adc_s *priv, FAR uint8_t *buffer,
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/* ADC interrupt handling */
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#ifdef SAMA5_ADC_HAVE_CHANNELS
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static void sam_adc_endconversion(void *arg);
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#endif
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static int sam_adc_interrupt(int irq, void *context);
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@@ -440,7 +441,7 @@ static void sam_adc_offset(struct sam_adc_s *priv);
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static void sam_adc_gain(struct sam_adc_s *priv);
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static void sam_adc_analogchange(struct sam_adc_s *priv);
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static void sam_adc_sequencer(struct sam_adc_s *priv);
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static void sam_adc_channels(truct sam_adc_s *priv);
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static void sam_adc_channels(struct sam_adc_s *priv);
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#endif
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/****************************************************************************
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@@ -772,6 +773,7 @@ ignored:
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sem_adc_unlock(priv->adc);
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}
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#endif /* SAMA5_ADC_HAVE_CHANNELS */
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/****************************************************************************
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* Name: sam_adc_interrupt
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@@ -783,12 +785,10 @@ ignored:
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static int sam_adc_interrupt(int irq, void *context)
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{
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struct sam_adc_s *priv = (struct sam_adc_s *)g_adcdev.ad_priv;
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struct sam_adc_s *priv = &g_adcpriv;
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uint32_t isr;
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uint32_t imr;
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uint32_t pending;
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uint32_t regval;
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int ret;
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/* Get the set of unmasked, pending ADC interrupts */
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@@ -799,12 +799,12 @@ static int sam_adc_interrupt(int irq, void *context)
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/* Handle pending touchscreen interrupts */
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#ifdef CONFIG_SAMA5_TSD
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if ((pending & ADC_TSD_INTS) != 0)
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if ((pending & ADC_TSD_ALLINTS) != 0)
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{
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/* Let the touchscreen handle its interrupts */
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sam_adc_interrupt(pending);
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pending &= ~ADC_TSD_INTS;
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sam_tsd_interrupt(pending);
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pending &= ~ADC_TSD_ALLINTS;
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}
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#endif
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@@ -813,6 +813,8 @@ static int sam_adc_interrupt(int irq, void *context)
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if ((pending & ADC_INT_EOCALL) != 0)
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{
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int ret;
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/* Disable further end-of-conversion interrupts. End-of-conversion
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* interrupts will be re-enabled after the worker thread executes.
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*/
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@@ -847,6 +849,8 @@ static int sam_adc_interrupt(int irq, void *context)
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return OK;
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}
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#ifdef SAMA5_ADC_HAVE_CHANNELS
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/****************************************************************************
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* ADC methods
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****************************************************************************/
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@@ -900,7 +904,7 @@ static void sam_adc_reset(struct adc_dev_s *dev)
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regval = sam_adc_getreg(priv, SAM_ADC_TRGR);
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regval &= ~ADC_TRGR_TRGMOD_MASK;
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regval |= ADC_TRGR_TRGMOD_NO_TRIGGER;
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regval |= ADC_TRGR_TRGMOD_NOTRIG;
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sam_adc_putreg(priv, SAM_ADC_TRGR, regval);
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#endif
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}
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@@ -927,7 +931,7 @@ static int sam_adc_setup(struct adc_dev_s *dev)
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regval = sam_adc_getreg(priv, SAM_ADC_EMR);
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regval |= ADC_EMR_TAG;
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sam_adc_puttreg(priv, SAM_ADC_EMR, regval);
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sam_adc_putreg(priv, SAM_ADC_EMR, regval);
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/* Enable (or disable) the sequencer */
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@@ -1084,7 +1088,7 @@ static void sam_adc_trigger(struct sam_adc_s *priv)
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regval = sam_adc_getreg(priv, SAM_ADC_TRGR);
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regval &= ~ADC_TRGR_TRGMOD_MASK;
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regval |= ADC_TRGR_TRGMOD_NO_TRIGGER;
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regval |= ADC_TRGR_TRGMOD_NOTRIG;
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sam_adc_putreg(priv, SAM_ADC_TRGR, regval);
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#elif defined(CONFIG_SAMA5_ADC_ADTRG)
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@@ -1418,7 +1422,7 @@ static void sam_adc_setseqr(int chan, uint32_t *seqr1, uint32_t *seqr2, int seq)
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}
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#endif
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static void sam_adc_sequencer(truct sam_adc_s *priv)
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static void sam_adc_sequencer(struct sam_adc_s *priv)
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{
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#ifdef CONFIG_SAMA5_ADC_SEQUENCER
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uint32_t seqr1;
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@@ -1520,7 +1524,6 @@ static void sam_adc_sequencer(truct sam_adc_s *priv)
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#endif
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}
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#endif
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/****************************************************************************
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* Name: sam_adc_channels
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@@ -1530,7 +1533,7 @@ static void sam_adc_sequencer(truct sam_adc_s *priv)
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*
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****************************************************************************/
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static void sam_adc_channels(truct sam_adc_s *priv)
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static void sam_adc_channels(struct sam_adc_s *priv)
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{
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uint32_t regval;
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@@ -1594,7 +1597,7 @@ static void sam_adc_channels(truct sam_adc_s *priv)
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sam_adc_putreg(priv, SAM_ADC_CHER, regval);
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}
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#endif
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#endif /* SAMA5_ADC_HAVE_CHANNELS */
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/****************************************************************************
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* Public Functions
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@@ -1611,9 +1614,11 @@ static void sam_adc_channels(truct sam_adc_s *priv)
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*
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****************************************************************************/
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struct adc_dev_s *sam_adc_initialize(void)
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struct sam_adc_s *sam_adc_initialize(void)
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{
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struct sam_adc_s *priv = &g_adcpriv;
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uint32_t regval;
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int ret;
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/* Have we already been initialzed? If yes, than just hand out the
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* interface one more time.
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@@ -1719,8 +1724,8 @@ struct adc_dev_s *sam_adc_initialize(void)
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regval = sam_adc_getreg(priv, SAM_ADC_MR);
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regval &= ~(ADC_MR_STARTUP_MASK | ADC_MR_TRACKTIM_MASK | ADC_MR_SETTLING_MASK);
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regval |= ADC_MR_STARTUP_SUT512 | ADC_MR_TRACKTIM(0) | ADC_MR_SETTLING_AST17;
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sam_adc_puttreg(priv, SAM_ADC_MR, regval);
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regval |= (ADC_MR_STARTUP_512 | ADC_MR_TRACKTIM(0) | ADC_MR_SETTLING_17);
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sam_adc_putreg(priv, SAM_ADC_MR, regval);
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/* Attach the ADC interrupt */
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@@ -1741,12 +1746,12 @@ struct adc_dev_s *sam_adc_initialize(void)
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/* Now we are initialized */
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priv->intialized = true;
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priv->initialized = true;
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}
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/* Return a pointer to the device structure */
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return &g_adcdev;
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return &g_adcpriv;
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}
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/****************************************************************************
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@@ -1784,7 +1789,7 @@ void sam_adc_lock(FAR struct sam_adc_s *priv)
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void sam_adc_unlock(FAR struct sam_adc_s *priv)
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{
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sem_post(&priv->exclsem)
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sem_post(&priv->exclsem);
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}
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/****************************************************************************
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@@ -1796,7 +1801,7 @@ void sam_adc_unlock(FAR struct sam_adc_s *priv)
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****************************************************************************/
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#ifdef CONFIG_SAMA5_ADC_REGDEBUG
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static uint32_t sam_adc_getreg(struct sam_adc_s *priv, uintptr_t address)
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uint32_t sam_adc_getreg(struct sam_adc_s *priv, uintptr_t address)
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{
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uint32_t regval = getreg32(address);
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@@ -121,7 +121,7 @@ extern "C"
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****************************************************************************/
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struct sam_adc_s;
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FAR struct sam_adc_s *sam_adcinitialize(void);
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FAR struct sam_adc_s *sam_adc_initialize(void);
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/****************************************************************************
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* Interfaces exported from the ADC to the touchscreen driver
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+94
-107
@@ -52,8 +52,10 @@
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#include <sys/types.h>
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#include <stdbool.h>
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#include <stdio.h>
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#include <string.h>
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#include <semaphore.h>
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#include <fcntl.h>
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#include <poll.h>
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#include <wdog.h>
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#include <errno.h>
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@@ -62,9 +64,13 @@
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#include <nuttx/arch.h>
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#include <nuttx/wqueue.h>
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#include <nuttx/clock.h>
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#include <nuttx/input/touchscreen.h>
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#include <arch/board/board.h>
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#include "chip/sam_adc.h"
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#include "sam_adc.h"
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#include "sam_tsd.h"
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#if defined(CONFIG_SAMA5_ADC) && defined(CONFIG_SAMA5_TSD)
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@@ -90,21 +96,6 @@
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#define INVALID_THRESHOLD 0x1000
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/* Touchscreen interrupt event sets
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*
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* ADC_INT_XRDY TS Measure XPOS Ready Interrupt
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* ADC_INT_YRDY TS Measure YPOS Ready Interrupt
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* ADC_INT_PRDY TS Measure Pressure Ready Interrupt
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* ADC_INT_PEN Pen Contact Interrupt
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* ADC_INT_NOPEN No Pen Contact Interrupt
|
||||
* ADC_SR_PENS Pen detect Status (Not an interrupt)
|
||||
*/
|
||||
|
||||
#define ADC_TSD_CMNINTS (ADC_INT_XRDY | ADC_INT_YRDY | ADC_INT_PRDY | ADC_INT_NOPEN)
|
||||
#define ADC_TSD_ALLINTS (ADC_TSD_CMNINTS | ADC_INT_PEN)
|
||||
#define ADC_TSD_ALLSTATUS (ADC_TSD_ALLINTS | ADC_INT_PENS)
|
||||
#define ADC_TSD_RELEASEINTS ADC_TSD_CMNINTS
|
||||
|
||||
/* Data read bit definitions */
|
||||
|
||||
#define TSD_XREADY (1 << 0) /* X value is ready */
|
||||
@@ -134,6 +125,16 @@
|
||||
# define TSD_PENMOVE (TOUCH_MOVE | TOUCH_ID_VALID | TOUCH_POS_VALID)
|
||||
#endif
|
||||
|
||||
/* Ever-present MIN and MAX macros */
|
||||
|
||||
#ifndef MIN
|
||||
# define MIN(a,b) (((a) < (b)) ? (a) : (b))
|
||||
#endif
|
||||
|
||||
#ifndef MAX
|
||||
# define MAX(a,b) (((a) > (b)) ? (a) : (b))
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Private Types
|
||||
****************************************************************************/
|
||||
@@ -451,7 +452,7 @@ static void sam_tsd_setaverage(struct sam_tsd_s *priv, uint32_t tsav)
|
||||
|
||||
/* Get the current value of the TSMR register */
|
||||
|
||||
regval = sam_adc_getreg(priv->dev, SAM_ADC_TSMR);
|
||||
regval = sam_adc_getreg(priv->adc, SAM_ADC_TSMR);
|
||||
|
||||
/* Get the unshifted TSAVE value and compare it to the touchscreen
|
||||
* frequency
|
||||
@@ -462,7 +463,7 @@ static void sam_tsd_setaverage(struct sam_tsd_s *priv, uint32_t tsav)
|
||||
* minfreq = 3: Averages 8 ADC conversions
|
||||
*/
|
||||
|
||||
minfreq = (tsav >> ADC_TSMR_TSAV_SHIF);
|
||||
minfreq = (tsav >> ADC_TSMR_TSAV_SHIFT);
|
||||
if (minfreq)
|
||||
{
|
||||
/* TSFREQ: Defines the Touchscreen Frequency compared to the Trigger
|
||||
@@ -481,9 +482,9 @@ static void sam_tsd_setaverage(struct sam_tsd_s *priv, uint32_t tsav)
|
||||
|
||||
/* Save the new filter value */
|
||||
|
||||
regval &= ADC_TSMR_TSAV_MASK
|
||||
regval &= ADC_TSMR_TSAV_MASK;
|
||||
regval |= tsav;
|
||||
sam_adc_putreg(priv->dev, SAM_ADC_TSMR, regval);
|
||||
sam_adc_putreg(priv->adc, SAM_ADC_TSMR, regval);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
@@ -520,8 +521,8 @@ static void sam_tsd_bottomhalf(void *arg)
|
||||
uint32_t z1;
|
||||
uint32_t z2;
|
||||
uint32_t pressr;
|
||||
uint32_t p;
|
||||
bool pendown;
|
||||
int ret;
|
||||
|
||||
ASSERT(priv != NULL);
|
||||
|
||||
@@ -582,13 +583,13 @@ static void sam_tsd_bottomhalf(void *arg)
|
||||
|
||||
/* Stop periodic trigger & enable pen */
|
||||
|
||||
sam_tsd_setaverage(priv, ADC_TSMR_TSAV_NO_FILTER);
|
||||
sam_tsd_setaverage(priv, ADC_TSMR_TSAV_NOFILTER);
|
||||
sam_tsd_debounce(priv, BOARD_TSD_DEBOUNCE);
|
||||
|
||||
regval = sam_adc_getreg(priv, SAM_ADC_TRGR);
|
||||
regval = sam_adc_getreg(priv->adc, SAM_ADC_TRGR);
|
||||
regval &= ~ADC_TRGR_TRGMOD_MASK;
|
||||
regval |= ADC_TRGR_TRGMOD_PEN_TRIG;
|
||||
sam_adc_putreg(priv, SAM_ADC_TRGR, regval);
|
||||
regval |= ADC_TRGR_TRGMOD_PEN;
|
||||
sam_adc_putreg(priv->adc, SAM_ADC_TRGR, regval);
|
||||
}
|
||||
|
||||
/* It is a pen down event. If the last loss-of-contact event has not been
|
||||
@@ -642,7 +643,7 @@ static void sam_tsd_bottomhalf(void *arg)
|
||||
* release events.
|
||||
*/
|
||||
|
||||
ier = ADC_TSD_RELEASEINTS
|
||||
ier = ADC_TSD_RELEASEINTS;
|
||||
|
||||
/* Check if all data is ready. If not, just re-enable interrupts and
|
||||
* wait until it is.
|
||||
@@ -656,8 +657,8 @@ static void sam_tsd_bottomhalf(void *arg)
|
||||
|
||||
/* Sample positional values. Get raw X and Y position data */
|
||||
|
||||
xr = sam_adc_getreg(priv, SAM_ADC_XPOSR);
|
||||
yr = sam_adc_getreg(priv, SAM_ADC_YPOSR);
|
||||
xr = sam_adc_getreg(priv->adc, SAM_ADC_XPOSR);
|
||||
yr = sam_adc_getreg(priv->adc, SAM_ADC_YPOSR);
|
||||
|
||||
#ifdef CONFIG_SAMA5_TSD_SWAPXY
|
||||
/* Scale the measurements */
|
||||
@@ -682,7 +683,7 @@ static void sam_tsd_bottomhalf(void *arg)
|
||||
* decide if we are going to use this measurement.
|
||||
*/
|
||||
|
||||
pressr = sam_adc_getreg(priv, SAM_ADC_PRESSR);
|
||||
pressr = sam_adc_getreg(priv->adc, SAM_ADC_PRESSR);
|
||||
#endif
|
||||
|
||||
/* Perform a thresholding operation so that the results will be
|
||||
@@ -764,13 +765,13 @@ static void sam_tsd_bottomhalf(void *arg)
|
||||
|
||||
/* Configure for periodic trigger */
|
||||
|
||||
sam_tsd_setaverage(priv, ADC_TSMR_TSAV_AVG8CONV);
|
||||
sam_tsd_setaverage(priv, ADC_TSMR_TSAV_8CONV);
|
||||
sam_tsd_debounce(priv, 300); /* 300ns */
|
||||
|
||||
regval = sam_adc_getreg(priv, SAM_ADC_TRGR);
|
||||
regval = sam_adc_getreg(priv->adc, SAM_ADC_TRGR);
|
||||
regval &= ~ADC_TRGR_TRGMOD_MASK;
|
||||
regval |= ADC_TRGR_TRGMOD_PERIOD_TRIG;
|
||||
sam_adc_putreg(priv, SAM_ADC_TRGR, regval);
|
||||
regval |= ADC_TRGR_TRGMOD_PERIOD;
|
||||
sam_adc_putreg(priv->adc, SAM_ADC_TRGR, regval);
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -789,11 +790,11 @@ static void sam_tsd_bottomhalf(void *arg)
|
||||
ignored:
|
||||
/* Re-enable touchscreen interrupts as appropriate. */
|
||||
|
||||
sam_adc_putreg32(priv->adc, SAM_ADC_IER, ier);
|
||||
sam_adc_putreg(priv->adc, SAM_ADC_IER, ier);
|
||||
|
||||
/* Release our lock on the state structure */
|
||||
|
||||
sem_adc_unlock(priv->adc);
|
||||
sam_adc_unlock(priv->adc);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
@@ -814,13 +815,13 @@ static int sam_tsd_schedule(struct sam_tsd_s *priv, uint32_t pending)
|
||||
* re-enabled after the worker thread executes.
|
||||
*/
|
||||
|
||||
sam_adc_putreg32(priv->adc, SAM_ADC_IDR, ADC_TSD_ALLINTS);
|
||||
sam_adc_putreg(priv->adc, SAM_ADC_IDR, ADC_TSD_ALLINTS);
|
||||
|
||||
/* Save the set of pending interrupts for the bottom half (in case any
|
||||
* were cleared by reading the ISR.
|
||||
*/
|
||||
|
||||
priv->pending = pending.
|
||||
priv->pending = pending;
|
||||
|
||||
/* Transfer processing to the worker thread. Since touchscreen ADC interrupts are
|
||||
* disabled while the work is pending, no special action should be required
|
||||
@@ -855,7 +856,7 @@ static void sam_tsd_expiry(int argc, uint32_t arg1, ...)
|
||||
* status bit as a minimum.
|
||||
*/
|
||||
|
||||
pending = sam_adc_getreg(priv, SAM_ADC_ISR) & ADC_TSD_ALLSTATUS;
|
||||
pending = sam_adc_getreg(priv->adc, SAM_ADC_ISR) & ADC_TSD_ALLSTATUS;
|
||||
(void)sam_tsd_schedule(priv, pending);
|
||||
}
|
||||
|
||||
@@ -896,29 +897,20 @@ static int sam_tsd_open(struct file *filep)
|
||||
|
||||
/* Initialize the touchscreen when it is first opened */
|
||||
|
||||
ret = OK;
|
||||
if (tmp == 1)
|
||||
{
|
||||
ret = sam_tsd_initialize(priv);
|
||||
sam_tsd_initialize(priv);
|
||||
}
|
||||
|
||||
/* Successfully opened */
|
||||
|
||||
ret = OK;
|
||||
}
|
||||
|
||||
errout_with_lock:
|
||||
sam_adc_unlock(priv->adc);
|
||||
|
||||
errout:
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* Enable pen contact detection */
|
||||
|
||||
regval |= ADC_TSMR_PENDET;
|
||||
sam_adc_putreg(priv->adc, SAM_ADC_TSMR, regval);
|
||||
|
||||
/* Set up pen debounce time */
|
||||
|
||||
sam_tsd_debounce(priv, BOARD_TSD_DEBOUNCE);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: sam_tsd_close
|
||||
****************************************************************************/
|
||||
@@ -926,34 +918,30 @@ errout:
|
||||
static int sam_tsd_close(struct file *filep)
|
||||
{
|
||||
FAR struct inode *inode = filep->f_inode;
|
||||
FAR struct watchdog_upperhalf_s *priv = inode->i_private;
|
||||
int ret;
|
||||
FAR struct sam_tsd_s *priv = inode->i_private;
|
||||
|
||||
ivdbg("crefs: %d\n", priv->crefs);
|
||||
|
||||
/* Get exclusive access to the device structures */
|
||||
/* Get exclusive access to the ADC device */
|
||||
|
||||
ret = sem_wait(&priv->exclsem);
|
||||
if (ret < 0)
|
||||
{
|
||||
ret = -errno;
|
||||
goto errout;
|
||||
}
|
||||
sam_adc_lock(priv->adc);
|
||||
|
||||
/* Decrement the references to the driver. If the reference count will
|
||||
* decrement to 0, then uninitialize the driver.
|
||||
/* Decrement the references to the driver */
|
||||
|
||||
DEBUGASSERT(priv->crefs > 0);
|
||||
priv->crefs--;
|
||||
|
||||
/* If this was the last reference to the driver, then un-initialize the
|
||||
* TSD now.
|
||||
*/
|
||||
|
||||
if (priv->crefs > 0)
|
||||
if (priv->crefs == 0)
|
||||
{
|
||||
priv->crefs--;
|
||||
sam_tsd_uninitialize(priv);
|
||||
}
|
||||
|
||||
sem_post(&priv->exclsem);
|
||||
ret = OK;
|
||||
|
||||
errout:
|
||||
return ret;
|
||||
sam_adc_unlock(priv->adc);
|
||||
return OK;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
@@ -991,7 +979,7 @@ static ssize_t sam_tsd_read(struct file *filep, char *buffer, size_t len)
|
||||
|
||||
/* Get exclusive access to the driver data structure */
|
||||
|
||||
sem_adc_lock(priv->adc);
|
||||
sam_adc_lock(priv->adc);
|
||||
|
||||
/* Try to read sample data. */
|
||||
|
||||
@@ -1048,7 +1036,7 @@ static ssize_t sam_tsd_read(struct file *filep, char *buffer, size_t len)
|
||||
if (sample.valid)
|
||||
{
|
||||
report->point[0].flags = TSD_PENUP_VALID;
|
||||
# }
|
||||
}
|
||||
else
|
||||
{
|
||||
report->point[0].flags = TSD_PENUP_INVALID;
|
||||
@@ -1075,9 +1063,9 @@ static ssize_t sam_tsd_read(struct file *filep, char *buffer, size_t len)
|
||||
ret = SIZEOF_TOUCH_SAMPLE_S(1);
|
||||
|
||||
errout:
|
||||
sem_adc_unlock(priv->adc);
|
||||
sam_adc_unlock(priv->adc);
|
||||
ivdbg("Returning: %d\n", ret);
|
||||
return ret;
|
||||
return (ssize_t)ret;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
@@ -1378,13 +1366,9 @@ static void sam_tsd_tracking(struct sam_tsd_s *priv, uint32_t time)
|
||||
|
||||
/* Set the neew TRACKTIM field value int he ADC MR register */
|
||||
|
||||
regval = ADC_MR_TRACKTIM(tracktim);
|
||||
regval |= pAdc->ADC_MR & ~ADC_MR_TRACKTIM_MASK;
|
||||
pAdc->ADC_MR = regval;
|
||||
|
||||
regval = sam_adc_getreg(priv->adc, SAM_ADC_MR);
|
||||
regval &= ~ADC_MR_TRACKTIM_MASK;
|
||||
regval |= ADC_MR_TRACKTIM(trigper);
|
||||
regval |= ADC_MR_TRACKTIM(tracktim);
|
||||
sam_adc_putreg(priv->adc, SAM_ADC_MR, regval);
|
||||
}
|
||||
|
||||
@@ -1480,7 +1464,7 @@ static void sam_tsd_debounce(struct sam_tsd_s *priv, uint32_t time)
|
||||
uint32_t candidate;
|
||||
uint32_t target;
|
||||
uint32_t regval;
|
||||
uint32_t penbc;
|
||||
uint32_t pendbc;
|
||||
uint32_t div;
|
||||
uint32_t clk;
|
||||
|
||||
@@ -1511,11 +1495,11 @@ static void sam_tsd_debounce(struct sam_tsd_s *priv, uint32_t time)
|
||||
|
||||
target = time * clk / div;
|
||||
candidate = 1;
|
||||
penbc = 0;
|
||||
pendbc = 0;
|
||||
|
||||
while (candidate < target)
|
||||
{
|
||||
penbc++;
|
||||
pendbc++;
|
||||
candidate *= 2;
|
||||
}
|
||||
|
||||
@@ -1526,7 +1510,7 @@ static void sam_tsd_debounce(struct sam_tsd_s *priv, uint32_t time)
|
||||
regval = sam_adc_getreg(priv->adc, SAM_ADC_TSMR);
|
||||
regval &= ~ADC_TSMR_PENDBC_MASK;
|
||||
regval |= ADC_TSMR_PENDBC(pendbc);
|
||||
sam_adc_puttreg(priv->adc, SAM_ADC_TSMR, regval);
|
||||
sam_adc_putreg(priv->adc, SAM_ADC_TSMR, regval);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
@@ -1551,10 +1535,10 @@ static void sam_tsd_initialize(struct sam_tsd_s *priv)
|
||||
|
||||
/* Disable touch trigger */
|
||||
|
||||
regval = sam_adc_getreg(priv, SAM_ADC_TRGR);
|
||||
regval = sam_adc_getreg(priv->adc, SAM_ADC_TRGR);
|
||||
regval &= ~ADC_TRGR_TRGMOD_MASK;
|
||||
regval |= ADC_TRGR_TRGMOD_NO_TRIGGER;
|
||||
sam_adc_putreg(priv, SAM_ADC_TRGR, regval);
|
||||
regval |= ADC_TRGR_TRGMOD_NOTRIG;
|
||||
sam_adc_putreg(priv->adc, SAM_ADC_TRGR, regval);
|
||||
|
||||
/* Setup timing */
|
||||
|
||||
@@ -1579,7 +1563,7 @@ static void sam_tsd_initialize(struct sam_tsd_s *priv)
|
||||
|
||||
/* Disable averaging */
|
||||
|
||||
sam_tsd_setaverage(priv, ADC_TSMR_TSAV_NO_FILTER);
|
||||
sam_tsd_setaverage(priv, ADC_TSMR_TSAV_NOFILTER);
|
||||
|
||||
/* Select 4-wire w/pressure, 4-wire w/o pressure, or 5 wire modes */
|
||||
|
||||
@@ -1596,32 +1580,37 @@ static void sam_tsd_initialize(struct sam_tsd_s *priv)
|
||||
|
||||
/* Disable all TSD-related interrupts */
|
||||
|
||||
sam_adc_putreg(priv, SAM_ADC_IDR, ADC_TSD_ALLINTS);
|
||||
sam_adc_putreg(priv->adc, SAM_ADC_IDR, ADC_TSD_ALLINTS);
|
||||
|
||||
/* Clear any pending TSD interrupts */
|
||||
|
||||
sam_adc_getreg(priv->dev, SAM_ADC_ISR);
|
||||
sam_adc_getreg(priv->adc, SAM_ADC_ISR);
|
||||
|
||||
/* Read and discard any samples */
|
||||
|
||||
sam_adc_getreg(priv, SAM_ADC_XPOSR);
|
||||
sam_adc_getreg(priv, SAM_ADC_YPOSR);
|
||||
sam_adc_getreg(priv->adc, SAM_ADC_XPOSR);
|
||||
sam_adc_getreg(priv->adc, SAM_ADC_YPOSR);
|
||||
#if CONFIG_SAMA5_TSD_4WIRE
|
||||
sam_adc_getreg(priv, SAM_ADC_PRESSR);
|
||||
sam_adc_getreg(priv->adc, SAM_ADC_PRESSR);
|
||||
#endif
|
||||
|
||||
/* Configure interrupt generation. */
|
||||
/* Enable pen contact detection */
|
||||
|
||||
sam_tsd_setaverage(priv, ADC_TSMR_TSAV_NO_FILTER);
|
||||
sam_adc_putreg(priv, SAM_ADC_SR, ADC_CR_TSCALIB);
|
||||
regval |= ADC_TSMR_PENDET;
|
||||
sam_adc_putreg(priv->adc, SAM_ADC_TSMR, regval);
|
||||
|
||||
regval = sam_adc_getreg(priv, SAM_ADC_TRGR);
|
||||
/* Set up pen debounce time */
|
||||
|
||||
sam_tsd_debounce(priv, BOARD_TSD_DEBOUNCE);
|
||||
|
||||
/* Configure pen interrupt generation */
|
||||
|
||||
regval = sam_adc_getreg(priv->adc, SAM_ADC_TRGR);
|
||||
regval &= ~ADC_TRGR_TRGMOD_MASK;
|
||||
regval |= ADC_TRGR_TRGMOD_PEN_TRIG;
|
||||
sam_adc_putreg(priv, SAM_ADC_TRGR, regval);
|
||||
regval |= ADC_TRGR_TRGMOD_PEN;
|
||||
sam_adc_putreg(priv->adc, SAM_ADC_TRGR, regval);
|
||||
|
||||
sam_adc_putreg(priv, SAM_ADC_IER, ADC_INT_PEN);
|
||||
return OK;
|
||||
sam_adc_putreg(priv->adc, SAM_ADC_IER, ADC_INT_PEN);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
@@ -1642,6 +1631,7 @@ static void sam_tsd_initialize(struct sam_tsd_s *priv)
|
||||
|
||||
static void sam_tsd_uninitialize(struct sam_tsd_s *priv)
|
||||
{
|
||||
uint32_t regval;
|
||||
|
||||
/* Disable the watchdog timer. It will be re-enabled in the worker thread
|
||||
* while the pen remains down.
|
||||
@@ -1653,14 +1643,14 @@ static void sam_tsd_uninitialize(struct sam_tsd_s *priv)
|
||||
* re-enabled after the worker thread executes.
|
||||
*/
|
||||
|
||||
sam_adc_putreg32(priv->adc, SAM_ADC_IDR, ADC_TSD_ALLINTS);
|
||||
sam_adc_putreg(priv->adc, SAM_ADC_IDR, ADC_TSD_ALLINTS);
|
||||
|
||||
/* Disable touch trigger */
|
||||
|
||||
regval = sam_adc_getreg(priv, SAM_ADC_TRGR);
|
||||
regval = sam_adc_getreg(priv->adc, SAM_ADC_TRGR);
|
||||
regval &= ~ADC_TRGR_TRGMOD_MASK;
|
||||
regval |= ADC_TRGR_TRGMOD_NO_TRIGGER;
|
||||
sam_adc_putreg(priv, SAM_ADC_TRGR, regval);
|
||||
regval |= ADC_TRGR_TRGMOD_NOTRIG;
|
||||
sam_adc_putreg(priv->adc, SAM_ADC_TRGR, regval);
|
||||
|
||||
/* Disable the touchscreen mode */
|
||||
|
||||
@@ -1674,7 +1664,6 @@ static void sam_tsd_uninitialize(struct sam_tsd_s *priv)
|
||||
priv->sample.contact = CONTACT_NONE;
|
||||
priv->sample.valid = false;
|
||||
priv->valid = 0;
|
||||
return OK;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
@@ -1776,8 +1765,6 @@ void sam_tsd_interrupt(uint32_t pending)
|
||||
idbg("ERROR: sam_tsd_schedule failed: %d\n", ret);
|
||||
}
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
#endif /* CONFIG_SAMA5_ADC && CONFIG_SAMA5_TSD */
|
||||
|
||||
@@ -54,6 +54,21 @@
|
||||
# define CONFIG_SAMA_TSD_RXP 6
|
||||
#endif
|
||||
|
||||
/* Touchscreen interrupt event sets
|
||||
*
|
||||
* ADC_INT_XRDY TSD Measure XPOS Ready Interrupt
|
||||
* ADC_INT_YRDY TSD Measure YPOS Ready Interrupt
|
||||
* ADC_INT_PRDY TSD Measure Pressure Ready Interrupt
|
||||
* ADC_INT_PEN Pen Contact Interrupt
|
||||
* ADC_INT_NOPEN No Pen Contact Interrupt
|
||||
* ADC_SR_PENS Pen detect Status (Not an interrupt)
|
||||
*/
|
||||
|
||||
#define ADC_TSD_CMNINTS (ADC_INT_XRDY | ADC_INT_YRDY | ADC_INT_PRDY | ADC_INT_NOPEN)
|
||||
#define ADC_TSD_ALLINTS (ADC_TSD_CMNINTS | ADC_INT_PEN)
|
||||
#define ADC_TSD_ALLSTATUS (ADC_TSD_ALLINTS | ADC_SR_PENS)
|
||||
#define ADC_TSD_RELEASEINTS ADC_TSD_CMNINTS
|
||||
|
||||
/****************************************************************************
|
||||
* Public Types
|
||||
****************************************************************************/
|
||||
|
||||
Reference in New Issue
Block a user