mirror of
https://github.com/apache/nuttx.git
synced 2026-06-08 18:37:46 +08:00
Expanded otgfs support to stm32F469 and stm32f446
Added missing bits definitions Used stm32F469 and stm32f446 bit definitions Removed unsed header file
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File diff suppressed because it is too large
Load Diff
@@ -494,11 +494,20 @@
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#define OTGFS_GINT_OEP (1 << 19) /* Bit 19: ro OUT endpoint interrupt */
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#define OTGFS_GINT_IISOIXFR (1 << 20) /* Bit 20: rc_w1Incomplete isochronous IN transfer */
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#define OTGFS_GINT_IISOOXFR (1 << 21) /* Bit 21: rc_w1 Incomplete isochronous OUT transfer */
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#define OTGFS_GINT_RES2223 (3 << 22) /* Bits 22-23: Reserved, must be kept at reset value */
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#if defined(CONFIG_STM32_STM32F446) || defined(CONFIG_STM32_STM32F469)
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# define OTGFS_GINT_RES22 (1 << 22) /* Bits 22: Reserved, must be kept at reset value */
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# define OTGFS_GINT_RSTDET (1 << 23) /* Bits 23: asserted when a reset is detected on the USB in partial */
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#else
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# define OTGFS_GINT_RES2223 (3 << 22) /* Bits 22-23: Reserved, must be kept at reset value */
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#endif
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#define OTGFS_GINT_HPRT (1 << 24) /* Bit 24: ro Host port interrupt */
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#define OTGFS_GINT_HC (1 << 25) /* Bit 25: ro Host channels interrupt */
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#define OTGFS_GINT_PTXFE (1 << 26) /* Bit 26: ro Periodic TxFIFO empty */
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#if defined(CONFIG_STM32_STM32F446) || defined(CONFIG_STM32_STM32F469)
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#define OTGFS_GINT_LPMINT (1 << 27) /* Bit 27 LPM interrupt */
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#else
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#define OTGFS_GINT_RES27 (1 << 27) /* Bit 27 Reserved, must be kept at reset value */
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#endif
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#define OTGFS_GINT_CIDSCHG (1 << 28) /* Bit 28: rc_w1 Connector ID status change */
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#define OTGFS_GINT_DISC (1 << 29) /* Bit 29: rc_w1 Disconnect detected interrupt */
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#define OTGFS_GINT_SRQ (1 << 30) /* Bit 30: rc_w1 Session request/new session detected interrupt */
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@@ -153,25 +153,50 @@
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# error "CONFIG_USBDEV_EP3_TXFIFO_SIZE is out of range"
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#endif
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#define OTGFS_GINT_RESERVED (OTGFS_GINT_RES89 | \
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(OTGFS_GINT_RES16 | OTGFS_GINTMSK_EPMISM) \
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|OTGFS_GINT_RES2223 | \
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OTGFS_GINT_RES27)
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#if defined(CONFIG_STM32_STM32F446) || defined(CONFIG_STM32_STM32F469)
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# define OTGFS_GINT_RESETS (OTGFS_GINT_USBRST | OTGFS_GINT_RSTDET)
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# define OTGFS_GINT_RESERVED (OTGFS_GINT_RES89 | \
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(OTGFS_GINT_RES16 | OTGFS_GINTMSK_EPMISM) \
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|OTGFS_GINT_RES22)
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#define OTGFS_GINT_RC_W1 (OTGFS_GINT_MMIS | \
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OTGFS_GINT_SOF | \
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OTGFS_GINT_ESUSP | \
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OTGFS_GINT_USBSUSP | \
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OTGFS_GINT_USBRST | \
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OTGFS_GINT_ENUMDNE | \
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OTGFS_GINT_ISOODRP | \
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OTGFS_GINT_EOPF | \
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OTGFS_GINT_IISOIXFR | \
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OTGFS_GINT_IISOOXFR | \
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OTGFS_GINT_CIDSCHG | \
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OTGFS_GINT_DISC | \
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OTGFS_GINT_SRQ | \
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OTGFS_GINT_WKUP)
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# define OTGFS_GINT_RC_W1 (OTGFS_GINT_MMIS | \
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OTGFS_GINT_SOF | \
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OTGFS_GINT_ESUSP | \
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OTGFS_GINT_USBSUSP | \
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OTGFS_GINT_USBRST | \
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OTGFS_GINT_ENUMDNE | \
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OTGFS_GINT_ISOODRP | \
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OTGFS_GINT_EOPF | \
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OTGFS_GINT_IISOIXFR | \
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OTGFS_GINT_IISOOXFR | \
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OTGFS_GINT_RSTDET | \
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OTGFS_GINT_LPMINT | \
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OTGFS_GINT_CIDSCHG | \
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OTGFS_GINT_DISC | \
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OTGFS_GINT_SRQ | \
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OTGFS_GINT_WKUP)
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#else
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# define OTGFS_GINT_RESETS OTGFS_GINT_USBRST
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# define OTGFS_GINT_RESERVED (OTGFS_GINT_RES89 | \
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(OTGFS_GINT_RES16 | OTGFS_GINTMSK_EPMISM) \
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|OTGFS_GINT_RES2223 | \
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OTGFS_GINT_RES27)
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# define OTGFS_GINT_RC_W1 (OTGFS_GINT_MMIS | \
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OTGFS_GINT_SOF | \
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OTGFS_GINT_ESUSP | \
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OTGFS_GINT_USBSUSP | \
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OTGFS_GINT_USBRST | \
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OTGFS_GINT_ENUMDNE | \
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OTGFS_GINT_ISOODRP | \
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OTGFS_GINT_EOPF | \
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OTGFS_GINT_IISOIXFR | \
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OTGFS_GINT_IISOOXFR | \
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OTGFS_GINT_CIDSCHG | \
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OTGFS_GINT_DISC | \
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OTGFS_GINT_SRQ | \
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OTGFS_GINT_WKUP)
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#endif
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/* Debug ***********************************************************************/
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/* Trace error codes */
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@@ -3517,7 +3542,7 @@ static inline void stm32_otginterrupt(FAR struct stm32_usbdev_s *priv)
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/* Clear OTG interrupt */
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stm32_putreg(retval, STM32_OTGFS_GOTGINT);
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stm32_putreg(regval, STM32_OTGFS_GOTGINT);
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}
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#endif
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@@ -3642,7 +3667,7 @@ static int stm32_usbinterrupt(int irq, FAR void *context)
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/* USB reset interrupt */
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if ((regval & OTGFS_GINT_USBRST) != 0)
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if ((regval & OTGFS_GINT_RESETS) != 0)
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{
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usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_DEVRESET), (uint16_t)regval);
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@@ -5201,9 +5226,9 @@ static void stm32_hwinitialize(FAR struct stm32_usbdev_s *priv)
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/* Deactivate the power down */
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#if defined(CONFIG_STM32_STM32F446)
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/* In the case of the STM32F446 the meaning of the bit has changed to VBUS
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* Detection Enable when set
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#if defined(CONFIG_STM32_STM32F446) || defined(CONFIG_STM32_STM32F469)
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/* In the case of the STM32F446 or STM32F469 the meaning of the bit
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* has changed to VBUS Detection Enable when set
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*/
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regval = OTGFS_GCCFG_PWRDWN;
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@@ -5228,11 +5253,11 @@ static void stm32_hwinitialize(FAR struct stm32_usbdev_s *priv)
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stm32_putreg(regval, STM32_OTGFS_GCCFG);
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up_mdelay(20);
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/* For the new OTG controller in the F446 when VBUS sensing is not used we
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/* For the new OTG controller in the F446, F469 when VBUS sensing is not used we
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* need to force the B session valid
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*/
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#if defined(CONFIG_STM32_STM32F446)
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#if defined(CONFIG_STM32_STM32F446) || defined(CONFIG_STM32_STM32F469)
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# ifndef CONFIG_USBDEV_VBUSSENSING
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regval = stm32_getreg(STM32_OTGFS_GOTGCTL);
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regval |= (OTGFS_GOTGCTL_BVALOEN | OTGFS_GOTGCTL_BVALOVAL);
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