mirror of
https://github.com/apache/nuttx.git
synced 2026-06-08 01:42:58 +08:00
TMS570: Add interrupt decode logic
This commit is contained in:
Gregory Nutt
@@ -135,11 +135,14 @@
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# endif
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# define up_restorestate(regs) (current_regs = regs)
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/* The Cortex-A5 supports the same mechanism, but only lazy floating point
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* register save/restore.
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/* The Cortex-A and Cortex-R supports the same mechanism, but only lazy
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* floating point register save/restore.
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*/
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#elif defined(CONFIG_ARCH_CORTEXA5) || defined(CONFIG_ARCH_CORTEXA8)
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#elif defined(CONFIG_ARCH_CORTEXA5) || defined(CONFIG_ARCH_CORTEXA8) || \
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defined(CONFIG_ARCH_CORTEXR4) || defined(CONFIG_ARCH_CORTEXR4F) || \
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defined(CONFIG_ARCH_CORTEXR5) || defined(CONFIG_ARCH_CORTEXR5F) || \
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defined(CONFIG_ARCH_CORTEXR7) || defined(CONFIG_ARCH_CORTEXR7F)
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/* If the floating point unit is present and enabled, then save the
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* floating point registers as well as normal ARM registers.
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@@ -348,11 +351,14 @@ int up_memfault(int irq, FAR void *context);
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# endif /* CONFIG_ARCH_CORTEXM3,4,7 */
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/* Exception handling logic unique to the Cortex-A family (but should be
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* back-ported to the ARM7 and ARM9 families).
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/* Exception handling logic unique to the Cortex-A and Cortex-R families
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* (but should be back-ported to the ARM7 and ARM9 families).
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*/
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#elif defined(CONFIG_ARCH_CORTEXA5) || defined(CONFIG_ARCH_CORTEXA8)
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#elif defined(CONFIG_ARCH_CORTEXA5) || defined(CONFIG_ARCH_CORTEXA8) || \
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defined(CONFIG_ARCH_CORTEXR4) || defined(CONFIG_ARCH_CORTEXR4F) || \
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defined(CONFIG_ARCH_CORTEXR5) || defined(CONFIG_ARCH_CORTEXR5F) || \
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defined(CONFIG_ARCH_CORTEXR7) || defined(CONFIG_ARCH_CORTEXR7F)
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/* Interrupt acknowledge and dispatch */
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@@ -248,6 +248,16 @@ pid_t up_vfork(const struct vfork_s *context)
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child->cmn.xcp.syscall[index].cpsr =
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parent->xcp.syscall[index].cpsr;
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# endif
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#elif defined(CONFIG_ARCH_CORTEXR4) || defined(CONFIG_ARCH_CORTEXR4F) || \
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defined(CONFIG_ARCH_CORTEXR5) || defined(CONFIG_ARCH_CORTEXR5F) || \
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defined(CONFIG_ARCH_CORTEXR7) || defined(CONFIG_ARCH_CORTEXR7F)
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# ifdef CONFIG_BUILD_PROTECTED
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child->cmn.xcp.syscall[index].cpsr =
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parent->xcp.syscall[index].cpsr;
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# endif
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#elif defined(CONFIG_ARCH_CORTEXM3) || defined(CONFIG_ARCH_CORTEXM4) || \
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defined(CONFIG_ARCH_CORTEXM0) || defined(CONFIG_ARCH_CORTEXM7)
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@@ -159,9 +159,13 @@
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#define VIM_FBPARERR_
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/* IRQ Index Offset Vector Register */
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#define VIM_IRQINDEX_
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#define VIM_IRQINDEX_MASK (0x000000ff) /* IRQ index vector */
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/* FIQ Index Offset Vector Register */
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#define VIM_FIQINDEX_
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#define VIM_FIQINDEX_MASK (0x000000ff) /* FIQ index vector */
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/* FIQ/IRQ Program Control Register 0 */
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#define VIM_FIRQPR0_
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/* FIQ/IRQ Program Control Register 1 */
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@@ -1,5 +1,5 @@
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/************************************************************************************
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* arch/arm/src/samv7/tms570_start.h
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* arch/arm/src/tms570/tms570_boot.h
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*
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* Copyright (C) 2015 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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@@ -33,8 +33,8 @@
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*
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************************************************************************************/
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#ifndef __ARCH_ARM_SRC_SAMV7_SAM_START_H
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#define __ARCH_ARM_SRC_SAMV7_SAM_START_H
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#ifndef __ARCH_ARM_SRC_TMS570_SAM_BOOT_H
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#define __ARCH_ARM_SRC_TMS570_SAM_BOOT_H
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/************************************************************************************
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* Included Files
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@@ -139,4 +139,4 @@ void tms570_board_initialize(void);
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#endif
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#endif /* __ASSEMBLY__ */
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#endif /* __ARCH_ARM_SRC_SAMV7_SAM_START_H */
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#endif /* __ARCH_ARM_SRC_TMS570_SAM_BOOT_H */
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@@ -40,6 +40,7 @@
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#include <nuttx/config.h>
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#include <stdint.h>
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#include <errno.h>
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#include <assert.h>
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#include <debug.h>
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@@ -51,6 +52,7 @@
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#include "up_internal.h"
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#include "chip/tms570_vim.h"
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#include "tms570_irq.h"
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/****************************************************************************
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* Pre-processor Definitions
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@@ -66,29 +68,75 @@
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volatile uint32_t *current_regs;
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Name: tms570_error_handler
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****************************************************************************/
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static void tms570_error_handler(void)
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{
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PANIC();
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}
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: up_irqinitialize
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* The device supports three different possibilities for software to handle
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* interrupts:
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*
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* 1. Index interrupts mode (compatible with TMS470R1x legacy code),
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* 2. Register vectored interrupts (automatically provide vector address
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* to application)
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* 3. Hardware vectored interrupts (automatically dispatch to ISR, IRQ
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* only)
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*
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* Only the indexed mode is supported here: After the interrupt is received
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* by the CPU, the CPU branches to 0x18 (IRQ) or 0x1C (FIQ) to execute the
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* main ISR. The main ISR routine reads the offset register (IRQINDEX,
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* FIQINDEX) to determine the source of the interrupt.
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*
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* To use mode 2), it would only be necessary to initialize the VIM_RAM.
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* To use mode 3), it would be necessary to initialize the VIM_RAM and also
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* to set the vector enable (VE) bit in the CP15 R1 register. This bit is
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* zero on reset so that the default state after reset is backward
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* compatible to earlier ARM CPU.
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*
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****************************************************************************/
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void up_irqinitialize(void)
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{
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/* Disable all interrupts. */
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#warning Missing logic
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FAR uintptr_t *vimram;
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int i;
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/* Colorize the interrupt stack for debug purposes */
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#if defined(CONFIG_STACK_COLORATION) && CONFIG_ARCH_INTERRUPTSTACK > 3
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{
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size_t intstack_size = (CONFIG_ARCH_INTERRUPTSTACK & ~3);
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up_stack_color((FAR void *)((uintptr_t)&g_intstackbase - intstack_size),
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intstack_size);
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}
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size_t intstack_size = (CONFIG_ARCH_INTERRUPTSTACK & ~3);
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up_stack_color((FAR void *)((uintptr_t)&g_intstackbase - intstack_size),
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intstack_size);
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#endif
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/* Initialize VIM RAM vectors. These vectors are not used in the current
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* interrupt handler logic.
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*/
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vimram = (FAR uintptr_t *)TMS570_VIMRAM_BASE;
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for (i = 0; i < (TMS570_IRQ_NCHANNELS + 1); i++)
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{
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*vimram++ = (uintptr_t)tms570_error_handler;
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}
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/* Set Fall-Back Address Parity Error Register (also not used) */
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putreg32((uint32_t)tms570_error_handler, TMS570_VIM_FBPARERR);
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/* Assign all channels to IRQs */
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putreg32(0, TMS570_VIM_FIRQPR0);
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@@ -111,12 +159,22 @@ void up_irqinitialize(void)
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current_regs = NULL;
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#ifdef CONFIG_ARMV7R_HAVE_DECODEFIQ
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/* By default, interrupt CHAN0 is mapped to ESM (Error Signal Module)
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* high level interrupt and CHAN1 is reserved for other NMI. For safety
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* reasons, these two channels are mapped to FIQ only and can NOT be
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* disabled through ENABLE registers.
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*/
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#warning Missing Logic
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#endif
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#ifndef CONFIG_SUPPRESS_INTERRUPTS
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#ifdef CONFIG_TMS570_GPIO_IRQ
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/* Initialize logic to support a second level of interrupt decoding for
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* GPIO pins.
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*/
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#ifdef CONFIG_TMS570_GPIO_IRQ
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tms570_gpioirqinitialize();
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#endif
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@@ -126,6 +184,27 @@ void up_irqinitialize(void)
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#endif
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}
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/****************************************************************************
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* Name: tms570_vim_channel
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*
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* Description:
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* Allocate a VIM channel and assign it to the 'request'.
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*
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* Input Parameters:
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* request - The interrupt request to be mapped to a channel
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*
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* Returned Value:
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* One sucess, the allocated channel number is returned. A negated errno
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* value is returned on any failure.
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*
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****************************************************************************/
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int tms570_vim_channel(int request)
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{
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#warning Missing logic
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return -ENOSYS;
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}
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/****************************************************************************
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* Name: arm_decodeirq
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*
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@@ -136,15 +215,38 @@ void up_irqinitialize(void)
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* the irq number of the interrupt and then to call arm_doirq to dispatch
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* the interrupt.
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*
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* Input parameters:
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* Input parameters:
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* regs - A pointer to the register save area on the stack.
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*
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****************************************************************************/
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uint32_t *arm_decodeirq(uint32_t *regs)
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{
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#warning Missing Logic
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return 0;
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int vector;
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/* Check for a VRAM parity error. This is not to critical in this
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* implementatin since VIM RAM is not used.
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*/
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#warning Missing logic
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/* Get the interrupting vector number from the IRQINDEX register. Zero,
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* the "phantom" vector will returned.
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*/
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vector = getreg32(TMS570_VIM_IRQINDEX) & VIM_IRQINDEX_MASK;
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if (vector > 0)
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{
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/* Dispatch the interrupt. NOTE that the IRQ number is the vector
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* number offset by one to skip over the "phantom" vector.
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*/
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regs = arm_doirq(vector - 1, regs);
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}
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/* Acknowledge interrupt */
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#warning Verify not needed
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return regs;
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}
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/****************************************************************************
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@@ -165,8 +267,31 @@ uint32_t *arm_decodeirq(uint32_t *regs)
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#ifdef CONFIG_ARMV7R_HAVE_DECODEFIQ
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uint32_t *arm_decodefiq(FAR uint32_t *regs)
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{
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#warning Missing Logic
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return 0;
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int vector;
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/* Check for a VRAM parity error. This is not to critical in this
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* implementatin since VIM RAM is not used.
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*/
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#warning Missing logic
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/* Get the interrupting vector number from the FIQINDEX register. Zero,
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* the "phantom" vector will returned.
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*/
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vector = getreg32(TMS570_VIM_FIQINDEX) & VIM_FIQINDEX_MASK;
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if (vector > 0)
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{
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/* Dispatch the interrupt. NOTE that the IRQ number is the vector
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* number offset by one to skip over the "phantom" vector.
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*/
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regs = arm_doirq(vector - 1, regs)
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}
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/* Acknowledge interrupt */
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#warning Verify not needed
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return regs;
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}
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#endif
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@@ -0,0 +1,99 @@
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/****************************************************************************
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* arch/arm/src/tms570/tms570_irq.h
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*
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* Copyright (C) 2015 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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#ifndef __ARCH_ARM_SRC_TMS570_SAM_IRQ_H
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#define __ARCH_ARM_SRC_TMS570_SAM_IRQ_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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/****************************************************************************
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* Public Function Prototypes
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****************************************************************************/
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#ifndef __ASSEMBLY__
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#undef EXTERN
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#if defined(__cplusplus)
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#define EXTERN extern "C"
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extern "C"
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{
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#else
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#define EXTERN extern
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#endif
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/****************************************************************************
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* Public Function Prototypes
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****************************************************************************/
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/****************************************************************************
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* Name: tms570_vim_channel
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*
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* Description:
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* Allocate a VIM channel and assign it to the 'request'.
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*
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* Input Parameters:
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* request - The interrupt request to be mapped to a channel
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*
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* Returned Value:
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* One sucess, the allocated channel number is returned. A negated errno
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* value is returned on any failure.
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*
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****************************************************************************/
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int tms570_vim_channel(int request);
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/****************************************************************************
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* Name: up_enable_fiq
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*
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* Description:
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* Enable the FIQ specified by 'channel'
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*
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****************************************************************************/
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#ifdef CONFIG_ARMV7R_HAVE_DECODEFIQ
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void up_enable_fiq(int channel);
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#endif
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#undef EXTERN
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#if defined(__cplusplus)
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}
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#endif
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#endif /* __ASSEMBLY__ */
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#endif /* __ARCH_ARM_SRC_TMS570_SAM_IRQ_H */
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