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imxrt:Add LPI2C DMA
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committed by
Xiang Xiao
parent
f34acdb936
commit
85ec2e1446
@@ -804,6 +804,11 @@ config LPI2C1_BUSYIDLE
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int "Bus idle timeout period in clock cycles"
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default 0
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config LPI2C1_DMA
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bool "Enable DMA for I2C1"
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default n
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depends on IMXRT_LPI2C_DMA
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config LPI2C1_FILTSCL
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int "I2C master digital glitch filters for SCL input in clock cycles"
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default 0
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@@ -825,6 +830,11 @@ config LPI2C2_BUSYIDLE
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int "Bus idle timeout period in clock cycles"
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default 0
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config LPI2C2_DMA
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bool "Enable DMA for I2C2"
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default n
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depends on IMXRT_LPI2C_DMA
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config LPI2C2_FILTSCL
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int "I2C master digital glitch filters for SCL input in clock cycles"
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default 0
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@@ -846,6 +856,11 @@ config LPI2C3_BUSYIDLE
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int "Bus idle timeout period in clock cycles"
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default 0
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config LPI2C3_DMA
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bool "Enable DMA for I2C3"
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default n
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depends on IMXRT_LPI2C_DMA
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config LPI2C3_FILTSCL
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int "I2C master digital glitch filters for SCL input in clock cycles"
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default 0
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@@ -867,6 +882,11 @@ config LPI2C4_BUSYIDLE
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int "Bus idle timeout period in clock cycles"
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default 0
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config LPI2C4_DMA
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bool "Enable DMA for I2C4"
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default n
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depends on IMXRT_LPI2C_DMA
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config LPI2C4_FILTSCL
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int "I2C master digital glitch filters for SCL input in clock cycles"
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default 0
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@@ -1591,6 +1611,25 @@ endmenu # Memory Configuration
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menu "LPI2C Configuration"
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depends on IMXRT_LPI2C
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config IMXRT_LPI2C_DMA
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bool "I2C DMA Support"
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default n
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depends on IMXRT_LPI2C && IMXRT_EDMA && !I2C_POLLED
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---help---
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This option enables the DMA for I2C transfers.
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Note: The user can define CONFIG_I2C_DMAPRIO: a custom priority value
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for the I2C dma streams, else the default priority level is set to
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medium.
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config IMXRT_LPI2C_DMA_MAXMSG
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int "Maximum number messages that will be DMAed"
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default 8
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depends on IMXRT_LPI2C_DMA
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---help---
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This option set the mumber of mesg that can be in a transfer.
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It is used to allocate space for the 16 bit LPI2C commands
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that will be DMA-ed to the LPI2C device.
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config IMXRT_LPI2C_DYNTIMEO
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bool "Use dynamic timeouts"
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default n
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