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Rename up_switchcontext to arm_switchcontext

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This commit is contained in:
Gregory Nutt
2020-04-30 12:38:27 -06:00
committed by Abdelatif Guettouche
parent 6398a64e26
commit 84ccee4d34
41 changed files with 68 additions and 68 deletions
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arch/arm/src/armv6-m/up_switchcontext.S → arch/arm/src/armv6-m/arm_switchcontext.S
+8 -8
View File
@@ -1,5 +1,5 @@
/************************************************************************************
* arch/arm/src/armv6-m/up_switchcontext.S
* arch/arm/src/armv6-m/arm_switchcontext.S
*
* Copyright (C) 2013 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@@ -52,7 +52,7 @@
************************************************************************************/
.cpu cortex-m0
.file "up_switchcontext.S"
.file "arm_switchcontext.S"
/************************************************************************************
* Macros
@@ -63,13 +63,13 @@
************************************************************************************/
/************************************************************************************
* Name: up_switchcontext
* Name: arm_switchcontext
*
* Description:
* Save the current thread context and restore the specified context.
* Full prototype is:
*
* void up_switchcontext(uint32_t *saveregs, uint32_t *restoreregs);
* void arm_switchcontext(uint32_t *saveregs, uint32_t *restoreregs);
*
* Returned Value:
* None
@@ -79,9 +79,9 @@
.align 2
.code 16
.thumb_func
.globl up_switchcontext
.type up_switchcontext, function
up_switchcontext:
.globl arm_switchcontext
.type arm_switchcontext, function
arm_switchcontext:
/* Perform the System call with R0=1, R1=saveregs, R2=restoreregs */
@@ -93,5 +93,5 @@ up_switchcontext:
/* We will get here only after the rerturn from the context switch */
bx lr
.size up_switchcontext, .-up_switchcontext
.size arm_switchcontext, .-arm_switchcontext
.end
arch/arm/src/armv6-m/svcall.h
+1 -1
View File
@@ -76,7 +76,7 @@
/* SYS call 2:
*
* void up_switchcontext(uint32_t *saveregs, uint32_t *restoreregs);
* void arm_switchcontext(uint32_t *saveregs, uint32_t *restoreregs);
*/
#define SYS_switch_context (2)
arch/arm/src/armv6-m/up_blocktask.c
+2 -2
View File
@@ -150,9 +150,9 @@ void up_block_task(struct tcb_s *tcb, tstate_t task_state)
* ready to run list.
*/
up_switchcontext(rtcb->xcp.regs, nexttcb->xcp.regs);
arm_switchcontext(rtcb->xcp.regs, nexttcb->xcp.regs);
/* up_switchcontext forces a context switch to the task at the
/* arm_switchcontext forces a context switch to the task at the
* head of the ready-to-run list. It does not 'return' in the
* normal sense. When it does return, it is because the blocked
* task is again ready to run and has execution priority.
arch/arm/src/armv6-m/up_releasepending.c
+2 -2
View File
@@ -120,9 +120,9 @@ void up_release_pending(void)
* ready to run list.
*/
up_switchcontext(rtcb->xcp.regs, nexttcb->xcp.regs);
arm_switchcontext(rtcb->xcp.regs, nexttcb->xcp.regs);
/* up_switchcontext forces a context switch to the task at the
/* arm_switchcontext forces a context switch to the task at the
* head of the ready-to-run list. It does not 'return' in the
* normal sense. When it does return, it is because the blocked
* task is again ready to run and has execution priority.
arch/arm/src/armv6-m/up_reprioritizertr.c
+2 -2
View File
@@ -175,9 +175,9 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
* ready to run list.
*/
up_switchcontext(rtcb->xcp.regs, nexttcb->xcp.regs);
arm_switchcontext(rtcb->xcp.regs, nexttcb->xcp.regs);
/* up_switchcontext forces a context switch to the task at the
/* arm_switchcontext forces a context switch to the task at the
* head of the ready-to-run list. It does not 'return' in the
* normal sense. When it does return, it is because the blocked
* task is again ready to run and has execution priority.
arch/arm/src/armv6-m/up_svcall.c
+1 -1
View File
@@ -199,7 +199,7 @@ int up_svcall(int irq, FAR void *context, FAR void *arg)
/* R0=SYS_switch_context: This a switch context command:
*
* void up_switchcontext(uint32_t *saveregs, uint32_t *restoreregs);
* void arm_switchcontext(uint32_t *saveregs, uint32_t *restoreregs);
*
* At this point, the following values are saved in context:
*
arch/arm/src/armv6-m/up_unblocktask.c
+2 -2
View File
@@ -133,9 +133,9 @@ void up_unblock_task(struct tcb_s *tcb)
* ready to run list.
*/
up_switchcontext(rtcb->xcp.regs, nexttcb->xcp.regs);
arm_switchcontext(rtcb->xcp.regs, nexttcb->xcp.regs);
/* up_switchcontext forces a context switch to the task at the
/* arm_switchcontext forces a context switch to the task at the
* head of the ready-to-run list. It does not 'return' in the
* normal sense. When it does return, it is because the blocked
* task is again ready to run and has execution priority.
arch/arm/src/armv7-m/gnu/up_switchcontext.S → arch/arm/src/armv7-m/gnu/arm_switchcontext.S
+8 -8
View File
@@ -1,5 +1,5 @@
/************************************************************************************
* arch/arm/src/armv7-m/gnu/up_switchcontext.S
* arch/arm/src/armv7-m/gnu/arm_switchcontext.S
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
@@ -38,7 +38,7 @@
.syntax unified
.thumb
.file "up_switchcontext.S"
.file "arm_switchcontext.S"
/************************************************************************************
* Macros
@@ -49,13 +49,13 @@
************************************************************************************/
/************************************************************************************
* Name: up_switchcontext
* Name: arm_switchcontext
*
* Description:
* Save the current thread context and restore the specified context.
* Full prototype is:
*
* void up_switchcontext(uint32_t *saveregs, uint32_t *restoreregs);
* void arm_switchcontext(uint32_t *saveregs, uint32_t *restoreregs);
*
* Returned Value:
* None
@@ -63,9 +63,9 @@
************************************************************************************/
.thumb_func
.globl up_switchcontext
.type up_switchcontext, function
up_switchcontext:
.globl arm_switchcontext
.type arm_switchcontext, function
arm_switchcontext:
/* Perform the System call with R0=1, R1=saveregs, R2=restoreregs */
@@ -77,5 +77,5 @@ up_switchcontext:
/* We will get here only after the rerturn from the context switch */
bx lr
.size up_switchcontext, .-up_switchcontext
.size arm_switchcontext, .-arm_switchcontext
.end
arch/arm/src/armv7-m/iar/up_switchcontext.S → arch/arm/src/armv7-m/iar/arm_switchcontext.S
+6 -6
View File
@@ -1,5 +1,5 @@
/************************************************************************************
* arch/arm/src/armv7-m/iar/up_switchcontext.S
* arch/arm/src/armv7-m/iar/arm_switchcontext.S
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
@@ -28,7 +28,7 @@
#include "nvic.h"
#include "svcall.h"
MODULE up_switchcontext
MODULE arm_switchcontext
SECTION .text:CODE:NOROOT(2)
/************************************************************************************
@@ -39,7 +39,7 @@
* Public Symbols
************************************************************************************/
PUBLIC up_switchcontext
PUBLIC arm_switchcontext
/************************************************************************************
* Macros
@@ -50,13 +50,13 @@
************************************************************************************/
/************************************************************************************
* Name: up_switchcontext
* Name: arm_switchcontext
*
* Description:
* Save the current thread context and restore the specified context.
* Full prototype is:
*
* void up_switchcontext(uint32_t *saveregs, uint32_t *restoreregs);
* void arm_switchcontext(uint32_t *saveregs, uint32_t *restoreregs);
*
* Returned Value:
* None
@@ -65,7 +65,7 @@
THUMB
up_switchcontext:
arm_switchcontext:
/* Perform the System call with R0=1, R1=saveregs, R2=restoreregs */
arch/arm/src/armv7-m/svcall.h
+1 -1
View File
@@ -76,7 +76,7 @@
/* SYS call 2:
*
* void up_switchcontext(uint32_t *saveregs, uint32_t *restoreregs);
* void arm_switchcontext(uint32_t *saveregs, uint32_t *restoreregs);
*/
#define SYS_switch_context (2)
arch/arm/src/armv7-m/up_blocktask.c
+2 -2
View File
@@ -135,9 +135,9 @@ void up_block_task(struct tcb_s *tcb, tstate_t task_state)
* ready to run list.
*/
up_switchcontext(rtcb->xcp.regs, nexttcb->xcp.regs);
arm_switchcontext(rtcb->xcp.regs, nexttcb->xcp.regs);
/* up_switchcontext forces a context switch to the task at the
/* arm_switchcontext forces a context switch to the task at the
* head of the ready-to-run list. It does not 'return' in the
* normal sense. When it does return, it is because the blocked
* task is again ready to run and has execution priority.
arch/arm/src/armv7-m/up_releasepending.c
+2 -2
View File
@@ -108,9 +108,9 @@ void up_release_pending(void)
* ready to run list.
*/
up_switchcontext(rtcb->xcp.regs, nexttcb->xcp.regs);
arm_switchcontext(rtcb->xcp.regs, nexttcb->xcp.regs);
/* up_switchcontext forces a context switch to the task at the
/* arm_switchcontext forces a context switch to the task at the
* head of the ready-to-run list. It does not 'return' in the
* normal sense. When it does return, it is because the blocked
* task is again ready to run and has execution priority.
arch/arm/src/armv7-m/up_reprioritizertr.c
+2 -2
View File
@@ -160,9 +160,9 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
* ready to run list.
*/
up_switchcontext(rtcb->xcp.regs, nexttcb->xcp.regs);
arm_switchcontext(rtcb->xcp.regs, nexttcb->xcp.regs);
/* up_switchcontext forces a context switch to the task at the
/* arm_switchcontext forces a context switch to the task at the
* head of the ready-to-run list. It does not 'return' in the
* normal sense. When it does return, it is because the
* blocked task is again ready to run and has execution
arch/arm/src/armv7-m/up_svcall.c
+1 -1
View File
@@ -210,7 +210,7 @@ int up_svcall(int irq, FAR void *context, FAR void *arg)
/* R0=SYS_switch_context: This a switch context command:
*
* void up_switchcontext(uint32_t *saveregs, uint32_t *restoreregs);
* void arm_switchcontext(uint32_t *saveregs, uint32_t *restoreregs);
*
* At this point, the following values are saved in context:
*
arch/arm/src/armv7-m/up_unblocktask.c
+2 -2
View File
@@ -119,9 +119,9 @@ void up_unblock_task(struct tcb_s *tcb)
* ready to run list.
*/
up_switchcontext(rtcb->xcp.regs, nexttcb->xcp.regs);
arm_switchcontext(rtcb->xcp.regs, nexttcb->xcp.regs);
/* up_switchcontext forces a context switch to the task at the
/* arm_switchcontext forces a context switch to the task at the
* head of the ready-to-run list. It does not 'return' in the
* normal sense. When it does return, it is because the blocked
* task is again ready to run and has execution priority.
arch/arm/src/common/up_internal.h
+1 -1
View File
@@ -301,7 +301,7 @@ void arm_copyarmstate(uint32_t *dest, uint32_t *src);
void up_decodeirq(uint32_t *regs);
int arm_saveusercontext(uint32_t *saveregs);
void arm_fullcontextrestore(uint32_t *restoreregs) noreturn_function;
void up_switchcontext(uint32_t *saveregs, uint32_t *restoreregs);
void arm_switchcontext(uint32_t *saveregs, uint32_t *restoreregs);
/* Signal handling **********************************************************/
arch/arm/src/cxd56xx/Make.defs
+1 -1
View File
@@ -37,7 +37,7 @@
HEAD_ASRC =
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S up_switchcontext.S
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_switchcontext.S
CMN_ASRCS += up_testset.S vfork.S
ifeq ($(CONFIG_ARCH_SETJMP_H),y)
arch/arm/src/efm32/Make.defs
+1 -1
View File
@@ -38,7 +38,7 @@ HEAD_ASRC =
CMN_UASRCS =
CMN_UCSRCS =
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S up_switchcontext.S
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_switchcontext.S
CMN_ASRCS += up_testset.S up_fetchadd.S vfork.S
ifeq ($(CONFIG_ARCH_SETJMP_H),y)
arch/arm/src/imxrt/Make.defs
+1 -1
View File
@@ -38,7 +38,7 @@ HEAD_ASRC =
# Common ARM and Cortex-M7 files
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S up_switchcontext.S
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_switchcontext.S
CMN_ASRCS += up_testset.S up_fetchadd.S vfork.S
ifeq ($(CONFIG_ARCH_SETJMP_H),y)
arch/arm/src/kinetis/Make.defs
+1 -1
View File
@@ -38,7 +38,7 @@ HEAD_ASRC =
CMN_UASRCS =
CMN_UCSRCS =
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S up_switchcontext.S
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_switchcontext.S
CMN_ASRCS += up_testset.S up_fetchadd.S vfork.S
ifeq ($(CONFIG_ARCH_SETJMP_H),y)
arch/arm/src/kl/Make.defs
+1 -1
View File
@@ -36,7 +36,7 @@
HEAD_ASRC =
CMN_ASRCS = up_exception.S arm_saveusercontext.S arm_fullcontextrestore.S
CMN_ASRCS += up_switchcontext.S vfork.S
CMN_ASRCS += arm_switchcontext.S vfork.S
CMN_CSRCS = up_allocateheap.c up_assert.c up_blocktask.c arm_copyfullstate.c
CMN_CSRCS += up_createstack.c up_mdelay.c up_udelay.c up_exit.c
arch/arm/src/lc823450/Make.defs
+1 -1
View File
@@ -40,7 +40,7 @@ HEAD_ASRC =
CMN_UASRCS =
CMN_UCSRCS =
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S up_switchcontext.S
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_switchcontext.S
CMN_ASRCS += vfork.S
ifeq ($(CONFIG_ARCH_SETJMP_H),y)
arch/arm/src/lpc17xx_40xx/Make.defs
+1 -1
View File
@@ -42,7 +42,7 @@ HEAD_ASRC =
CMN_UASRCS =
CMN_UCSRCS =
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S up_switchcontext.S
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_switchcontext.S
CMN_ASRCS += up_testset.S up_fetchadd.S vfork.S
ifeq ($(CONFIG_ARCH_SETJMP_H),y)
arch/arm/src/lpc43xx/Make.defs
+1 -1
View File
@@ -35,7 +35,7 @@
HEAD_ASRC =
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S up_switchcontext.S
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_switchcontext.S
CMN_ASRCS += up_testset.S up_fetchadd.S vfork.S
ifeq ($(CONFIG_ARCH_SETJMP_H),y)
arch/arm/src/lpc54xx/Make.defs
+1 -1
View File
@@ -35,7 +35,7 @@
HEAD_ASRC =
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S up_switchcontext.S
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_switchcontext.S
CMN_ASRCS += up_testset.S up_fetchadd.S vfork.S
ifeq ($(CONFIG_ARCH_SETJMP_H),y)
arch/arm/src/max326xx/Make.defs
+1 -1
View File
@@ -37,7 +37,7 @@
HEAD_ASRC =
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S up_switchcontext.S
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_switchcontext.S
CMN_ASRCS += up_testset.S up_fetchadd.S vfork.S
ifeq ($(CONFIG_ARCH_SETJMP_H),y)
arch/arm/src/nrf52/Make.defs
+1 -1
View File
@@ -35,7 +35,7 @@
HEAD_ASRC =
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S up_switchcontext.S
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_switchcontext.S
CMN_ASRCS += up_testset.S vfork.S
ifeq ($(CONFIG_ARCH_SETJMP_H),y)
arch/arm/src/nuc1xx/Make.defs
+1 -1
View File
@@ -36,7 +36,7 @@
HEAD_ASRC =
CMN_ASRCS = up_exception.S arm_saveusercontext.S arm_fullcontextrestore.S
CMN_ASRCS += up_switchcontext.S vfork.S
CMN_ASRCS += arm_switchcontext.S vfork.S
CMN_CSRCS = up_allocateheap.c up_assert.c up_blocktask.c arm_copyfullstate.c
CMN_CSRCS += up_createstack.c up_mdelay.c up_udelay.c up_exit.c
arch/arm/src/s32k1xx/s32k11x/Make.defs
+1 -1
View File
@@ -36,7 +36,7 @@
# Source files specific to the Cortex-M0+
CMN_ASRCS += up_exception.S arm_saveusercontext.S arm_fullcontextrestore.S
CMN_ASRCS += up_switchcontext.S vfork.S
CMN_ASRCS += arm_switchcontext.S vfork.S
CMN_CSRCS += up_assert.c up_blocktask.c arm_copyfullstate.c up_createstack.c
CMN_CSRCS += up_initialstate.c up_releasepending.c up_reprioritizertr.c
arch/arm/src/s32k1xx/s32k14x/Make.defs
+1 -1
View File
@@ -35,7 +35,7 @@
# Source files specific to the Cortex-M4F
CMN_ASRCS += arm_saveusercontext.S arm_fullcontextrestore.S up_switchcontext.S
CMN_ASRCS += arm_saveusercontext.S arm_fullcontextrestore.S arm_switchcontext.S
CMN_ASRCS += up_testset.S up_fetchadd.S vfork.S
ifeq ($(CONFIG_ARCH_SETJMP_H),y)
arch/arm/src/sam34/Make.defs
+1 -1
View File
@@ -43,7 +43,7 @@ HEAD_ASRC =
CMN_UASRCS =
CMN_UCSRCS =
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S up_switchcontext.S
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_switchcontext.S
CMN_ASRCS += up_testset.S up_fetchadd.S vfork.S
ifeq ($(CONFIG_ARCH_SETJMP_H),y)
arch/arm/src/samd2l2/Make.defs
+1 -1
View File
@@ -36,7 +36,7 @@
HEAD_ASRC =
CMN_ASRCS = up_exception.S arm_saveusercontext.S arm_fullcontextrestore.S
CMN_ASRCS += up_switchcontext.S vfork.S
CMN_ASRCS += arm_switchcontext.S vfork.S
CMN_CSRCS = up_allocateheap.c up_assert.c up_blocktask.c arm_copyfullstate.c
CMN_CSRCS += up_createstack.c up_mdelay.c up_udelay.c up_exit.c
arch/arm/src/samd5e5/Make.defs
+1 -1
View File
@@ -42,7 +42,7 @@ HEAD_ASRC =
CMN_UASRCS =
CMN_UCSRCS =
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S up_switchcontext.S
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_switchcontext.S
CMN_ASRCS += up_testset.S up_fetchadd.S vfork.S
ifeq ($(CONFIG_ARCH_SETJMP_H),y)
arch/arm/src/samv7/Make.defs
+1 -1
View File
@@ -43,7 +43,7 @@ HEAD_ASRC =
CMN_UASRCS =
CMN_UCSRCS =
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S up_switchcontext.S
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_switchcontext.S
CMN_ASRCS += up_testset.S up_fetchadd.S vfork.S
ifeq ($(CONFIG_ARCH_SETJMP_H),y)
arch/arm/src/stm32/Make.defs
+1 -1
View File
@@ -38,7 +38,7 @@ HEAD_ASRC =
CMN_UASRCS =
CMN_UCSRCS =
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S up_switchcontext.S
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_switchcontext.S
CMN_ASRCS += up_testset.S up_fetchadd.S vfork.S
ifeq ($(CONFIG_ARCH_SETJMP_H),y)
arch/arm/src/stm32f0l0g0/Make.defs
+1 -1
View File
@@ -37,7 +37,7 @@
HEAD_ASRC =
CMN_ASRCS = up_exception.S arm_saveusercontext.S arm_fullcontextrestore.S
CMN_ASRCS += up_switchcontext.S vfork.S
CMN_ASRCS += arm_switchcontext.S vfork.S
CMN_CSRCS = up_allocateheap.c up_assert.c up_blocktask.c arm_copyfullstate.c
CMN_CSRCS += up_createstack.c up_mdelay.c up_udelay.c up_exit.c
arch/arm/src/stm32f7/Make.defs
+1 -1
View File
@@ -43,7 +43,7 @@ HEAD_ASRC =
CMN_UASRCS =
CMN_UCSRCS =
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S up_switchcontext.S
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_switchcontext.S
CMN_ASRCS += up_testset.S up_fetchadd.S vfork.S
ifeq ($(CONFIG_ARCH_SETJMP_H),y)
arch/arm/src/stm32h7/Make.defs
+1 -1
View File
@@ -43,7 +43,7 @@ HEAD_ASRC =
CMN_UASRCS =
CMN_UCSRCS =
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S up_switchcontext.S
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_switchcontext.S
CMN_ASRCS += up_testset.S vfork.S
ifeq ($(CONFIG_ARCH_SETJMP_H),y)
arch/arm/src/stm32l4/Make.defs
+1 -1
View File
@@ -44,7 +44,7 @@ HEAD_ASRC =
CMN_UASRCS =
CMN_UCSRCS =
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S up_switchcontext.S
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_switchcontext.S
CMN_ASRCS += up_testset.S up_fetchadd.S vfork.S
ifeq ($(CONFIG_ARCH_SETJMP_H),y)
arch/arm/src/tiva/Make.defs
+1 -1
View File
@@ -36,7 +36,7 @@
HEAD_ASRC =
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S up_switchcontext.S
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_switchcontext.S
CMN_ASRCS += up_testset.S up_fetchadd.S vfork.S
ifeq ($(CONFIG_ARCH_SETJMP_H),y)
arch/arm/src/xmc4/Make.defs
+1 -1
View File
@@ -38,7 +38,7 @@ HEAD_ASRC =
CMN_UASRCS =
CMN_UCSRCS =
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S up_switchcontext.S
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_switchcontext.S
CMN_ASRCS += up_testset.S up_fetchadd.S vfork.S
ifeq ($(CONFIG_ARCH_SETJMP_H),y)