Rename irqsave() and irqrestore() to up_irq_save() and up_irq_restore()

arch/Kconfig

@@ -719,7 +719,7 @@ config ARCH_INT_DISABLEALL
 		back into the game" via a PendSV interrupt).
 
 		In the normal course of things, interrupts must occasionally be
-		disabled using the irqsave() inline function to prevent contention
+		disabled using the up_irq_save() inline function to prevent contention
 		in use of resources that may be shared between interrupt level and
 		non-interrupt level logic.  Now the question arises, if
 		ARCH_HIPRI_INTERRUPT, do we disable all interrupts (except SVCall),

arch/README.txt

@@ -107,10 +107,17 @@ include/irq.h
   - struct xcptcontext.  This structures represents the saved context
     of a thread.
 
-  - irqstate_t irqsave(void) -- Used to disable all interrupts.
+  - irqstate_t up_irq_save(void) -- Used to disable all interrupts.
 
-  - void irqrestore(irqstate_t flags) -- Used to restore interrupt
-    enables to the same state as before irqsave was called.
+  - void upirq_restore(irqstate_t flags) -- Used to restore interrupt
+    enables to the same state as before up_irq_save was called.
+
+  NOTE: These interfaces are not available to application code but can
+  only be used withint the operating system code.  And, in general,
+  these functions should *never* be called directly, not unless you
+  know absolutely well what you are doing.  Rather you shoudl typically
+  use the wrapper functions enter_critical_section() and leave_critical_section()
+  as prototyped in include/nuttx/irq.h.
 
   This file must also define NR_IRQS, the total number of IRQs supported
   by the board.

arch/arm/include/arm/irq.h

@@ -175,9 +175,18 @@ struct xcptcontext
 
 #ifndef __ASSEMBLY__
 
-/* Save the current interrupt enable state & disable IRQs */
+/* Name: up_irq_save, up_irq_restore, and friends.
+ *
+ * NOTE: This function should never be called from application code and,
+ * as a general rule unless you really know what you are doing, this
+ * function should not be called directly from operation system code either:
+ * Typically, the wrapper functions, enter_critical_section() and
+ * leave_critical section(), are probably what you really want.
+ */
 
-static inline irqstate_t irqsave(void)
+ /* Save the current interrupt enable state & disable IRQs. */
+
+static inline irqstate_t up_irq_save(void)
 {
   unsigned int flags;
   unsigned int temp;
@@ -194,7 +203,7 @@ static inline irqstate_t irqsave(void)
 
 /* Restore saved IRQ & FIQ state */
 
-static inline void irqrestore(irqstate_t flags)
+static inline void up_irq_restore(irqstate_t flags)
 {
   __asm__ __volatile__
     (

arch/arm/include/armv6-m/irq.h

@@ -213,6 +213,15 @@ struct xcptcontext
 
 #ifndef __ASSEMBLY__
 
+/* Name: up_irq_save, up_irq_restore, and friends.
+ *
+ * NOTE: This function should never be called from application code and,
+ * as a general rule unless you really know what you are doing, this
+ * function should not be called directly from operation system code either:
+ * Typically, the wrapper functions, enter_critical_section() and
+ * leave_critical section(), are probably what you really want.
+ */
+
 /* Get/set the PRIMASK register */
 
 static inline uint8_t getprimask(void) inline_function;
@@ -250,8 +259,8 @@ static inline void irqdisable(void)
 
 /* Save the current primask state & disable IRQs */
 
-static inline irqstate_t irqsave(void) inline_function;
-static inline irqstate_t irqsave(void)
+static inline irqstate_t up_irq_save(void) inline_function;
+static inline irqstate_t up_irq_save(void)
 {
   unsigned short primask;
 
@@ -280,8 +289,8 @@ static inline void irqenable(void)
 
 /* Restore saved primask state */
 
-static inline void irqrestore(irqstate_t flags) inline_function;
-static inline void irqrestore(irqstate_t flags)
+static inline void up_irq_restore(irqstate_t flags) inline_function;
+static inline void up_irq_restore(irqstate_t flags)
 {
   /* If bit 0 of the primask is 0, then we need to restore
    * interrupts.

arch/arm/include/armv7-a/irq.h

@@ -312,6 +312,15 @@ struct xcptcontext
 
 #ifndef __ASSEMBLY__
 
+/* Name: up_irq_save, up_irq_restore, and friends.
+ *
+ * NOTE: This function should never be called from application code and,
+ * as a general rule unless you really know what you are doing, this
+ * function should not be called directly from operation system code either:
+ * Typically, the wrapper functions, enter_critical_section() and
+ * leave_critical section(), are probably what you really want.
+ */
+
 /* Return the current IRQ state */
 
 static inline irqstate_t irqstate(void)
@@ -331,7 +340,7 @@ static inline irqstate_t irqstate(void)
 
 /* Disable IRQs and return the previous IRQ state */
 
-static inline irqstate_t irqsave(void)
+static inline irqstate_t up_irq_save(void)
 {
   unsigned int cpsr;
 
@@ -373,7 +382,7 @@ static inline irqstate_t irqenable(void)
 
 /* Restore saved IRQ & FIQ state */
 
-static inline void irqrestore(irqstate_t flags)
+static inline void up_irq_restore(irqstate_t flags)
 {
   __asm__ __volatile__
     (

arch/arm/include/armv7-m/irq.h

@@ -176,6 +176,15 @@ struct xcptcontext
 
 #ifndef __ASSEMBLY__
 
+/* Name: up_irq_save, up_irq_restore, and friends.
+ *
+ * NOTE: This function should never be called from application code and,
+ * as a general rule unless you really know what you are doing, this
+ * function should not be called directly from operation system code either:
+ * Typically, the wrapper functions, enter_critical_section() and
+ * leave_critical section(), are probably what you really want.
+ */
+
 /* Get/set the PRIMASK register */
 
 static inline uint8_t getprimask(void) inline_function;
@@ -249,8 +258,8 @@ static inline void irqdisable(void)
 
 /* Save the current primask state & disable IRQs */
 
-static inline irqstate_t irqsave(void) inline_function;
-static inline irqstate_t irqsave(void)
+static inline irqstate_t up_irq_save(void) inline_function;
+static inline irqstate_t up_irq_save(void)
 {
 #ifdef CONFIG_ARMV7M_USEBASEPRI
 
@@ -289,8 +298,8 @@ static inline void irqenable(void)
 
 /* Restore saved primask state */
 
-static inline void irqrestore(irqstate_t flags) inline_function;
-static inline void irqrestore(irqstate_t flags)
+static inline void up_irq_restore(irqstate_t flags) inline_function;
+static inline void up_irq_restore(irqstate_t flags)
 {
 #ifdef CONFIG_ARMV7M_USEBASEPRI
   setbasepri((uint32_t)flags);

arch/arm/include/armv7-r/irq.h

@@ -312,6 +312,15 @@ struct xcptcontext
 
 #ifndef __ASSEMBLY__
 
+/* Name: up_irq_save, up_irq_restore, and friends.
+ *
+ * NOTE: This function should never be called from application code and,
+ * as a general rule unless you really know what you are doing, this
+ * function should not be called directly from operation system code either:
+ * Typically, the wrapper functions, enter_critical_section() and
+ * leave_critical section(), are probably what you really want.
+ */
+
 /* Return the current IRQ state */
 
 static inline irqstate_t irqstate(void)
@@ -331,7 +340,7 @@ static inline irqstate_t irqstate(void)
 
 /* Disable IRQs and return the previous IRQ state */
 
-static inline irqstate_t irqsave(void)
+static inline irqstate_t up_irq_save(void)
 {
   unsigned int cpsr;
 
@@ -373,7 +382,7 @@ static inline irqstate_t irqenable(void)
 
 /* Restore saved IRQ & FIQ state */
 
-static inline void irqrestore(irqstate_t flags)
+static inline void up_irq_restore(irqstate_t flags)
 {
   __asm__ __volatile__
     (

arch/arm/include/efm32/chip.h

@@ -93,7 +93,7 @@
  * into the game" via a PendSV interrupt).
  *
  * In the normal course of things, interrupts must occasionally be disabled
- * using the irqsave() inline function to prevent contention in use of
+ * using the up_irq_save() inline function to prevent contention in use of
  * resources that may be shared between interrupt level and non-interrupt
  * level logic.  Now the question arises, if CONFIG_ARCH_HIPRI_INTERRUPT,
  * do we disable all interrupts (except SVCall), or do we only disable the

arch/arm/include/irq.h

@@ -53,7 +53,7 @@
 #include <arch/chip/irq.h>
 
 /* Include ARM architecture-specific IRQ definitions (including register
- * save structure and irqsave()/irqrestore() macros)
+ * save structure and up_irq_save()/up_irq_restore() functions)
  */
 
 #if defined(CONFIG_ARCH_CORTEXA5) || defined(CONFIG_ARCH_CORTEXA8)

arch/arm/include/kinetis/chip.h

@@ -1021,7 +1021,7 @@
  * into the game" via a PendSV interrupt).
  *
  * In the normal course of things, interrupts must occasionally be disabled
- * using the irqsave() inline function to prevent contention in use of
+ * using the up_irq_save() inline function to prevent contention in use of
  * resources that may be shared between interrupt level and non-interrupt
  * level logic.  Now the question arises, if CONFIG_ARCH_HIPRI_INTERRUPT,
  * do we disable all interrupts (except SVCall), or do we only disable the

arch/arm/include/lpc11xx/chip.h

@@ -93,7 +93,7 @@
  * into the game" via a PendSV interrupt).
  *
  * In the normal course of things, interrupts must occasionally be disabled
- * using the irqsave() inline function to prevent contention in use of
+ * using the up_irq_save() inline function to prevent contention in use of
  * resources that may be shared between interrupt level and non-interrupt
  * level logic.  Now the question arises, if CONFIG_ARCH_HIPRI_INTERRUPT,
  * do we disable all interrupts (except SVCall), or do we only disable the

arch/arm/include/lpc17xx/chip.h

@@ -389,7 +389,7 @@
  * into the game" via a PendSV interrupt).
  *
  * In the normal course of things, interrupts must occasionally be disabled
- * using the irqsave() inline function to prevent contention in use of
+ * using the up_irq_save() inline function to prevent contention in use of
  * resources that may be shared between interrupt level and non-interrupt
  * level logic.  Now the question arises, if CONFIG_ARCH_HIPRI_INTERRUPT,
  * do we disable all interrupts (except SVCall), or do we only disable the

arch/arm/include/lpc43xx/chip.h

@@ -678,7 +678,7 @@
  * into the game" via a PendSV interrupt).
  *
  * In the normal course of things, interrupts must occasionally be disabled
- * using the irqsave() inline function to prevent contention in use of
+ * using the up_irq_save() inline function to prevent contention in use of
  * resources that may be shared between interrupt level and non-interrupt
  * level logic.  Now the question arises, if CONFIG_ARCH_HIPRI_INTERRUPT,
  * do we disable all interrupts (except SVCall), or do we only disable the

arch/arm/include/sam34/chip.h

@@ -901,7 +901,7 @@
  * into the game" via a PendSV interrupt).
  *
  * In the normal course of things, interrupts must occasionally be disabled
- * using the irqsave() inline function to prevent contention in use of
+ * using the up_irq_save() inline function to prevent contention in use of
  * resources that may be shared between interrupt level and non-interrupt
  * level logic.  Now the question arises, if CONFIG_ARCH_HIPRI_INTERRUPT,
  * do we disable all interrupts (except SVCall), or do we only disable the

arch/arm/include/samv7/chip.h

@@ -413,7 +413,7 @@
  * into the game" via a PendSV interrupt).
  *
  * In the normal course of things, interrupts must occasionally be disabled
- * using the irqsave() inline function to prevent contention in use of
+ * using the up_irq_save() inline function to prevent contention in use of
  * resources that may be shared between interrupt level and non-interrupt
  * level logic.  Now the question arises, if CONFIG_ARCH_HIPRI_INTERRUPT,
  * do we disable all interrupts (except SVCall), or do we only disable the

arch/arm/include/stm32/chip.h

@@ -2372,7 +2372,7 @@
  * into the game" via a PendSV interrupt).
  *
  * In the normal course of things, interrupts must occasionally be disabled
- * using the irqsave() inline function to prevent contention in use of
+ * using the up_irq_save() inline function to prevent contention in use of
  * resources that may be shared between interrupt level and non-interrupt
  * level logic.  Now the question arises, if CONFIG_ARCH_HIPRI_INTERRUPT,
  * do we disable all interrupts (except SVCall), or do we only disable the

arch/arm/include/stm32f7/chip.h

@@ -164,7 +164,7 @@
  * into the game" via a PendSV interrupt).
  *
  * In the normal course of things, interrupts must occasionally be disabled
- * using the irqsave() inline function to prevent contention in use of
+ * using the up_irq_save() inline function to prevent contention in use of
  * resources that may be shared between interrupt level and non-interrupt
  * level logic.  Now the question arises, if CONFIG_ARCH_HIPRI_INTERRUPT,
  * do we disable all interrupts (except SVCall), or do we only disable the

arch/arm/include/tiva/chip.h

@@ -343,7 +343,7 @@
  * into the game" via a PendSV interrupt).
  *
  * In the normal course of things, interrupts must occasionally be disabled
- * using the irqsave() inline function to prevent contention in use of
+ * using the up_irq_save() inline function to prevent contention in use of
  * resources that may be shared between interrupt level and non-interrupt
  * level logic.  Now the question arises, if CONFIG_ARCH_HIPRI_INTERRUPT,
  * do we disable all interrupts (except SVCall), or do we only disable the

arch/arm/include/types.h

@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/include/types.h
  *
- *   Copyright (C) 2007-2009 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2009, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
  *
  * Redistribution and use in source and binary forms, with or without
@@ -83,7 +83,7 @@ typedef unsigned long long _uint64_t;
 typedef signed int         _intptr_t;
 typedef unsigned int       _uintptr_t;
 
-/* This is the size of the interrupt state save returned by irqsave().  For
+/* This is the size of the interrupt state save returned by up_irq_save().  For
  * ARM, a 32 register value is returned, for the thumb2, Cortex-M3, the 16-bit
  * primask register value is returned,
  */

arch/arm/src/arm/up_assert.c

@@ -312,7 +312,7 @@ static void _up_assert(int errorcode)
 
   if (current_regs || this_task()->pid == 0)
     {
-      (void)irqsave();
+      (void)up_irq_save();
       for (; ; )
         {
 #ifdef CONFIG_ARCH_LEDS

arch/arm/src/arm/up_sigdeliver.c

@@ -115,7 +115,7 @@ void up_sigdeliver(void)
 
   /* Then restore the task interrupt state */
 
-  irqrestore(regs[REG_CPSR]);
+  up_irq_restore(regs[REG_CPSR]);
 
   /* Deliver the signals */
 
@@ -127,7 +127,7 @@ void up_sigdeliver(void)
    */
 
   sdbg("Resuming\n");
-  (void)irqsave();
+  (void)up_irq_save();
   rtcb->pterrno = saved_errno;
 
   /* Then restore the correct state for this thread of execution. */

arch/arm/src/armv6-m/up_assert.c

@@ -367,7 +367,7 @@ static void _up_assert(int errorcode)
 
   if (current_regs || this_task()->pid == 0)
     {
-      (void)irqsave();
+      (void)up_irq_save();
       for (; ; )
         {
 #ifdef CONFIG_ARCH_LEDS

arch/arm/src/armv6-m/up_hardfault.c

@@ -148,7 +148,7 @@ int up_hardfault(int irq, FAR void *context)
         current_regs[REG_XPSR],  current_regs[REG_PRIMASK]);
 #endif
 
-  (void)irqsave();
+  (void)up_irq_save();
   lldbg("PANIC!!! Hard fault\n");
   PANIC();
   return OK; /* Won't get here */

arch/arm/src/armv6-m/up_sigdeliver.c

@@ -124,7 +124,7 @@ void up_sigdeliver(void)
 
   /* Then restore the task interrupt state */
 
-  irqrestore((uint8_t)regs[REG_PRIMASK]);
+  up_irq_restore((uint8_t)regs[REG_PRIMASK]);
 
   /* Deliver the signal */
 
@@ -136,7 +136,7 @@ void up_sigdeliver(void)
    */
 
   sdbg("Resuming\n");
-  (void)irqsave();
+  (void)up_irq_save();
   rtcb->pterrno = saved_errno;
 
   /* Then restore the correct state for this thread of

arch/arm/src/armv7-a/arm_assert.c

@@ -363,7 +363,7 @@ static void _up_assert(int errorcode)
 
   if (current_regs || this_task()->pid == 0)
     {
-      (void)irqsave();
+      (void)up_irq_save();
       for (; ; )
         {
 #ifdef CONFIG_ARCH_LEDS

arch/arm/src/armv7-a/arm_sigdeliver.c

@@ -103,7 +103,7 @@ void up_sigdeliver(void)
 
   /* Then restore the task interrupt state */
 
-  irqrestore(regs[REG_CPSR]);
+  up_irq_restore(regs[REG_CPSR]);
 
   /* Deliver the signals */
 
@@ -115,7 +115,7 @@ void up_sigdeliver(void)
    */
 
   sdbg("Resuming\n");
-  (void)irqsave();
+  (void)up_irq_save();
   rtcb->pterrno = saved_errno;
 
   /* Then restore the correct state for this thread of execution. */

arch/arm/src/armv7-m/up_assert.c

@@ -376,7 +376,7 @@ static void _up_assert(int errorcode)
 
   if (current_regs || (this_task())->pid == 0)
     {
-      (void)irqsave();
+      (void)up_irq_save();
       for (; ; )
         {
 #ifdef CONFIG_ARCH_LEDS

arch/arm/src/armv7-m/up_hardfault.c

@@ -178,7 +178,7 @@ int up_hardfault(int irq, FAR void *context)
 #  endif
 #endif
 
-  (void)irqsave();
+  (void)up_irq_save();
   lldbg("PANIC!!! Hard fault: %08x\n", getreg32(NVIC_HFAULTS));
   PANIC();
   return OK;

arch/arm/src/armv7-m/up_memfault.c

@@ -91,7 +91,7 @@ int up_memfault(int irq, FAR void *context)
 {
   /* Dump some memory management fault info */
 
-  (void)irqsave();
+  (void)up_irq_save();
   lldbg("PANIC!!! Memory Management Fault:\n");
   mfdbg("  IRQ: %d context: %p\n", irq, regs);
   lldbg("  CFAULTS: %08x MMFAR: %08x\n",

arch/arm/src/armv7-m/up_sigdeliver.c

@@ -124,9 +124,9 @@ void up_sigdeliver(void)
   /* Then restore the task interrupt state */
 
 #ifdef CONFIG_ARMV7M_USEBASEPRI
-  irqrestore((uint8_t)regs[REG_BASEPRI]);
+  up_irq_restore((uint8_t)regs[REG_BASEPRI]);
 #else
-  irqrestore((uint16_t)regs[REG_PRIMASK]);
+  up_irq_restore((uint16_t)regs[REG_PRIMASK]);
 #endif
 
   /* Deliver the signal */
@@ -139,7 +139,7 @@ void up_sigdeliver(void)
    */
 
   sdbg("Resuming\n");
-  (void)irqsave();
+  (void)up_irq_save();
   rtcb->pterrno = saved_errno;
 
   /* Then restore the correct state for this thread of

arch/arm/src/armv7-r/arm_assert.c

@@ -363,7 +363,7 @@ static void _up_assert(int errorcode)
 
   if (current_regs || (this_task())->pid == 0)
     {
-      (void)irqsave();
+      (void)up_irq_save();
       for (; ; )
         {
 #ifdef CONFIG_ARCH_LEDS

arch/arm/src/armv7-r/arm_sigdeliver.c

@@ -103,7 +103,7 @@ void up_sigdeliver(void)
 
   /* Then restore the task interrupt state */
 
-  irqrestore(regs[REG_CPSR]);
+  up_irq_restore(regs[REG_CPSR]);
 
   /* Deliver the signals */
 
@@ -115,7 +115,7 @@ void up_sigdeliver(void)
    */
 
   sdbg("Resuming\n");
-  (void)irqsave();
+  (void)up_irq_save();
   rtcb->pterrno = saved_errno;
 
   /* Then restore the correct state for this thread of execution. */

arch/arm/src/c5471/c5471_irq.c

@@ -179,7 +179,7 @@ void up_irqinitialize(void)
   /* And finally, enable interrupts */
 
 #ifndef CONFIG_SUPPRESS_INTERRUPTS
-  irqrestore(SVC_MODE | PSR_F_BIT);
+  up_irq_restore(SVC_MODE | PSR_F_BIT);
 #endif
 }
 

arch/arm/src/calypso/calypso_irq.c

@@ -223,7 +223,7 @@ void up_irqinitialize(void)
   /* Enable interrupts globally to the ARM core */
 
 #ifndef CONFIG_SUPPRESS_INTERRUPTS
-  irqrestore(SVC_MODE | PSR_F_BIT);
+  up_irq_restore(SVC_MODE | PSR_F_BIT);
 #endif
 }
 

arch/arm/src/common/up_exit.c

@@ -136,7 +136,7 @@ void _exit(int status)
    * task is started.
    */
 
-  (void)irqsave();
+  (void)up_irq_save();
 
   slldbg("TCB=%p exiting\n", this_task());
 

arch/arm/src/dm320/dm320_irq.c

@@ -116,7 +116,7 @@ void up_irqinitialize(void)
   /* And finally, enable interrupts */
 
 #ifndef CONFIG_SUPPRESS_INTERRUPTS
-  irqrestore(SVC_MODE | PSR_F_BIT);
+  up_irq_restore(SVC_MODE | PSR_F_BIT);
 #endif
 }
 

arch/arm/src/efm32/efm32_irq.c

@@ -165,7 +165,7 @@ static void efm32_dumpnvic(const char *msg, int irq)
 #ifdef CONFIG_DEBUG
 static int efm32_nmi(int irq, FAR void *context)
 {
-  (void)irqsave();
+  (void)up_irq_save();
   dbg("PANIC!!! NMI received\n");
   PANIC();
   return 0;
@@ -173,7 +173,7 @@ static int efm32_nmi(int irq, FAR void *context)
 
 static int efm32_busfault(int irq, FAR void *context)
 {
-  (void)irqsave();
+  (void)up_irq_save();
   dbg("PANIC!!! Bus fault received: %08x\n", getreg32(NVIC_CFAULTS));
   PANIC();
   return 0;
@@ -181,7 +181,7 @@ static int efm32_busfault(int irq, FAR void *context)
 
 static int efm32_usagefault(int irq, FAR void *context)
 {
-  (void)irqsave();
+  (void)up_irq_save();
   dbg("PANIC!!! Usage fault received: %08x\n", getreg32(NVIC_CFAULTS));
   PANIC();
   return 0;
@@ -189,7 +189,7 @@ static int efm32_usagefault(int irq, FAR void *context)
 
 static int efm32_pendsv(int irq, FAR void *context)
 {
-  (void)irqsave();
+  (void)up_irq_save();
   dbg("PANIC!!! PendSV received\n");
   PANIC();
   return 0;
@@ -197,7 +197,7 @@ static int efm32_pendsv(int irq, FAR void *context)
 
 static int efm32_dbgmonitor(int irq, FAR void *context)
 {
-  (void)irqsave();
+  (void)up_irq_save();
   dbg("PANIC!!! Debug Monitor received\n");
   PANIC();
   return 0;
@@ -205,7 +205,7 @@ static int efm32_dbgmonitor(int irq, FAR void *context)
 
 static int efm32_reserved(int irq, FAR void *context)
 {
-  (void)irqsave();
+  (void)up_irq_save();
   dbg("PANIC!!! Reserved interrupt\n");
   PANIC();
   return 0;

arch/arm/src/imx/imx_irq.c

@@ -100,7 +100,7 @@ void up_irqinitialize(void)
 
   /* And finally, enable interrupts */
 
-  irqrestore(SVC_MODE | PSR_F_BIT);
+  up_irq_restore(SVC_MODE | PSR_F_BIT);
 #endif
 }
 

arch/arm/src/kinetis/kinetis_irq.c

@@ -169,7 +169,7 @@ static void kinetis_dumpnvic(const char *msg, int irq)
 #ifdef CONFIG_DEBUG
 static int kinetis_nmi(int irq, FAR void *context)
 {
-  (void)irqsave();
+  (void)up_irq_save();
   dbg("PANIC!!! NMI received\n");
   PANIC();
   return 0;
@@ -177,7 +177,7 @@ static int kinetis_nmi(int irq, FAR void *context)
 
 static int kinetis_busfault(int irq, FAR void *context)
 {
-  (void)irqsave();
+  (void)up_irq_save();
   dbg("PANIC!!! Bus fault recived\n");
   PANIC();
   return 0;
@@ -185,7 +185,7 @@ static int kinetis_busfault(int irq, FAR void *context)
 
 static int kinetis_usagefault(int irq, FAR void *context)
 {
-  (void)irqsave();
+  (void)up_irq_save();
   dbg("PANIC!!! Usage fault received\n");
   PANIC();
   return 0;
@@ -193,7 +193,7 @@ static int kinetis_usagefault(int irq, FAR void *context)
 
 static int kinetis_pendsv(int irq, FAR void *context)
 {
-  (void)irqsave();
+  (void)up_irq_save();
   dbg("PANIC!!! PendSV received\n");
   PANIC();
   return 0;
@@ -201,7 +201,7 @@ static int kinetis_pendsv(int irq, FAR void *context)
 
 static int kinetis_dbgmonitor(int irq, FAR void *context)
 {
-  (void)irqsave();
+  (void)up_irq_save();
   dbg("PANIC!!! Debug Monitor received\n");
   PANIC();
   return 0;
@@ -209,7 +209,7 @@ static int kinetis_dbgmonitor(int irq, FAR void *context)
 
 static int kinetis_reserved(int irq, FAR void *context)
 {
-  (void)irqsave();
+  (void)up_irq_save();
   dbg("PANIC!!! Reserved interrupt\n");
   PANIC();
   return 0;

arch/arm/src/kl/kl_irq.c

@@ -134,7 +134,7 @@ static void kl_dumpnvic(const char *msg, int irq)
 #ifdef CONFIG_DEBUG
 static int kl_nmi(int irq, FAR void *context)
 {
-  (void)irqsave();
+  (void)up_irq_save();
   dbg("PANIC!!! NMI received\n");
   PANIC();
   return 0;
@@ -142,7 +142,7 @@ static int kl_nmi(int irq, FAR void *context)
 
 static int kl_pendsv(int irq, FAR void *context)
 {
-  (void)irqsave();
+  (void)up_irq_save();
   dbg("PANIC!!! PendSV received\n");
   PANIC();
   return 0;
@@ -150,7 +150,7 @@ static int kl_pendsv(int irq, FAR void *context)
 
 static int kl_reserved(int irq, FAR void *context)
 {
-  (void)irqsave();
+  (void)up_irq_save();
   dbg("PANIC!!! Reserved interrupt\n");
   PANIC();
   return 0;

arch/arm/src/lpc11xx/lpc11_irq.c

@@ -130,7 +130,7 @@ static void lpc11_dumpnvic(const char *msg, int irq)
 #ifdef CONFIG_DEBUG
 static int lpc11_nmi(int irq, FAR void *context)
 {
-  (void)irqsave();
+  (void)up_irq_save();
   dbg("PANIC!!! NMI received\n");
   PANIC();
   return 0;
@@ -138,7 +138,7 @@ static int lpc11_nmi(int irq, FAR void *context)
 
 static int lpc11_pendsv(int irq, FAR void *context)
 {
-  (void)irqsave();
+  (void)up_irq_save();
   dbg("PANIC!!! PendSV received\n");
   PANIC();
   return 0;
@@ -146,7 +146,7 @@ static int lpc11_pendsv(int irq, FAR void *context)
 
 static int lpc11_reserved(int irq, FAR void *context)
 {
-  (void)irqsave();
+  (void)up_irq_save();
   dbg("PANIC!!! Reserved interrupt\n");
   PANIC();
   return 0;

arch/arm/src/lpc17xx/lpc17_irq.c

@@ -147,7 +147,7 @@ static void lpc17_dumpnvic(const char *msg, int irq)
 #ifdef CONFIG_DEBUG
 static int lpc17_nmi(int irq, FAR void *context)
 {
-  (void)irqsave();
+  (void)up_irq_save();
   dbg("PANIC!!! NMI received\n");
   PANIC();
   return 0;
@@ -155,7 +155,7 @@ static int lpc17_nmi(int irq, FAR void *context)
 
 static int lpc17_busfault(int irq, FAR void *context)
 {
-  (void)irqsave();
+  (void)up_irq_save();
   dbg("PANIC!!! Bus fault recived\n");
   PANIC();
   return 0;
@@ -163,7 +163,7 @@ static int lpc17_busfault(int irq, FAR void *context)
 
 static int lpc17_usagefault(int irq, FAR void *context)
 {
-  (void)irqsave();
+  (void)up_irq_save();
   dbg("PANIC!!! Usage fault received\n");
   PANIC();
   return 0;
@@ -171,7 +171,7 @@ static int lpc17_usagefault(int irq, FAR void *context)
 
 static int lpc17_pendsv(int irq, FAR void *context)
 {
-  (void)irqsave();
+  (void)up_irq_save();
   dbg("PANIC!!! PendSV received\n");
   PANIC();
   return 0;
@@ -179,7 +179,7 @@ static int lpc17_pendsv(int irq, FAR void *context)
 
 static int lpc17_dbgmonitor(int irq, FAR void *context)
 {
-  (void)irqsave();
+  (void)up_irq_save();
   dbg("PANIC!!! Debug Monitor received\n");
   PANIC();
   return 0;
@@ -187,7 +187,7 @@ static int lpc17_dbgmonitor(int irq, FAR void *context)
 
 static int lpc17_reserved(int irq, FAR void *context)
 {
-  (void)irqsave();
+  (void)up_irq_save();
   dbg("PANIC!!! Reserved interrupt\n");
   PANIC();
   return 0;

arch/arm/src/lpc214x/lpc214x_irq.c

@@ -111,7 +111,7 @@ void up_irqinitialize(void)
   /* And finally, enable interrupts */
 
 #ifndef CONFIG_SUPPRESS_INTERRUPTS
-  irqrestore(SVC_MODE | PSR_F_BIT);
+  up_irq_restore(SVC_MODE | PSR_F_BIT);
 #endif
 }
 

arch/arm/src/lpc2378/lpc23xx_irq.c

@@ -111,7 +111,7 @@ void up_irqinitialize(void)
   /* Enable global ARM interrupts */
 
 #ifndef CONFIG_SUPPRESS_INTERRUPTS
-  irqrestore(SVC_MODE | PSR_F_BIT);
+  up_irq_restore(SVC_MODE | PSR_F_BIT);
 #endif
 }
 

arch/arm/src/lpc31xx/lpc31_irq.c

@@ -124,7 +124,7 @@ void up_irqinitialize(void)
   /* And finally, enable interrupts */
 
 #ifndef CONFIG_SUPPRESS_INTERRUPTS
-  irqrestore(SVC_MODE | PSR_F_BIT);
+  up_irq_restore(SVC_MODE | PSR_F_BIT);
 #endif
 }
 

arch/arm/src/lpc43xx/lpc43_irq.c

@@ -156,7 +156,7 @@ static void lpc43_dumpnvic(const char *msg, int irq)
 #ifdef CONFIG_DEBUG
 static int lpc43_nmi(int irq, FAR void *context)
 {
-  (void)irqsave();
+  (void)up_irq_save();
   dbg("PANIC!!! NMI received\n");
   PANIC();
   return 0;
@@ -164,7 +164,7 @@ static int lpc43_nmi(int irq, FAR void *context)
 
 static int lpc43_busfault(int irq, FAR void *context)
 {
-  (void)irqsave();
+  (void)up_irq_save();
   dbg("PANIC!!! Bus fault recived\n");
   PANIC();
   return 0;
@@ -172,7 +172,7 @@ static int lpc43_busfault(int irq, FAR void *context)
 
 static int lpc43_usagefault(int irq, FAR void *context)
 {
-  (void)irqsave();
+  (void)up_irq_save();
   dbg("PANIC!!! Usage fault received\n");
   PANIC();
   return 0;
@@ -180,7 +180,7 @@ static int lpc43_usagefault(int irq, FAR void *context)
 
 static int lpc43_pendsv(int irq, FAR void *context)
 {
-  (void)irqsave();
+  (void)up_irq_save();
   dbg("PANIC!!! PendSV received\n");
   PANIC();
   return 0;
@@ -188,7 +188,7 @@ static int lpc43_pendsv(int irq, FAR void *context)
 
 static int lpc43_dbgmonitor(int irq, FAR void *context)
 {
-  (void)irqsave();
+  (void)up_irq_save();
   dbg("PANIC!!! Debug Monitor received\n");
   PANIC();
   return 0;
@@ -196,7 +196,7 @@ static int lpc43_dbgmonitor(int irq, FAR void *context)
 
 static int lpc43_reserved(int irq, FAR void *context)
 {
-  (void)irqsave();
+  (void)up_irq_save();
   dbg("PANIC!!! Reserved interrupt\n");
   PANIC();
   return 0;

arch/arm/src/moxart/moxart_irq.c

@@ -150,7 +150,7 @@ void up_irqinitialize(void)
 #endif
 
 #ifndef CONFIG_SUPPRESS_INTERRUPTS
-  irqrestore(SVC_MODE | PSR_F_BIT);
+  up_irq_restore(SVC_MODE | PSR_F_BIT);
 #endif
 }
 

arch/arm/src/nuc1xx/nuc_irq.c

@@ -134,7 +134,7 @@ static void nuc_dumpnvic(const char *msg, int irq)
 #ifdef CONFIG_DEBUG
 static int nuc_nmi(int irq, FAR void *context)
 {
-  (void)irqsave();
+  (void)up_irq_save();
   dbg("PANIC!!! NMI received\n");
   PANIC();
   return 0;
@@ -142,7 +142,7 @@ static int nuc_nmi(int irq, FAR void *context)
 
 static int nuc_pendsv(int irq, FAR void *context)
 {
-  (void)irqsave();
+  (void)up_irq_save();
   dbg("PANIC!!! PendSV received\n");
   PANIC();
   return 0;
@@ -150,7 +150,7 @@ static int nuc_pendsv(int irq, FAR void *context)
 
 static int nuc_reserved(int irq, FAR void *context)
 {
-  (void)irqsave();
+  (void)up_irq_save();
   dbg("PANIC!!! Reserved interrupt\n");
   PANIC();
   return 0;

arch/arm/src/sam34/sam_irq.c

@@ -172,7 +172,7 @@ static void sam_dumpnvic(const char *msg, int irq)
 #ifdef CONFIG_DEBUG
 static int sam_nmi(int irq, FAR void *context)
 {
-  (void)irqsave();
+  (void)up_irq_save();
   dbg("PANIC!!! NMI received\n");
   PANIC();
   return 0;
@@ -180,7 +180,7 @@ static int sam_nmi(int irq, FAR void *context)
 
 static int sam_busfault(int irq, FAR void *context)
 {
-  (void)irqsave();
+  (void)up_irq_save();
   dbg("PANIC!!! Bus fault received: %08x\n", getreg32(NVIC_CFAULTS));
   PANIC();
   return 0;
@@ -188,7 +188,7 @@ static int sam_busfault(int irq, FAR void *context)
 
 static int sam_usagefault(int irq, FAR void *context)
 {
-  (void)irqsave();
+  (void)up_irq_save();
   dbg("PANIC!!! Usage fault received: %08x\n", getreg32(NVIC_CFAULTS));
   PANIC();
   return 0;
@@ -196,7 +196,7 @@ static int sam_usagefault(int irq, FAR void *context)
 
 static int sam_pendsv(int irq, FAR void *context)
 {
-  (void)irqsave();
+  (void)up_irq_save();
   dbg("PANIC!!! PendSV received\n");
   PANIC();
   return 0;
@@ -204,7 +204,7 @@ static int sam_pendsv(int irq, FAR void *context)
 
 static int sam_dbgmonitor(int irq, FAR void *context)
 {
-  (void)irqsave();
+  (void)up_irq_save();
   dbg("PANIC!!! Debug Monitor received\n");
   PANIC();
   return 0;
@@ -212,7 +212,7 @@ static int sam_dbgmonitor(int irq, FAR void *context)
 
 static int sam_reserved(int irq, FAR void *context)
 {
-  (void)irqsave();
+  (void)up_irq_save();
   dbg("PANIC!!! Reserved interrupt\n");
   PANIC();
   return 0;

arch/arm/src/samdl/sam_irq.c

@@ -90,7 +90,7 @@ volatile uint32_t *current_regs;
 #ifdef CONFIG_DEBUG
 static int sam_nmi(int irq, FAR void *context)
 {
-  (void)irqsave();
+  (void)up_irq_save();
   dbg("PANIC!!! NMI received\n");
   PANIC();
   return 0;
@@ -98,7 +98,7 @@ static int sam_nmi(int irq, FAR void *context)
 
 static int sam_pendsv(int irq, FAR void *context)
 {
-  (void)irqsave();
+  (void)up_irq_save();
   dbg("PANIC!!! PendSV received\n");
   PANIC();
   return 0;
@@ -106,7 +106,7 @@ static int sam_pendsv(int irq, FAR void *context)
 
 static int sam_reserved(int irq, FAR void *context)
 {
-  (void)irqsave();
+  (void)up_irq_save();
   dbg("PANIC!!! Reserved interrupt\n");
   PANIC();
   return 0;