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SAMA5D2: Add memory map file

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This commit is contained in:
Gregory Nutt
2015-09-02 13:04:01 -06:00
parent aff3dbda88
commit 831272cd35
3 changed files with 895 additions and 12 deletions
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arch/arm/include/sama5/chip.h
+6 -2
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@@ -83,8 +83,12 @@
# define ATSAMA5D2 1 /* SAMA5D2 family */
# undef ATSAMA5D3 /* Not SAMA5D3 family */
# undef ATSAMA5D4 /* Not SAMA5D4 family */
# define SAM_ISRAM0_SIZE (64*1024) /* 128KB of SRAM in two banks */
# define SAM_ISRAM1_SIZE (64*1024)
# define SAM_ISRAM0_SIZE (128*1024) /* SRAM0: 128KB */
#ifdef CONFIG_ARMV7A_L2CC_PL310
# define SAM_ISRAM1_SIZE (0) /* (SRAM1 used for L2 cache )*/
#else
# define SAM_ISRAM0_SIZE (64*1024) /* SRAM1: 128KB */
#endif
# define SAM_NDMAC 2 /* (2) XDMA controllers */
# define SAM_NDMACHAN 16 /* (16) DMA channels per XDMA controller */
arch/arm/src/sama5/chip/sama5d2x_memorymap.h
+879
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arch/arm/src/sama5/chip/sama5d4x_memorymap.h
+10 -10
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@@ -73,11 +73,11 @@
/* SAMA5 Physical (unmapped) Memory Map */
#define SAM_INTMEM_PSECTION 0x00000000 /* 0x00000000-0x0fffffff: Internal Memories */
#define SAM_EBICS0_PSECTION 0x10000000 /* 0x10000000-0x1fffffff: EBI Chip select 0 */
#define SAM_DDRCS_PSECTION 0x20000000 /* 0x20000000-0x3fffffff: EBI DDRCS */
#define SAM_EBICS1_PSECTION 0x60000000 /* 0x60000000-0x6fffffff: EBI Chip select 1 */
#define SAM_EBICS2_PSECTION 0x70000000 /* 0x70000000-0x7fffffff: EBI Chip select 2 */
#define SAM_EBICS3_PSECTION 0x80000000 /* 0x80000000-0x8fffffff: EBI Chip select 2 */
#define SAM_EBICS0_PSECTION 0x10000000 /* 0x10000000-0x1fffffff: EBI Chip Select 0 */
#define SAM_DDRCS_PSECTION 0x20000000 /* 0x20000000-0x3fffffff: EBI DDR Chip Select */
#define SAM_EBICS1_PSECTION 0x60000000 /* 0x60000000-0x6fffffff: EBI Chip Select 1 */
#define SAM_EBICS2_PSECTION 0x70000000 /* 0x70000000-0x7fffffff: EBI Chip Select 2 */
#define SAM_EBICS3_PSECTION 0x80000000 /* 0x80000000-0x8fffffff: EBI Chip Select 3 */
#define SAM_NFCCR_PSECTION 0x90000000 /* 0x90000000-0x9fffffff: NFC Command Registers */
/* 0x80000000-0xefffffff: Undefined */
#define SAM_PERIPH_PSECTION 0xf0000000 /* 0xf0000000-0xffffffff: Internal Peripherals */
@@ -361,11 +361,11 @@
# define SAM_DAP_VSECTION 0x00800000 /* 0x00800000-0x008fffff: DAP */
# define SAM_SMD_VSECTION 0x00900000 /* 0x00900000-0x009fffff: SMD */
# define SAM_L2CC_VSECTION 0x00a00000 /* 0x00a00000-0x00afffff: L2CC */
# define SAM_EBICS0_VSECTION 0x10000000 /* 0x10000000-0x1fffffff: EBI Chip select 0 */
# define SAM_DDRCS_VSECTION 0x20000000 /* 0x20000000-0x3fffffff: EBI DDRCS */
# define SAM_EBICS1_VSECTION 0x60000000 /* 0x60000000-0x6fffffff: EBI Chip select 1 */
# define SAM_EBICS2_VSECTION 0x70000000 /* 0x70000000-0x7fffffff: EBI Chip select 2 */
# define SAM_EBICS3_VSECTION 0x80000000 /* 0x80000000-0x8fffffff: EBI Chip select 2 */
# define SAM_EBICS0_VSECTION 0x10000000 /* 0x10000000-0x1fffffff: EBI Chip Select 0 */
# define SAM_DDRCS_VSECTION 0x20000000 /* 0x20000000-0x3fffffff: EBI DDR Chip Select */
# define SAM_EBICS1_VSECTION 0x60000000 /* 0x60000000-0x6fffffff: EBI Chip Select 1 */
# define SAM_EBICS2_VSECTION 0x70000000 /* 0x70000000-0x7fffffff: EBI Chip Select 2 */
# define SAM_EBICS3_VSECTION 0x80000000 /* 0x80000000-0x8fffffff: EBI Chip Select 3 */
# define SAM_NFCCR_VSECTION 0x90000000 /* 0x90000000-0x9fffffff: NFC Command Registers */
# define SAM_PERIPHA_VSECTION 0xf0000000 /* 0xf0000000-0xf0023fff: Internal Peripherals A */
# define SAM_PERIPHB_VSECTION 0xf8000000 /* 0xf8000000-0xf803c3ff: Internal Peripherals B */