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arch/arm64: merge serial_pl011.c and qemu_serial.c

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At present, the serial drivers qemu_serial.c and serial_pl011.c on the fvp-v8r and qemu platforms in arm64 are duplicated
and need to be merged. The plan is to place them under the drivers\serial directory to create a common code module,
so that both fvp-v8r and qemu can use the same code.
In the future, if new platforms use pl011 serial ports, they can also be directly reused

Signed-off-by: hujun5 <hujun5@xiaomi.com>
This commit is contained in:
hujun5
2023-03-08 19:53:36 +08:00
committed by Alin Jerpelea
parent 5ff1e85947
commit 7f4cb3057a
23 changed files with 334 additions and 858 deletions
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boards/arm64/fvp-v8r/fvp-armv8r/configs/nsh/defconfig
+13 -1
View File
@@ -33,7 +33,19 @@ CONFIG_EXPERIMENTAL=y
CONFIG_FS_PROCFS=y
CONFIG_FS_PROCFS_REGISTER=y
CONFIG_FS_ROMFS=y
CONFIG_FVP_UART_PL011=y
CONFIG_UART0_PL011=y
CONFIG_UART0_BASE=0x9c090000
CONFIG_UART0_IRQ=37
CONFIG_UART1_PL011=y
CONFIG_UART1_BASE=0x9c0a0000
CONFIG_UART1_IRQ=38
CONFIG_UART2_PL011=y
CONFIG_UART2_BASE=0x9c0b0000
CONFIG_UART2_IRQ=39
CONFIG_UART3_PL011=y
CONFIG_UART3_BASE=0x9c0c0000
CONFIG_UART3_IRQ=40
CONFIG_UART_PL011=y
CONFIG_IDLETHREAD_STACKSIZE=8192
CONFIG_INIT_ENTRYPOINT="nsh_main"
CONFIG_INTELHEX_BINARY=y
boards/arm64/fvp-v8r/fvp-armv8r/configs/nsh_smp/defconfig
+13 -1
View File
@@ -33,7 +33,19 @@ CONFIG_EXPERIMENTAL=y
CONFIG_FS_PROCFS=y
CONFIG_FS_PROCFS_REGISTER=y
CONFIG_FS_ROMFS=y
CONFIG_FVP_UART_PL011=y
CONFIG_UART0_PL011=y
CONFIG_UART0_BASE=0x9c090000
CONFIG_UART0_IRQ=37
CONFIG_UART1_PL011=y
CONFIG_UART1_BASE=0x9c0a0000
CONFIG_UART1_IRQ=38
CONFIG_UART2_PL011=y
CONFIG_UART2_BASE=0x9c0b0000
CONFIG_UART2_IRQ=39
CONFIG_UART3_PL011=y
CONFIG_UART3_BASE=0x9c0c0000
CONFIG_UART3_IRQ=40
CONFIG_UART_PL011=y
CONFIG_IDLETHREAD_STACKSIZE=8192
CONFIG_INIT_ENTRYPOINT="nsh_main"
CONFIG_INTELHEX_BINARY=y
boards/arm64/qemu/qemu-armv8a/configs/citest/defconfig
+68
View File
@@ -0,0 +1,68 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
CONFIG_ARCH="arm64"
CONFIG_ARCH_ARM64=y
CONFIG_ARCH_BOARD="qemu-armv8a"
CONFIG_ARCH_BOARD_QEMU_ARMV8A=y
CONFIG_ARCH_CHIP="qemu"
CONFIG_ARCH_CHIP_QEMU=y
CONFIG_ARCH_CHIP_QEMU_A53=y
CONFIG_ARCH_INTERRUPTSTACK=4096
CONFIG_BUILTIN=y
CONFIG_DEBUG_ASSERTIONS=y
CONFIG_DEBUG_ERROR=y
CONFIG_DEBUG_FEATURES=y
CONFIG_DEBUG_FULLOPT=y
CONFIG_DEBUG_INFO=y
CONFIG_DEBUG_SCHED=y
CONFIG_DEBUG_SCHED_ERROR=y
CONFIG_DEBUG_SCHED_INFO=y
CONFIG_DEBUG_SCHED_WARN=y
CONFIG_DEBUG_SYMBOLS=y
CONFIG_DEBUG_WARN=y
CONFIG_DEFAULT_TASK_STACKSIZE=8192
CONFIG_DEV_ZERO=y
CONFIG_EXAMPLES_HELLO=y
CONFIG_EXPERIMENTAL=y
CONFIG_FS_PROCFS=y
CONFIG_FS_ROMFS=y
CONFIG_HAVE_CXX=y
CONFIG_HAVE_CXXINITIALIZE=y
CONFIG_IDLETHREAD_STACKSIZE=8192
CONFIG_INIT_ENTRYPOINT="nsh_main"
CONFIG_INTELHEX_BINARY=y
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_READLINE=y
CONFIG_NSH_ROMFSETC=y
CONFIG_PREALLOC_TIMERS=4
CONFIG_PTHREAD_STACK_MIN=8192
CONFIG_UART1_PL011=y
CONFIG_UART1_BASE=0x9000000
CONFIG_UART1_IRQ=33
CONFIG_UART_PL011=y
CONFIG_RAMLOG=y
CONFIG_RAM_SIZE=134217728
CONFIG_RAM_START=0x40000000
CONFIG_RAW_BINARY=y
CONFIG_READLINE_CMD_HISTORY=y
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_HPWORK=y
CONFIG_SCHED_HPWORKPRIORITY=192
CONFIG_SPINLOCK=y
CONFIG_STACK_COLORATION=y
CONFIG_START_MONTH=3
CONFIG_START_YEAR=2022
CONFIG_SYMTAB_ORDEREDBYNAME=y
CONFIG_SYSTEM_NSH=y
CONFIG_SYSTEM_SYSTEM=y
CONFIG_TESTING_GETPRIME=y
CONFIG_TESTING_OSTEST=y
CONFIG_UART1_SERIAL_CONSOLE=y
CONFIG_USEC_PER_TICK=1000
boards/arm64/qemu/qemu-armv8a/configs/netnsh/defconfig
+4 -1
View File
@@ -59,7 +59,10 @@ CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_READLINE=y
CONFIG_PREALLOC_TIMERS=4
CONFIG_PTHREAD_STACK_MIN=8192
CONFIG_QEMU_UART_PL011=y
CONFIG_UART1_PL011=y
CONFIG_UART1_BASE=0x9000000
CONFIG_UART1_IRQ=33
CONFIG_UART_PL011=y
CONFIG_RAM_SIZE=134217728
CONFIG_RAM_START=0x40000000
CONFIG_RAW_BINARY=y
boards/arm64/qemu/qemu-armv8a/configs/netnsh_smp/defconfig
+4 -1
View File
@@ -61,7 +61,10 @@ CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_READLINE=y
CONFIG_PREALLOC_TIMERS=4
CONFIG_PTHREAD_STACK_MIN=8192
CONFIG_QEMU_UART_PL011=y
CONFIG_UART1_PL011=y
CONFIG_UART1_BASE=0x9000000
CONFIG_UART1_IRQ=33
CONFIG_UART_PL011=y
CONFIG_RAM_SIZE=134217728
CONFIG_RAM_START=0x40000000
CONFIG_RAW_BINARY=y
boards/arm64/qemu/qemu-armv8a/configs/nsh/defconfig
+4 -1
View File
@@ -45,7 +45,10 @@ CONFIG_NSH_READLINE=y
CONFIG_NSH_ROMFSETC=y
CONFIG_PREALLOC_TIMERS=4
CONFIG_PTHREAD_STACK_MIN=8192
CONFIG_QEMU_UART_PL011=y
CONFIG_UART1_PL011=y
CONFIG_UART1_BASE=0x9000000
CONFIG_UART1_IRQ=33
CONFIG_UART_PL011=y
CONFIG_RAMLOG=y
CONFIG_RAM_SIZE=134217728
CONFIG_RAM_START=0x40000000
boards/arm64/qemu/qemu-armv8a/configs/nsh_gicv2/defconfig
+4 -1
View File
@@ -44,7 +44,10 @@ CONFIG_NSH_READLINE=y
CONFIG_NSH_ROMFSETC=y
CONFIG_PREALLOC_TIMERS=4
CONFIG_PTHREAD_STACK_MIN=8192
CONFIG_QEMU_UART_PL011=y
CONFIG_UART1_PL011=y
CONFIG_UART1_BASE=0x9000000
CONFIG_UART1_IRQ=33
CONFIG_UART_PL011=y
CONFIG_RAMLOG=y
CONFIG_RAM_SIZE=134217728
CONFIG_RAM_START=0x40000000
boards/arm64/qemu/qemu-armv8a/configs/nsh_smp/defconfig
+4 -1
View File
@@ -43,7 +43,10 @@ CONFIG_NSH_READLINE=y
CONFIG_NSH_ROMFSETC=y
CONFIG_PREALLOC_TIMERS=4
CONFIG_PTHREAD_STACK_MIN=16384
CONFIG_QEMU_UART_PL011=y
CONFIG_UART1_PL011=y
CONFIG_UART1_BASE=0x9000000
CONFIG_UART1_IRQ=33
CONFIG_UART_PL011=y
CONFIG_RAMLOG=y
CONFIG_RAM_SIZE=134217728
CONFIG_RAM_START=0x40000000
boards/arm64/qemu/qemu-armv8a/configs/nsh_smp_tickless/defconfig
+4 -1
View File
@@ -43,7 +43,10 @@ CONFIG_NSH_READLINE=y
CONFIG_NSH_ROMFSETC=y
CONFIG_PREALLOC_TIMERS=4
CONFIG_PTHREAD_STACK_MIN=16384
CONFIG_QEMU_UART_PL011=y
CONFIG_UART1_PL011=y
CONFIG_UART1_BASE=0x9000000
CONFIG_UART1_IRQ=33
CONFIG_UART_PL011=y
CONFIG_RAMLOG=y
CONFIG_RAM_SIZE=134217728
CONFIG_RAM_START=0x40000000