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arch/arm64: merge serial_pl011.c and qemu_serial.c

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At present, the serial drivers qemu_serial.c and serial_pl011.c on the fvp-v8r and qemu platforms in arm64 are duplicated
and need to be merged. The plan is to place them under the drivers\serial directory to create a common code module,
so that both fvp-v8r and qemu can use the same code.
In the future, if new platforms use pl011 serial ports, they can also be directly reused

Signed-off-by: hujun5 <hujun5@xiaomi.com>
This commit is contained in:
hujun5
2023-03-08 19:53:36 +08:00
committed by Alin Jerpelea
parent 5ff1e85947
commit 7f4cb3057a
23 changed files with 334 additions and 858 deletions
Download Patch File Download Diff File Expand all files Collapse all files
arch/arm64/src/fvp-v8r/Kconfig
-7
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@@ -21,11 +21,4 @@ endchoice # FVP Chip Selection
endmenu # "FVP Chip Selection"
menu "FVP Peripheral Selection"
config FVP_UART_PL011
bool "UART"
default n
select UART1_SERIALDRIVER
endmenu # FVP Peripheral Selection
endif # ARCH_CHIP_FVP_ARMV8R
arch/arm64/src/fvp-v8r/Make.defs
+1 -1
View File
@@ -21,7 +21,7 @@
include common/Make.defs
# fvp-specific C source files
CHIP_CSRCS = fvp_boot.c serial_pl011.c
CHIP_CSRCS = fvp_boot.c fvp_serial.c
ifeq ($(CONFIG_ARCH_EARLY_PRINT),y)
CHIP_ASRCS += fvp_lowputc.S
arch/arm64/src/fvp-v8r/fvp_boot.h
-2
View File
@@ -31,8 +31,6 @@
#include <stdint.h>
#include <stdbool.h>
#include <arch/chip/chip.h>
#include "arm64_internal.h"
#include "arm64_arch.h"
/****************************************************************************
* Pre-processor Definitions
arch/arm64/src/fvp-v8r/fvp_serial.c
+74
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@@ -0,0 +1,74 @@
/***************************************************************************
* arch/arm64/src/fvp-v8r/fvp_serial.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
***************************************************************************/
/***************************************************************************
* Included Files
***************************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <stdint.h>
#include <stdbool.h>
#include <unistd.h>
#include <string.h>
#include <assert.h>
#include <errno.h>
#include <debug.h>
#include <nuttx/serial/uart_pl011.h>
#include "arm64_internal.h"
#ifdef USE_SERIALDRIVER
/***************************************************************************
* Public Functions
***************************************************************************/
/***************************************************************************
* Name: arm64_earlyserialinit
*
* Description:
* see arm64_internal.h
*
***************************************************************************/
void arm64_earlyserialinit(void)
{
/* Enable the console UART. The other UARTs will be initialized if and
* when they are first opened.
*/
pl011_earlyserialinit();
}
/***************************************************************************
* Name: arm64_serialinit
*
* Description:
* see arm64_internal.h
*
***************************************************************************/
void arm64_serialinit(void)
{
pl011_serialinit();
}
#endif /* USE_SERIALDRIVER */
arch/arm64/src/fvp-v8r/serial_pl011.h
-15
View File
@@ -35,21 +35,6 @@
* Public Types
****************************************************************************/
#ifdef CONFIG_FVP_UART_PL011
#define CONFIG_UART0_BASE 0x9c090000
#define CONFIG_UART0_IRQ (GIC_SPI_INT_BASE + 5)
#define CONFIG_UART1_BASE 0x9c0a0000
#define CONFIG_UART1_IRQ (GIC_SPI_INT_BASE + 6)
#define CONFIG_UART2_BASE 0x9c0b0000
#define CONFIG_UART2_IRQ (GIC_SPI_INT_BASE + 7)
#define CONFIG_UART3_BASE 0x9c0c0000
#define CONFIG_UART3_IRQ (GIC_SPI_INT_BASE + 8)
#endif
/****************************************************************************
* Inline Functions
****************************************************************************/
arch/arm64/src/qemu/Kconfig
-7
View File
@@ -33,11 +33,4 @@ endchoice # Qemu Chip Selection
endmenu # "Qemu Chip Selection"
menu "Qemu Peripheral Selection"
config QEMU_UART_PL011
bool "UART"
default n
select UART1_SERIALDRIVER
endmenu # Qemu Peripheral Selection
endif # ARCH_CHIP_QEMU
arch/arm64/src/qemu/qemu_boot.h
-2
View File
@@ -31,8 +31,6 @@
#include <stdint.h>
#include <stdbool.h>
#include <arch/chip/chip.h>
#include "arm64_internal.h"
#include "arm64_arch.h"
/****************************************************************************
* Pre-processor Definitions
arch/arm64/src/qemu/qemu_serial.c
+3 -793
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File diff suppressed because it is too large Load Diff
arch/arm64/src/qemu/qemu_serial.h
-3
View File
@@ -27,9 +27,6 @@
#include <nuttx/config.h>
#include "arm64_internal.h"
#include "arm64_gic.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
boards/arm64/fvp-v8r/fvp-armv8r/configs/nsh/defconfig
+13 -1
View File
@@ -33,7 +33,19 @@ CONFIG_EXPERIMENTAL=y
CONFIG_FS_PROCFS=y
CONFIG_FS_PROCFS_REGISTER=y
CONFIG_FS_ROMFS=y
CONFIG_FVP_UART_PL011=y
CONFIG_UART0_PL011=y
CONFIG_UART0_BASE=0x9c090000
CONFIG_UART0_IRQ=37
CONFIG_UART1_PL011=y
CONFIG_UART1_BASE=0x9c0a0000
CONFIG_UART1_IRQ=38
CONFIG_UART2_PL011=y
CONFIG_UART2_BASE=0x9c0b0000
CONFIG_UART2_IRQ=39
CONFIG_UART3_PL011=y
CONFIG_UART3_BASE=0x9c0c0000
CONFIG_UART3_IRQ=40
CONFIG_UART_PL011=y
CONFIG_IDLETHREAD_STACKSIZE=8192
CONFIG_INIT_ENTRYPOINT="nsh_main"
CONFIG_INTELHEX_BINARY=y
boards/arm64/fvp-v8r/fvp-armv8r/configs/nsh_smp/defconfig
+13 -1
View File
@@ -33,7 +33,19 @@ CONFIG_EXPERIMENTAL=y
CONFIG_FS_PROCFS=y
CONFIG_FS_PROCFS_REGISTER=y
CONFIG_FS_ROMFS=y
CONFIG_FVP_UART_PL011=y
CONFIG_UART0_PL011=y
CONFIG_UART0_BASE=0x9c090000
CONFIG_UART0_IRQ=37
CONFIG_UART1_PL011=y
CONFIG_UART1_BASE=0x9c0a0000
CONFIG_UART1_IRQ=38
CONFIG_UART2_PL011=y
CONFIG_UART2_BASE=0x9c0b0000
CONFIG_UART2_IRQ=39
CONFIG_UART3_PL011=y
CONFIG_UART3_BASE=0x9c0c0000
CONFIG_UART3_IRQ=40
CONFIG_UART_PL011=y
CONFIG_IDLETHREAD_STACKSIZE=8192
CONFIG_INIT_ENTRYPOINT="nsh_main"
CONFIG_INTELHEX_BINARY=y
boards/arm64/qemu/qemu-armv8a/configs/citest/defconfig
+68
View File
@@ -0,0 +1,68 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
CONFIG_ARCH="arm64"
CONFIG_ARCH_ARM64=y
CONFIG_ARCH_BOARD="qemu-armv8a"
CONFIG_ARCH_BOARD_QEMU_ARMV8A=y
CONFIG_ARCH_CHIP="qemu"
CONFIG_ARCH_CHIP_QEMU=y
CONFIG_ARCH_CHIP_QEMU_A53=y
CONFIG_ARCH_INTERRUPTSTACK=4096
CONFIG_BUILTIN=y
CONFIG_DEBUG_ASSERTIONS=y
CONFIG_DEBUG_ERROR=y
CONFIG_DEBUG_FEATURES=y
CONFIG_DEBUG_FULLOPT=y
CONFIG_DEBUG_INFO=y
CONFIG_DEBUG_SCHED=y
CONFIG_DEBUG_SCHED_ERROR=y
CONFIG_DEBUG_SCHED_INFO=y
CONFIG_DEBUG_SCHED_WARN=y
CONFIG_DEBUG_SYMBOLS=y
CONFIG_DEBUG_WARN=y
CONFIG_DEFAULT_TASK_STACKSIZE=8192
CONFIG_DEV_ZERO=y
CONFIG_EXAMPLES_HELLO=y
CONFIG_EXPERIMENTAL=y
CONFIG_FS_PROCFS=y
CONFIG_FS_ROMFS=y
CONFIG_HAVE_CXX=y
CONFIG_HAVE_CXXINITIALIZE=y
CONFIG_IDLETHREAD_STACKSIZE=8192
CONFIG_INIT_ENTRYPOINT="nsh_main"
CONFIG_INTELHEX_BINARY=y
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_READLINE=y
CONFIG_NSH_ROMFSETC=y
CONFIG_PREALLOC_TIMERS=4
CONFIG_PTHREAD_STACK_MIN=8192
CONFIG_UART1_PL011=y
CONFIG_UART1_BASE=0x9000000
CONFIG_UART1_IRQ=33
CONFIG_UART_PL011=y
CONFIG_RAMLOG=y
CONFIG_RAM_SIZE=134217728
CONFIG_RAM_START=0x40000000
CONFIG_RAW_BINARY=y
CONFIG_READLINE_CMD_HISTORY=y
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_HPWORK=y
CONFIG_SCHED_HPWORKPRIORITY=192
CONFIG_SPINLOCK=y
CONFIG_STACK_COLORATION=y
CONFIG_START_MONTH=3
CONFIG_START_YEAR=2022
CONFIG_SYMTAB_ORDEREDBYNAME=y
CONFIG_SYSTEM_NSH=y
CONFIG_SYSTEM_SYSTEM=y
CONFIG_TESTING_GETPRIME=y
CONFIG_TESTING_OSTEST=y
CONFIG_UART1_SERIAL_CONSOLE=y
CONFIG_USEC_PER_TICK=1000
boards/arm64/qemu/qemu-armv8a/configs/netnsh/defconfig
+4 -1
View File
@@ -59,7 +59,10 @@ CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_READLINE=y
CONFIG_PREALLOC_TIMERS=4
CONFIG_PTHREAD_STACK_MIN=8192
CONFIG_QEMU_UART_PL011=y
CONFIG_UART1_PL011=y
CONFIG_UART1_BASE=0x9000000
CONFIG_UART1_IRQ=33
CONFIG_UART_PL011=y
CONFIG_RAM_SIZE=134217728
CONFIG_RAM_START=0x40000000
CONFIG_RAW_BINARY=y
boards/arm64/qemu/qemu-armv8a/configs/netnsh_smp/defconfig
+4 -1
View File
@@ -61,7 +61,10 @@ CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_READLINE=y
CONFIG_PREALLOC_TIMERS=4
CONFIG_PTHREAD_STACK_MIN=8192
CONFIG_QEMU_UART_PL011=y
CONFIG_UART1_PL011=y
CONFIG_UART1_BASE=0x9000000
CONFIG_UART1_IRQ=33
CONFIG_UART_PL011=y
CONFIG_RAM_SIZE=134217728
CONFIG_RAM_START=0x40000000
CONFIG_RAW_BINARY=y
boards/arm64/qemu/qemu-armv8a/configs/nsh/defconfig
+4 -1
View File
@@ -45,7 +45,10 @@ CONFIG_NSH_READLINE=y
CONFIG_NSH_ROMFSETC=y
CONFIG_PREALLOC_TIMERS=4
CONFIG_PTHREAD_STACK_MIN=8192
CONFIG_QEMU_UART_PL011=y
CONFIG_UART1_PL011=y
CONFIG_UART1_BASE=0x9000000
CONFIG_UART1_IRQ=33
CONFIG_UART_PL011=y
CONFIG_RAMLOG=y
CONFIG_RAM_SIZE=134217728
CONFIG_RAM_START=0x40000000
boards/arm64/qemu/qemu-armv8a/configs/nsh_gicv2/defconfig
+4 -1
View File
@@ -44,7 +44,10 @@ CONFIG_NSH_READLINE=y
CONFIG_NSH_ROMFSETC=y
CONFIG_PREALLOC_TIMERS=4
CONFIG_PTHREAD_STACK_MIN=8192
CONFIG_QEMU_UART_PL011=y
CONFIG_UART1_PL011=y
CONFIG_UART1_BASE=0x9000000
CONFIG_UART1_IRQ=33
CONFIG_UART_PL011=y
CONFIG_RAMLOG=y
CONFIG_RAM_SIZE=134217728
CONFIG_RAM_START=0x40000000
boards/arm64/qemu/qemu-armv8a/configs/nsh_smp/defconfig
+4 -1
View File
@@ -43,7 +43,10 @@ CONFIG_NSH_READLINE=y
CONFIG_NSH_ROMFSETC=y
CONFIG_PREALLOC_TIMERS=4
CONFIG_PTHREAD_STACK_MIN=16384
CONFIG_QEMU_UART_PL011=y
CONFIG_UART1_PL011=y
CONFIG_UART1_BASE=0x9000000
CONFIG_UART1_IRQ=33
CONFIG_UART_PL011=y
CONFIG_RAMLOG=y
CONFIG_RAM_SIZE=134217728
CONFIG_RAM_START=0x40000000
boards/arm64/qemu/qemu-armv8a/configs/nsh_smp_tickless/defconfig
+4 -1
View File
@@ -43,7 +43,10 @@ CONFIG_NSH_READLINE=y
CONFIG_NSH_ROMFSETC=y
CONFIG_PREALLOC_TIMERS=4
CONFIG_PTHREAD_STACK_MIN=16384
CONFIG_QEMU_UART_PL011=y
CONFIG_UART1_PL011=y
CONFIG_UART1_BASE=0x9000000
CONFIG_UART1_IRQ=33
CONFIG_UART_PL011=y
CONFIG_RAMLOG=y
CONFIG_RAM_SIZE=134217728
CONFIG_RAM_START=0x40000000
drivers/serial/Kconfig
+8
View File
@@ -41,6 +41,14 @@ config SERIAL_CONSOLE
bool
default n
menuconfig UART_PL011
bool "PL011 Chip support"
default n
if UART_PL011
source "drivers/serial/Kconfig-pl011"
endif
menuconfig 16550_UART
bool "16550 UART Chip support"
select ARCH_HAVE_SERIAL_TERMIOS
drivers/serial/Kconfig-pl011
+60
View File
@@ -0,0 +1,60 @@
#
# For a description of the syntax of this configuration file,
# see the file kconfig-language.txt in the NuttX tools repository.
#
if UART_PL011
config UART0_PL011
bool "UART0 PL011"
select UART0_SERIALDRIVER
default n
config UART1_PL011
bool "UART1 PL011"
select UART1_SERIALDRIVER
default n
config UART2_PL011
bool "UART2 PL011"
select UART2_SERIALDRIVER
default n
config UART3_PL011
bool "UART3 PL011"
select UART3_SERIALDRIVER
default n
config UART0_BASE
hex "UART0 base address"
depends on UART0_PL011
config UART1_BASE
hex "UART1 base address"
depends on UART1_PL011
config UART2_BASE
hex "UART2 base address"
depends on UART2_PL011
config UART3_BASE
hex "UART3 base address"
depends on UART3_PL011
config UART0_IRQ
int "PL011 UART0 IRQ number"
depends on UART0_PL011
config UART1_IRQ
int "PL011 UART1 IRQ number"
depends on UART1_PL011
config UART2_IRQ
int "PL011 UART2 IRQ number"
depends on UART2_PL011
config UART3_IRQ
int "PL011 UART3 IRQ number"
depends on UART3_PL011
endif # UART_PL011
drivers/serial/Make.defs
+4
View File
@@ -22,6 +22,10 @@
CSRCS += serial.c serial_io.c
ifeq ($(CONFIG_UART_PL011),y)
CSRCS += serial_pl011.c
endif
ifeq ($(CONFIG_SERIAL_RXDMA),y)
CSRCS += serial_dma.c
else ifeq ($(CONFIG_SERIAL_TXDMA),y)
arch/arm64/src/fvp-v8r/serial_pl011.c → drivers/serial/serial_pl011.c
+10 -20
View File
@@ -1,5 +1,5 @@
/***************************************************************************
* arch/arm64/src/fvp-v8r/serial_pl011.c
* drivers/serial/serial_pl011.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
@@ -43,16 +43,9 @@
#include <nuttx/fs/ioctl.h>
#include <nuttx/semaphore.h>
#include <nuttx/serial/serial.h>
#include <nuttx/serial/uart_pl011.h>
#include "arm64_arch.h"
#include "arm64_internal.h"
#include "serial_pl011.h"
#include "arm64_arch_timer.h"
#include "fvp_boot.h"
#include "arm64_gic.h"
#include "chip.h"
#ifdef USE_SERIALDRIVER
#ifdef CONFIG_UART_PL011
/***************************************************************************
* Pre-processor Definitions
@@ -72,6 +65,7 @@
#endif
#define PL011_BIT_MASK(x, y) (((2 << (x)) - 1) << (y))
#define BIT(n) ((1UL) << (n))
/* PL011 Uart Flags Register */
#define PL011_FR_CTS BIT(0) /* clear to send - inverted */
@@ -285,8 +279,6 @@ static int pl011_set_baudrate(const struct pl011_uart_port_s *sport,
config->uart->ibrd = bauddiv >> PL011_FBRD_WIDTH;
config->uart->fbrd = bauddiv & ((1U << PL011_FBRD_WIDTH) - 1U);
ARM64_DMB();
/* In order to internally update the contents of ibrd or fbrd, a
* lcr_h write must always be performed at the end
* ARM DDI 0183F, Pg 3-13
@@ -697,10 +689,8 @@ static int pl011_setup(struct uart_dev_s *dev)
if (!data->sbsa)
{
config->uart->dmacr = 0U;
ARM64_ISB();
config->uart->cr &= ~(BIT(14) | BIT(15) | BIT(1));
config->uart->cr |= PL011_CR_RXE | PL011_CR_TXE;
ARM64_ISB();
}
up_irq_restore(i_flags);
@@ -781,14 +771,14 @@ static struct uart_dev_s g_uart1port =
***************************************************************************/
/***************************************************************************
* Name: arm64_earlyserialinit
* Name: pl011_earlyserialinit
*
* Description:
* see arm64_internal.h
* see nuttx/serial/uart_pl011.h
*
***************************************************************************/
void arm64_earlyserialinit(void)
void pl011_earlyserialinit(void)
{
/* Enable the console UART. The other UARTs will be initialized if and
* when they are first opened.
@@ -829,14 +819,14 @@ int up_putc(int ch)
}
/***************************************************************************
* Name: arm64_serialinit
* Name: pl011_serialinit
*
* Description:
* see arm64_internal.h
* see nuttx/serial/uart_pl011.h
*
***************************************************************************/
void arm64_serialinit(void)
void pl011_serialinit(void)
{
#ifdef CONSOLE_DEV
int ret;
include/nuttx/serial/uart_pl011.h
+56
View File
@@ -0,0 +1,56 @@
/****************************************************************************
* include/nuttx/serial/uart_pl011.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __INCLUDE_NUTTX_SERIAL_UART_PL011_H
#define __INCLUDE_NUTTX_SERIAL_UART_PL011_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#ifdef CONFIG_UART_PL011
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Public Functions Definitions
****************************************************************************/
void pl011_earlyserialinit(void);
void pl011_serialinit(void);
/****************************************************************************
* Public Types
****************************************************************************/
/****************************************************************************
* Inline Functions
****************************************************************************/
#endif /* CONFIG_UART_PL011 */
#endif /* __INCLUDE_NUTTX_SERIAL_UART_PL011_H */