mirror of
https://github.com/apache/nuttx.git
synced 2026-05-19 20:06:24 +08:00
arch/arm/src/nrf52: add a low-level TIMER interface
This commit is contained in:
raiden00pl
committed by
Abdelatif Guettouche
Abdelatif Guettouche
parent
17bd5f3d1a
commit
7db61992f9
@@ -90,6 +90,10 @@ config NRF52_UART
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bool
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default n
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config NRF52_TIMER
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bool
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default n
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config NRF52_SPI_MASTER_WORKAROUND_1BYTE_TRANSFER
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bool "SPI Master 1 Byte transfer anomaly workaround"
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depends on NRF52_SPI_MASTER && ARCH_FAMILY_NRF52832
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@@ -181,22 +185,27 @@ config NRF52_SAADC
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config NRF52_TIMER0
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bool "TIMER0"
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select NRF52_TIMER
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default n
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config NRF52_TIMER1
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bool "TIMER1"
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select NRF52_TIMER
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default n
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config NRF52_TIMER2
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bool "TIMER2"
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select NRF52_TIMER
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default n
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config NRF52_TIMER3
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bool "TIMER3"
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select NRF52_TIMER
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default n
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config NRF52_TIMER4
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bool "TIMER4"
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select NRF52_TIMER
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default n
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config NRF52_RTC0
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@@ -128,5 +128,8 @@ endif
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ifeq ($(CONFIG_NRF52_RADIO),y)
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CHIP_CSRCS += nrf52_radio.c
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endif
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ifeq ($(CONFIG_NRF52_TIMER),y)
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CHIP_CSRCS += nrf52_tim.c
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endif
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@@ -1,4 +1,4 @@
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/**************************************************************************
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/************************************************************************************
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* arch/arm/src/nrf52/hardware/nrf52_tim.h
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*
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* Copyright (C) 2020 Gregory Nutt. All rights reserved.
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@@ -31,60 +31,81 @@
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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***************************************************************************/
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************************************************************************************/
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#ifndef __ARCH_ARM_SRC_NRF52_HARDWARE_NRF52_TIM_H
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#define __ARCH_ARM_SRC_NRF52_HARDWARE_NRF52_TIM_H
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/***************************************************************************
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/************************************************************************************
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* Included Files
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***************************************************************************/
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************************************************************************************/
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#include <nuttx/config.h>
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#include "hardware/nrf52_memorymap.h"
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/***************************************************************************
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/************************************************************************************
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* Pre-processor Definitions
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***************************************************************************/
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************************************************************************************/
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/* Register offsets for TIM ************************************************/
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/* TIMER constants ******************************************************************/
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#define NRF52_TIM_TASKS_START_OFFSET 0x0000 /* Start Timer */
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#define NRF52_TIM_TASKS_STOP_OFFSET 0x0004 /* Stop Timer */
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#define NRF52_TIM_TASKS_COUNT_OFFSET 0x0008 /* Increment Timer*/
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#define NRF52_TIM_TASKS_CLEAR_OFFSET 0x000c /* Clear time */
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#define NRF52_TIM_TASKS_SHUTDOWN_OFFSET 0x0010 /* Shutdown Timer */
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#define NRF52_TIM_TASKS_CAPTURE_OFFSET(x) (0x0040 + ((x) * 0x04)) /* Capture Timer value to CC[x] */
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#define NRF52_TIM_EVENTS_COMPARE_OFFSET(x) (0x0140 + ((x) * 0x04)) /* Compare event on CC[x] */
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#define NRF52_TIM_SHORTS_OFFSET 0x0200 /* Shortcuts between local events and tasks */
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#define NRF52_TIM_INTENSET_OFFSET 0x0304 /* Enable interrupt */
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#define NRF52_TIM_MODE_OFFSET 0x0504 /* Timer mode selection */
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#define NRF52_TIM_BITMODE_OFFSET 0x0508 /* Configure the number of bits used by the Timer */
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#define NRF52_TIM_PRESCALER_OFFSET 0x0510 /* Timer prescaler register */
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#define NRF52_TIM_CC_OFFSET(x) (0x0540 + ((x) * 0x04)) /* Capture/Compare register x */
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#define TIMER_BASE_FERQUENCY (16000000)
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/* Register offsets for TIM ************************************************/
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/* Register offsets for TIM *********************************************************/
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#define NRF52_TIM_TASKS_START_OFFSET 0x0000 /* Start Timer */
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#define NRF52_TIM_TASKS_STOP_OFFSET 0x0004 /* Stop Timer */
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#define NRF52_TIM_TASKS_COUNT_OFFSET 0x0008 /* Increment Timer */
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#define NRF52_TIM_TASKS_CLEAR_OFFSET 0x000c /* Clear time */
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#define NRF52_TIM_TASKS_SHUTDOWN_OFFSET 0x0010 /* Shutdown Timer */
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#define NRF52_TIM_TASKS_CAPTURE_OFFSET(x) (0x0040 + ((x) * 4)) /* Capture Timer value to CC[x] */
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#define NRF52_TIM_EVENTS_COMPARE_OFFSET(x) (0x0140 + ((x) * 4)) /* Compare event on CC[x] */
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#define NRF52_TIM_SHORTS_OFFSET 0x0200 /* Shortcuts between local events and tasks */
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#define NRF52_TIM_INTENSET_OFFSET 0x0304 /* Enable interrupt */
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#define NRF52_TIM_INTCLR_OFFSET 0x0308 /* Disable interrupt */
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#define NRF52_TIM_MODE_OFFSET 0x0504 /* Timer mode selection */
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#define NRF52_TIM_BITMODE_OFFSET 0x0508 /* Configure the number of bits used by the Timer */
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#define NRF52_TIM_PRESCALER_OFFSET 0x0510 /* Timer prescaler register */
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#define NRF52_TIM_CC_OFFSET(x) (0x0540 + ((x) * 4)) /* Capture/Compare register x */
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/* Register offsets for TIM *********************************************************/
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/* TASKS_START Register */
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#define TIM_TASKS_START (1 << 0) /* Bit 0: Start Timer */
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/* TASKS_STOP Register */
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#define TIM_TASKS_STOP (1 << 0) /* Bit 0: Stop Timer */
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/* TASKS_COUNT Register */
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#define TIM_TASKS_COUNT (1 << 0) /* Bit 0: Increment Timer */
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/* TASKS_CLEAR Register */
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#define TIM_TASKS_CLEAR (1 << 0) /* Bit 0: Clear Timer */
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/* SHORTS Register */
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#define TIM_SHORTS_COMPARE_CLEAR(x) (1 << (x)) /* Bits 0-5: */
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#define TIM_SHORTS_COMPARE_STOP(x) (1 << (x + 0x8)) /* Bits 8-13 */
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#define TIM_SHORTS_COMPARE_CLEAR(x) (1 << (x)) /* Bits 0-5: */
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#define TIM_SHORTS_COMPARE_STOP(x) (1 << (x + 8)) /* Bits 8-13 */
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/* INTENSET/INTENCLR Register */
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#define TIM_INT_COMPARE(x) (1 << (x + 0x16)) /* Bits 16-21 */
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#define TIM_INT_COMPARE(x) (1 << (x + 16)) /* Bits 16-21 */
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/* MODE Register */
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#define TIM_MODE_SHIFT (0) /* Bits 0-1: Timer mode */
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#define TIM_MODE_SHIFT (0) /* Bits 0-1: Timer mode */
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#define TIM_MODE_MASK (0x3 << TIM_MODE_SHIFT)
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# define TIM_MODE_TIMER (0x0 << TIM_MODE_SHIFT) /* 0: Timer mode */
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# define TIM_MODE_COUNTER (0x1 << TIM_MODE_SHIFT) /* 1: Counter mode */
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# define TIM_MODE_LPCONUTER (0x2 << TIM_MODE_SHIFT) /* 2: Low Power Counter mode */
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# define TIM_MODE_LPCOUNTER (0x2 << TIM_MODE_SHIFT) /* 2: Low Power Counter mode */
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/* BITMODE Register */
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#define TIM_BITMODE_SHIFT (0) /* Bits 0-1: Timer bit width */
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#define TIM_BITMODE_SHIFT (0) /* Bits 0-1: Timer bit width */
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#define TIM_BITMODE_MASK (0x3 << TIM_BITMODE_SHIFT)
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# define TIM_BITMODE_16B (0x0 << TIM_BITMODE_SHIFT) /* 0: 16 bit */
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# define TIM_BITMODE_8B (0x1 << TIM_BITMODE_SHIFT) /* 1: 8 bit */
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@@ -93,7 +114,8 @@
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/* PRESCALER Register */
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#define TIM_PRESCALER_SHIFT (0) /* Bits 0-3: Prescaler value */
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#define TIM_PRESCALER_MASK (0xf << TIM_PRESCALER_SHIFT)
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#define TIM_PRESCALER_SHIFT (0) /* Bits 0-3: Prescaler value */
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#define TIM_PRESCALER_MAX (0xf)
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#define TIM_PRESCALER_MASK (TIM_PRESCALER_MAX << TIM_PRESCALER_SHIFT)
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#endif /* __ARCH_ARM_SRC_NRF52_HARDWARE_NRF52_TIM_H */
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File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,176 @@
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/****************************************************************************
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* arch/arm/src/nrf52/nrf52_tim.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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#ifndef __ARCH_ARM_SRC_NRF52_NRF52_TIM_H
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#define __ARCH_ARM_SRC_NRF52_NRF52_TIM_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <stdint.h>
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#include <nuttx/irq.h>
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* Helpers ******************************************************************/
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#define NRF52_TIM_START(d) ((d)->ops->start(d))
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#define NRF52_TIM_STOP(d) ((d)->ops->stop(d))
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#define NRF52_TIM_CLEAR(d) ((d)->ops->clear(d))
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#define NRF52_TIM_CONFIGURE(d, m, w) ((d)->ops->configure(d, m, w))
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#define NRF52_TIM_SHORTS(d, s, i, e) ((d)->ops->shorts(d, s, i, e))
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#define NRF52_TIM_COUNT(d) ((d)->ops->count(d))
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#define NRF52_TIM_SETCC(d, i, cc) ((d)->ops->setcc(d, i, cc))
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#define NRF52_TIM_GETCC(d, i, cc) ((d)->ops->setcc(d, i, cc))
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#define NRF52_TIM_SETPRE(d, pre) ((d)->ops->setpre(d, pre))
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#define NRF52_TIM_SETISR(d, hnd, arg) ((d)->ops->setisr(d, hnd, arg))
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#define NRF52_TIM_ENABLEINT(d, s) ((d)->ops->enableint(d, s))
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#define NRF52_TIM_DISABLEINT(d, s) ((d)->ops->disableint(d, s))
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#define NRF52_TIM_CHECKINT(d, s) ((d)->ops->checkint(d, s))
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#define NRF52_TIM_ACKINT(d, s) ((d)->ops->ackint(d, s))
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/****************************************************************************
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* Public Types
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****************************************************************************/
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/* Timer mode */
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enum nrf52_tim_mode_e
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{
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NRF52_TIM_MODE_UNUSED = 0,
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NRF52_TIM_MODE_TIMER = 1,
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NRF52_TIM_MODE_COUNTER = 2,
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NRF52_TIM_MODE_LOWPOWER = 3,
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};
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/* Timer bit width */
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enum nrf52_tim_width_e
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{
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NRF52_TIM_WIDTH_16B = 0,
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NRF52_TIM_WIDTH_8B = 1,
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NRF52_TIM_WIDTH_24B = 2,
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NRF52_TIM_WIDTH_32B = 3,
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};
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/* Timer CC index */
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enum nrf52_tim_cc_e
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{
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NRF52_TIM_CC0 = 0,
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NRF52_TIM_CC1 = 1,
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NRF52_TIM_CC2 = 2,
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NRF52_TIM_CC3 = 3,
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NRF52_TIM_CC4 = 4,
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NRF52_TIM_CC5 = 5
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};
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/* Timer IRQ source */
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enum nrf52_tim_irq_e
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{
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NRF52_TIM_INT_COMPARE0 = 0,
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NRF52_TIM_INT_COMPARE1 = 1,
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NRF52_TIM_INT_COMPARE2 = 2,
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NRF52_TIM_INT_COMPARE3 = 3,
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NRF52_TIM_INT_COMPARE4 = 4,
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NRF52_TIM_INT_COMPARE5 = 5,
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};
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/* Timer shorts type */
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enum nrf52_tim_shorts_e
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{
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NRF52_TIM_SHORT_COMPARE_CLEAR = 1,
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NRF52_TIM_SHORT_COMPARE_STOP = 2
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};
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/* Timer frequency prescaler */
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enum nrf52_tim_pre_e
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{
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NRF52_TIM_PRE_16000000 = 0,
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NRF52_TIM_PRE_8000000 = 1,
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NRF52_TIM_PRE_4000000 = 2,
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NRF52_TIM_PRE_2000000 = 3,
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NRF52_TIM_PRE_1000000 = 4,
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NRF52_TIM_PRE_500000 = 5,
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NRF52_TIM_PRE_250000 = 6,
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NRF52_TIM_PRE_125000 = 7,
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NRF52_TIM_PRE_62500 = 8,
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NRF52_TIM_PRE_31250 = 9
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};
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/* NRF52 TIM device */
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struct nrf52_tim_dev_s
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{
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struct nrf52_tim_ops_s *ops;
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};
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/* NRF52 TIM ops */
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struct nrf52_tim_ops_s
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{
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/* Timer tasks */
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CODE int (*start)(FAR struct nrf52_tim_dev_s *dev);
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CODE int (*stop)(FAR struct nrf52_tim_dev_s *dev);
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CODE int (*clear)(FAR struct nrf52_tim_dev_s *dev);
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/* Timer configuration */
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CODE int (*configure)(FAR struct nrf52_tim_dev_s *dev, uint8_t mode,
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uint8_t width);
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CODE int (*shorts)(FAR struct nrf52_tim_dev_s *dev, uint8_t s,
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uint8_t i, bool en);
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/* Timer operations */
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CODE int (*count)(FAR struct nrf52_tim_dev_s *dev);
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CODE int (*setcc)(FAR struct nrf52_tim_dev_s *dev, uint8_t i, uint32_t cc);
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CODE int (*getcc)(FAR struct nrf52_tim_dev_s *dev, uint8_t i,
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FAR uint32_t *cc);
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CODE int (*setpre)(FAR struct nrf52_tim_dev_s *dev, uint8_t pre);
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/* Timer interrupts */
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CODE int (*setisr)(FAR struct nrf52_tim_dev_s *dev, xcpt_t handler,
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FAR void * arg);
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CODE int (*enableint)(FAR struct nrf52_tim_dev_s *dev, uint8_t source);
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CODE int (*disableint)(FAR struct nrf52_tim_dev_s *dev, uint8_t source);
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CODE int (*checkint)(FAR struct nrf52_tim_dev_s *dev, uint8_t source);
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CODE int (*ackint)(FAR struct nrf52_tim_dev_s *dev, uint8_t source);
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};
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/****************************************************************************
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* Public Function Prototypes
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****************************************************************************/
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FAR struct nrf52_tim_dev_s *nrf52_tim_init(int timer);
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int nrf52_tim_deinit(FAR struct nrf52_tim_dev_s *dev);
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#endif /* __ARCH_ARM_SRC_NRF52_NRF52_TIM_H */
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