mirror of
https://github.com/apache/nuttx.git
synced 2026-06-06 08:36:24 +08:00
Merge branch 'master' into stm32l4_usb
Conflicts: configs/stm32l476vg-disco/nsh/defconfig
This commit is contained in:
ziggurat29
@@ -12139,14 +12139,10 @@
|
||||
* arch/arm/arc/sam34: DAC bugfix: DACC_WPMR_WPKEY_MASK -> DACC_WPMR_WPKEY.
|
||||
Timer bugfix: Fix ops check in TCIOC_STOP. From Wolfgang Reissnegge
|
||||
(2016-06-23).
|
||||
* configs/nucleo-144: Added SDMMC support to Nucleo-144. From David
|
||||
Sidrane (2016-06-23).
|
||||
* arch/arm/src/stm32: Port STM32L4 CAN IOCTLs to STM32. From Sebastien
|
||||
Lorquet (2016-06-24).
|
||||
* configs/Konfig:Add configuration logic to include a Kconfig file in
|
||||
each custom configuration. Includes adding a dummy custom board
|
||||
configuration directory. A consequence of this that each custom board
|
||||
directory will now need to contain a Kconfig file. NOTE also that
|
||||
the new board directory does not take effect in the configuration
|
||||
menus until the NEXT time you run 'make menuconfig' (2016-06-24).
|
||||
* drivers/ioexpander: Add support for a very simple GPIO driver. It
|
||||
supports only pre-conrigured input and output pins and only basic
|
||||
input and output operations (2016-06-24).
|
||||
@@ -12171,3 +12167,103 @@
|
||||
necessary because otherwise you cannot read back the correct line
|
||||
status of Open-Drain Outputs and this is needed by the twi_reset
|
||||
function. From Michael Spahlinger (2016-06-24)
|
||||
* arch/arm/src/stm32f7: BUGFIX:PLLs IS2 and SAI P Calculation. From
|
||||
David Sidrane (2016-06-24).
|
||||
* arch/arm/src/stm32f7: USB support. From Lok Tep (2016-06-27).
|
||||
* configs/olimex-stm32-e407: Add support for Olimex STM32 E407
|
||||
board. From Mateusz Szafoni (2016-06-27).
|
||||
* drivers/ioexpander: Shadow-Mode: The output- and configuration
|
||||
registers of the IO-Expander are held in the microcontrollers memory
|
||||
and only written to the IO-Expander. This reduces bus traffic and
|
||||
is more error-proof than the normal read-modify-write operation. Retry
|
||||
Mode: If enabled and an error occurs while writing to the IO-Expander
|
||||
the current transmission is automatically repeated once. From Michael
|
||||
Spahlinger (2016-06-27).
|
||||
* libc/hex2bin: Move the portable library portion of apps/system/hex2bin
|
||||
to nuttx/libc/hex2bin where it can be shared with the OS internals
|
||||
(2016-06-27).
|
||||
* configs/nucleo-144: Added USB OTG device to Nucleo-144. From David
|
||||
Sidrane (2016-06-27).
|
||||
* arch/arm/src/stm32l4: STM32 CAN fixes need to be backported to
|
||||
STM32L4 as well (2016-06-27).
|
||||
* ARM stack check: Fix double fault on IDLE task with stack size = 0.
|
||||
From David Sidrane (2016-06-27).
|
||||
* configs/nucleo-144: Added bbsram test to Nucleo-144. From David
|
||||
Sidrane (2016-06-27).
|
||||
* arch/arm/src/stm32f7: Added PWR, RTC, and BBSRAM support for stm32f7.
|
||||
From David Sidrane (2016-06-27).
|
||||
* Build system: Fixed build of SAMV71-XULT/nsh. With the changes from
|
||||
26f7b8c the build process of the default configuration did not succeed
|
||||
anymore. From Michael Spahlinger (2016-06-28).
|
||||
* sched/semaphore: Need to set errno to EINVAL on errors in sem_post()
|
||||
and sem_wait(). From Paul Alexander Patience (2016-06-28).
|
||||
* Build system: This change fixes a build problem that only occurs when
|
||||
reconfiguring from Linux to Windows or vice-versa. It is a problem
|
||||
that was present but not usually experienced until two things happened:
|
||||
(1) The pre_config target was added to run before the menconfig
|
||||
operation and (2) the context target was added before the pre_config
|
||||
target in order to set up the correct symbolic links (in the apps/platform
|
||||
directory) needed by the pre_config target.
|
||||
But then now if you start with a Linux system and run 'make menuconfig'
|
||||
to switch to Linux, the context target will execute first and set up
|
||||
POSIX style symbolic links before doing the menuconfig. Then after the
|
||||
menuconfig, the make will fail on Windows if you are using a Windows
|
||||
native toolchain because that native toolchain cannot follow the Cygwin-
|
||||
style symbolic links.
|
||||
The fix here is to also execute the clean_context AFTER executing
|
||||
menuconfig. A lot more happens now: It used to be that doing 'make
|
||||
menuconfig' only did the menuconfig operation. No it does context,
|
||||
pre_config, menuconfig, clean_context. Not nearly as snappy as it used
|
||||
to be (2016-06-28).
|
||||
* arch/arm/src/efm32, lcp43, stm32, stm32l4: disable interrupts with
|
||||
NVIC_IRQ_CLEAR. From Paul Alexander Patience (2016-06-28).
|
||||
* arch/arm/src/stm32f7: STMF7xxx RTC: (1) Remove proxy #defines, (2)
|
||||
Ensure the LSE(ON) etal are set and remembered in a) A cold start
|
||||
(RTC_MAGIC invalid) of the RTC, and b) A warm start (RTC_MAGIC valid)
|
||||
of the RTC but a clock change. The change was needed because in bench
|
||||
testing a merge of the latest's STM32 53ec3ca (and friends) it became
|
||||
apparent that the sequence of operation is wrong in the reset of the
|
||||
Backup Domain in the RCC code. PWR is required before the Backup
|
||||
Domain can be futzed with. !!!This Code should be tested on STM32 and
|
||||
if needed rippled to the STM32 families. From David Sidrane
|
||||
(2016-06-28).
|
||||
* arch/arm/src/stm32f7: Added STMF7xxx RTC. From David Sidrane
|
||||
(2016-06-28).
|
||||
* arch/arm/src/stm32: STM32 BBSRAM fixed (and formatted) flags. From
|
||||
David Sidrane (2016-06-28).
|
||||
* arch/arm/src/stm32f7: STM32F7 BBSRAM fixed (and formatted) flags.
|
||||
From David Sidrane (2016-06-28).
|
||||
* arch/arm/src/stm32f7: Added STM32F7 DBGMCU. From David Sidrane
|
||||
(2016-06-28).
|
||||
* arch/arm/src/samv7: SAMV7: CAN Message Filtering fixed: (1) stdfilters
|
||||
didn't work because the filter was never enabled (wrong number of bits
|
||||
to shift), and (2) Filters were never used because the configuration
|
||||
register cannot be written without using the initialization mode.
|
||||
Both bugs are fixed by this change. Filtering has been tested with
|
||||
both standard and extended identifiers and is now working properly.
|
||||
From Michael Spahlinger (2016-06-29).
|
||||
* configs/Kconfig and dummy/: Add logic to support custom board
|
||||
directories that include a Kconfig file. During the context phase
|
||||
of the build, any Kconfig file in the custom board directory is copied
|
||||
into configs/dummy, replacing the existing Kconfig file with the
|
||||
target Kconfig file (2016-06-29).
|
||||
* arch/arm/src/stm32l4: Port support for both RX FIFOs from STM32 CAN.
|
||||
From Paul Alexander Patience (2016-06-29).
|
||||
* Remove all inclusion of header files from the apps/include directory.
|
||||
This caused a lot of reshuffling of logic: binfmt pcode support,
|
||||
usbmonitor is now a kernel thread, TZ/Olson database moved to
|
||||
libc/zoneinfo (2016-06-29).
|
||||
* drivers/mtd: Several MTD FLASH drivers nullify the freed 'priv'
|
||||
structure and failed to return NULL as stated in the comments.
|
||||
Result, will operate on a NULL pointer later. Noted by David Sidrane
|
||||
(2016-06-30).
|
||||
* arch/arm/src/kinetis: Add basic support for the K64 family. I
|
||||
leveraged the changes from https://github.com/jmacintyre/nuttx-k64f
|
||||
and merged into the existing kinetis code with a lot of changes and
|
||||
additions (like pin multiplexing definitions). (2016-07-01).
|
||||
* configs/freedom-k64f: Add support for the NXP Freedom-K64F board.
|
||||
This is primarily the work of Jordan Macintyre. I leveraged this
|
||||
code from https://github.com/jmacintyre/nuttx-k64f but with
|
||||
significant corrections (LEDs, buttons, README, etc) and extensions
|
||||
and updates to match more recent BSPs (2016-07-01).
|
||||
* libc/signal: Add raise() (2016-07-04).
|
||||
|
||||
+5
-1
@@ -74,7 +74,7 @@ endif
|
||||
|
||||
NONFSDIRS = sched drivers configs $(ARCH_SRC) $(NUTTX_ADDONS)
|
||||
FSDIRS = fs binfmt
|
||||
CONTEXTDIRS = $(APPDIR)
|
||||
CONTEXTDIRS = configs $(APPDIR)
|
||||
USERDIRS =
|
||||
OTHERDIRS = lib
|
||||
|
||||
@@ -114,6 +114,10 @@ else
|
||||
OTHERDIRS += syscall
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_LIB_ZONEINFO_ROMFS),y)
|
||||
CONTEXTDIRS += libc
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_NX),y)
|
||||
NONFSDIRS += graphics libnx
|
||||
CONTEXTDIRS += graphics libnx
|
||||
|
||||
+152
-152
@@ -8,7 +8,7 @@
|
||||
<tr align="center" bgcolor="#e4e4e4">
|
||||
<td>
|
||||
<h1><big><font color="#3c34ec"><i>NuttX README Files</i></font></big></h1>
|
||||
<p>Last Updated: May 26, 2016</p>
|
||||
<p>Last Updated: July 3, 2016</p>
|
||||
</td>
|
||||
</tr>
|
||||
</table>
|
||||
@@ -30,24 +30,24 @@ nuttx/
|
||||
| |
|
||||
| |- arm/
|
||||
| | `- src
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/arch/src/master/arm/src/lpc214x/README.txt" target="_blank">lpc214x/README.txt</a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/arch/arm/src/lpc214x/README.txt" target="_blank">lpc214x/README.txt</a>
|
||||
| |- sh/
|
||||
| | |- include/
|
||||
| | | `-<a href="https://bitbucket.org/nuttx/nuttx/arch/src/master/sh/include/README.txt" target="_blank">README.txt</a>
|
||||
| | | `-<a href="https://bitbucket.org/nuttx/nuttx/src/master/arch/sh/include/README.txt" target="_blank">README.txt</a>
|
||||
| | |- src/
|
||||
| | | `-<a href="https://bitbucket.org/nuttx/nuttx/arch/src/master/sh/src/README.txt" target="_blank">README.txt</a>
|
||||
| | | `-<a href="https://bitbucket.org/nuttx/nuttx/src/master/arch/sh/src/README.txt" target="_blank">README.txt</a>
|
||||
| |- x86/
|
||||
| | |- include/
|
||||
| | | `-<a href="https://bitbucket.org/nuttx/nuttx/arch/src/master/x86/include/README.txt" target="_blank">README.txt</a>
|
||||
| | | `-<a href="https://bitbucket.org/nuttx/nuttx/src/master/arch/x86/include/README.txt" target="_blank">README.txt</a>
|
||||
| | `- src/
|
||||
| | `-<a href="https://bitbucket.org/nuttx/nuttx/arch/src/master/x86/src/README.txt" target="_blank">README.txt</a>
|
||||
| | `-<a href="https://bitbucket.org/nuttx/nuttx/src/master/arch/x86/src/README.txt" target="_blank">README.txt</a>
|
||||
| |- z80/
|
||||
| | |- src/z80
|
||||
| | | `- <a href="https://bitbucket.org/nuttx/nuttx/arch/src/master/z80/src/z80/README.txt" target="_blank">README.txt</a>
|
||||
| | | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/arch/z80/src/z80/README.txt" target="_blank">README.txt</a>
|
||||
| | `- src/z180
|
||||
| | |- <a href="https://bitbucket.org/nuttx/nuttx/arch/src/master/z80/src/z180/README.txt" target="_blank">README.txt</a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/arch/src/master/z80/src/z180/z180_mmu.txt" target="_blank">z180_mmu.txt</a>
|
||||
| `- <a href="https://bitbucket.org/nuttx/nuttx/arch/src/master/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | |- <a href="https://bitbucket.org/nuttx/nuttx/src/master/arch/z80/src/z180/README.txt" target="_blank">README.txt</a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/arch/z80/src/z180/z180_mmu.txt" target="_blank">z180_mmu.txt</a>
|
||||
| `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/arch/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
|- binfmt/
|
||||
| |- libpcode/
|
||||
| `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/binfmt/libpcode/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
@@ -55,263 +55,263 @@ nuttx/
|
||||
| `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/audio/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
|- configs/
|
||||
| |- amber/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/amber/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/amber/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- arduino-mega2560/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/arduino-mega2560/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/arduino-mega2560/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- arduino-due/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/arduino-due/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/arduino-due/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- avr32dev1/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/avr32dev1/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/avr32dev1/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- c5471evm/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/c5471evm/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/c5471evm/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- cc3200-launchpad/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/cc3200-launchpad/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/cc3200-launchpad/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- cloudctrl/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/cloudctrl/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/cloudctrl/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- compal_e86/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/compal_e86/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/compal_e86/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- compal_e88/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/compal_e88/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/compal_e88/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- compal_e99/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/compal_e99/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/compal_e99/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- demo9s12ne64/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/demo9s12ne64/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/demo9s12ne64/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- dk-tm4c129x/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/dk-tm4c129x/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/dk-tm4c129x/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- ea3131/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/ea3131/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/ea3131/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- ea3152/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/ea3152/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/ea3152/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- eagle100/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/eagle100/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/eagle100/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- efm32-g8xx-stk/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/efm32-g8xx-stk/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/efm32-g8xx-stk/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- efm32gg-stk3700/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/efm32gg-stk3700/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/efm32gg-stk3700/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- ekk-lm3s9b96/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/ekk-lm3s9b96/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/ekk-lm3s9b96/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- ez80f910200kitg/
|
||||
| | |- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/ez80f910200kitg/ostest/README.txt" target="_blank">ostest/README.txt</a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/ez80f910200kitg/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | |- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/ez80f910200kitg/ostest/README.txt" target="_blank">ostest/README.txt</a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/ez80f910200kitg/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- ez80f910200zco/
|
||||
| | |- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/ez80f910200zco/ostest/README.txt" target="_blank">dhcpd/README.txt</a>
|
||||
| | |- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/ez80f910200zco/httpd/README.txt" target="_blank">httpd/README.txt</a>
|
||||
| | |- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/ez80f910200zco/nettest/README.txt" target="_blank">nettest/README.txt</a>
|
||||
| | |- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/ez80f910200zco/nsh/README.txt" target="_blank">nsh/README.txt</a>
|
||||
| | |- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/ez80f910200zco/ostest/README.txt" target="_blank">ostest/README.txt</a>
|
||||
| | |- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/ez80f910200zco/poll/README.txt" target="_blank">poll/README.txt</a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/ez80f910200zco/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | |- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/ez80f910200zco/ostest/README.txt" target="_blank">dhcpd/README.txt</a>
|
||||
| | |- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/ez80f910200zco/httpd/README.txt" target="_blank">httpd/README.txt</a>
|
||||
| | |- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/ez80f910200zco/nettest/README.txt" target="_blank">nettest/README.txt</a>
|
||||
| | |- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/ez80f910200zco/nsh/README.txt" target="_blank">nsh/README.txt</a>
|
||||
| | |- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/ez80f910200zco/ostest/README.txt" target="_blank">ostest/README.txt</a>
|
||||
| | |- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/ez80f910200zco/poll/README.txt" target="_blank">poll/README.txt</a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/ez80f910200zco/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- fire-stm32v2/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/fire-stm32v2/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/fire-stm32v2/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- freedom-k64f/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/freedom-k64f/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- freedom-kl25z/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/freedom-kl25z/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/freedom-kl25z/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- freedom-kl26z/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/freedom-kl26z/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/freedom-kl26z/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- hymini-stm32v/
|
||||
| | |- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/hymini-stm32v/RIDE/README.txt" target="_blank">RIDE/README.txt</a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/hymini-stm32v/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | |- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/hymini-stm32v/RIDE/README.txt" target="_blank">RIDE/README.txt</a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/hymini-stm32v/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- kwikstik-k40/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/kwikstik-k40/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/kwikstik-k40/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- launchxl-tms57004/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/launchxl-tms57004/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/launchxl-tms57004/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- lincoln60/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/lincoln60/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/lincoln60/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- lm3s6432-s2e/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/lm3s6432-s2e/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/lm3s6432-s2e/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- lm3s6965-ek/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/lm3s6965-ek/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/lm3s6965-ek/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- lm3s8962-ek/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/lm3s8962-ek/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/lm3s8962-ek/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- lpc4330-xplorer/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/llpc4330-xplorer/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/llpc4330-xplorer/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- lpc4337-ws/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/llpc4337-ws/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/llpc4337-ws/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- lpc4357-evb/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/llpc4357-evb/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/llpc4357-evb/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- lpc4370-link2/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/llpc4370-link2/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/llpc4370-link2/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- lpcxpresso-lpc1115/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/lpcxpresso-lpc1115/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/lpcxpresso-lpc1115/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- lpcxpresso-lpc1768/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/lpcxpresso-lpc1768/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/lpcxpresso-lpc1768/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- maple/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/maple/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/maple/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- mbed/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/mbed/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/mbed/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- mcu123-lpc214x/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/mcu123-lpc214x/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/mcu123-lpc214x/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- micropendous3/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/micropendous3/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/micropendous3/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- mikroe-stm32f4/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/mikroe-stm32f4/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/mikroe-stm32f4/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- mirtoo/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/mirtoo/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- mt-db-x3//
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/mt-db-x3//README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/mirtoo/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- moteino-mega/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/moteino-mega/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/moteino-mega/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- mx1ads/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/mx1ads/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/mx1ads/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- ne64badge/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/ne64badge/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/ne64badge/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- ntosd-dm320/
|
||||
| | |- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/ntosd-dm320/doc/README.txt" target="_blank">doc/README.txt</a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/ntosd-dm320/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | |- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/ntosd-dm320/doc/README.txt" target="_blank">doc/README.txt</a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/ntosd-dm320/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- nucleo-144/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/nucleo-144/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/nucleo-144/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- nucleo-f4x1re/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/nucleo-f4x1re/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/nucleo-f4x1re/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- nutiny-nuc120/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/nutiny-nuc120/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/nutiny-nuc120/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- olimex-efm32g880f129-stk/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/olimex-efm32g880f129-stk/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/olimex-efm32g880f129-stk/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- olimex-lpc1766stk/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/olimex-lpc1766stk/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/olimex-lpc1766stk/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- olimex-lpc2378/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/olimex-lpc2378/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/olimex-lpc2378/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- olimex-lpc-h3131/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/olimex-lpc-h3131/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/olimex-lpc-h3131/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- olimex-stm32-h405/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/olimex-stm32-h405/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/olimex-stm32-h405/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- olimex-stm32-h407/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/olimex-stm32-h407/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/olimex-stm32-h407/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- olimex-stm32-p107/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/olimex-stm32-p107/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/olimex-stm32-p107/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- olimex-stm32-p207/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/olimex-stm32-p207/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/olimex-stm32-p207/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- olimex-strp711/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/olimex-strp711/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/olimex-strp711/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- open1788/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/open1788/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/open1788/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- p112/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/p112/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/p112/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- pcblogic-pic32mx/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/pcblogic-pic32mx/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/pcblogic-pic32mx/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- pcduino-a10/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/pcduino-pic32mx/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/pcduino-pic32mx/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- pic32mx-starterkit/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/pic32mx-starterkit/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/pic32mx-starterkit/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- pic32mx7mmb/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/pic32mx7mmb/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/pic32mx7mmb/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- pic32mz-starterkit/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/pic32mz-starterkit/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/pic32mz-starterkit/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- pirelli_dpl10/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/pirelli_dpl10/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/pirelli_dpl10/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- qemu-i486/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/qemu-i486/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/qemu-i486/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- rgmp/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/rgmp/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/rgmp/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- sabre-6quad/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/sabre-6quad/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/sabre-6quad/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- sama5d2-xult/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/sama5d2-xult/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/sama5d2-xult/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- sama5d3x-ek/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/sama5d3x-ek/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/sama5d3x-ek/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- sama5d3-xplained/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/sama5d3-xplained/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/sama5d3-xplained/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- sama5d4-ek/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/sama5d4-ek/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/sama5d4-ek/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- samd20-xplained/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/samd20-xplained/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/samd20-xplained/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- samd21-xplained/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/samd21-xplained/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/samd21-xplained/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- saml21-xplained/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/saml21-xplained/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/saml21-xplained/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- sam3u-ek/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/sam3u-ek/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/sam3u-ek/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- sam4e-ek/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/sam4e-ek/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/sam4e-ek/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- sam4l-xplained/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/sam4l-xplained/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/sam4l-xplained/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- sam4s-xplained/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/sam4s-xplained/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/sam4s-xplained/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- sam4s-xplained-pro/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/sam4s-xplained-pro/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/sam4s-xplained-pro/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- same70-xplained/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/same70-xplained/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/same70-xplained/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- samv71-xult/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/samv71-xult/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/samv71-xult/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- shenzhou/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/shenzhou/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/shenzhou/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- sim/
|
||||
| | |- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/sim/include/README.txt" target="_blank"><b><i>include/README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/sim/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | |- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/sim/include/README.txt" target="_blank"><b><i>include/README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/sim/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- skp16c26/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/skp16c26/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/skp16c26/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- spark/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/spark/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/spark/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- stm3210e-eval/
|
||||
| | |- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/stm3210e-eval/RIDE/README.txt" target="_blank">RIDE/README.txt</a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/stm3210e-eval/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | |- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/stm3210e-eval/RIDE/README.txt" target="_blank">RIDE/README.txt</a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/stm3210e-eval/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- stm3220g-eval/
|
||||
| | |- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/stm3220g-eval/ide/nsh/uvision/README.txt" target="_blank"><b><i>ide/nsh/uvision/README.txt</i></b></a>
|
||||
| | |- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/stm3220g-eval/ide/nsh/iar/README.txt" target="_blank"><b><i>ide/nsh/iar/README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/stm3220g-eval/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | |- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/stm3220g-eval/ide/nsh/uvision/README.txt" target="_blank"><b><i>ide/nsh/uvision/README.txt</i></b></a>
|
||||
| | |- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/stm3220g-eval/ide/nsh/iar/README.txt" target="_blank"><b><i>ide/nsh/iar/README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/stm3220g-eval/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- stm3240g-eval/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/stm3240g-eval/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/stm3240g-eval/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- stm32_tiny/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/stm32_tiny/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/stm32_tiny/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- stm32f103-minumum/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/stm32f103-minumum/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/stm32f103-minumum/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- stm32f3discovery/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/stm32f3discovery/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/stm32f3discovery/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- stm32f4discovery/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/stm32f4discovery/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/stm32f4discovery/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- stm32f411e-disco/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/stm32f411e-disco/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/stm32f411e-disco/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- stm32f429i-disco/
|
||||
| | |- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/stm32f429i-disco/ide/ltcd/uvision/README.txt" target="_blank"><b><i>ide/ltcd/uvision/README.txt</i></b></a>
|
||||
| | |- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/stm32f429i-disco/ltdc/README.txt" target="_blank"><b><i>ltdc/README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/stm32f429i-disco/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | |- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/stm32f429i-disco/ide/ltcd/uvision/README.txt" target="_blank"><b><i>ide/ltcd/uvision/README.txt</i></b></a>
|
||||
| | |- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/stm32f429i-disco/ltdc/README.txt" target="_blank"><b><i>ltdc/README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/stm32f429i-disco/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- stm32f746g-disco/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/stm32f746g-disco/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/stm32f746g-disco/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- stm32l476vg-disco/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/stm32l476vg-disco/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/stm32l476vg-disco/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- stm32ldiscovery/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/stm32ldiscovery/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/stm32ldiscovery/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- stm32vldiscovery/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/stm32vldiscovery/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/stm32vldiscovery/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- sure-pic32mx/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/sure-pic32mx/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/sure-pic32mx/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- teensy-2.0/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/teensy-2.0/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/teensy-2.0/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- teensy-3.1/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/teensy-3.1/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/teensy-3.1/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- teensy-lc/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/teensy-lc/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/teensy-lc/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- tm4c123g-launchpad/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/tm4c123g-launchpad/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/tm4c123g-launchpad/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- tm4c1294-launchpad/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/tm4c1294-launchpad/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/tm4c1294-launchpad/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- twr-k60n512/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/twr-k60n512/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/twr-k60n512/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- "u-blox-c027/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/u-blox-c027/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/u-blox-c027/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- ubw32/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/ubw32/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/ubw32/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- us7032evb1/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/us7032evb1/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/us7032evb1/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- viewtool-stm32f107/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/viewtool-stm32f107/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/viewtool-stm32f107/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- xtrs/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/xtrs/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/xtrs/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- z16f2800100zcog/
|
||||
| | |- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/xtrs/ostest/README.txt" target="_blank">ostest/README.txt</a>
|
||||
| | |- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/xtrs/pashello/README.txt" target="_blank">pashello/README.txt</a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/xtrs/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | |- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/xtrs/ostest/README.txt" target="_blank">ostest/README.txt</a>
|
||||
| | |- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/xtrs/pashello/README.txt" target="_blank">pashello/README.txt</a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/xtrs/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- z80sim/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/z80sim/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/z80sim/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- z8encore000zco/
|
||||
| | |- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/z8encore000zco/ostest/README.txt" target="_blank">ostest/README.txt</a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/z8encore000zco/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | |- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/z8encore000zco/ostest/README.txt" target="_blank">ostest/README.txt</a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/z8encore000zco/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- z8f64200100kit/
|
||||
| | |- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/z8f64200100kit/ostest/README.txt" target="_blank">ostest/README.txt</a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/z8f64200100kit/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | |- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/z8f64200100kit/ostest/README.txt" target="_blank">ostest/README.txt</a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/z8f64200100kit/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- zkit-arm-1769/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/zkit-arm-1769/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/zkit-arm-1769/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| |- zp214xpa/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/zp214xpa/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/zp214xpa/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
| `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
|- drivers/
|
||||
| |- eeprom/
|
||||
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/drivers/eeprom/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
@@ -345,6 +345,7 @@ nuttx/
|
||||
|- lib/
|
||||
| `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/lib/README.txt" target="_blank">README.txt</a>
|
||||
|- libc/
|
||||
| |- <a href="https://bitbucket.org/nuttx/nuttx/src/master/libc/zoneinfo/README.txt" target="_blank">zoneinfo/README.txt</a>
|
||||
| `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/libc/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
|- libnx/
|
||||
| `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/libnx/README.txt" target="_blank"><b><i>README.txt</i></b></a>
|
||||
@@ -402,8 +403,7 @@ apps/
|
||||
|- <a href="https://bitbucket.org/nuttx/apps/src/master/system/nxplayer/README.txt" target="_blank"><b><i>nxplayer/README.txt</i></b></a>
|
||||
|- <a href="https://bitbucket.org/nuttx/apps/src/master/system/symtab/README.txt" target="_blank"><b><i>symtab/README.txt</i></b></a>
|
||||
|- <a href="https://bitbucket.org/nuttx/apps/src/master/system/usbmsc/README.txt" target="_blank">usbmsc/README.txt</a>
|
||||
|- <a href="https://bitbucket.org/nuttx/apps/src/master/system/zmodem/README.txt" target="_blank">zmodem/README.txt</a>
|
||||
`- <a href="https://bitbucket.org/nuttx/apps/src/master/system/zoneinfo/README.txt" target="_blank">zoneinfo/README.txt</a>
|
||||
`- <a href="https://bitbucket.org/nuttx/apps/src/master/system/zmodem/README.txt" target="_blank">zmodem/README.txt</a>
|
||||
</pre></ul>
|
||||
|
||||
<p>
|
||||
|
||||
@@ -396,7 +396,7 @@ static int pl2303_setup(FAR struct uart_dev_s *dev)
|
||||
</tr>
|
||||
<tr>
|
||||
<td width="30%" align="left" valign="top">
|
||||
<code>CONFIG_SYSTEM_USBMONITOR=y</code>
|
||||
<code>CONFIG_USBMONITOR=y</code>
|
||||
</td>
|
||||
<td align="left" valign="top">
|
||||
Enable the USB monitor daemon
|
||||
@@ -404,7 +404,7 @@ static int pl2303_setup(FAR struct uart_dev_s *dev)
|
||||
</tr>
|
||||
<tr>
|
||||
<td width="30%" align="left" valign="top">
|
||||
<code>CONFIG_SYSTEM_USBMONITOR_STACKSIZE=<i>nnnn</i></code>
|
||||
<code>CONFIG_USBMONITOR_STACKSIZE=<i>nnnn</i></code>
|
||||
</td>
|
||||
<td align="left" valign="top">
|
||||
Sets the USB monitor daemon stack size to <i>nnnn</i>.
|
||||
@@ -413,7 +413,7 @@ static int pl2303_setup(FAR struct uart_dev_s *dev)
|
||||
</tr>
|
||||
<tr>
|
||||
<td width="30%" align="left" valign="top">
|
||||
<code>CONFIG_SYSTEM_USBMONITOR_PRIORITY=50</code>
|
||||
<code>CONFIG_USBMONITOR_PRIORITY=50</code>
|
||||
</td>
|
||||
<td align="left" valign="top">
|
||||
Sets the USB monitor daemon priority to <i>nnnn</i>.
|
||||
@@ -423,7 +423,7 @@ static int pl2303_setup(FAR struct uart_dev_s *dev)
|
||||
</tr>
|
||||
<tr>
|
||||
<td width="30%" align="left" valign="top">
|
||||
<code>CONFIG_SYSTEM_USBMONITOR_INTERVAL=<i>nnnn</i></code>
|
||||
<code>CONFIG_USBMONITOR_INTERVAL=<i>nnnn</i></code>
|
||||
</td>
|
||||
<td align="left" valign="top">
|
||||
Dump the buffered USB data every <i>nnnn</i> seconds.
|
||||
@@ -432,11 +432,11 @@ static int pl2303_setup(FAR struct uart_dev_s *dev)
|
||||
</tr>
|
||||
<tr>
|
||||
<td width="30%" align="left" valign="top">
|
||||
<code>CONFIG_SYSTEM_USBMONITOR_TRACEINIT=y</code><br>
|
||||
<code>CONFIG_SYSTEM_USBMONITOR_TRACECLASS=y</code><br>
|
||||
<code>CONFIG_SYSTEM_USBMONITOR_TRACETRANSFERS=y</code><br>
|
||||
<code>CONFIG_SYSTEM_USBMONITOR_TRACECONTROLLER=y</code><br>
|
||||
<code>CONFIG_SYSTEM_USBMONITOR_TRACEINTERRUPTS=y</code><br>
|
||||
<code>CONFIG_USBMONITOR_TRACEINIT=y</code><br>
|
||||
<code>CONFIG_USBMONITOR_TRACECLASS=y</code><br>
|
||||
<code>CONFIG_USBMONITOR_TRACETRANSFERS=y</code><br>
|
||||
<code>CONFIG_USBMONITOR_TRACECONTROLLER=y</code><br>
|
||||
<code>CONFIG_USBMONITOR_TRACEINTERRUPTS=y</code><br>
|
||||
</td>
|
||||
<td align="left" valign="top">
|
||||
Selects which USB event(s) that you want to be traced.
|
||||
|
||||
+18
-5
@@ -344,6 +344,7 @@ context: check_context include/nuttx/config.h include/nuttx/version.h include/ma
|
||||
# and symbolic links created by the context target.
|
||||
|
||||
clean_context:
|
||||
$(Q) $(MAKE) -C configs TOPDIR="$(TOPDIR)" clean_context
|
||||
$(call DELFILE, include/nuttx/config.h)
|
||||
$(call DELFILE, include/nuttx/version.h)
|
||||
$(call DELFILE, include/math.h)
|
||||
@@ -480,24 +481,36 @@ pass2dep: context tools/mkdeps$(HOSTEXEEXT) tools/cnvwindeps$(HOSTEXEEXT)
|
||||
# location: http://ymorin.is-a-geek.org/projects/kconfig-frontends. See
|
||||
# README.txt file in the NuttX tools GIT repository for additional information.
|
||||
|
||||
config: context apps_preconfig
|
||||
do_config: context apps_preconfig
|
||||
$(Q) APPSDIR=${CONFIG_APPS_DIR} kconfig-conf Kconfig
|
||||
|
||||
oldconfig: context apps_preconfig
|
||||
config: do_config clean_context
|
||||
|
||||
do_oldconfig: context apps_preconfig
|
||||
$(Q) APPSDIR=${CONFIG_APPS_DIR} kconfig-conf --oldconfig Kconfig
|
||||
|
||||
olddefconfig: context apps_preconfig
|
||||
oldconfig: do_oldconfig clean_context
|
||||
|
||||
do_olddefconfig: context apps_preconfig
|
||||
$(Q) APPSDIR=${CONFIG_APPS_DIR} kconfig-conf --olddefconfig Kconfig
|
||||
|
||||
menuconfig: context apps_preconfig
|
||||
olddefconfig: do_olddefconfig clean_context
|
||||
|
||||
do_menuconfig: context apps_preconfig
|
||||
$(Q) APPSDIR=${CONFIG_APPS_DIR} kconfig-mconf Kconfig
|
||||
|
||||
qconfig: context apps_preconfig
|
||||
menuconfig: do_menuconfig clean_context
|
||||
|
||||
do_qconfig: context apps_preconfig
|
||||
$(Q) APPSDIR=${CONFIG_APPS_DIR} kconfig-qconf Kconfig
|
||||
|
||||
qconfig: do_qconfig clean_context
|
||||
|
||||
gconfig: context apps_preconfig
|
||||
$(Q) APPSDIR=${CONFIG_APPS_DIR} kconfig-gconf Kconfig
|
||||
|
||||
gconfig: do_gconfig clean_context
|
||||
|
||||
# export
|
||||
#
|
||||
# The export target will package the NuttX libraries and header files into
|
||||
|
||||
+13
-5
@@ -480,18 +480,26 @@ pass2dep: context tools\mkdeps$(HOSTEXEEXT)
|
||||
# location: http://ymorin.is-a-geek.org/projects/kconfig-frontends. See
|
||||
# misc\tools\README.txt for additional information.
|
||||
|
||||
config: context apps_preconfig
|
||||
do_config: context apps_preconfig
|
||||
$(Q) set APPSDIR=$(patsubst "%",%,${CONFIG_APPS_DIR})& kconfig-conf Kconfig
|
||||
|
||||
oldconfig: context apps_preconfig
|
||||
$(Q) context set APPSDIR=$(patsubst "%",%,${CONFIG_APPS_DIR})& kconfig-conf --oldconfig Kconfig
|
||||
config: do_config clean_context
|
||||
|
||||
olddefconfig: context apps_preconfig
|
||||
do_oldconfig: context apps_preconfig
|
||||
$(Q) set APPSDIR=$(patsubst "%",%,${CONFIG_APPS_DIR})& kconfig-conf --oldconfig Kconfig
|
||||
|
||||
oldconfig: do_oldconfig clean_context
|
||||
|
||||
do_olddefconfig: context apps_preconfig
|
||||
$(Q) set APPSDIR=$(patsubst "%",%,${CONFIG_APPS_DIR})& kconfig-conf --olddefconfig Kconfig
|
||||
|
||||
menuconfig: context configenv apps_preconfig
|
||||
olddefconfig: do_olddefconfig clean_context
|
||||
|
||||
do_menuconfig: context configenv apps_preconfig
|
||||
$(Q) set APPSDIR=$(patsubst "%",%,${CONFIG_APPS_DIR})& kconfig-mconf Kconfig
|
||||
|
||||
menuconfig: do_menuconfig clean_context
|
||||
|
||||
# export
|
||||
#
|
||||
# The export target will package the NuttX libraries and header files into
|
||||
|
||||
+5
-5
@@ -1283,6 +1283,8 @@ nuttx/
|
||||
| | `- README.txt
|
||||
| |- fire-stm32v2/
|
||||
| | `- README.txt
|
||||
| |- freedom-k64f/
|
||||
| | `- README.txt
|
||||
| |- freedom-kl25z/
|
||||
| | `- README.txt
|
||||
| |- freedom-kl26z/
|
||||
@@ -1325,8 +1327,6 @@ nuttx/
|
||||
| | `- README.txt
|
||||
| |- mirtoo/
|
||||
| | `- README.txt
|
||||
| |- mt-db-x3/
|
||||
| | `- README.txt
|
||||
| |- moteino-mega/
|
||||
| | `- README.txt
|
||||
| |- mx1ads/
|
||||
@@ -1524,6 +1524,8 @@ nuttx/
|
||||
|- lib/
|
||||
| `- README.txt
|
||||
|- libc/
|
||||
| |- zoneinfo
|
||||
| | `- README.txt
|
||||
| `- README.txt
|
||||
|- libnx/
|
||||
| `- README.txt
|
||||
@@ -1590,9 +1592,7 @@ apps/
|
||||
| | `- README.txt
|
||||
| |- usbmsc
|
||||
| | `- README.txt
|
||||
| |- zmodem
|
||||
| | `- README.txt
|
||||
| `- zoneinfo
|
||||
| `- zmodem
|
||||
| `- README.txt
|
||||
`- README.txt
|
||||
|
||||
|
||||
+2
-2
@@ -2570,7 +2570,7 @@ New features and extended functionality:
|
||||
particular for a CDC/ACM with MSC USB composite driver).
|
||||
|
||||
Added a new RAM logging driver. This will allow debug output into
|
||||
a RAM buffer associated with a character driver at /dev/syslog.
|
||||
a RAM buffer associated with a character driver at /dev/ramlog.
|
||||
Added the new command 'dmesg' to NSH that can be used to dump the
|
||||
current contents of the log. This is useful for systems that do not
|
||||
have the usual serial console (for example, if you only have a
|
||||
@@ -8991,7 +8991,7 @@ Additional new features and extended functionality:
|
||||
|
||||
* Applications: apps/system:
|
||||
|
||||
- apps/system/zoneinfo: Add logic to build a ROMFS file system
|
||||
- nuttx/zoneinfo: Add logic to build a ROMFS file system
|
||||
containing the timezone data.
|
||||
|
||||
* Applications: apps/nshlib:
|
||||
|
||||
@@ -1,4 +1,4 @@
|
||||
NuttX TODO List (Last updated June 6, 2016)
|
||||
NuttX TODO List (Last updated July 3, 2016)
|
||||
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
|
||||
|
||||
This file summarizes known NuttX bugs, limitations, inconsistencies with
|
||||
@@ -17,7 +17,7 @@ nuttx/:
|
||||
(9) Kernel/Protected Build
|
||||
(3) C++ Support
|
||||
(6) Binary loaders (binfmt/)
|
||||
(12) Network (net/, drivers/net)
|
||||
(11) Network (net/, drivers/net)
|
||||
(4) USB (drivers/usbdev, drivers/usbhost)
|
||||
(0) Other drivers (drivers/)
|
||||
(11) Libraries (libc/, libm/)
|
||||
@@ -938,6 +938,7 @@ o Network (net/, drivers/net)
|
||||
TM4C YES YES
|
||||
eZ80 NO NO
|
||||
LPC17xx YES YES (not tested)
|
||||
LPC43xx YES YES (not tested)
|
||||
DMxxx NIC NO NO
|
||||
PIC32 NO NO
|
||||
RGMP ??? ???
|
||||
@@ -1352,12 +1353,6 @@ o File system / Generic drivers (fs/, drivers/)
|
||||
Status: Open
|
||||
Priority: Low
|
||||
|
||||
Title: CAN POLL SUPPORT
|
||||
Description: At present, the CAN driver does not support the poll() method.
|
||||
See drivers/can.c
|
||||
Status: Open
|
||||
Priority: Low
|
||||
|
||||
Title: ROMFS CHECKSUMS
|
||||
Description: The ROMFS file system does not verify checksums on either
|
||||
volume header on on the individual files.
|
||||
@@ -1602,7 +1597,7 @@ o Build system
|
||||
Priority: Low.
|
||||
|
||||
Title: NATIVE WINDOWS BUILD BROKEN
|
||||
Description: The way that apps/ no generates Kmenu files depends on changes added
|
||||
Description: The way that apps/ now generates Kmenu files depends on changes added
|
||||
to apps/tools/mkkconfig.sh. Similar changes need to be made to
|
||||
apps/tools/mkkconfig.bat to restore the Windows Native build.
|
||||
UPDATE: The mkkconfig.bat script has been updated and appears to work.
|
||||
|
||||
@@ -224,6 +224,7 @@ config ARCH_CHIP_STM32
|
||||
select ARM_HAVE_MPU_UNIFIED
|
||||
select ARCH_HAVE_I2CRESET
|
||||
select ARCH_HAVE_HEAPCHECK
|
||||
select ARCH_HAVE_TICKLESS
|
||||
select ARMV7M_HAVE_STACKCHECK
|
||||
---help---
|
||||
STMicro STM32 architectures (ARM Cortex-M3/4).
|
||||
|
||||
@@ -1,7 +1,7 @@
|
||||
/************************************************************************************
|
||||
* arch/arm/include/kinetis/chip.h
|
||||
*
|
||||
* Copyright (C) 2011, 2013, 2015 Gregory Nutt. All rights reserved.
|
||||
* Copyright (C) 2011, 2013, 2015-2016 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
@@ -72,6 +72,7 @@
|
||||
# define KINETIS_K20 1 /* Kinetics K20 family */
|
||||
# undef KINETIS_K40 /* Not Kinetics K40 family */
|
||||
# undef KINETIS_K60 /* Not Kinetis K60 family */
|
||||
# undef KINETIS_K64 /* Not Kinetis K64 family */
|
||||
|
||||
#if defined(CONFIG_ARCH_CHIP_MK20DN32VLH5)
|
||||
# define KINETIS_FLASH_SIZE (64*1024) /* 32Kb */
|
||||
@@ -153,6 +154,7 @@
|
||||
# define KINETIS_K20 1 /* Kinetics K20 family */
|
||||
# undef KINETIS_K40 /* Not Kinetics K40 family */
|
||||
# undef KINETIS_K60 /* Not Kinetis K60 family */
|
||||
# undef KINETIS_K64 /* Not Kinetis K64 family */
|
||||
|
||||
#if defined(CONFIG_ARCH_CHIP_MK20DX64VLH7)
|
||||
# define KINETIS_FLASH_SIZE (64*1024) /* 64Kb */
|
||||
@@ -207,6 +209,7 @@
|
||||
# undef KINETIS_K20 /* Not Kinetis K20 family */
|
||||
# define KINETIS_K40 1 /* Kinetics K40 family */
|
||||
# undef KINETIS_K60 /* Not Kinetis K60 family */
|
||||
# undef KINETIS_K64 /* Not Kinetis K64 family */
|
||||
# define KINETIS_FLASH_SIZE (64*1024) /* 64Kb */
|
||||
# define KINETIS_FLEXMEM_SIZE (32*1024) /* 32Kb */
|
||||
# define KINETIS_SRAM_SIZE (16*1024) /* 16Kb */
|
||||
@@ -257,6 +260,7 @@
|
||||
# undef KINETIS_K20 /* Not Kinetis K20 family */
|
||||
# define KINETIS_K40 1 /* Kinetics K40 family */
|
||||
# undef KINETIS_K60 /* Not Kinetis K60 family */
|
||||
# undef KINETIS_K64 /* Not Kinetis K64 family */
|
||||
# define KINETIS_FLASH_SIZE (128*1024) /* 128Kb */
|
||||
# define KINETIS_FLEXMEM_SIZE (32*1024) /* 32Kb */
|
||||
# define KINETIS_SRAM_SIZE (32*1024) /* 32Kb */
|
||||
@@ -299,6 +303,7 @@
|
||||
# undef KINETIS_K20 /* Not Kinetis K20 family */
|
||||
# define KINETIS_K40 1 /* Kinetics K40 family */
|
||||
# undef KINETIS_K60 /* Not Kinetis K60 family */
|
||||
# undef KINETIS_K64 /* Not Kinetis K64 family */
|
||||
# define KINETIS_FLASH_SIZE (256*1024) /* 256Kb */
|
||||
# define KINETIS_FLEXMEM_SIZE (32*1024) /* 32Kb */
|
||||
# define KINETIS_SRAM_SIZE (32*1024) /* 64Kb */
|
||||
@@ -340,6 +345,7 @@
|
||||
# undef KINETIS_K20 /* Not Kinetis K20 family */
|
||||
# define KINETIS_K40 1 /* Kinetics K40 family */
|
||||
# undef KINETIS_K60 /* Not Kinetis K60 family */
|
||||
# undef KINETIS_K64 /* Not Kinetis K64 family */
|
||||
# define KINETIS_FLASH_SIZE (128*1024) /* 128Kb */
|
||||
# define KINETIS_FLEXMEM_SIZE (128*1024) /* 128Kb */
|
||||
# define KINETIS_SRAM_SIZE (32*1024) /* 32Kb */
|
||||
@@ -381,6 +387,7 @@
|
||||
# undef KINETIS_K20 /* Not Kinetis K20 family */
|
||||
# define KINETIS_K40 1 /* Kinetics K40 family */
|
||||
# undef KINETIS_K60 /* Not Kinetis K60 family */
|
||||
# undef KINETIS_K64 /* Not Kinetis K64 family */
|
||||
# define KINETIS_FLASH_SIZE (256*1024) /* 256Kb */
|
||||
# define KINETIS_FLEXMEM_SIZE (256*1024) /* 256Kb */
|
||||
# define KINETIS_SRAM_SIZE (64*1024) /* 32Kb */
|
||||
@@ -424,6 +431,7 @@
|
||||
# undef KINETIS_K20 /* Not Kinetis K20 family */
|
||||
# define KINETIS_K40 1 /* Kinetics K40 family */
|
||||
# undef KINETIS_K60 /* Not Kinetis K60 family */
|
||||
# undef KINETIS_K64 /* Not Kinetis K64 family */
|
||||
# define KINETIS_FLASH_SIZE (512*1024) /* 512Kb */
|
||||
# undef KINETIS_FLEXMEM_SIZE /* No FlexMemory */
|
||||
# define KINETIS_SRAM_SIZE (128*1024) /* 128Kb */
|
||||
@@ -465,6 +473,7 @@
|
||||
# undef KINETIS_K20 /* Not Kinetis K20 family */
|
||||
# undef KINETIS_K40 /* Not Kinetics K40 family */
|
||||
# define KINETIS_K60 1 /* Kinetis K60 family */
|
||||
# undef KINETIS_K64 /* Not Kinetis K64 family */
|
||||
# define KINETIS_FLASH_SIZE (256*1024) /* 256Kb */
|
||||
# undef KINETIS_FLEXNVM_SIZE /* No FlexNVM */
|
||||
# undef KINETIS_FLEXRAM_SIZE /* No FlexRAM */
|
||||
@@ -509,6 +518,7 @@
|
||||
# undef KINETIS_K20 /* Not Kinetis K20 family */
|
||||
# undef KINETIS_K40 /* Not Kinetics K40 family */
|
||||
# define KINETIS_K60 1 /* Kinetis K60 family */
|
||||
# undef KINETIS_K64 /* Not Kinetis K64 family */
|
||||
# define KINETIS_FLASH_SIZE (256*1024) /* 256Kb */
|
||||
# define KINETIS_FLEXNVM_SIZE (256*1024) /* 256Kb */
|
||||
# define KINETIS_FLEXRAM_SIZE (4*1024) /* 32Kb */
|
||||
@@ -553,6 +563,7 @@
|
||||
# undef KINETIS_K20 /* Not Kinetis K20 family */
|
||||
# undef KINETIS_K40 /* Not Kinetics K40 family */
|
||||
# define KINETIS_K60 1 /* Kinetis K60 family */
|
||||
# undef KINETIS_K64 /* Not Kinetis K64 family */
|
||||
# define KINETIS_FLASH_SIZE (512*1024) /* 256Kb */
|
||||
# undef KINETIS_FLEXNVM_SIZE /* No FlexNVM */
|
||||
# undef KINETIS_FLEXRAM_SIZE /* No FlexRAM */
|
||||
@@ -598,6 +609,7 @@
|
||||
# undef KINETIS_K20 /* Not Kinetis K20 family */
|
||||
# undef KINETIS_K40 /* Not Kinetics K40 family */
|
||||
# define KINETIS_K60 1 /* Kinetis K60 family */
|
||||
# undef KINETIS_K64 /* Not Kinetis K64 family */
|
||||
# define KINETIS_FLASH_SIZE (256*1024) /* 256Kb */
|
||||
# undef KINETIS_FLEXNVM_SIZE /* No FlexNVM */
|
||||
# undef KINETIS_FLEXRAM_SIZE /* No FlexRAM */
|
||||
@@ -642,6 +654,7 @@
|
||||
# undef KINETIS_K20 /* Not Kinetis K20 family */
|
||||
# undef KINETIS_K40 /* Not Kinetics K40 family */
|
||||
# define KINETIS_K60 1 /* Kinetis K60 family */
|
||||
# undef KINETIS_K64 /* Not Kinetis K64 family */
|
||||
# define KINETIS_FLASH_SIZE (256*1024) /* 256Kb */
|
||||
# define KINETIS_FLEXNVM_SIZE (256*1024) /* 256Kb */
|
||||
# define KINETIS_FLEXRAM_SIZE (4*1024) /* 4Kb */
|
||||
@@ -686,6 +699,7 @@
|
||||
# undef KINETIS_K20 /* Not Kinetis K20 family */
|
||||
# undef KINETIS_K40 /* Not Kinetics K40 family */
|
||||
# define KINETIS_K60 1 /* Kinetis K60 family */
|
||||
# undef KINETIS_K64 /* Not Kinetis K64 family */
|
||||
# define KINETIS_FLASH_SIZE (512*1024) /* 256Kb */
|
||||
# undef KINETIS_FLEXNVM_SIZE /* No FlexNVM */
|
||||
# undef KINETIS_FLEXRAM_SIZE /* No FlexRAM */
|
||||
@@ -730,6 +744,7 @@
|
||||
# undef KINETIS_K20 /* Not Kinetis K20 family */
|
||||
# undef KINETIS_K40 /* Not Kinetics K40 family */
|
||||
# define KINETIS_K60 1 /* Kinetis K60 family */
|
||||
# undef KINETIS_K64 /* Not Kinetis K64 family */
|
||||
# define KINETIS_FLASH_SIZE (256*1024) /* 256Kb */
|
||||
# undef KINETIS_FLEXNVM_SIZE /* No FlexNVM */
|
||||
# undef KINETIS_FLEXRAM_SIZE /* No FlexRAM */
|
||||
@@ -774,6 +789,7 @@
|
||||
# undef KINETIS_K20 /* Not Kinetis K20 family */
|
||||
# undef KINETIS_K40 /* Not Kinetics K40 family */
|
||||
# define KINETIS_K60 1 /* Kinetis K60 family */
|
||||
# undef KINETIS_K64 /* Not Kinetis K64 family */
|
||||
# define KINETIS_FLASH_SIZE (256*1024) /* 256Kb */
|
||||
# define KINETIS_FLEXNVM_SIZE (256*1024) /* 256Kb */
|
||||
# define KINETIS_FLEXRAM_SIZE (4*1024) /* 4Kb */
|
||||
@@ -818,6 +834,7 @@
|
||||
# undef KINETIS_K20 /* Not Kinetis K20 family */
|
||||
# undef KINETIS_K40 /* Not Kinetics K40 family */
|
||||
# define KINETIS_K60 1 /* Kinetis K60 family */
|
||||
# undef KINETIS_K64 /* Not Kinetis K64 family */
|
||||
# define KINETIS_FLASH_SIZE (512*1024) /* 512Kb */
|
||||
# undef KINETIS_FLEXNVM_SIZE /* No FlexNVM */
|
||||
# undef KINETIS_FLEXRAM_SIZE /* No FlexRAM */
|
||||
@@ -862,6 +879,7 @@
|
||||
# undef KINETIS_K20 /* Not Kinetis K20 family */
|
||||
# undef KINETIS_K40 /* Not Kinetics K40 family */
|
||||
# define KINETIS_K60 1 /* Kinetis K60 family */
|
||||
# undef KINETIS_K64 /* Not Kinetis K64 family */
|
||||
# define KINETIS_FLASH_SIZE (256*1024) /* 256Kb */
|
||||
# undef KINETIS_FLEXNVM_SIZE /* No FlexNVM */
|
||||
# undef KINETIS_FLEXRAM_SIZE /* No FlexRAM */
|
||||
@@ -906,6 +924,7 @@
|
||||
# undef KINETIS_K20 /* Not Kinetis K20 family */
|
||||
# undef KINETIS_K40 /* Not Kinetics K40 family */
|
||||
# define KINETIS_K60 1 /* Kinetis K60 family */
|
||||
# undef KINETIS_K64 /* Not Kinetis K64 family */
|
||||
# define KINETIS_FLASH_SIZE (256*1024) /* 256Kb */
|
||||
# define KINETIS_FLEXNVM_SIZE (256*1024) /* 256Kb */
|
||||
# define KINETIS_FLEXRAM_SIZE (4*1024) /* 4Kb */
|
||||
@@ -950,6 +969,7 @@
|
||||
# undef KINETIS_K20 /* Not Kinetis K20 family */
|
||||
# undef KINETIS_K40 /* Not Kinetics K40 family */
|
||||
# define KINETIS_K60 1 /* Kinetis K60 family */
|
||||
# undef KINETIS_K64 /* Not Kinetis K64 family */
|
||||
# define KINETIS_FLASH_SIZE (512*1024) /* 512Kb */
|
||||
# undef KINETIS_FLEXNVM_SIZE /* No FlexNVM */
|
||||
# undef KINETIS_FLEXRAM_SIZE /* No FlexRAM */
|
||||
@@ -990,6 +1010,278 @@
|
||||
# undef KINETIS_NTAMPER /* No tamper detect */
|
||||
# define KINETIS_NCRC 1 /* CRC */
|
||||
|
||||
#elif defined(CONFIG_ARCH_CHIP_MK64FN1M0VLL12)
|
||||
# undef KINETIS_K20 /* Not Kinetics K20 family */
|
||||
# undef KINETIS_K40 /* Not Kinetics K40 family */
|
||||
# undef KINETIS_K60 /* Not Kinetis K60 family */
|
||||
# define KINETIS_K64 1 /* Kinetis K64 family */
|
||||
# define KINETIS_FLASH_SIZE (1024*1024) /* 1Mb */
|
||||
# define KINETIS_FLEXNVM_SIZE (0*1024) /* 0Kb */
|
||||
# define KINETIS_FLEXRAM_SIZE (4*1024) /* 4Kb */
|
||||
# define KINETIS_SRAM_SIZE (256*1024) /* 256Kb */
|
||||
# define KINETIS_MPU 1 /* Memory protection unit */
|
||||
# define KINETIS_EXTBUS 1 /* External bus interface */
|
||||
# define KINETIS_NDMACH 16 /* Up to 16 DMA channels */
|
||||
# define KINETIS_NENET 1 /* One IEEE 1588 Ethernet controller */
|
||||
# define KINETIS_NUSBOTG 1 /* With USB OTG controller */
|
||||
# define KINETIS_NUSBDEV 1 /* One USB device controller */
|
||||
# define KINETIS_NSDHC 1 /* SD host controller */
|
||||
# define KINETIS_NI2C 3 /* Three I2C modules */
|
||||
# define KINETIS_NUART 6 /* Six UART modues */
|
||||
# define KINETIS_NSPI 3 /* Three SPI modules */
|
||||
# define KINETIS_NCAN 1 /* One CAN controllers */
|
||||
# define KINETIS_NI2S 1 /* One I2S modules */
|
||||
# define KINETIS_NSLCD 1 /* One segment LCD interface (up to 36x8/40x4) */
|
||||
# define KINETIS_NADC16 2 /* Four 16-bit ADC */
|
||||
# define KINETIS_NCMP 3 /* Three analog comparators */
|
||||
# define KINETIS_NDAC6 3 /* Three 6-bit DAC */
|
||||
# define KINETIS_NDAC12 2 /* Two 12-bit DAC */
|
||||
# define KINETIS_NVREF 1 /* Voltage reference */
|
||||
# define KINETIS_NTIMERS8 2 /* Two 8 channel timers */
|
||||
# define KINETIS_NTIMERS2 2 /* Two 2 channel timers */
|
||||
# define KINETIS_NRTC 1 /* Real time clock */
|
||||
# define KINETIS_NRNG 1 /* Random number generator */
|
||||
# define KINETIS_NMMCAU 1 /* Hardware encryption */
|
||||
# define KINETIS_NCRC 1 /* CRC */
|
||||
|
||||
#elif defined(CONFIG_ARCH_CHIP_MK64FX512VLL12)
|
||||
# undef KINETIS_K20 /* Not Kinetics K20 family */
|
||||
# undef KINETIS_K40 /* Not Kinetics K40 family */
|
||||
# undef KINETIS_K60 /* Not Kinetis K60 family */
|
||||
# define KINETIS_K64 1 /* Kinetis K64 family */
|
||||
# define KINETIS_FLASH_SIZE (1024*1024) /* 1Mb */
|
||||
# define KINETIS_FLEXNVM_SIZE (0*1024) /* 0Kb */
|
||||
# define KINETIS_FLEXRAM_SIZE (4*1024) /* 4Kb */
|
||||
# define KINETIS_SRAM_SIZE (256*1024) /* 256Kb */
|
||||
# define KINETIS_MPU 1 /* Memory protection unit */
|
||||
# define KINETIS_EXTBUS 1 /* External bus interface */
|
||||
# define KINETIS_NDMACH 16 /* Up to 16 DMA channels */
|
||||
# define KINETIS_NENET 1 /* One IEEE 1588 Ethernet controller */
|
||||
# define KINETIS_NUSBOTG 1 /* With USB OTG controller */
|
||||
# define KINETIS_NUSBDEV 1 /* One USB device controller */
|
||||
# define KINETIS_NSDHC 1 /* SD host controller */
|
||||
# define KINETIS_NI2C 3 /* Three I2C modules */
|
||||
# define KINETIS_NUART 6 /* Six UART modues */
|
||||
# define KINETIS_NSPI 3 /* Three SPI modules */
|
||||
# define KINETIS_NCAN 1 /* One CAN controllers */
|
||||
# define KINETIS_NI2S 1 /* One I2S modules */
|
||||
# define KINETIS_NSLCD 1 /* One segment LCD interface (up to 36x8/40x4) */
|
||||
# define KINETIS_NADC16 2 /* Four 16-bit ADC */
|
||||
# define KINETIS_NCMP 3 /* Three analog comparators */
|
||||
# define KINETIS_NDAC6 3 /* Three 6-bit DAC */
|
||||
# define KINETIS_NDAC12 2 /* Two 12-bit DAC */
|
||||
# define KINETIS_NVREF 1 /* Voltage reference */
|
||||
# define KINETIS_NTIMERS8 2 /* Two 8 channel timers */
|
||||
# define KINETIS_NTIMERS2 2 /* Two 2 channel timers */
|
||||
# define KINETIS_NRTC 1 /* Real time clock */
|
||||
# define KINETIS_NRNG 1 /* Random number generator */
|
||||
# define KINETIS_NMMCAU 1 /* Hardware encryption */
|
||||
# define KINETIS_NCRC 1 /* CRC */
|
||||
|
||||
#elif defined(CONFIG_ARCH_CHIP_MK64FX512VDC12)
|
||||
# undef KINETIS_K20 /* Not Kinetics K20 family */
|
||||
# undef KINETIS_K40 /* Not Kinetics K40 family */
|
||||
# undef KINETIS_K60 /* Not Kinetis K60 family */
|
||||
# define KINETIS_K64 1 /* Kinetis K64 family */
|
||||
# define KINETIS_FLASH_SIZE (1024*1024) /* 1Mb */
|
||||
# define KINETIS_FLEXNVM_SIZE (0*1024) /* 0Kb */
|
||||
# define KINETIS_FLEXRAM_SIZE (4*1024) /* 4Kb */
|
||||
# define KINETIS_SRAM_SIZE (256*1024) /* 256Kb */
|
||||
# define KINETIS_MPU 1 /* Memory protection unit */
|
||||
# define KINETIS_EXTBUS 1 /* External bus interface */
|
||||
# define KINETIS_NDMACH 16 /* Up to 16 DMA channels */
|
||||
# define KINETIS_NENET 1 /* One IEEE 1588 Ethernet controller */
|
||||
# define KINETIS_NUSBOTG 1 /* With USB OTG controller */
|
||||
# define KINETIS_NUSBDEV 1 /* One USB device controller */
|
||||
# define KINETIS_NSDHC 1 /* SD host controller */
|
||||
# define KINETIS_NI2C 3 /* Three I2C modules */
|
||||
# define KINETIS_NUART 6 /* Six UART modues */
|
||||
# define KINETIS_NSPI 3 Three SPI modules
|
||||
# define KINETIS_NCAN 1 /* One CAN controllers */
|
||||
# define KINETIS_NI2S 1 /* One I2S modules */
|
||||
# define KINETIS_NSLCD 1 /* One segment LCD interface (up to 36x8/40x4) */
|
||||
# define KINETIS_NADC16 2 /* Four 16-bit ADC */
|
||||
# define KINETIS_NCMP 3 /* Three analog comparators */
|
||||
# define KINETIS_NDAC6 3 /* Three 6-bit DAC */
|
||||
# define KINETIS_NDAC12 2 /* Two 12-bit DAC */
|
||||
# define KINETIS_NVREF 1 /* Voltage reference */
|
||||
# define KINETIS_NTIMERS8 2 /* Two 8 channel timers */
|
||||
# define KINETIS_NTIMERS2 2 /* Two 2 channel timers */
|
||||
# define KINETIS_NRTC 1 /* Real time clock */
|
||||
# define KINETIS_NRNG 1 /* Random number generator */
|
||||
# define KINETIS_NMMCAU 1 /* Hardware encryption */
|
||||
# define KINETIS_NCRC 1 /* CRC */
|
||||
|
||||
#elif defined(CONFIG_ARCH_CHIP_MK64FN1M0VDC12)
|
||||
# undef KINETIS_K20 /* Not Kinetics K20 family */
|
||||
# undef KINETIS_K40 /* Not Kinetics K40 family */
|
||||
# undef KINETIS_K60 /* Not Kinetis K60 family */
|
||||
# define KINETIS_K64 1 /* Kinetis K64 family */
|
||||
# define KINETIS_FLASH_SIZE (1024*1024) /* 1Mb */
|
||||
# define KINETIS_FLEXNVM_SIZE (0*1024) /* 0Kb */
|
||||
# define KINETIS_FLEXRAM_SIZE (4*1024) /* 4Kb */
|
||||
# define KINETIS_SRAM_SIZE (256*1024) /* 256Kb */
|
||||
# define KINETIS_MPU 1 /* Memory protection unit */
|
||||
# define KINETIS_EXTBUS 1 /* External bus interface */
|
||||
# define KINETIS_NDMACH 16 /* Up to 16 DMA channels */
|
||||
# define KINETIS_NENET 1 /* One IEEE 1588 Ethernet controller */
|
||||
# define KINETIS_NUSBOTG 1 /* With USB OTG controller */
|
||||
# define KINETIS_NUSBDEV 1 /* One USB device controller */
|
||||
# define KINETIS_NSDHC 1 /* SD host controller */
|
||||
# define KINETIS_NI2C 3 /* Three I2C modules */
|
||||
# define KINETIS_NUART 6 /* Six UART modues */
|
||||
# define KINETIS_NSPI 3 Three SPI modules
|
||||
# define KINETIS_NCAN 1 /* One CAN controllers */
|
||||
# define KINETIS_NI2S 1 /* One I2S modules */
|
||||
# define KINETIS_NSLCD 1 /* One segment LCD interface (up to 36x8/40x4) */
|
||||
# define KINETIS_NADC16 2 /* Four 16-bit ADC */
|
||||
# define KINETIS_NCMP 3 /* Three analog comparators */
|
||||
# define KINETIS_NDAC6 3 /* Three 6-bit DAC */
|
||||
# define KINETIS_NDAC12 2 /* Two 12-bit DAC */
|
||||
# define KINETIS_NVREF 1 /* Voltage reference */
|
||||
# define KINETIS_NTIMERS8 2 /* Two 8 channel timers */
|
||||
# define KINETIS_NTIMERS2 2 /* Two 2 channel timers */
|
||||
# define KINETIS_NRTC 1 /* Real time clock */
|
||||
# define KINETIS_NRNG 1 /* Random number generator */
|
||||
# define KINETIS_NMMCAU 1 /* Hardware encryption */
|
||||
# define KINETIS_NCRC 1 /* CRC */
|
||||
|
||||
#elif defined(CONFIG_ARCH_CHIP_MK64FX512VLQ12)
|
||||
# undef KINETIS_K20 /* Not Kinetics K20 family */
|
||||
# undef KINETIS_K40 /* Not Kinetics K40 family */
|
||||
# undef KINETIS_K60 /* Not Kinetis K60 family */
|
||||
# define KINETIS_K64 1 /* Kinetis K64 family */
|
||||
# define KINETIS_FLASH_SIZE (1024*1024) /* 1Mb */
|
||||
# define KINETIS_FLEXNVM_SIZE (0*1024) /* 0Kb */
|
||||
# define KINETIS_FLEXRAM_SIZE (4*1024) /* 4Kb */
|
||||
# define KINETIS_SRAM_SIZE (256*1024) /* 256Kb */
|
||||
# define KINETIS_MPU 1 /* Memory protection unit */
|
||||
# define KINETIS_EXTBUS 1 /* External bus interface */
|
||||
# define KINETIS_NDMACH 16 /* Up to 16 DMA channels */
|
||||
# define KINETIS_NENET 1 /* One IEEE 1588 Ethernet controller */
|
||||
# define KINETIS_NUSBOTG 1 /* With USB OTG controller */
|
||||
# define KINETIS_NUSBDEV 1 /* One USB device controller */
|
||||
# define KINETIS_NSDHC 1 /* SD host controller */
|
||||
# define KINETIS_NI2C 3 /* Three I2C modules */
|
||||
# define KINETIS_NUART 6 /* Six UART modues */
|
||||
# define KINETIS_NSPI 3 /* Three SPI modules */
|
||||
# define KINETIS_NCAN 1 /* One CAN controllers */
|
||||
# define KINETIS_NI2S 1 /* One I2S modules */
|
||||
# define KINETIS_NSLCD 1 /* One segment LCD interface (up to 36x8/40x4) */
|
||||
# define KINETIS_NADC16 2 /* Four 16-bit ADC */
|
||||
# define KINETIS_NCMP 3 /* Three analog comparators */
|
||||
# define KINETIS_NDAC6 3 /* Three 6-bit DAC */
|
||||
# define KINETIS_NDAC12 2 /* Two 12-bit DAC */
|
||||
# define KINETIS_NVREF 1 /* Voltage reference */
|
||||
# define KINETIS_NTIMERS8 2 /* Two 8 channel timers */
|
||||
# define KINETIS_NTIMERS2 2 /* Two 2 channel timers */
|
||||
# define KINETIS_NRTC 1 /* Real time clock */
|
||||
# define KINETIS_NRNG 1 /* Random number generator */
|
||||
# define KINETIS_NMMCAU 1 /* Hardware encryption */
|
||||
# define KINETIS_NCRC 1 /* CRC */
|
||||
|
||||
#elif defined(CONFIG_ARCH_CHIP_MK64FN1M0VLQ12)
|
||||
# undef KINETIS_K20 /* Not Kinetics K20 family */
|
||||
# undef KINETIS_K40 /* Not Kinetics K40 family */
|
||||
# undef KINETIS_K60 /* Not Kinetis K60 family */
|
||||
# define KINETIS_K64 1 /* Kinetis K64 family */
|
||||
# define KINETIS_FLASH_SIZE (1024*1024) /* 1Mb */
|
||||
# define KINETIS_FLEXNVM_SIZE (0*1024) /* 0Kb */
|
||||
# define KINETIS_FLEXRAM_SIZE (4*1024) /* 4Kb */
|
||||
# define KINETIS_SRAM_SIZE (256*1024) /* 256Kb */
|
||||
# define KINETIS_MPU 1 /* Memory protection unit */
|
||||
# define KINETIS_EXTBUS 1 /* External bus interface */
|
||||
# define KINETIS_NDMACH 16 /* Up to 16 DMA channels */
|
||||
# define KINETIS_NENET 1 /* One IEEE 1588 Ethernet controller */
|
||||
# define KINETIS_NUSBOTG 1 /* With USB OTG controller */
|
||||
# define KINETIS_NUSBDEV 1 /* One USB device controller */
|
||||
# define KINETIS_NSDHC 1 /* SD host controller */
|
||||
# define KINETIS_NI2C 3 /* Three I2C modules */
|
||||
# define KINETIS_NUART 6 /* Six UART modues */
|
||||
# define KINETIS_NSPI 3 /* Three SPI modules */
|
||||
# define KINETIS_NCAN 1 /* One CAN controllers */
|
||||
# define KINETIS_NI2S 1 /* One I2S modules */
|
||||
# define KINETIS_NSLCD 1 /* One segment LCD interface (up to 36x8/40x4) */
|
||||
# define KINETIS_NADC16 2 /* Four 16-bit ADC */
|
||||
# define KINETIS_NCMP 3 /* Three analog comparators */
|
||||
# define KINETIS_NDAC6 3 /* Three 6-bit DAC */
|
||||
# define KINETIS_NDAC12 2 /* Two 12-bit DAC */
|
||||
# define KINETIS_NVREF 1 /* Voltage reference */
|
||||
# define KINETIS_NTIMERS8 2 /* Two 8 channel timers */
|
||||
# define KINETIS_NTIMERS2 2 /* Two 2 channel timers */
|
||||
# define KINETIS_NRTC 1 /* Real time clock */
|
||||
# define KINETIS_NRNG 1 /* Random number generator */
|
||||
# define KINETIS_NMMCAU 1 /* Hardware encryption */
|
||||
# define KINETIS_NCRC 1 /* CRC */
|
||||
|
||||
#elif defined(CONFIG_ARCH_CHIP_MK64FX512VMD12)
|
||||
# undef KINETIS_K20 /* Not Kinetics K20 family */
|
||||
# undef KINETIS_K40 /* Not Kinetics K40 family */
|
||||
# undef KINETIS_K60 /* Not Kinetis K60 family */
|
||||
# define KINETIS_K64 1 /* Kinetis K64 family */
|
||||
# define KINETIS_FLASH_SIZE (1024*1024) /* 1Mb */
|
||||
# define KINETIS_FLEXNVM_SIZE (0*1024) /* 0Kb */
|
||||
# define KINETIS_FLEXRAM_SIZE (4*1024) /* 4Kb */
|
||||
# define KINETIS_SRAM_SIZE (256*1024) /* 256Kb */
|
||||
# define KINETIS_MPU 1 /* Memory protection unit */
|
||||
# define KINETIS_EXTBUS 1 /* External bus interface */
|
||||
# define KINETIS_NDMACH 16 /* Up to 16 DMA channels */
|
||||
# define KINETIS_NENET 1 /* One IEEE 1588 Ethernet controller */
|
||||
# define KINETIS_NUSBOTG 1 /* With USB OTG controller */
|
||||
# define KINETIS_NUSBDEV 1 /* One USB device controller */
|
||||
# define KINETIS_NSDHC 1 /* SD host controller */
|
||||
# define KINETIS_NI2C 3 /* Three I2C modules */
|
||||
# define KINETIS_NUART 6 /* Six UART modues */
|
||||
# define KINETIS_NSPI 3 /* Three SPI modules */
|
||||
# define KINETIS_NCAN 1 /* One CAN controllers */
|
||||
# define KINETIS_NI2S 1 /* One I2S modules */
|
||||
# define KINETIS_NSLCD 1 /* One segment LCD interface (up to 36x8/40x4) */
|
||||
# define KINETIS_NADC16 2 /* Four 16-bit ADC */
|
||||
# define KINETIS_NCMP 3 /* Three analog comparators */
|
||||
# define KINETIS_NDAC6 3 /* Three 6-bit DAC */
|
||||
# define KINETIS_NDAC12 2 /* Two 12-bit DAC */
|
||||
# define KINETIS_NVREF 1 /* Voltage reference */
|
||||
# define KINETIS_NTIMERS8 2 /* Two 8 channel timers */
|
||||
# define KINETIS_NTIMERS2 2 /* Two 2 channel timers */
|
||||
# define KINETIS_NRTC 1 /* Real time clock */
|
||||
# define KINETIS_NRNG 1 /* Random number generator */
|
||||
# define KINETIS_NMMCAU 1 /* Hardware encryption */
|
||||
# define KINETIS_NCRC 1 /* CRC */
|
||||
|
||||
#elif defined(CONFIG_ARCH_CHIP_MK64FN1M0VMD12)
|
||||
# undef KINETIS_K20 /* Not Kinetics K20 family */
|
||||
# undef KINETIS_K40 /* Not Kinetics K40 family */
|
||||
# undef KINETIS_K60 /* Not Kinetis K60 family */
|
||||
# define KINETIS_K64 1 /* Kinetis K64 family */
|
||||
# define KINETIS_FLASH_SIZE (1024*1024) /* 1Mb */
|
||||
# define KINETIS_FLEXNVM_SIZE (0*1024) /* 0Kb */
|
||||
# define KINETIS_FLEXRAM_SIZE (4*1024) /* 4Kb */
|
||||
# define KINETIS_SRAM_SIZE (256*1024) /* 256Kb */
|
||||
# define KINETIS_MPU 1 /* Memory protection unit */
|
||||
# define KINETIS_EXTBUS 1 /* External bus interface */
|
||||
# define KINETIS_NDMACH 16 /* Up to 16 DMA channels */
|
||||
# define KINETIS_NENET 1 /* One IEEE 1588 Ethernet controller */
|
||||
# define KINETIS_NUSBOTG 1 /* With USB OTG controller */
|
||||
# define KINETIS_NUSBDEV 1 /* One USB device controller */
|
||||
# define KINETIS_NSDHC 1 /* SD host controller */
|
||||
# define KINETIS_NI2C 3 /* Three I2C modules */
|
||||
# define KINETIS_NUART 6 /* Six UART modues */
|
||||
# define KINETIS_NSPI 3 /* Three SPI modules */
|
||||
# define KINETIS_NCAN 1 /* One CAN controllers */
|
||||
# define KINETIS_NI2S 1 /* One I2S modules */
|
||||
# define KINETIS_NSLCD 1 /* One segment LCD interface (up to 36x8/40x4) */
|
||||
# define KINETIS_NADC16 2 /* Four 16-bit ADC */
|
||||
# define KINETIS_NCMP 3 /* Three analog comparators */
|
||||
# define KINETIS_NDAC6 3 /* Three 6-bit DAC */
|
||||
# define KINETIS_NDAC12 2 /* Two 12-bit DAC */
|
||||
# define KINETIS_NVREF 1 /* Voltage reference */
|
||||
# define KINETIS_NTIMERS8 2 /* Two 8 channel timers */
|
||||
# define KINETIS_NTIMERS2 2 /* Two 2 channel timers */
|
||||
# define KINETIS_NRTC 1 /* Real time clock */
|
||||
# define KINETIS_NRNG 1 /* Random number generator */
|
||||
# define KINETIS_NMMCAU 1 /* Hardware encryption */
|
||||
# define KINETIS_NCRC 1 /* CRC */
|
||||
|
||||
#else
|
||||
# error "Unsupported Kinetis chip"
|
||||
#endif
|
||||
|
||||
@@ -83,7 +83,7 @@
|
||||
* K20P64M72SF1RM
|
||||
*/
|
||||
|
||||
#if defined(CONFIG_ARCH_CHIP_MK20DX256VLH7)
|
||||
#if defined(CONFIG_ARCH_FAMILY_K20)
|
||||
# define KINETIS_IRQ_DMACH0 (16) /* Vector 16: DMA channel 0 transfer complete */
|
||||
# define KINETIS_IRQ_DMACH1 (17) /* Vector 17: DMA channel 1 transfer complete */
|
||||
# define KINETIS_IRQ_DMACH2 (18) /* Vector 18: DMA channel 2 transfer complete */
|
||||
@@ -162,9 +162,7 @@
|
||||
* K40P144M100SF2RM
|
||||
*/
|
||||
|
||||
#elif defined(CONFIG_ARCH_CHIP_MK40X128VLQ100) || defined(CONFIG_ARCH_CHIP_MK40X128VMD100) || \
|
||||
defined(CONFIG_ARCH_CHIP_MK40X256VLQ100) || defined(CONFIG_ARCH_CHIP_MK40X256VMD100) || \
|
||||
defined(CONFIG_ARCH_CHIP_MK40N512VLQ100) || defined(CONFIG_ARCH_CHIP_MK40N512VMD100)
|
||||
#elif defined(CONFIG_ARCH_FAMILY_K40)
|
||||
|
||||
# define KINETIS_IRQ_DMACH0 (16) /* Vector 16: DMA channel 0 transfer complete */
|
||||
# define KINETIS_IRQ_DMACH1 (17) /* Vector 17: DMA channel 1 transfer complete */
|
||||
@@ -274,10 +272,7 @@
|
||||
* K60P144M100SF2RM
|
||||
*/
|
||||
|
||||
#elif defined(CONFIG_ARCH_CHIP_MK60N256VLQ100) || defined(CONFIG_ARCH_CHIP_MK60X256VLQ100) || \
|
||||
defined(CONFIG_ARCH_CHIP_MK60N512VLQ100) || defined(CONFIG_ARCH_CHIP_MK60N256VMD100) || \
|
||||
defined(CONFIG_ARCH_CHIP_MK60X256VMD100) || defined(CONFIG_ARCH_CHIP_MK60N512VMD100) || \
|
||||
defined(CONFIG_ARCH_CHIP_MK60N512VLL100)
|
||||
#elif defined(CONFIG_ARCH_FAMILY_K60)
|
||||
|
||||
# define KINETIS_IRQ_DMACH0 (16) /* Vector 16: DMA channel 0 transfer complete */
|
||||
# define KINETIS_IRQ_DMACH1 (17) /* Vector 17: DMA channel 1 transfer complete */
|
||||
@@ -383,6 +378,105 @@
|
||||
# define NR_VECTORS (120) /* 120 vectors */
|
||||
# define NR_IRQS (108) /* 120 interrupts but 108 IRQ numbers */
|
||||
|
||||
/* K64 Family ***********************************************************************
|
||||
*
|
||||
* The memory map for the following parts is defined in NXP document
|
||||
* K64P144M120SF5RM.pdf
|
||||
*/
|
||||
|
||||
#elif defined(CONFIG_ARCH_FAMILY_K64)
|
||||
|
||||
# define KINETIS_IRQ_DMACH0 (16) /* Vector 16: DMA channel 0 transfer complete */
|
||||
# define KINETIS_IRQ_DMACH1 (17) /* Vector 17: DMA channel 1 transfer complete */
|
||||
# define KINETIS_IRQ_DMACH2 (18) /* Vector 18: DMA channel 2 transfer complete */
|
||||
# define KINETIS_IRQ_DMACH3 (19) /* Vector 19: DMA channel 3 transfer complete */
|
||||
# define KINETIS_IRQ_DMACH4 (20) /* Vector 20: DMA channel 4 transfer complete */
|
||||
# define KINETIS_IRQ_DMACH5 (21) /* Vector 21: DMA channel 5 transfer complete */
|
||||
# define KINETIS_IRQ_DMACH6 (22) /* Vector 22: DMA channel 6 transfer complete */
|
||||
# define KINETIS_IRQ_DMACH7 (23) /* Vector 23: DMA channel 7 transfer complete */
|
||||
# define KINETIS_IRQ_DMACH8 (24) /* Vector 24: DMA channel 8 transfer complete */
|
||||
# define KINETIS_IRQ_DMACH9 (25) /* Vector 25: DMA channel 9 transfer complete */
|
||||
# define KINETIS_IRQ_DMACH10 (26) /* Vector 26: DMA channel 10 transfer complete */
|
||||
# define KINETIS_IRQ_DMACH11 (27) /* Vector 27: DMA channel 11 transfer complete */
|
||||
# define KINETIS_IRQ_DMACH12 (28) /* Vector 28: DMA channel 12 transfer complete */
|
||||
# define KINETIS_IRQ_DMACH13 (29) /* Vector 29: DMA channel 13 transfer complete */
|
||||
# define KINETIS_IRQ_DMACH14 (30) /* Vector 30: DMA channel 14 transfer complete */
|
||||
# define KINETIS_IRQ_DMACH15 (31) /* Vector 31: DMA channel 15 transfer complete */
|
||||
# define KINETIS_IRQ_DMAERR (32) /* Vector 32: DMA error interrupt channels 0-15 */
|
||||
# define KINETIS_IRQ_MCM (33) /* Vector 33: MCM Normal interrupt */
|
||||
# define KINETIS_IRQ_FLASHCC (34) /* Vector 34: Flash memory command complete */
|
||||
# define KINETIS_IRQ_FLASHRC (35) /* Vector 35: Flash memory read collision */
|
||||
# define KINETIS_IRQ_SMCLVD (36) /* Vector 36: Mode Controller low-voltage
|
||||
* detect, low-voltage warning */
|
||||
# define KINETIS_IRQ_LLWU (37) /* Vector 37: LLWU Normal Low Leakage Wakeup */
|
||||
# define KINETIS_IRQ_WDOG (38) /* Vector 38: Watchdog */
|
||||
# define KINETIS_IRQ_RNGB (39) /* Vector 39: Random number generator */
|
||||
# define KINETIS_IRQ_I2C0 (40) /* Vector 40: I2C0 */
|
||||
# define KINETIS_IRQ_I2C1 (41) /* Vector 41: I2C1 */
|
||||
# define KINETIS_IRQ_SPI0 (42) /* Vector 42: SPI0 all sources */
|
||||
# define KINETIS_IRQ_SPI1 (43) /* Vector 43: SPI1 all sources */
|
||||
# define KINETIS_IRQ_I2S0 (44) /* Vector 44: Transmit */
|
||||
# define KINETIS_IRQ_I2S1 (45) /* Vector 45: Transmit */
|
||||
/* Vector 46: Reserved */
|
||||
# define KINETIS_IRQ_UART0S (47) /* Vector 47: UART0 status */
|
||||
# define KINETIS_IRQ_UART0E (48) /* Vector 48: UART0 error */
|
||||
# define KINETIS_IRQ_UART1S (49) /* Vector 49: UART1 status */
|
||||
# define KINETIS_IRQ_UART1E (50) /* Vector 50: UART1 error */
|
||||
# define KINETIS_IRQ_UART2S (51) /* Vector 51: UART2 status */
|
||||
# define KINETIS_IRQ_UART2E (52) /* Vector 52: UART2 error */
|
||||
# define KINETIS_IRQ_UART3S (53) /* Vector 53: UART3 status */
|
||||
# define KINETIS_IRQ_UART3E (54) /* Vector 54: UART3 error */
|
||||
# define KINETIS_IRQ_ADC0 (55) /* Vector 55: ADC0 */
|
||||
# define KINETIS_IRQ_CMP0 (56) /* Vector 56: CMP0 */
|
||||
# define KINETIS_IRQ_CMP1 (57) /* Vector 57: CMP1 */
|
||||
# define KINETIS_IRQ_FTM0 (58) /* Vector 58: FTM0 all sources */
|
||||
# define KINETIS_IRQ_FTM1 (59) /* Vector 59: FTM1 all sources */
|
||||
# define KINETIS_IRQ_FTM2 (60) /* Vector 60: FTM2 all sources */
|
||||
# define KINETIS_IRQ_CMT (61) /* Vector 61: CMT */
|
||||
# define KINETIS_IRQ_RTC0 (62) /* Vector 62: RTC alarm interrupt */
|
||||
# define KINETIS_IRQ_RTC1 (63) /* Vector 63: RTC seconds interrupt */
|
||||
# define KINETIS_IRQ_PITCH0 (64) /* Vector 64: PIT channel 0 */
|
||||
# define KINETIS_IRQ_PITCH1 (65) /* Vector 65: PIT channel 1 */
|
||||
# define KINETIS_IRQ_PITCH2 (66) /* Vector 66: PIT channel 2 */
|
||||
# define KINETIS_IRQ_PITCH3 (67) /* Vector 67: PIT channel 3 */
|
||||
# define KINETIS_IRQ_PDB (68) /* Vector 68: PDB */
|
||||
# define KINETIS_IRQ_USBOTG (69) /* Vector 68: USB OTG */
|
||||
# define KINETIS_IRQ_USBCD (70) /* Vector 70: USB charger detect */
|
||||
/* Vector 71: Reserved */
|
||||
# define KINETIS_IRQ_DAC0 (72) /* Vector 72: DAC0 */
|
||||
# define KINETIS_IRQ_MCG (73) /* Vector 73: MCG */
|
||||
# define KINETIS_IRQ_LPT (74) /* Vector 74: Low power timer */
|
||||
# define KINETIS_IRQ_PORTA (75) /* Vector 75: Pin detect port A */
|
||||
# define KINETIS_IRQ_PORTB (76) /* Vector 76: Pin detect port B */
|
||||
# define KINETIS_IRQ_PORTC (77) /* Vector 77: Pin detect port C */
|
||||
# define KINETIS_IRQ_PORTD (78) /* Vector 78: Pin detect port D */
|
||||
# define KINETIS_IRQ_PORTE (79) /* Vector 79: Pin detect port E */
|
||||
# define KINETIS_IRQ_SOFTWARE (80) /* Vector 80: Software interrupt */
|
||||
# define KINETIS_IRQ_SPI2 (81) /* Vector 81: SPI2 all sources */
|
||||
# define KINETIS_IRQ_UART4S (82) /* Vector 82: UART4 status */
|
||||
# define KINETIS_IRQ_UART4E (83) /* Vector 83: UART4 error */
|
||||
# define KINETIS_IRQ_UART5S (84) /* Vector 84: UART5 status */
|
||||
# define KINETIS_IRQ_UART5E (85) /* Vector 85: UART5 error */
|
||||
# define KINETIS_IRQ_CMP2 (86) /* Vector 86: CMP2 */
|
||||
# define KINETIS_IRQ_FTM3 (87) /* Vector 87: FTM3 all sources */
|
||||
# define KINETIS_IRQ_DAC1 (88) /* Vector 88: DAC1 */
|
||||
# define KINETIS_IRQ_ADC1 (89) /* Vector 89: ADC1 */
|
||||
# define KINETIS_IRQ_I2C2 (90) /* Vector 90: I2C2 */
|
||||
# define KINETIS_IRQ_CAN0MB (91) /* Vector 91: CAN0 OR'ed Message buffer (0-15) */
|
||||
# define KINETIS_IRQ_CAN0BO (92) /* Vector 92: CAN0 Bus Off */
|
||||
# define KINETIS_IRQ_CAN0ERR (93) /* Vector 93: CAN0 Error */
|
||||
# define KINETIS_IRQ_CAN0TW (94) /* Vector 94: CAN0 Transmit Warning */
|
||||
# define KINETIS_IRQ_CAN0RW (95) /* Vector 95: CAN0 Receive Warning */
|
||||
# define KINETIS_IRQ_CAN0WU (96) /* Vector 96: CAN0 Wake UP */
|
||||
# define KINETIS_IRQ_SDHC (97) /* Vector 97: SDHC */
|
||||
# define KINETIS_IRQ_EMACTMR (98) /* Vector 91: Ethernet MAC IEEE 1588 timer interrupt */
|
||||
# define KINETIS_IRQ_EMACTX (99) /* Vector 92: Ethernet MAC transmit interrupt */
|
||||
# define KINETIS_IRQ_EMACRX (100) /* Vector 93: Ethernet MAC receive interrupt */
|
||||
# define KINETIS_IRQ_EMACMISC (101) /* Vector 94: Ethernet MAC error and misc interrupt */
|
||||
|
||||
# define NR_VECTORS (102) /* 102 vectors */
|
||||
# define NR_IRQS (102) /* 85 interrupts but 102 IRQ numbers */
|
||||
|
||||
#else
|
||||
/* The interrupt vectors for other parts are defined in other documents and may or
|
||||
* may not be the same as above (the family members are all very similar) This
|
||||
|
||||
@@ -84,7 +84,13 @@ static size_t do_stackcheck(uintptr_t alloc, size_t size)
|
||||
FAR uint32_t *ptr;
|
||||
size_t mark;
|
||||
|
||||
if (size == 0)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* Get aligned addresses of the top and bottom of the stack */
|
||||
|
||||
#ifdef CONFIG_TLS
|
||||
/* Skip over the TLS data structure at the bottom of the stack */
|
||||
|
||||
@@ -122,7 +128,8 @@ static size_t do_stackcheck(uintptr_t alloc, size_t size)
|
||||
#if 0
|
||||
if (mark + 16 > nwords)
|
||||
{
|
||||
int i, j;
|
||||
int i;
|
||||
int j;
|
||||
|
||||
ptr = (FAR uint32_t *)start;
|
||||
for (i = 0; i < size; i += 4*64)
|
||||
|
||||
@@ -251,61 +251,25 @@ static inline void efm32_prioritize_syscall(int priority)
|
||||
static int efm32_irqinfo(int irq, uintptr_t *regaddr, uint32_t *bit,
|
||||
uintptr_t offset)
|
||||
{
|
||||
int n;
|
||||
|
||||
DEBUGASSERT(irq >= EFM32_IRQ_NMI && irq < NR_IRQS);
|
||||
|
||||
/* Check for external interrupt or (a second level GPIO interrupt) */
|
||||
/* Check for external interrupt or a second level GPIO interrupt */
|
||||
|
||||
if (irq >= EFM32_IRQ_INTERRUPTS)
|
||||
{
|
||||
/* Is this an external interrupt? */
|
||||
|
||||
if (irq < NR_VECTORS)
|
||||
{
|
||||
/* Yes.. We have support implemented for vectors 0-95 */
|
||||
n = irq - EFM32_IRQ_INTERRUPTS;
|
||||
*regaddr = NVIC_IRQ_ENABLE(n) + offset;
|
||||
|
||||
DEBUGASSERT(irq < (EFM32_IRQ_INTERRUPTS + 96));
|
||||
|
||||
#if NR_VECTORS >= (EFM32_IRQ_INTERRUPTS + 32)
|
||||
/* Check for vectors 0-31 */
|
||||
|
||||
if (irq < EFM32_IRQ_INTERRUPTS + 32)
|
||||
#endif
|
||||
while (n >= 32)
|
||||
{
|
||||
*regaddr = (NVIC_IRQ0_31_ENABLE + offset);
|
||||
*bit = 1 << (irq - EFM32_IRQ_INTERRUPTS);
|
||||
n -= 32;
|
||||
}
|
||||
#if NR_VECTORS >= (EFM32_IRQ_INTERRUPTS + 32)
|
||||
/* Yes.. Check for vectors 32-63 */
|
||||
|
||||
else
|
||||
#if NR_VECTORS >= (EFM32_IRQ_INTERRUPTS + 64)
|
||||
if (irq < EFM32_IRQ_INTERRUPTS + 64)
|
||||
#endif
|
||||
{
|
||||
*regaddr = (NVIC_IRQ32_63_ENABLE + offset);
|
||||
*bit = 1 << (irq - EFM32_IRQ_INTERRUPTS - 32);
|
||||
}
|
||||
#if NR_VECTORS >= (EFM32_IRQ_INTERRUPTS + 64)
|
||||
/* Yes.. Check for vectors 64-95 */
|
||||
|
||||
else
|
||||
#if NR_VECTORS >= (EFM32_IRQ_INTERRUPTS + 96)
|
||||
/* Yes.. Check for vectors 64-95 */
|
||||
|
||||
if (irq < NR_VECTORS)
|
||||
#endif
|
||||
{
|
||||
*regaddr = (NVIC_IRQ64_95_ENABLE + offset);
|
||||
*bit = 1 << (irq - EFM32_IRQ_INTERRUPTS - 64);
|
||||
}
|
||||
#if NR_VECTORS >= (EFM32_IRQ_INTERRUPTS + 96)
|
||||
else
|
||||
{
|
||||
return -EINVAL; /* We should never get here */
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
#endif
|
||||
*bit = 1 << n;
|
||||
}
|
||||
else
|
||||
{
|
||||
@@ -356,16 +320,14 @@ void up_irqinitialize(void)
|
||||
{
|
||||
uint32_t regaddr;
|
||||
int num_priority_registers;
|
||||
int i;
|
||||
|
||||
/* Disable all interrupts */
|
||||
|
||||
putreg32(0, NVIC_IRQ0_31_ENABLE);
|
||||
#if NR_VECTORS >= (EFM32_IRQ_INTERRUPTS + 32)
|
||||
putreg32(0, NVIC_IRQ32_63_ENABLE);
|
||||
#if NR_VECTORS >= (EFM32_IRQ_INTERRUPTS + 64)
|
||||
putreg32(0, NVIC_IRQ64_95_ENABLE);
|
||||
#endif
|
||||
#endif
|
||||
for (i = 0; i < NR_VECTORS - EFM32_IRQ_INTERRUPTS; i += 32)
|
||||
{
|
||||
putreg32(0xffffffff, NVIC_IRQ_CLEAR(i));
|
||||
}
|
||||
|
||||
#if defined(CONFIG_STACK_COLORATION) && CONFIG_ARCH_INTERRUPTSTACK > 3
|
||||
/* Colorize the interrupt stack for debug purposes */
|
||||
|
||||
@@ -98,6 +98,34 @@ config ARCH_CHIP_MK60X256VMD100
|
||||
bool "MK60X256VMD100"
|
||||
select ARCH_FAMILY_K60
|
||||
|
||||
config ARCH_CHIP_MK64FN1M0VLL12
|
||||
bool "MK64FN1M0VLL12"
|
||||
select ARCH_FAMILY_K64
|
||||
|
||||
config ARCH_CHIP_MK64FX512VLL12
|
||||
bool "MK64FX512VLL12"
|
||||
select ARCH_FAMILY_K64
|
||||
|
||||
config ARCH_CHIP_MK64FX512VDC12
|
||||
bool "MK64FX512VDC12"
|
||||
select ARCH_FAMILY_K64
|
||||
|
||||
config ARCH_CHIP_MK64FN1M0VDC12
|
||||
bool "MK64FN1M0VDC12"
|
||||
select ARCH_FAMILY_K64
|
||||
|
||||
config ARCH_CHIP_MK64FX512VLQ12
|
||||
bool "MK64FX512VLQ12"
|
||||
select ARCH_FAMILY_K64
|
||||
|
||||
config ARCH_CHIP_MK64FX512VMD12
|
||||
bool "MK64FX512VMD12"
|
||||
select ARCH_FAMILY_K64
|
||||
|
||||
config ARCH_CHIP_MK64FN1M0VMD12
|
||||
bool "MK64FN1M0VMD12"
|
||||
select ARCH_FAMILY_K64
|
||||
|
||||
endchoice
|
||||
|
||||
# Chip families
|
||||
@@ -114,6 +142,10 @@ config ARCH_FAMILY_K60
|
||||
bool
|
||||
default n
|
||||
|
||||
config ARCH_FAMILY_K64
|
||||
bool
|
||||
default n
|
||||
|
||||
menu "Kinetis Peripheral Support"
|
||||
|
||||
config KINETIS_TRACE
|
||||
|
||||
@@ -47,7 +47,7 @@
|
||||
*/
|
||||
|
||||
#include <arch/kinetis/chip.h>
|
||||
#include "kinetis_memorymap.h"
|
||||
#include "chip/kinetis_memorymap.h"
|
||||
|
||||
/************************************************************************************
|
||||
* Pre-processor Definitions
|
||||
|
||||
@@ -1,7 +1,7 @@
|
||||
/********************************************************************************************
|
||||
* arch/arm/src/kinetis/kinetis_adc.h
|
||||
* arch/arm/src/kinetis/chip/kinetis_adc.h
|
||||
*
|
||||
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
|
||||
* Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
@@ -33,8 +33,8 @@
|
||||
*
|
||||
********************************************************************************************/
|
||||
|
||||
#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_ADC_H
|
||||
#define __ARCH_ARM_SRC_KINETIS_KINETIS_ADC_H
|
||||
#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_ADC_H
|
||||
#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_ADC_H
|
||||
|
||||
/********************************************************************************************
|
||||
* Included Files
|
||||
@@ -70,7 +70,9 @@
|
||||
#define KINETIS_ADC_CLP2_OFFSET 0x0044 /* ADC plus-side general calibration value register */
|
||||
#define KINETIS_ADC_CLP1_OFFSET 0x0048 /* ADC plus-side general calibration value register */
|
||||
#define KINETIS_ADC_CLP0_OFFSET 0x004c /* ADC plus-side general calibration value register */
|
||||
#define KINETIS_ADC_PGA_OFFSET 0x0050 /* ADC PGA register */
|
||||
#ifndef KINETIS_K64
|
||||
# define KINETIS_ADC_PGA_OFFSET 0x0050 /* ADC PGA register */
|
||||
#endif
|
||||
#define KINETIS_ADC_CLMD_OFFSET 0x0054 /* ADC minus-side general calibration value register */
|
||||
#define KINETIS_ADC_CLMS_OFFSET 0x0058 /* ADC minus-side general calibration value register */
|
||||
#define KINETIS_ADC_CLM4_OFFSET 0x005c /* ADC minus-side general calibration value register */
|
||||
@@ -80,7 +82,7 @@
|
||||
#define KINETIS_ADC_CLM0_OFFSET 0x006c /* ADC minus-side general calibration value register */
|
||||
|
||||
/* Register Addresses ***********************************************************************/
|
||||
# define KINETIS_ADC1_BASE 0x400bb000 /* Analog-to-digital converter (ADC) 1 */
|
||||
# define KINETIS_ADC1_BASE 0x400bb000 /* Analog-to-digital converter (ADC) 1 */
|
||||
|
||||
#define KINETIS_ADC0_SC1A (KINETIS_ADC0_BASE+KINETIS_ADC_SC1A_OFFSET)
|
||||
#define KINETIS_ADC0_SC1B (KINETIS_ADC0_BASE+KINETIS_ADC_SC1B_OFFSET)
|
||||
@@ -102,7 +104,9 @@
|
||||
#define KINETIS_ADC0_CLP2 (KINETIS_ADC0_BASE+KINETIS_ADC_CLP2_OFFSET)
|
||||
#define KINETIS_ADC0_CLP1 (KINETIS_ADC0_BASE+KINETIS_ADC_CLP1_OFFSET)
|
||||
#define KINETIS_ADC0_CLP0 (KINETIS_ADC0_BASE+KINETIS_ADC_CLP0_OFFSET)
|
||||
#define KINETIS_ADC0_PGA (KINETIS_ADC0_BASE+KINETIS_ADC_PGA_OFFSET)
|
||||
#ifndef KINETIS_K64
|
||||
# define KINETIS_ADC0_PGA (KINETIS_ADC0_BASE+KINETIS_ADC_PGA_OFFSET)
|
||||
#endif
|
||||
#define KINETIS_ADC0_CLMD (KINETIS_ADC0_BASE+KINETIS_ADC_CLMD_OFFSET)
|
||||
#define KINETIS_ADC0_CLMS (KINETIS_ADC0_BASE+KINETIS_ADC_CLMS_OFFSET)
|
||||
#define KINETIS_ADC0_CLM4 (KINETIS_ADC0_BASE+KINETIS_ADC_CLM4_OFFSET)
|
||||
@@ -131,7 +135,9 @@
|
||||
#define KINETIS_ADC1_CLP2 (KINETIS_ADC1_BASE+KINETIS_ADC_CLP2_OFFSET)
|
||||
#define KINETIS_ADC1_CLP1 (KINETIS_ADC1_BASE+KINETIS_ADC_CLP1_OFFSET)
|
||||
#define KINETIS_ADC1_CLP0 (KINETIS_ADC1_BASE+KINETIS_ADC_CLP0_OFFSET)
|
||||
#define KINETIS_ADC1_PGA (KINETIS_ADC1_BASE+KINETIS_ADC_PGA_OFFSET)
|
||||
#ifndef KINETIS_K64
|
||||
# define KINETIS_ADC1_PGA (KINETIS_ADC1_BASE+KINETIS_ADC_PGA_OFFSET)
|
||||
#endif
|
||||
#define KINETIS_ADC1_CLMD (KINETIS_ADC1_BASE+KINETIS_ADC_CLMD_OFFSET)
|
||||
#define KINETIS_ADC1_CLMS (KINETIS_ADC1_BASE+KINETIS_ADC_CLMS_OFFSET)
|
||||
#define KINETIS_ADC1_CLM4 (KINETIS_ADC1_BASE+KINETIS_ADC_CLM4_OFFSET)
|
||||
@@ -272,22 +278,26 @@
|
||||
#define ADC_CLP0_MASK (0x3f) /* Bits 0-5: Calibration value */
|
||||
|
||||
/* ADC PGA register */
|
||||
|
||||
#ifndef KINETIS_K64
|
||||
/* Bits 0-15: Reserved */
|
||||
#define ADC_PGA_PGAG_SHIFT (16) /* Bits 16-19: PGA gain setting*/
|
||||
#define ADC_PGA_PGAG_MASK (15 << ADC_PGA_PGAG_SHIFT)
|
||||
# define ADC_PGA_PGAG_1 (0 << ADC_PGA_PGAG_SHIFT)
|
||||
# define ADC_PGA_PGAG_2 (1 << ADC_PGA_PGAG_SHIFT)
|
||||
# define ADC_PGA_PGAG_4 (2 << ADC_PGA_PGAG_SHIFT)
|
||||
# define ADC_PGA_PGAG_8 (3 << ADC_PGA_PGAG_SHIFT)
|
||||
# define ADC_PGA_PGAG_16 (4 << ADC_PGA_PGAG_SHIFT)
|
||||
# define ADC_PGA_PGAG_32 (5 << ADC_PGA_PGAG_SHIFT)
|
||||
# define ADC_PGA_PGAG_64 (6 << ADC_PGA_PGAG_SHIFT)
|
||||
#ifdef KINETIS_K40
|
||||
# define ADC_PGA_PGALP (1 << 20) /* Bit 20: PGA low-power mode control */
|
||||
#endif
|
||||
# define ADC_PGA_PGAG_SHIFT (16) /* Bits 16-19: PGA gain setting*/
|
||||
# define ADC_PGA_PGAG_MASK (15 << ADC_PGA_PGAG_SHIFT)
|
||||
# define ADC_PGA_PGAG_1 (0 << ADC_PGA_PGAG_SHIFT)
|
||||
# define ADC_PGA_PGAG_2 (1 << ADC_PGA_PGAG_SHIFT)
|
||||
# define ADC_PGA_PGAG_4 (2 << ADC_PGA_PGAG_SHIFT)
|
||||
# define ADC_PGA_PGAG_8 (3 << ADC_PGA_PGAG_SHIFT)
|
||||
# define ADC_PGA_PGAG_16 (4 << ADC_PGA_PGAG_SHIFT)
|
||||
# define ADC_PGA_PGAG_32 (5 << ADC_PGA_PGAG_SHIFT)
|
||||
# define ADC_PGA_PGAG_64 (6 << ADC_PGA_PGAG_SHIFT)
|
||||
# ifdef KINETIS_K40
|
||||
# define ADC_PGA_PGALP (1 << 20) /* Bit 20: PGA low-power mode control */
|
||||
# endif
|
||||
/* Bits 21-22: Reserved */
|
||||
#define ADC_PGA_PGAEN (1 << 23) /* Bit 23: PGA enable*/
|
||||
# define ADC_PGA_PGAEN (1 << 23) /* Bit 23: PGA enable*/
|
||||
/* Bits 24-31: Reserved */
|
||||
#endif
|
||||
|
||||
/* ADC minus-side general calibration value registers */
|
||||
|
||||
#define ADC_CLMD_MASK (0x3f) /* Bits 0-5: Calibration value */
|
||||
@@ -310,4 +320,4 @@
|
||||
* Public Functions
|
||||
********************************************************************************************/
|
||||
|
||||
#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_ADC_H */
|
||||
#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_ADC_H */
|
||||
@@ -1,7 +1,7 @@
|
||||
/************************************************************************************
|
||||
* arch/arm/src/kinetis/kinetis_aips.h
|
||||
* arch/arm/src/kinetis/chip/kinetis_aips.h
|
||||
*
|
||||
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
|
||||
* Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
@@ -33,8 +33,8 @@
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_AIPS_H
|
||||
#define __ARCH_ARM_SRC_KINETIS_KINETIS_AIPS_H
|
||||
#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_AIPS_H
|
||||
#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_AIPS_H
|
||||
|
||||
/************************************************************************************
|
||||
* Included Files
|
||||
@@ -68,6 +68,9 @@
|
||||
#define KINETIS_AIPS_PACRN_OFFSET 0x0064 /* Peripheral Access Control Register */
|
||||
#define KINETIS_AIPS_PACRO_OFFSET 0x0068 /* Peripheral Access Control Register */
|
||||
#define KINETIS_AIPS_PACRP_OFFSET 0x006c /* Peripheral Access Control Register */
|
||||
#ifdef KINETIS_K64
|
||||
# define KINETIS_AIPS_PACRU_OFFSET 0x0080 /* Peripheral Access Control Register */
|
||||
#endif
|
||||
|
||||
/* Register Addresses ***************************************************************/
|
||||
|
||||
@@ -88,24 +91,30 @@
|
||||
#define KINETIS_AIPS0_PACRN (KINETIS_AIPS0_BASE+KINETIS_AIPS_PACRN_OFFSET)
|
||||
#define KINETIS_AIPS0_PACRO (KINETIS_AIPS0_BASE+KINETIS_AIPS_PACRO_OFFSET)
|
||||
#define KINETIS_AIPS0_PACRP (KINETIS_AIPS0_BASE+KINETIS_AIPS_PACRP_OFFSET)
|
||||
#ifdef KINETIS_K64
|
||||
# define KINETIS_AIPS0_PACRU (KINETIS_AIPS0_BASE+KINETIS_AIPS_PACRU_OFFSET)
|
||||
#endif
|
||||
|
||||
#define KINETIS_AIPS1_MPRA (KINETIS_AIPS0_BASE+KINETIS_AIPS_MPRA_OFFSET)
|
||||
#define KINETIS_AIPS1_PACRA (KINETIS_AIPS0_BASE+KINETIS_AIPS_PACRA_OFFSET)
|
||||
#define KINETIS_AIPS1_PACRB (KINETIS_AIPS0_BASE+KINETIS_AIPS_PACRB_OFFSET)
|
||||
#define KINETIS_AIPS1_PACRC (KINETIS_AIPS0_BASE+KINETIS_AIPS_PACRC_OFFSET)
|
||||
#define KINETIS_AIPS1_PACRD (KINETIS_AIPS0_BASE+KINETIS_AIPS_PACRD_OFFSET)
|
||||
#define KINETIS_AIPS1_PACRE (KINETIS_AIPS0_BASE+KINETIS_AIPS_PACRE_OFFSET)
|
||||
#define KINETIS_AIPS1_PACRF (KINETIS_AIPS0_BASE+KINETIS_AIPS_PACRF_OFFSET)
|
||||
#define KINETIS_AIPS1_PACRG (KINETIS_AIPS0_BASE+KINETIS_AIPS_PACRG_OFFSET)
|
||||
#define KINETIS_AIPS1_PACRH (KINETIS_AIPS0_BASE+KINETIS_AIPS_PACRH_OFFSET)
|
||||
#define KINETIS_AIPS1_PACRI (KINETIS_AIPS0_BASE+KINETIS_AIPS_PACRI_OFFSET)
|
||||
#define KINETIS_AIPS1_PACRJ (KINETIS_AIPS0_BASE+KINETIS_AIPS_PACRJ_OFFSET)
|
||||
#define KINETIS_AIPS1_PACRK (KINETIS_AIPS0_BASE+KINETIS_AIPS_PACRK_OFFSET)
|
||||
#define KINETIS_AIPS1_PACRL (KINETIS_AIPS0_BASE+KINETIS_AIPS_PACRL_OFFSET)
|
||||
#define KINETIS_AIPS1_PACRM (KINETIS_AIPS0_BASE+KINETIS_AIPS_PACRM_OFFSET)
|
||||
#define KINETIS_AIPS1_PACRN (KINETIS_AIPS0_BASE+KINETIS_AIPS_PACRN_OFFSET)
|
||||
#define KINETIS_AIPS1_PACRO (KINETIS_AIPS0_BASE+KINETIS_AIPS_PACRO_OFFSET)
|
||||
#define KINETIS_AIPS1_PACRP (KINETIS_AIPS0_BASE+KINETIS_AIPS_PACRP_OFFSET)
|
||||
#define KINETIS_AIPS1_MPRA (KINETIS_AIPS1_BASE+KINETIS_AIPS_MPRA_OFFSET)
|
||||
#define KINETIS_AIPS1_PACRA (KINETIS_AIPS1_BASE+KINETIS_AIPS_PACRA_OFFSET)
|
||||
#define KINETIS_AIPS1_PACRB (KINETIS_AIPS1_BASE+KINETIS_AIPS_PACRB_OFFSET)
|
||||
#define KINETIS_AIPS1_PACRC (KINETIS_AIPS1_BASE+KINETIS_AIPS_PACRC_OFFSET)
|
||||
#define KINETIS_AIPS1_PACRD (KINETIS_AIPS1_BASE+KINETIS_AIPS_PACRD_OFFSET)
|
||||
#define KINETIS_AIPS1_PACRE (KINETIS_AIPS1_BASE+KINETIS_AIPS_PACRE_OFFSET)
|
||||
#define KINETIS_AIPS1_PACRF (KINETIS_AIPS1_BASE+KINETIS_AIPS_PACRF_OFFSET)
|
||||
#define KINETIS_AIPS1_PACRG (KINETIS_AIPS1_BASE+KINETIS_AIPS_PACRG_OFFSET)
|
||||
#define KINETIS_AIPS1_PACRH (KINETIS_AIPS1_BASE+KINETIS_AIPS_PACRH_OFFSET)
|
||||
#define KINETIS_AIPS1_PACRI (KINETIS_AIPS1_BASE+KINETIS_AIPS_PACRI_OFFSET)
|
||||
#define KINETIS_AIPS1_PACRJ (KINETIS_AIPS1_BASE+KINETIS_AIPS_PACRJ_OFFSET)
|
||||
#define KINETIS_AIPS1_PACRK (KINETIS_AIPS1_BASE+KINETIS_AIPS_PACRK_OFFSET)
|
||||
#define KINETIS_AIPS1_PACRL (KINETIS_AIPS1_BASE+KINETIS_AIPS_PACRL_OFFSET)
|
||||
#define KINETIS_AIPS1_PACRM (KINETIS_AIPS1_BASE+KINETIS_AIPS_PACRM_OFFSET)
|
||||
#define KINETIS_AIPS1_PACRN (KINETIS_AIPS1_BASE+KINETIS_AIPS_PACRN_OFFSET)
|
||||
#define KINETIS_AIPS1_PACRO (KINETIS_AIPS1_BASE+KINETIS_AIPS_PACRO_OFFSET)
|
||||
#define KINETIS_AIPS1_PACRP (KINETIS_AIPS1_BASE+KINETIS_AIPS_PACRP_OFFSET)
|
||||
#ifdef KINETIS_K64
|
||||
# define KINETIS_AIPS1_PACRU (KINETIS_AIPS1_BASE+KINETIS_AIPS_PACRU_OFFSET)
|
||||
#endif
|
||||
|
||||
/* Register Bit Definitions *********************************************************/
|
||||
|
||||
@@ -205,4 +214,4 @@
|
||||
* Public Functions
|
||||
************************************************************************************/
|
||||
|
||||
#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_AIPS_H */
|
||||
#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_AIPS_H */
|
||||
@@ -1,7 +1,7 @@
|
||||
/************************************************************************************
|
||||
* arch/arm/src/kinetis/kinetis_axbs.h
|
||||
* arch/arm/src/kinetis/chip/kinetis_axbs.h
|
||||
*
|
||||
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
|
||||
* Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
@@ -33,8 +33,8 @@
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_AXBS_H
|
||||
#define __ARCH_ARM_SRC_KINETIS_KINETIS_AXBS_H
|
||||
#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_AXBS_H
|
||||
#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_AXBS_H
|
||||
|
||||
/************************************************************************************
|
||||
* Included Files
|
||||
@@ -248,4 +248,4 @@
|
||||
* Public Functions
|
||||
************************************************************************************/
|
||||
|
||||
#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_AXBS_H */
|
||||
#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_AXBS_H */
|
||||
@@ -1,7 +1,7 @@
|
||||
/********************************************************************************************
|
||||
* arch/arm/src/kinetis/kinetis_cmp.h
|
||||
* arch/arm/src/kinetis/chip/kinetis_cmp.h
|
||||
*
|
||||
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
|
||||
* Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
@@ -33,8 +33,8 @@
|
||||
*
|
||||
********************************************************************************************/
|
||||
|
||||
#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_CMP_H
|
||||
#define __ARCH_ARM_SRC_KINETIS_KINETIS_CMP_H
|
||||
#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_CMP_H
|
||||
#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_CMP_H
|
||||
|
||||
/********************************************************************************************
|
||||
* Included Files
|
||||
@@ -172,7 +172,9 @@
|
||||
# define CMP_MUXCR_PSEL_IN5 (5 << CMP_MUXCR_PSEL_SHIFT)
|
||||
# define CMP_MUXCR_PSEL_IN6 (6 << CMP_MUXCR_PSEL_SHIFT)
|
||||
# define CMP_MUXCR_PSEL_IN7 (7 << CMP_MUXCR_PSEL_SHIFT)
|
||||
#define CMP_MUXCR_MEN (1 << 6) /* Bit 6: MMUX Enable */
|
||||
#ifndef KINETIS_K64
|
||||
# define CMP_MUXCR_MEN (1 << 6) /* Bit 6: MMUX Enable */
|
||||
#endif
|
||||
#define CMP_MUXCR_PEN (1 << 7) /* Bit 7: PMUX Enable */
|
||||
|
||||
/********************************************************************************************
|
||||
@@ -187,4 +189,4 @@
|
||||
* Public Functions
|
||||
********************************************************************************************/
|
||||
|
||||
#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_CMP_H */
|
||||
#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_CMP_H */
|
||||
@@ -1,7 +1,7 @@
|
||||
/************************************************************************************
|
||||
* arch/arm/src/kinetis/kinetis_cmt.h
|
||||
* arch/arm/src/kinetis/chip/kinetis_cmt.h
|
||||
*
|
||||
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
|
||||
* Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
@@ -33,8 +33,8 @@
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_CMT_H
|
||||
#define __ARCH_ARM_SRC_KINETIS_KINETIS_CMT_H
|
||||
#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_CMT_H
|
||||
#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_CMT_H
|
||||
|
||||
/************************************************************************************
|
||||
* Included Files
|
||||
@@ -135,4 +135,4 @@
|
||||
* Public Functions
|
||||
************************************************************************************/
|
||||
|
||||
#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_CMT_H */
|
||||
#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_CMT_H */
|
||||
@@ -1,7 +1,7 @@
|
||||
/************************************************************************************
|
||||
* arch/arm/src/kinetis/kinetis_crc.h
|
||||
* arch/arm/src/kinetis/chip/kinetis_crc.h
|
||||
*
|
||||
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
|
||||
* Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
@@ -33,8 +33,8 @@
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_CRC_H
|
||||
#define __ARCH_ARM_SRC_KINETIS_KINETIS_CRC_H
|
||||
#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_CRC_H
|
||||
#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_CRC_H
|
||||
|
||||
/************************************************************************************
|
||||
* Included Files
|
||||
@@ -52,13 +52,13 @@
|
||||
|
||||
/* Register Offsets *****************************************************************/
|
||||
|
||||
#define KINETIS_CRC_CRC_OFFSET 0x0000 /* CRC Data Register */
|
||||
#define KINETIS_CRC_DATA_OFFSET 0x0000 /* CRC Data Register */
|
||||
#define KINETIS_CRC_GPOLY_OFFSET 0x0004 /* CRC Polynomial Register */
|
||||
#define KINETIS_CRC_CTRL_OFFSET 0x0008 /* CRC Control Register */
|
||||
|
||||
/* Register Addresses ***************************************************************/
|
||||
|
||||
#define KINETIS_CRC_CRC (KINETIS_CRC_BASE+KINETIS_CRC_CRC_OFFSET)
|
||||
#define KINETIS_CRC_DATA (KINETIS_CRC_BASE+KINETIS_CRC_DATA_OFFSET)
|
||||
#define KINETIS_CRC_GPOLY (KINETIS_CRC_BASE+KINETIS_CRC_GPOLY_OFFSET)
|
||||
#define KINETIS_CRC_CTRL (KINETIS_CRC_BASE+KINETIS_CRC_CTRL_OFFSET)
|
||||
|
||||
@@ -66,14 +66,14 @@
|
||||
|
||||
/* CRC Data Register (32-bit) */
|
||||
|
||||
#define CRC_CRC_LL_SHIFT (0) /* Bits 0-7: CRC Low Lower Byte */
|
||||
#define CRC_CRC_LL_MASK (0xff << CRC_CRC_LL_SHIFT)
|
||||
#define CRC_CRC_LU_SHIFT (8) /* Bits 8-15: CRC Low Upper Byte */
|
||||
#define CRC_CRC_LU_MASK (0xff << CRC_CRC_LU_SHIFT)
|
||||
#define CRC_CRC_HL_SHIFT (16) /* Bits 16-23: CRC High Lower Byte */
|
||||
#define CRC_CRC_HL_MASK (0xff << CRC_CRC_HL_SHIFT)
|
||||
#define CRC_CRC_HU_SHIFT (24) /* Bits 24-31: CRC High Upper Byte */
|
||||
#define CRC_CRC_HU_MASK (0xff << CRC_CRC_HU_SHIFT)
|
||||
#define CRC_DATA_LL_SHIFT (0) /* Bits 0-7: CRC Low Lower Byte */
|
||||
#define CRC_DATA_LL_MASK (0xff << CRC_DATA_LL_SHIFT)
|
||||
#define CRC_DATA_LU_SHIFT (8) /* Bits 8-15: CRC Low Upper Byte */
|
||||
#define CRC_DATA_LU_MASK (0xff << CRC_DATA_LU_SHIFT)
|
||||
#define CRC_DATA_HL_SHIFT (16) /* Bits 16-23: CRC High Lower Byte */
|
||||
#define CRC_DATA_HL_MASK (0xff << CRC_DATA_HL_SHIFT)
|
||||
#define CRC_DATA_HU_SHIFT (24) /* Bits 24-31: CRC High Upper Byte */
|
||||
#define CRC_DATA_HU_MASK (0xff << CRC_DATA_HU_SHIFT)
|
||||
|
||||
/* CRC Polynomial Register */
|
||||
|
||||
@@ -114,4 +114,4 @@
|
||||
************************************************************************************/
|
||||
|
||||
#endif /* KINETIS_NCRC && KINETIS_NCRC > 0 */
|
||||
#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_CRC_H */
|
||||
#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_CRC_H */
|
||||
@@ -1,7 +1,7 @@
|
||||
/********************************************************************************************
|
||||
* arch/arm/src/kinetis/kinetis_dac.h
|
||||
* arch/arm/src/kinetis/chip/kinetis_dac.h
|
||||
*
|
||||
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
|
||||
* Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
@@ -33,8 +33,8 @@
|
||||
*
|
||||
********************************************************************************************/
|
||||
|
||||
#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_DACE_H
|
||||
#define __ARCH_ARM_SRC_KINETIS_KINETIS_DACE_H
|
||||
#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_DAC_H
|
||||
#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_DAC_H
|
||||
|
||||
/********************************************************************************************
|
||||
* Included Files
|
||||
@@ -232,4 +232,4 @@
|
||||
* Public Functions
|
||||
********************************************************************************************/
|
||||
|
||||
#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_DACE_H */
|
||||
#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_DAC_H */
|
||||
@@ -1,7 +1,7 @@
|
||||
/****************************************************************************************************
|
||||
* arch/arm/src/kinetis/kinetis_dma.h
|
||||
* arch/arm/src/kinetis/chip/kinetis_dma.h
|
||||
*
|
||||
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
|
||||
* Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
@@ -33,8 +33,8 @@
|
||||
*
|
||||
****************************************************************************************************/
|
||||
|
||||
#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_DMA_H
|
||||
#define __ARCH_ARM_SRC_KINETIS_KINETIS_DMA_H
|
||||
#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_DMA_H
|
||||
#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_DMA_H
|
||||
|
||||
/****************************************************************************************************
|
||||
* Included Files
|
||||
@@ -83,18 +83,20 @@
|
||||
#define KINETIS_DMA_DCHPRI13_OFFSET 0x010e /* Channel 13 Priority Register */
|
||||
#define KINETIS_DMA_DCHPRI12_OFFSET 0x010f /* Channel 12 Priority Register */
|
||||
|
||||
#define KINETIS_DMA_TCD_OFFSET(n) (0x0000+((n) << 5))
|
||||
#define KINETIS_DMA_TCD_SADDR_OFFSET 0x0000 /* TCD Source Address */
|
||||
#define KINETIS_DMA_TCD_SOFF_OFFSET 0x0004 /* TCD Signed Source Address Offset */
|
||||
#define KINETIS_DMA_TCD_ATTR_OFFSET 0x0006 /* TCD Transfer Attributes */
|
||||
#define KINETIS_DMA_TCD_NBYTES_OFFSET 0x0008 /* TCD Minor Byte Count */
|
||||
#define KINETIS_DMA_TCD_SLAST_OFFSET 0x000c /* TCD Last Source Address Adjustment */
|
||||
#define KINETIS_DMA_TCD_DADDR_OFFSET 0x0010 /* TCD Destination Address */
|
||||
#define KINETIS_DMA_TCD_DOFF_OFFSET 0x0014 /* TCD Signed Destination Address Offset */
|
||||
#define KINETIS_DMA_TCD_CITER_OFFSET 0x0016 /* TCD Current Minor Loop Link, Major Loop Count */
|
||||
#define KINETIS_DMA_TCD_DLASTSGA_OFFSET 0x0018 /* TCD Last Destination Address Adjustment/Scatter Gather Address */
|
||||
#define KINETIS_DMA_TCD_CSR_OFFSET 0x001c /* TCD Control and Status */
|
||||
#define KINETIS_DMA_TCD_BITER_OFFSET 0x001e /* TCD Beginning Minor Loop Link, Major Loop Count */
|
||||
#ifndef KINETIS_K64
|
||||
# define KINETIS_DMA_TCD_OFFSET(n) (0x0000+((n) << 5))
|
||||
# define KINETIS_DMA_TCD_SADDR_OFFSET 0x0000 /* TCD Source Address */
|
||||
# define KINETIS_DMA_TCD_SOFF_OFFSET 0x0004 /* TCD Signed Source Address Offset */
|
||||
# define KINETIS_DMA_TCD_ATTR_OFFSET 0x0006 /* TCD Transfer Attributes */
|
||||
# define KINETIS_DMA_TCD_NBYTES_OFFSET 0x0008 /* TCD Minor Byte Count */
|
||||
# define KINETIS_DMA_TCD_SLAST_OFFSET 0x000c /* TCD Last Source Address Adjustment */
|
||||
# define KINETIS_DMA_TCD_DADDR_OFFSET 0x0010 /* TCD Destination Address */
|
||||
# define KINETIS_DMA_TCD_DOFF_OFFSET 0x0014 /* TCD Signed Destination Address Offset */
|
||||
# define KINETIS_DMA_TCD_CITER_OFFSET 0x0016 /* TCD Current Minor Loop Link, Major Loop Count */
|
||||
# define KINETIS_DMA_TCD_DLASTSGA_OFFSET 0x0018 /* TCD Last Destination Address Adjustment/Scatter Gather Address */
|
||||
# define KINETIS_DMA_TCD_CSR_OFFSET 0x001c /* TCD Control and Status */
|
||||
# define KINETIS_DMA_TCD_BITER_OFFSET 0x001e /* TCD Beginning Minor Loop Link, Major Loop Count */
|
||||
#endif
|
||||
|
||||
#define KINETIS_DMA_TCD0_SADDR_OFFSET 0x0000 /* TCD Source Address */
|
||||
#define KINETIS_DMA_TCD0_SOFF_OFFSET 0x0004 /* TCD Signed Source Address Offset */
|
||||
@@ -323,19 +325,21 @@
|
||||
#define KINETIS_DMA_DCHPRI13 (KINETIS_DMAC_BASE+KINETIS_DMA_DCHPRI13_OFFSET)
|
||||
#define KINETIS_DMA_DCHPRI12 (KINETIS_DMAC_BASE+KINETIS_DMA_DCHPRI12_OFFSET)
|
||||
|
||||
#define KINETIS_DMA_TCD_BASE(n) (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD_OFFSET(n))
|
||||
#ifndef KINETIS_K64
|
||||
# define KINETIS_DMA_TCD_BASE(n) (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD_OFFSET(n))
|
||||
|
||||
#define KINETIS_DMA_TCD_SADDR(n) (KINETIS_DMA_TCD_BASE(n)+KINETIS_DMA_TCD_SADDR_OFFSET)
|
||||
#define KINETIS_DMA_TCD_SOFF(n) (KINETIS_DMA_TCD_BASE(n)+KINETIS_DMA_TCD_SOFF_OFFSET)
|
||||
#define KINETIS_DMA_TCD_ATTR(n) (KINETIS_DMA_TCD_BASE(n)+KINETIS_DMA_TCD_ATTR_OFFSET)
|
||||
#define KINETIS_DMA_TCD_NBYTES(n) (KINETIS_DMA_TCD_BASE(n)+KINETIS_DMA_TCD_NBYTES_OFFSET)
|
||||
#define KINETIS_DMA_TCD_SLAST(n) (KINETIS_DMA_TCD_BASE(n)+KINETIS_DMA_TCD_SLAST_OFFSET)
|
||||
#define KINETIS_DMA_TCD_DADDR(n) (KINETIS_DMA_TCD_BASE(n)+KINETIS_DMA_TCD_DADDR_OFFSET)
|
||||
#define KINETIS_DMA_TCD_DOFF(n) (KINETIS_DMA_TCD_BASE(n)+KINETIS_DMA_TCD_DOFF_OFFSET)
|
||||
#define KINETIS_DMA_TCD_CITER(n) (KINETIS_DMA_TCD_BASE(n)+KINETIS_DMA_TCD_CITER_OFFSET)
|
||||
#define KINETIS_DMA_TCD_DLASTSGA(n) (KINETIS_DMA_TCD_BASE(n)+KINETIS_DMA_TCD_DLASTSGA_OFFSET)
|
||||
#define KINETIS_DMA_TCD_CSR(n) (KINETIS_DMA_TCD_BASE(n)+KINETIS_DMA_TCD_CSR_OFFSET)
|
||||
#define KINETIS_DMA_TCD_BITER(n) (KINETIS_DMA_TCD_BASE(n)+KINETIS_DMA_TCD_BITER_OFFSET)
|
||||
# define KINETIS_DMA_TCD_SADDR(n) (KINETIS_DMA_TCD_BASE(n)+KINETIS_DMA_TCD_SADDR_OFFSET)
|
||||
# define KINETIS_DMA_TCD_SOFF(n) (KINETIS_DMA_TCD_BASE(n)+KINETIS_DMA_TCD_SOFF_OFFSET)
|
||||
# define KINETIS_DMA_TCD_ATTR(n) (KINETIS_DMA_TCD_BASE(n)+KINETIS_DMA_TCD_ATTR_OFFSET)
|
||||
# define KINETIS_DMA_TCD_NBYTES(n) (KINETIS_DMA_TCD_BASE(n)+KINETIS_DMA_TCD_NBYTES_OFFSET)
|
||||
# define KINETIS_DMA_TCD_SLAST(n) (KINETIS_DMA_TCD_BASE(n)+KINETIS_DMA_TCD_SLAST_OFFSET)
|
||||
# define KINETIS_DMA_TCD_DADDR(n) (KINETIS_DMA_TCD_BASE(n)+KINETIS_DMA_TCD_DADDR_OFFSET)
|
||||
# define KINETIS_DMA_TCD_DOFF(n) (KINETIS_DMA_TCD_BASE(n)+KINETIS_DMA_TCD_DOFF_OFFSET)
|
||||
# define KINETIS_DMA_TCD_CITER(n) (KINETIS_DMA_TCD_BASE(n)+KINETIS_DMA_TCD_CITER_OFFSET)
|
||||
# define KINETIS_DMA_TCD_DLASTSGA(n) (KINETIS_DMA_TCD_BASE(n)+KINETIS_DMA_TCD_DLASTSGA_OFFSET)
|
||||
# define KINETIS_DMA_TCD_CSR(n) (KINETIS_DMA_TCD_BASE(n)+KINETIS_DMA_TCD_CSR_OFFSET)
|
||||
# define KINETIS_DMA_TCD_BITER(n) (KINETIS_DMA_TCD_BASE(n)+KINETIS_DMA_TCD_BITER_OFFSET)
|
||||
#endif
|
||||
|
||||
#define KINETIS_DMA_TCD0_SADDR (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD0_SADDR_OFFSET)
|
||||
#define KINETIS_DMA_TCD0_SOFF (KINETIS_DMADESC_BASE+KINETIS_DMA_TCD0_SOFF_OFFSET)
|
||||
@@ -772,4 +776,4 @@
|
||||
* Public Functions
|
||||
****************************************************************************************************/
|
||||
|
||||
#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_DMA_H */
|
||||
#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_DMA_H */
|
||||
@@ -1,7 +1,7 @@
|
||||
/********************************************************************************************
|
||||
* arch/arm/src/kinetis/kinetis_dmamux.h
|
||||
* arch/arm/src/kinetis/chip/kinetis_dmamux.h
|
||||
*
|
||||
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
|
||||
* Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
@@ -33,8 +33,8 @@
|
||||
*
|
||||
********************************************************************************************/
|
||||
|
||||
#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_DMAMUX_H
|
||||
#define __ARCH_ARM_SRC_KINETIS_KINETIS_DMAMUX_H
|
||||
#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_DMAMUX_H
|
||||
#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_DMAMUX_H
|
||||
|
||||
/********************************************************************************************
|
||||
* Included Files
|
||||
@@ -108,4 +108,4 @@
|
||||
* Public Functions
|
||||
********************************************************************************************/
|
||||
|
||||
#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_DMAMUX_H */
|
||||
#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_DMAMUX_H */
|
||||
@@ -1,7 +1,7 @@
|
||||
/********************************************************************************************
|
||||
* arch/arm/src/kinetis/kinetis_dspi.h
|
||||
* arch/arm/src/kinetis/chip/kinetis_dspi.h
|
||||
*
|
||||
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
|
||||
* Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
@@ -33,8 +33,8 @@
|
||||
*
|
||||
********************************************************************************************/
|
||||
|
||||
#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_DSPI_H
|
||||
#define __ARCH_ARM_SRC_KINETIS_KINETIS_DSPI_H
|
||||
#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_DSPI_H
|
||||
#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_DSPI_H
|
||||
|
||||
/********************************************************************************************
|
||||
* Included Files
|
||||
@@ -318,4 +318,4 @@
|
||||
* Public Functions
|
||||
********************************************************************************************/
|
||||
|
||||
#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_DSPI_H */
|
||||
#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_DSPI_H */
|
||||
@@ -1,7 +1,7 @@
|
||||
/********************************************************************************************
|
||||
* arch/arm/src/kinetis/kinetis_enet.h
|
||||
* arch/arm/src/kinetis/chip/kinetis_enet.h
|
||||
*
|
||||
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
|
||||
* Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
@@ -33,8 +33,8 @@
|
||||
*
|
||||
********************************************************************************************/
|
||||
|
||||
#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_ENET_H
|
||||
#define __ARCH_ARM_SRC_KINETIS_KINETIS_ENET_H
|
||||
#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_ENET_H
|
||||
#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_ENET_H
|
||||
|
||||
/********************************************************************************************
|
||||
* Included Files
|
||||
@@ -649,4 +649,4 @@ struct enet_desc_s
|
||||
********************************************************************************************/
|
||||
|
||||
#endif /* KINETIS_NENET && KINETIS_NENET > 0 */
|
||||
#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_ENET_H */
|
||||
#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_ENET_H */
|
||||
@@ -1,7 +1,7 @@
|
||||
/************************************************************************************
|
||||
* arch/arm/src/kinetis/kinetis_ewm.h
|
||||
* arch/arm/src/kinetis/chip/kinetis_ewm.h
|
||||
*
|
||||
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
|
||||
* Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
@@ -33,8 +33,8 @@
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_EWM_H
|
||||
#define __ARCH_ARM_SRC_KINETIS_KINETIS_EWM_H
|
||||
#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_EWM_H
|
||||
#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_EWM_H
|
||||
|
||||
/************************************************************************************
|
||||
* Included Files
|
||||
@@ -87,4 +87,4 @@
|
||||
* Public Functions
|
||||
************************************************************************************/
|
||||
|
||||
#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_EWM_H */
|
||||
#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_EWM_H */
|
||||
+5
-5
@@ -1,7 +1,7 @@
|
||||
/************************************************************************************
|
||||
* arch/arm/src/kinetis/kinetis_flexbus.h
|
||||
* arch/arm/src/kinetis/chip/kinetis_flexbus.h
|
||||
*
|
||||
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
|
||||
* Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
@@ -33,8 +33,8 @@
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_FLEXBUS_H
|
||||
#define __ARCH_ARM_SRC_KINETIS_KINETIS_FLEXBUS_H
|
||||
#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_FLEXBUS_H
|
||||
#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_FLEXBUS_H
|
||||
|
||||
/************************************************************************************
|
||||
* Included Files
|
||||
@@ -210,4 +210,4 @@
|
||||
* Public Functions
|
||||
************************************************************************************/
|
||||
|
||||
#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_FLEXBUS_H */
|
||||
#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_FLEXBUS_H */
|
||||
+5
-5
@@ -1,7 +1,7 @@
|
||||
/****************************************************************************************************
|
||||
* arch/arm/src/kinetis/kinetis_flexcan.h
|
||||
* arch/arm/src/kinetis/chip/kinetis_flexcan.h
|
||||
*
|
||||
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
|
||||
* Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
@@ -33,8 +33,8 @@
|
||||
*
|
||||
****************************************************************************************************/
|
||||
|
||||
#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_FLEXCAN_H
|
||||
#define __ARCH_ARM_SRC_KINETIS_KINETIS_FLEXCAN_H
|
||||
#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_FLEXCAN_H
|
||||
#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_FLEXCAN_H
|
||||
|
||||
/****************************************************************************************************
|
||||
* Included Files
|
||||
@@ -315,4 +315,4 @@
|
||||
* Public Functions
|
||||
****************************************************************************************************/
|
||||
|
||||
#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_FLEXCAN_H */
|
||||
#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_FLEXCAN_H */
|
||||
@@ -0,0 +1,75 @@
|
||||
/********************************************************************************************
|
||||
* arch/arm/src/kinetis/chip/kinetis_fmc.h
|
||||
*
|
||||
* Copyright (C) 2016 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
********************************************************************************************/
|
||||
|
||||
#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_FMC_H
|
||||
#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_FMC_H
|
||||
|
||||
/********************************************************************************************
|
||||
* Included Files
|
||||
********************************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include "chip.h"
|
||||
|
||||
/* This file is just a wrapper around pin muxing header files for the Kinetis family selected
|
||||
* by the logic in chip.h.
|
||||
*/
|
||||
|
||||
#if defined(KINETIS_K20) || defined(KINETIS_K40) || defined(KINETIS_K60)
|
||||
# include "chip/kinetis_k20k40k60fmc.h"
|
||||
#elif defined(KINETIS_K64)
|
||||
# include "chip/kinetis_k64fmc.h"
|
||||
#else
|
||||
# error "No FMC definitions for this Kinetis part"
|
||||
#endif
|
||||
|
||||
/********************************************************************************************
|
||||
* Pre-processor Definitions
|
||||
********************************************************************************************/
|
||||
|
||||
/********************************************************************************************
|
||||
* Public Types
|
||||
********************************************************************************************/
|
||||
|
||||
/********************************************************************************************
|
||||
* Public Data
|
||||
********************************************************************************************/
|
||||
|
||||
/********************************************************************************************
|
||||
* Public Functions
|
||||
********************************************************************************************/
|
||||
|
||||
#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_FMC_H */
|
||||
@@ -0,0 +1,159 @@
|
||||
/************************************************************************************
|
||||
* arch/arm/src/kinetis/chip/kinetis_ftfe.h
|
||||
*
|
||||
* Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_FTFE_H
|
||||
#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_FTFE_H
|
||||
|
||||
/************************************************************************************
|
||||
* Included Files
|
||||
************************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include "chip.h"
|
||||
|
||||
/************************************************************************************
|
||||
* Pre-processor Definitions
|
||||
************************************************************************************/
|
||||
|
||||
/* Register Offsets *****************************************************************/
|
||||
|
||||
#define KINETIS_FTFE_FSTAT_OFFSET 0x0000 /* Flash Status Register */
|
||||
#define KINETIS_FTFE_FCNFG_OFFSET 0x0001 /* Flash Configuration Register */
|
||||
#define KINETIS_FTFE_FSEC_OFFSET 0x0002 /* Flash Security Register */
|
||||
#define KINETIS_FTFE_FOPT_OFFSET 0x0003 /* Flash Option Register */
|
||||
|
||||
#define KINETIS_FTFE_FCCOB3_OFFSET 0x0004 /* Flash Common Command Object Registers */
|
||||
#define KINETIS_FTFE_FCCOB2_OFFSET 0x0005 /* Flash Common Command Object Registers */
|
||||
#define KINETIS_FTFE_FCCOB1_OFFSET 0x0006 /* Flash Common Command Object Registers */
|
||||
#define KINETIS_FTFE_FCCOB0_OFFSET 0x0007 /* Flash Common Command Object Registers */
|
||||
#define KINETIS_FTFE_FCCOB7_OFFSET 0x0008 /* Flash Common Command Object Registers */
|
||||
#define KINETIS_FTFE_FCCOB6_OFFSET 0x0009 /* Flash Common Command Object Registers */
|
||||
#define KINETIS_FTFE_FCCOB5_OFFSET 0x000a /* Flash Common Command Object Registers */
|
||||
#define KINETIS_FTFE_FCCOB4_OFFSET 0x000b /* Flash Common Command Object Registers */
|
||||
#define KINETIS_FTFE_FCCOBB_OFFSET 0x000c /* Flash Common Command Object Registers */
|
||||
#define KINETIS_FTFE_FCCOBA_OFFSET 0x000d /* Flash Common Command Object Registers */
|
||||
#define KINETIS_FTFE_FCCOB9_OFFSET 0x000e /* Flash Common Command Object Registers */
|
||||
#define KINETIS_FTFE_FCCOB8_OFFSET 0x000f /* Flash Common Command Object Registers */
|
||||
#define KINETIS_FTFE_FPROT3_OFFSET 0x0010 /* Program Flash Protection Registers */
|
||||
#define KINETIS_FTFE_FPROT2_OFFSET 0x0011 /* Program Flash Protection Registers */
|
||||
#define KINETIS_FTFE_FPROT1_OFFSET 0x0012 /* Program Flash Protection Registers */
|
||||
#define KINETIS_FTFE_FPROT0_OFFSET 0x0013 /* Program Flash Protection Registers */
|
||||
#define KINETIS_FTFE_FEPROT_OFFSET 0x0016 /* EEPROM Protection Register */
|
||||
#define KINETIS_FTFE_FDPROT_OFFSET 0x0017 /* Data Flash Protection Register */
|
||||
|
||||
/* Register Addresses ***************************************************************/
|
||||
|
||||
#define KINETIS_FTFE_FSTAT (KINETIS_FTFE_BASE+KINETIS_FTFE_FSTAT_OFFSET)
|
||||
#define KINETIS_FTFE_FCNFG (KINETIS_FTFE_BASE+KINETIS_FTFE_FCNFG_OFFSET)
|
||||
#define KINETIS_FTFE_FSEC (KINETIS_FTFE_BASE+KINETIS_FTFE_FSEC_OFFSET)
|
||||
#define KINETIS_FTFE_FOPT (KINETIS_FTFE_BASE+KINETIS_FTFE_FOPT_OFFSET)
|
||||
#define KINETIS_FTFE_FCCOB3 (KINETIS_FTFE_BASE+KINETIS_FTFE_FCCOB3_OFFSET)
|
||||
#define KINETIS_FTFE_FCCOB2 (KINETIS_FTFE_BASE+KINETIS_FTFE_FCCOB2_OFFSET)
|
||||
#define KINETIS_FTFE_FCCOB1 (KINETIS_FTFE_BASE+KINETIS_FTFE_FCCOB1_OFFSET)
|
||||
#define KINETIS_FTFE_FCCOB0 (KINETIS_FTFE_BASE+KINETIS_FTFE_FCCOB0_OFFSET)
|
||||
#define KINETIS_FTFE_FCCOB7 (KINETIS_FTFE_BASE+KINETIS_FTFE_FCCOB7_OFFSET)
|
||||
#define KINETIS_FTFE_FCCOB6 (KINETIS_FTFE_BASE+KINETIS_FTFE_FCCOB6_OFFSET)
|
||||
#define KINETIS_FTFE_FCCOB5 (KINETIS_FTFE_BASE+KINETIS_FTFE_FCCOB5_OFFSET)
|
||||
#define KINETIS_FTFE_FCCOB4 (KINETIS_FTFE_BASE+KINETIS_FTFE_FCCOB4_OFFSET)
|
||||
#define KINETIS_FTFE_FCCOBB (KINETIS_FTFE_BASE+KINETIS_FTFE_FCCOBB_OFFSET)
|
||||
#define KINETIS_FTFE_FCCOBA (KINETIS_FTFE_BASE+KINETIS_FTFE_FCCOBA_OFFSET)
|
||||
#define KINETIS_FTFE_FCCOB9 (KINETIS_FTFE_BASE+KINETIS_FTFE_FCCOB9_OFFSET)
|
||||
#define KINETIS_FTFE_FCCOB8 (KINETIS_FTFE_BASE+KINETIS_FTFE_FCCOB8_OFFSET)
|
||||
#define KINETIS_FTFE_FPROT3 (KINETIS_FTFE_BASE+KINETIS_FTFE_FPROT3_OFFSET)
|
||||
#define KINETIS_FTFE_FPROT2 (KINETIS_FTFE_BASE+KINETIS_FTFE_FPROT2_OFFSET)
|
||||
#define KINETIS_FTFE_FPROT1 (KINETIS_FTFE_BASE+KINETIS_FTFE_FPROT1_OFFSET)
|
||||
#define KINETIS_FTFE_FPROT0 (KINETIS_FTFE_BASE+KINETIS_FTFE_FPROT0_OFFSET)
|
||||
#define KINETIS_FTFE_FEPROT (KINETIS_FTFE_BASE+KINETIS_FTFE_FEPROT_OFFSET)
|
||||
#define KINETIS_FTFE_FDPROT (KINETIS_FTFE_BASE+KINETIS_FTFE_FDPROT_OFFSET)
|
||||
|
||||
/* Register Bit Definitions *********************************************************/
|
||||
|
||||
/* Flash Status Register */
|
||||
|
||||
#define FTFE_FSTAT_MGSTAT0 (1 << 0) /* Bit 0: Memory Controller Command Completion Status Flag */
|
||||
/* Bits 1-3: Reserved */
|
||||
#define FTFE_FSTAT_FPVIOL (1 << 4) /* Bit 4: Flash Protection Violation Flag */
|
||||
#define FTFE_FSTAT_ACCERR (1 << 5) /* Bit 5: Flash Access Error Flag */
|
||||
#define FTFE_FSTAT_RDCOLERR (1 << 6) /* Bit 6: FTFE Read Collision Error Flag */
|
||||
#define FTFE_FSTAT_CCIF (1 << 7) /* Bit 7: Command Complete Interrupt Flag */
|
||||
|
||||
/* Flash Configuration Register */
|
||||
|
||||
#define FTFE_FCNFG_EEERDY (1 << 0) /* Bit 0: FEEPROM backup data copied to FlexRAM */
|
||||
#define FTFE_FCNFG_RAMRDY (1 << 1) /* Bit 1: RAM Ready */
|
||||
#define FTFE_FCNFG_PFLSH (1 << 2) /* Bit 2: FTFE configuration */
|
||||
#define FTFE_FCNFG_SWAP (1 << 3) /* Bit 3: Swap */
|
||||
#define FTFE_FCNFG_ERSSUSP (1 << 4) /* Bit 4: Erase Suspend */
|
||||
#define FTFE_FCNFG_ERSAREQ (1 << 5) /* Bit 5: Erase All Request */
|
||||
#define FTFE_FCNFG_RDCOLLIE (1 << 6) /* Bit 6: Read Collision Error Interrupt Enable */
|
||||
#define FTFE_FCNFG_CCIE (1 << 7) /* Bit 7: Command Complete Interrupt Enable */
|
||||
|
||||
/* Flash Security Register */
|
||||
|
||||
#define FTFE_FSEC_SEC_SHIFT (0) /* Bits 0-1: Flash Security */
|
||||
#define FTFE_FSEC_SEC_MASK (3 << FTFE_FSEC_SEC_SHIFT)
|
||||
# define FTFE_FSEC_SEC_SECURE (0 << FTFE_FSEC_SEC_SHIFT) /* 00,01,11: status is secure */
|
||||
# define FTFE_FSEC_SEC_UNSECURE (2 << FTFE_FSEC_SEC_SHIFT) /* 10: status is insecure */
|
||||
#define FTFE_FSEC_FSLACC_SHIFT (2) /* Bits 2-3: Freescale Failure Analysis Access Code */
|
||||
#define FTFE_FSEC_FSLACC_MASK (3 << FTFE_FSEC_FSLACC_SHIFT)
|
||||
# define FTFE_FSEC_FSLACC_GRANTED (0 << FTFE_FSEC_FSLACC_SHIFT) /* 00 or 11: Access granted */
|
||||
# define FTFE_FSEC_FSLACC_DENIED (1 << FTFE_FSEC_FSLACC_SHIFT) /* 01 or 10: Access denied */
|
||||
#define FTFE_FSEC_MEEN_SHIFT (4) /* Bits 4-5: Mass Erase Enable Bits */
|
||||
#define FTFE_FSEC_MEEN_MASK (3 << FTFE_FSEC_MEEN_SHIFT)
|
||||
# define FTFE_FSEC_MEEN_ENABLED (0 << FTFE_FSEC_MEEN_SHIFT) /* All values are enabled */
|
||||
#define FTFE_FSEC_KEYEN_SHIFT (6) /* Bits 6-7: Backdoor Key Security Enable */
|
||||
#define FTFE_FSEC_KEYEN_MASK (3 << FTFE_FSEC_KEYEN_SHIFT)
|
||||
# define FTFE_FSEC_KEYEN_DISABLED (1 << FTFE_FSEC_KEYEN_SHIFT) /* All values are disabled */
|
||||
|
||||
/* Flash Option Register (32-bits, see Chip Configuration details) */
|
||||
/* Flash Common Command Object Registers (8-bit flash command data) */
|
||||
/* Program Flash Protection Registers (8-bit flash protection data) */
|
||||
/* EEPROM Protection Register (8-bit eeprom protection data) */
|
||||
/* Data Flash Protection Register (8-bit data flash protection data) */
|
||||
|
||||
/************************************************************************************
|
||||
* Public Types
|
||||
************************************************************************************/
|
||||
|
||||
/************************************************************************************
|
||||
* Public Data
|
||||
************************************************************************************/
|
||||
|
||||
/************************************************************************************
|
||||
* Public Functions
|
||||
************************************************************************************/
|
||||
|
||||
#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_FTFE_H */
|
||||
@@ -1,7 +1,7 @@
|
||||
/********************************************************************************************
|
||||
* arch/arm/src/kinetis/kinetis_ftm.h
|
||||
* arch/arm/src/kinetis/chip/kinetis_ftm.h
|
||||
*
|
||||
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
|
||||
* Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
@@ -33,8 +33,8 @@
|
||||
*
|
||||
********************************************************************************************/
|
||||
|
||||
#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_FTM_H
|
||||
#define __ARCH_ARM_SRC_KINETIS_KINETIS_FTM_H
|
||||
#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_FTM_H
|
||||
#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_FTM_H
|
||||
|
||||
/********************************************************************************************
|
||||
* Included Files
|
||||
@@ -228,6 +228,50 @@
|
||||
#define KINETIS_FTM2_SWOCTRL (KINETIS_FTM2_BASE+KINETIS_FTM_SWOCTRL_OFFSET)
|
||||
#define KINETIS_FTM2_PWMLOAD (KINETIS_FTM2_BASE+KINETIS_FTM_PWMLOAD_OFFSET)
|
||||
|
||||
#define KINETIS_FTM3_SC (KINETIS_FTM3_BASE+KINETIS_FTM_SC_OFFSET)
|
||||
#define KINETIS_FTM3_CNT (KINETIS_FTM3_BASE+KINETIS_FTM_CNT_OFFSET)
|
||||
#define KINETIS_FTM3_MOD (KINETIS_FTM3_BASE+KINETIS_FTM_MOD_OFFSET)
|
||||
|
||||
#define KINETIS_FTM3_CSC(n) (KINETIS_FTM3_BASE+KINETIS_FTM_CSC_OFFSET(n))
|
||||
#define KINETIS_FTM3_CV(n) (KINETIS_FTM3_BASE+KINETIS_FTM_CV_OFFSET(n))
|
||||
#define KINETIS_FTM3_C0SC (KINETIS_FTM3_BASE+KINETIS_FTM_C0SC_OFFSET)
|
||||
#define KINETIS_FTM3_C0V (KINETIS_FTM3_BASE+KINETIS_FTM_C0V_OFFSET)
|
||||
#define KINETIS_FTM3_C1SC (KINETIS_FTM3_BASE+KINETIS_FTM_C1SC_OFFSET)
|
||||
#define KINETIS_FTM3_C1V (KINETIS_FTM3_BASE+KINETIS_FTM_C1V_OFFSET)
|
||||
#define KINETIS_FTM3_C2SC (KINETIS_FTM3_BASE+KINETIS_FTM_C2SC_OFFSET)
|
||||
#define KINETIS_FTM3_C2V (KINETIS_FTM3_BASE+KINETIS_FTM_C2V_OFFSET)
|
||||
#define KINETIS_FTM3_C3SC (KINETIS_FTM3_BASE+KINETIS_FTM_C3SC_OFFSET)
|
||||
#define KINETIS_FTM3_C3V (KINETIS_FTM3_BASE+KINETIS_FTM_C3V_OFFSET)
|
||||
#define KINETIS_FTM3_C4SC (KINETIS_FTM3_BASE+KINETIS_FTM_C4SC_OFFSET)
|
||||
#define KINETIS_FTM3_C4V (KINETIS_FTM3_BASE+KINETIS_FTM_C4V_OFFSET)
|
||||
#define KINETIS_FTM3_C5SC (KINETIS_FTM3_BASE+KINETIS_FTM_C5SC_OFFSET)
|
||||
#define KINETIS_FTM3_C5V (KINETIS_FTM3_BASE+KINETIS_FTM_C5V_OFFSET)
|
||||
#define KINETIS_FTM3_C6SC (KINETIS_FTM3_BASE+KINETIS_FTM_C6SC_OFFSET)
|
||||
#define KINETIS_FTM3_C6V (KINETIS_FTM3_BASE+KINETIS_FTM_C6V_OFFSET)
|
||||
#define KINETIS_FTM3_C7SC (KINETIS_FTM3_BASE+KINETIS_FTM_C7SC_OFFSET)
|
||||
#define KINETIS_FTM3_C7V (KINETIS_FTM3_BASE+KINETIS_FTM_C7V_OFFSET)
|
||||
|
||||
#define KINETIS_FTM3_CNTIN (KINETIS_FTM3_BASE+KINETIS_FTM_CNTIN_OFFSET)
|
||||
#define KINETIS_FTM3_STATUS (KINETIS_FTM3_BASE+KINETIS_FTM_STATUS_OFFSET)
|
||||
#define KINETIS_FTM3_MODE (KINETIS_FTM3_BASE+KINETIS_FTM_MODE_OFFSET)
|
||||
#define KINETIS_FTM3_SYNC (KINETIS_FTM3_BASE+KINETIS_FTM_SYNC_OFFSET)
|
||||
#define KINETIS_FTM3_OUTINIT (KINETIS_FTM3_BASE+KINETIS_FTM_OUTINIT_OFFSET)
|
||||
#define KINETIS_FTM3_OUTMASK (KINETIS_FTM3_BASE+KINETIS_FTM_OUTMASK_OFFSET)
|
||||
#define KINETIS_FTM3_COMBINE (KINETIS_FTM3_BASE+KINETIS_FTM_COMBINE_OFFSET)
|
||||
#define KINETIS_FTM3_DEADTIME (KINETIS_FTM3_BASE+KINETIS_FTM_DEADTIME_OFFSET)
|
||||
#define KINETIS_FTM3_EXTTRIG (KINETIS_FTM3_BASE+KINETIS_FTM_EXTTRIG_OFFSET)
|
||||
#define KINETIS_FTM3_POL (KINETIS_FTM3_BASE+KINETIS_FTM_POL_OFFSET)
|
||||
#define KINETIS_FTM3_FMS (KINETIS_FTM3_BASE+KINETIS_FTM_FMS_OFFSET)
|
||||
#define KINETIS_FTM3_FILTER (KINETIS_FTM3_BASE+KINETIS_FTM_FILTER_OFFSET)
|
||||
#define KINETIS_FTM3_FLTCTRL (KINETIS_FTM3_BASE+KINETIS_FTM_FLTCTRL_OFFSET)
|
||||
#define KINETIS_FTM3_QDCTRL (KINETIS_FTM3_BASE+KINETIS_FTM_QDCTRL_OFFSET)
|
||||
#define KINETIS_FTM3_CONF (KINETIS_FTM3_BASE+KINETIS_FTM_CONF_OFFSET)
|
||||
#define KINETIS_FTM3_FLTPOL (KINETIS_FTM3_BASE+KINETIS_FTM_FLTPOL_OFFSET)
|
||||
#define KINETIS_FTM3_SYNCONF (KINETIS_FTM3_BASE+KINETIS_FTM_SYNCONF_OFFSET)
|
||||
#define KINETIS_FTM3_INVCTRL (KINETIS_FTM3_BASE+KINETIS_FTM_INVCTRL_OFFSET)
|
||||
#define KINETIS_FTM3_SWOCTRL (KINETIS_FTM3_BASE+KINETIS_FTM_SWOCTRL_OFFSET)
|
||||
#define KINETIS_FTM3_PWMLOAD (KINETIS_FTM3_BASE+KINETIS_FTM_PWMLOAD_OFFSET)
|
||||
|
||||
/* Register Bit Definitions *****************************************************************/
|
||||
|
||||
/* Status and Control */
|
||||
@@ -525,4 +569,4 @@
|
||||
* Public Functions
|
||||
********************************************************************************************/
|
||||
|
||||
#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_FTM_H */
|
||||
#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_FTM_H */
|
||||
@@ -1,7 +1,7 @@
|
||||
/********************************************************************************************
|
||||
* arch/arm/src/kinetis/kinetis_i2c.h
|
||||
* arch/arm/src/kinetis/chip/kinetis_i2c.h
|
||||
*
|
||||
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
|
||||
* Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
@@ -33,8 +33,8 @@
|
||||
*
|
||||
********************************************************************************************/
|
||||
|
||||
#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_I2CE_H
|
||||
#define __ARCH_ARM_SRC_KINETIS_KINETIS_I2CE_H
|
||||
#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_I2CE_H
|
||||
#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_I2CE_H
|
||||
|
||||
/********************************************************************************************
|
||||
* Included Files
|
||||
@@ -91,6 +91,19 @@
|
||||
#define KINETIS_I2C1_SLTH (KINETIS_I2C1_BASE+KINETIS_I2C_SLTH_OFFSET)
|
||||
#define KINETIS_I2C1_SLTL (KINETIS_I2C1_BASE+KINETIS_I2C_SLTL_OFFSET)
|
||||
|
||||
#define KINETIS_I2C2_A1 (KINETIS_I2C2_BASE+KINETIS_I2C_A1_OFFSET)
|
||||
#define KINETIS_I2C2_F (KINETIS_I2C2_BASE+KINETIS_I2C_F_OFFSET)
|
||||
#define KINETIS_I2C2_C1 (KINETIS_I2C2_BASE+KINETIS_I2C_C1_OFFSET)
|
||||
#define KINETIS_I2C2_S (KINETIS_I2C2_BASE+KINETIS_I2C_S_OFFSET)
|
||||
#define KINETIS_I2C2_D (KINETIS_I2C2_BASE+KINETIS_I2C_D_OFFSET)
|
||||
#define KINETIS_I2C2_C2 (KINETIS_I2C2_BASE+KINETIS_I2C_C2_OFFSET)
|
||||
#define KINETIS_I2C2_FLT (KINETIS_I2C2_BASE+KINETIS_I2C_FLT_OFFSET)
|
||||
#define KINETIS_I2C2_RA (KINETIS_I2C2_BASE+KINETIS_I2C_RA_OFFSET)
|
||||
#define KINETIS_I2C2_SMB (KINETIS_I2C2_BASE+KINETIS_I2C_SMB_OFFSET)
|
||||
#define KINETIS_I2C2_A2 (KINETIS_I2C2_BASE+KINETIS_I2C_A2_OFFSET)
|
||||
#define KINETIS_I2C2_SLTH (KINETIS_I2C2_BASE+KINETIS_I2C_SLTH_OFFSET)
|
||||
#define KINETIS_I2C2_SLTL (KINETIS_I2C2_BASE+KINETIS_I2C_SLTL_OFFSET)
|
||||
|
||||
/* Register Bit Definitions *****************************************************************/
|
||||
|
||||
/* I2C Address Register 1 (8-bit) */
|
||||
@@ -182,4 +195,4 @@
|
||||
* Public Functions
|
||||
********************************************************************************************/
|
||||
|
||||
#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_I2CE_H */
|
||||
#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_I2CE_H */
|
||||
@@ -1,7 +1,7 @@
|
||||
/****************************************************************************************************
|
||||
* arch/arm/src/kinetis/kinetis_i2s.h
|
||||
* arch/arm/src/kinetis/chip/kinetis_i2s.h
|
||||
*
|
||||
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
|
||||
* Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
@@ -33,8 +33,8 @@
|
||||
*
|
||||
****************************************************************************************************/
|
||||
|
||||
#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_I2S_H
|
||||
#define __ARCH_ARM_SRC_KINETIS_KINETIS_I2S_H
|
||||
#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_I2S_H
|
||||
#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_I2S_H
|
||||
|
||||
/****************************************************************************************************
|
||||
* Included Files
|
||||
@@ -294,4 +294,4 @@
|
||||
* Public Functions
|
||||
****************************************************************************************************/
|
||||
|
||||
#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_I2S_H */
|
||||
#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_I2S_H */
|
||||
+11
-11
@@ -1,7 +1,7 @@
|
||||
/************************************************************************************
|
||||
* arch/arm/src/kinetis/kinetis_fmc.h
|
||||
* arch/arm/src/kinetis/kinetis_k20k40k60fmc.h
|
||||
*
|
||||
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
|
||||
* Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
@@ -33,8 +33,8 @@
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_FMC_H
|
||||
#define __ARCH_ARM_SRC_KINETIS_KINETIS_FMC_H
|
||||
#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_K20K40K60FMC_H
|
||||
#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_K20K40K60FMC_H
|
||||
|
||||
/************************************************************************************
|
||||
* Included Files
|
||||
@@ -50,13 +50,13 @@
|
||||
|
||||
/* Register Offsets *****************************************************************/
|
||||
|
||||
#define KINETIS_FMC_PFAPR_OFFSET 0x0000 /* Flash Access Protection Register */
|
||||
#define KINETIS_FMC_PFB0CR_OFFSET 0x0004 /* Flash Bank 0 Control Register */
|
||||
#define KINETIS_FMC_PFB1CR_OFFSET 0x0008 /* Flash Bank 1 Control Register */
|
||||
#define KINETIS_FMC_PFAPR_OFFSET 0x0000 /* Flash Access Protection Register */
|
||||
#define KINETIS_FMC_PFB0CR_OFFSET 0x0004 /* Flash Bank 0 Control Register */
|
||||
#define KINETIS_FMC_PFB1CR_OFFSET 0x0008 /* Flash Bank 1 Control Register */
|
||||
|
||||
/* Cache Directory Storage for way=w and set=s, w=0..3, s=0..7 */
|
||||
|
||||
#define KINETIS_FMC_TAGVD_OFFSET(w,s) (0x100+((w)<<5)+((s)<<2))
|
||||
#define KINETIS_FMC_TAGVD_OFFSET(w,s) (0x100 + ((w) << 5) + ((s) << 2))
|
||||
|
||||
#define KINETIS_FMC_TAGVDW0S0_OFFSET 0x0100 /* Cache Directory Storage */
|
||||
#define KINETIS_FMC_TAGVDW0S1_OFFSET 0x0104 /* Cache Directory Storage */
|
||||
@@ -96,8 +96,8 @@
|
||||
|
||||
/* Cache Data Storage (upper and lower) for way=w and set=s, w=0..3, s=0..7 */
|
||||
|
||||
#define KINETIS_FMC_DATAU_OFFSET(w,s) (0x200+((w)<<6)+((s)<<2))
|
||||
#define KINETIS_FMC_DATAL_OFFSET(w,s) (0x204+((w)<<6)+((s)<<2))
|
||||
#define KINETIS_FMC_DATAU_OFFSET(w,s) (0x200 + ((w) << 6) + ((s) << 2))
|
||||
#define KINETIS_FMC_DATAL_OFFSET(w,s) (0x204 + ((w) << 6) + ((s) << 2))
|
||||
|
||||
#define KINETIS_FMC_DATAW0S0U_OFFSET 0x0200 /* Cache Data Storage (upper word) */
|
||||
#define KINETIS_FMC_DATAW0S0L_OFFSET 0x0204 /* Cache Data Storage (lower word) */
|
||||
@@ -386,4 +386,4 @@
|
||||
* Public Functions
|
||||
************************************************************************************/
|
||||
|
||||
#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_FMC_H */
|
||||
#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_K20K40K60FMC_H */
|
||||
@@ -0,0 +1,180 @@
|
||||
/************************************************************************************
|
||||
* arch/arm/src/kinetis/chip/kinetis_k20memorymap.h
|
||||
*
|
||||
* Copyright (C) 2011, 2015-2016 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_K20MEMORYMAP_H
|
||||
#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_K20MEMORYMAP_H
|
||||
|
||||
/************************************************************************************
|
||||
* Included Files
|
||||
************************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include "chip.h"
|
||||
|
||||
#ifdef KINETIS_K20
|
||||
|
||||
/************************************************************************************
|
||||
* Pre-processor Definitions
|
||||
************************************************************************************/
|
||||
|
||||
/* Memory Map ***********************************************************************/
|
||||
/* K20 Family
|
||||
*
|
||||
* The memory map for the following parts is defined in Freescale document
|
||||
* K20P64M72SF1RM
|
||||
*/
|
||||
|
||||
#define KINETIS_FLASH_BASE 0x00000000 /* –0x0fffffff Program flash and read-
|
||||
* only data (Includes exception
|
||||
* vectors in first 1024 bytes) */
|
||||
#if !defined(KINETIS_FLEXMEM_SIZE)
|
||||
# define KINETIS_FLEXNVM_BASE 0x10000000 /* –0x13ffffff FlexNVM */
|
||||
# define KINETIS_FLEXRAM_BASE 0x14000000 /* –0x17ffffff FlexRAM */
|
||||
#endif
|
||||
/* 0x18000000 * –0x1bffffff Reserved */
|
||||
#define KINETIS_SRAML_BASE 0x1c000000 /* –0x1fffffff SRAM_L: Lower SRAM
|
||||
* (ICODE/DCODE) */
|
||||
#define KINETIS_SRAMU_BASE 0x20000000 /* –0x200fffff SRAM_U: Upper SRAM bitband
|
||||
* region */
|
||||
/* 0x20100000 * –0x21ffffff Reserved */
|
||||
#define KINETIS_SALIAS_BASE 0x22000000 /* –0x23ffffff Aliased to SRAM_U bitband */
|
||||
/* 0x24000000 * –0x3fffffff Reserved */
|
||||
#define KINETIS_BRIDGE0_BASE 0x40000000 /* –0x4007ffff Bitband region for peripheral
|
||||
* bridge 0 (AIPS-Lite0) */
|
||||
#define KINETIS_BRIDGE1_BASE 0x40080000 /* –0x400fffff Bitband region for peripheral
|
||||
* bridge 1 (AIPS-Lite1) */
|
||||
#define KINETIS_GPIOBB_BASE 0x400ff000 /* –0x400fffff Bitband region for general
|
||||
* purpose input/output (GPIO) */
|
||||
/* 0x40100000 * –0x41ffffff Reserved */
|
||||
#define KINETIS_PALIAS_BASE 0x42000000 /* –0x43ffffff Aliased to peripheral bridge
|
||||
* (AIPS-Lite) and general purpose
|
||||
* input/output (GPIO) bitband */
|
||||
/* 0x44000000 * –0xdfffffff Reserved */
|
||||
#define KINETIS_PERIPH_BASE 0xe0000000 /* –0xe00fffff Private peripherals */
|
||||
/* 0xe0100000 * –0xffffffff Reserved */
|
||||
|
||||
/* Peripheral Bridge 0 Memory Map ***************************************************/
|
||||
|
||||
#define KINETIS_AIPS0_BASE 0x40000000 /* Peripheral bridge 0 (AIPS-Lite 0) */
|
||||
#define KINETIS_XBAR_BASE 0x40004000 /* Crossbar switch */
|
||||
#define KINETIS_DMAC_BASE 0x40008000 /* DMA controller */
|
||||
#define KINETIS_DMADESC_BASE 0x40009000 /* DMA controller transfer control descriptors */
|
||||
#define KINETIS_FMC_BASE 0x4001f000 /* Flash memory controller */
|
||||
#define KINETIS_FTFL_BASE 0x40020000 /* Flash memory */
|
||||
#define KINETIS_DMAMUX0_BASE 0x40021000 /* DMA channel mutiplexer 0 */
|
||||
#define KINETIS_CAN0_BASE 0x40024000 /* FlexCAN 0 */
|
||||
#define KINETIS_SPI0_BASE 0x4002c000 /* SPI 0 */
|
||||
#define KINETIS_SPI1_BASE 0x4002d000 /* SPI 1 */
|
||||
#define KINETIS_I2S0_BASE 0x4002f000 /* I2S 0 */
|
||||
#define KINETIS_CRC_BASE 0x40032000 /* CRC */
|
||||
#define KINETIS_USBDCD_BASE 0x40035000 /* USB DCD */
|
||||
#define KINETIS_PDB0_BASE 0x40036000 /* Programmable delay block */
|
||||
#define KINETIS_PIT_BASE 0x40037000 /* Periodic interrupt timers (PIT) */
|
||||
#define KINETIS_FTM0_BASE 0x40038000 /* FlexTimer 0 */
|
||||
#define KINETIS_FTM1_BASE 0x40039000 /* FlexTimer 1 */
|
||||
#define KINETIS_ADC0_BASE 0x4003b000 /* Analog-to-digital converter (ADC) 0 */
|
||||
#define KINETIS_RTC_BASE 0x4003d000 /* Real time clock */
|
||||
#define KINETIS_VBATR_BASE 0x4003e000 /* VBAT register file */
|
||||
#define KINETIS_LPTMR_BASE 0x40040000 /* Low power timer */
|
||||
#define KINETIS_SYSR_BASE 0x40041000 /* System register file */
|
||||
#define KINETIS_TSI0_BASE 0x40045000 /* Touch sense interface */
|
||||
#define KINETIS_SIMLP_BASE 0x40047000 /* SIM low-power logic */
|
||||
#define KINETIS_SIM_BASE 0x40048000 /* System integration module (SIM) */
|
||||
#define KINETIS_PORT_BASE(n) (0x40049000 + ((n) << 12))
|
||||
#define KINETIS_PORTA_BASE 0x40049000 /* Port A multiplexing control */
|
||||
#define KINETIS_PORTB_BASE 0x4004a000 /* Port B multiplexing control */
|
||||
#define KINETIS_PORTC_BASE 0x4004b000 /* Port C multiplexing control */
|
||||
#define KINETIS_PORTD_BASE 0x4004c000 /* Port D multiplexing control */
|
||||
#define KINETIS_PORTE_BASE 0x4004d000 /* Port E multiplexing control */
|
||||
#define KINETIS_WDOG_BASE 0x40052000 /* Software watchdog */
|
||||
#define KINETIS_EWM_BASE 0x40061000 /* External watchdog */
|
||||
#define KINETIS_CMT_BASE 0x40062000 /* Carrier modulator timer (CMT) */
|
||||
#define KINETIS_MCG_BASE 0x40064000 /* Multi-purpose Clock Generator (MCG) */
|
||||
#define KINETIS_OSC_BASE 0x40065000 /* System oscillator (OSC) */
|
||||
#define KINETIS_I2C0_BASE 0x40066000 /* I2C 0 */
|
||||
#define KINETIS_I2C1_BASE 0x40067000 /* I2C 1 */
|
||||
#define KINETIS_UART0_BASE 0x4006a000 /* UART0 */
|
||||
#define KINETIS_UART1_BASE 0x4006b000 /* UART1 */
|
||||
#define KINETIS_UART2_BASE 0x4006c000 /* UART2 */
|
||||
#define KINETIS_USB0_BASE 0x40072000 /* USB OTG FS/LS */
|
||||
#define KINETIS_CMP_BASE 0x40073000 /* Analog comparator (CMP) / 6-bit digital-to-analog converter (DAC) */
|
||||
#define KINETIS_VREF_BASE 0x40074000 /* Voltage reference (VREF) */
|
||||
#define KINETIS_LLWU_BASE 0x4007c000 /* Low-leakage wakeup unit (LLWU) */
|
||||
#define KINETIS_PMC_BASE 0x4007d000 /* Power management controller (PMC) */
|
||||
#define KINETIS_SMC_BASE 0x4007e000 /* System Mode controller (SMC) */
|
||||
|
||||
/* Peripheral Bridge 1 Memory Map ***************************************************/
|
||||
|
||||
#define KINETIS_AIPS1_BASE 0x40080000 /* Peripheral bridge 1 (AIPS-Lite 1) */
|
||||
#define KINETIS_FTM2_BASE 0x400b8000 /* FlexTimer 2 */
|
||||
#define KINETIS_ADC1_BASE 0x400bb000 /* Analog-to-digital converter (ADC) 1 */
|
||||
#define KINETIS_DAC0_BASE 0x400cc000 /* 12-bit digital-to-analog converter (DAC) 0 */
|
||||
|
||||
#define KINETIS_XBARSS_BASE 0x400ff000 /* Not an AIPS-Lite slot. The 32-bit general
|
||||
* purpose input/output module that shares the
|
||||
* crossbar switch slave port with the AIPS-Lite
|
||||
* is accessed at this address. */
|
||||
#define KINETIS_GPIO_BASE(n) (0x400ff000 + ((n) << 6))
|
||||
#define KINETIS_GPIOA_BASE 0x400ff000 /* GPIO PORTA registers */
|
||||
#define KINETIS_GPIOB_BASE 0x400ff040 /* GPIO PORTB registers */
|
||||
#define KINETIS_GPIOC_BASE 0x400ff080 /* GPIO PORTC registers */
|
||||
#define KINETIS_GPIOD_BASE 0x400ff0c0 /* GPIO PORTD registers */
|
||||
#define KINETIS_GPIOE_BASE 0x400ff100 /* GPIO PORTE registers */
|
||||
|
||||
/* Private Peripheral Bus (PPB) Memory Map ******************************************/
|
||||
|
||||
#define KINETIS_ITM_BASE 0xe0000000 /* Instrumentation Trace Macrocell (ITM) */
|
||||
#define KINETIS_DWT_BASE 0xe0001000 /* Data Watchpoint and Trace (DWT) */
|
||||
#define KINETIS_FPB_BASE 0xe0002000 /* Flash Patch and Breakpoint (FPB) */
|
||||
#define KINETIS_SCS_BASE 0xe000e000 /* System Control Space (SCS) (for NVIC) */
|
||||
#define KINETIS_TPIU_BASE 0xe0040000 /* Trace Port Interface Unit (TPIU) */
|
||||
#define KINETIS_MCM_BASE 0xe0080000 /* Miscellaneous Control Module (including ETB Almost Full) */
|
||||
#define KINETIS_ROMTAB_BASE 0xe00ff000 /* ROM Table - allows auto-detection of debug components */
|
||||
|
||||
/************************************************************************************
|
||||
* Public Types
|
||||
************************************************************************************/
|
||||
|
||||
/************************************************************************************
|
||||
* Public Data
|
||||
************************************************************************************/
|
||||
|
||||
/************************************************************************************
|
||||
* Public Functions
|
||||
************************************************************************************/
|
||||
|
||||
#endif /* KINETIS_K20 */
|
||||
#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_K20MEMORYMAP_H */
|
||||
+5
-5
@@ -1,7 +1,7 @@
|
||||
/********************************************************************************************
|
||||
* arch/arm/src/kinetis/kinetis_k40pinmux.h
|
||||
* arch/arm/src/kinetis/chip/kinetis_k20pinmux.h
|
||||
*
|
||||
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
|
||||
* Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
@@ -33,8 +33,8 @@
|
||||
*
|
||||
********************************************************************************************/
|
||||
|
||||
#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_K20PINMUX_H
|
||||
#define __ARCH_ARM_SRC_KINETIS_KINETIS_K20PINMUX_H
|
||||
#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_K20PINMUX_H
|
||||
#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_K20PINMUX_H
|
||||
|
||||
/********************************************************************************************
|
||||
* Included Files
|
||||
@@ -349,4 +349,4 @@
|
||||
* Public Functions
|
||||
********************************************************************************************/
|
||||
|
||||
#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_K20PINMUX_H */
|
||||
#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_K20PINMUX_H */
|
||||
@@ -0,0 +1,199 @@
|
||||
/************************************************************************************
|
||||
* arch/arm/src/kinetis/chip/kinetis_k40memorymap.h
|
||||
*
|
||||
* Copyright (C) 2011, 2015-2016 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_K40MEMORYMAP_H
|
||||
#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_K40MEMORYMAP_H
|
||||
|
||||
/************************************************************************************
|
||||
* Included Files
|
||||
************************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include "chip.h"
|
||||
|
||||
#ifdef KINETIS_K40
|
||||
|
||||
/************************************************************************************
|
||||
* Pre-processor Definitions
|
||||
************************************************************************************/
|
||||
|
||||
/* Memory Map ***********************************************************************/
|
||||
/* K40 Family
|
||||
*
|
||||
* The memory map for the following parts is defined in Freescale document
|
||||
* K40P144M100SF2RM
|
||||
*/
|
||||
|
||||
#define KINETIS_FLASH_BASE 0x00000000 /* -0x0fffffff Program flash and read-
|
||||
* only data (Includes exception
|
||||
* vectors in first 1024 bytes) */
|
||||
# if !defined(KINETIS_FLEXMEM_SIZE)
|
||||
# define KINETIS_FLEXNVM_BASE 0x10000000 /* -0x13ffffff FlexNVM */
|
||||
# define KINETIS_FLEXRAM_BASE 0x14000000 /* -0x17ffffff FlexRAM */
|
||||
# endif
|
||||
#define KINETIS_SRAML_BASE 0x18000000 /* -0x1fffffff SRAM_L: Lower SRAM
|
||||
* (ICODE/DCODE) */
|
||||
#define KINETIS_SRAMU_BASE 0x20000000 /* -0x200fffff SRAM_U: Upper SRAM bitband
|
||||
* region */
|
||||
/* 0x20100000 * -0x21ffffff Reserved */
|
||||
#define KINETIS_SALIAS_BASE 0x22000000 /* -0x23ffffff Aliased to SRAM_U bitband */
|
||||
/* 0x24000000 * -0x3fffffff Reserved */
|
||||
#define KINETIS_BRIDGE0_BASE 0x40000000 /* -0x4007ffff Bitband region for peripheral
|
||||
* bridge 0 (AIPS-Lite0) */
|
||||
#define KINETIS_BRIDGE1_BASE 0x40080000 /* -0x400fffff Bitband region for peripheral
|
||||
* bridge 1 (AIPS-Lite1) */
|
||||
#define KINETIS_GPIOBB_BASE 0x400ff000 /* -0x400fffff Bitband region for general
|
||||
* purpose input/output (GPIO) */
|
||||
/* 0x40100000 * -0x41ffffff Reserved */
|
||||
#define KINETIS_PALIAS_BASE 0x42000000 /* -0x43ffffff Aliased to peripheral bridge
|
||||
* (AIPS-Lite) and general purpose
|
||||
* input/output (GPIO) bitband */
|
||||
/* 0x44000000 * -0x5fffffff Reserved */
|
||||
#define KINETIS_FLEXBUS_WBBASE 0x60000000 /* -0x7fffffff FlexBus (External Memory -
|
||||
* Write-back) */
|
||||
#define KINETIS_FLEXBUS_WTBASE 0x80000000 /* -0x9fffffff FlexBus (External Memory -
|
||||
* Write-through) */
|
||||
#define KINETIS_FLEXBUS_NXBASE 0xa0000000 /* -0xdfffffff FlexBus (External Memory -
|
||||
* Non-executable) */
|
||||
#define KINETIS_PERIPH_BASE 0xe0000000 /* -0xe00fffff Private peripherals */
|
||||
/* 0xe0100000 * -0xffffffff Reserved */
|
||||
|
||||
/* Peripheral Bridge 0 Memory Map ***************************************************/
|
||||
|
||||
#define KINETIS_AIPS0_BASE 0x40000000 /* Peripheral bridge 0 (AIPS-Lite 0) */
|
||||
#define KINETIS_XBAR_BASE 0x40004000 /* Crossbar switch */
|
||||
#define KINETIS_DMAC_BASE 0x40008000 /* DMA controller */
|
||||
#define KINETIS_DMADESC_BASE 0x40009000 /* DMA controller transfer control descriptors */
|
||||
#define KINETIS_FLEXBUSC_BASE 0x4000c000 /* FlexBus controller */
|
||||
#define KINETIS_MPU_BASE 0x4000d000 /* MPU */
|
||||
#define KINETIS_FMC_BASE 0x4001f000 /* Flash memory controller */
|
||||
#define KINETIS_FTFL_BASE 0x40020000 /* Flash memory */
|
||||
#define KINETIS_DMAMUX0_BASE 0x40021000 /* DMA channel mutiplexer 0 */
|
||||
#define KINETIS_CAN0_BASE 0x40024000 /* FlexCAN 0 */
|
||||
#define KINETIS_SPI0_BASE 0x4002c000 /* SPI 0 */
|
||||
#define KINETIS_SPI1_BASE 0x4002d000 /* SPI 1 */
|
||||
#define KINETIS_I2S0_BASE 0x4002f000 /* I2S 0 */
|
||||
#define KINETIS_CRC_BASE 0x40032000 /* CRC */
|
||||
#define KINETIS_USBDCD_BASE 0x40035000 /* USB DCD */
|
||||
#define KINETIS_PDB0_BASE 0x40036000 /* Programmable delay block */
|
||||
#define KINETIS_PIT_BASE 0x40037000 /* Periodic interrupt timers (PIT) */
|
||||
#define KINETIS_FTM0_BASE 0x40038000 /* FlexTimer 0 */
|
||||
#define KINETIS_FTM1_BASE 0x40039000 /* FlexTimer 1 */
|
||||
#define KINETIS_ADC0_BASE 0x4003b000 /* Analog-to-digital converter (ADC) 0 */
|
||||
#define KINETIS_RTC_BASE 0x4003d000 /* Real time clock */
|
||||
#define KINETIS_VBATR_BASE 0x4003e000 /* VBAT register file */
|
||||
#define KINETIS_LPTMR_BASE 0x40040000 /* Low power timer */
|
||||
#define KINETIS_SYSR_BASE 0x40041000 /* System register file */
|
||||
#define KINETIS_DRYICE_BASE 0x40042000 /* DryIce */
|
||||
#define KINETIS_DRYICESS_BASE 0x40043000 /* DryIce secure storage */
|
||||
#define KINETIS_TSI0_BASE 0x40045000 /* Touch sense interface */
|
||||
#define KINETIS_SIMLP_BASE 0x40047000 /* SIM low-power logic */
|
||||
#define KINETIS_SIM_BASE 0x40048000 /* System integration module (SIM) */
|
||||
#define KINETIS_PORT_BASE(n) (0x40049000 + ((n) << 12))
|
||||
#define KINETIS_PORTA_BASE 0x40049000 /* Port A multiplexing control */
|
||||
#define KINETIS_PORTB_BASE 0x4004a000 /* Port B multiplexing control */
|
||||
#define KINETIS_PORTC_BASE 0x4004b000 /* Port C multiplexing control */
|
||||
#define KINETIS_PORTD_BASE 0x4004c000 /* Port D multiplexing control */
|
||||
#define KINETIS_PORTE_BASE 0x4004d000 /* Port E multiplexing control */
|
||||
#define KINETIS_WDOG_BASE 0x40052000 /* Software watchdog */
|
||||
#define KINETIS_EWM_BASE 0x40061000 /* External watchdog */
|
||||
#define KINETIS_CMT_BASE 0x40062000 /* Carrier modulator timer (CMT) */
|
||||
#define KINETIS_MCG_BASE 0x40064000 /* Multi-purpose Clock Generator (MCG) */
|
||||
#define KINETIS_OSC_BASE 0x40065000 /* System oscillator (OSC) */
|
||||
#define KINETIS_I2C0_BASE 0x40066000 /* I2C 0 */
|
||||
#define KINETIS_I2C1_BASE 0x40067000 /* I2C 1 */
|
||||
#define KINETIS_UART0_BASE 0x4006a000 /* UART0 */
|
||||
#define KINETIS_UART1_BASE 0x4006b000 /* UART1 */
|
||||
#define KINETIS_UART2_BASE 0x4006c000 /* UART2 */
|
||||
#define KINETIS_UART3_BASE 0x4006d000 /* UART3 */
|
||||
#define KINETIS_USB0_BASE 0x40072000 /* USB OTG FS/LS */
|
||||
#define KINETIS_CMP_BASE 0x40073000 /* Analog comparator (CMP) / 6-bit digital-to-analog converter (DAC) */
|
||||
#define KINETIS_VREF_BASE 0x40074000 /* Voltage reference (VREF) */
|
||||
#define KINETIS_LLWU_BASE 0x4007c000 /* Low-leakage wakeup unit (LLWU) */
|
||||
#define KINETIS_PMC_BASE 0x4007d000 /* Power management controller (PMC) */
|
||||
#define KINETIS_SMC_BASE 0x4007e000 /* System Mode controller (SMC) */
|
||||
|
||||
/* Peripheral Bridge 1 Memory Map ***************************************************/
|
||||
|
||||
#define KINETIS_AIPS1_BASE 0x40080000 /* Peripheral bridge 1 (AIPS-Lite 1) */
|
||||
#define KINETIS_CAN1_BASE 0x400a4000 /* FlexCAN 1 */
|
||||
#define KINETIS_SPI2_BASE 0x400ac000 /* SPI 2 */
|
||||
#define KINETIS_SDHC_BASE 0x400b1000 /* SDHC */
|
||||
#define KINETIS_FTM2_BASE 0x400b8000 /* FlexTimer 2 */
|
||||
#define KINETIS_ADC1_BASE 0x400bb000 /* Analog-to-digital converter (ADC) 1 */
|
||||
#define KINETIS_SLCD_BASE 0x400be000 /* Segment LCD */
|
||||
#define KINETIS_DAC0_BASE 0x400cc000 /* 12-bit digital-to-analog converter (DAC) 0 */
|
||||
#define KINETIS_DAC1_BASE 0x400cd000 /* 12-bit digital-to-analog converter (DAC) 1 */
|
||||
#define KINETIS_UART4_BASE 0x400ea000 /* UART4 */
|
||||
#define KINETIS_UART5_BASE 0x400eb000 /* UART5 */
|
||||
#define KINETIS_XBARSS_BASE 0x400ff000 /* Not an AIPS-Lite slot. The 32-bit general
|
||||
* purpose input/output module that shares the
|
||||
* crossbar switch slave port with the AIPS-Lite
|
||||
* is accessed at this address. */
|
||||
#define KINETIS_GPIO_BASE(n) (0x400ff000 + ((n) << 6))
|
||||
#define KINETIS_GPIOA_BASE 0x400ff000 /* GPIO PORTA registers */
|
||||
#define KINETIS_GPIOB_BASE 0x400ff040 /* GPIO PORTB registers */
|
||||
#define KINETIS_GPIOC_BASE 0x400ff080 /* GPIO PORTC registers */
|
||||
#define KINETIS_GPIOD_BASE 0x400ff0c0 /* GPIO PORTD registers */
|
||||
#define KINETIS_GPIOE_BASE 0x400ff100 /* GPIO PORTE registers */
|
||||
|
||||
/* Private Peripheral Bus (PPB) Memory Map ******************************************/
|
||||
|
||||
#define KINETIS_ITM_BASE 0xe0000000 /* Instrumentation Trace Macrocell (ITM) */
|
||||
#define KINETIS_DWT_BASE 0xe0001000 /* Data Watchpoint and Trace (DWT) */
|
||||
#define KINETIS_FPB_BASE 0xe0002000 /* Flash Patch and Breakpoint (FPB) */
|
||||
#define KINETIS_SCS_BASE 0xe000e000 /* System Control Space (SCS) (for NVIC) */
|
||||
#define KINETIS_TPIU_BASE 0xe0040000 /* Trace Port Interface Unit (TPIU) */
|
||||
#define KINETIS_ETM_BASE 0xe0041000 /* Embedded Trace Macrocell (ETM) */
|
||||
#define KINETIS_ETB_BASE 0xe0042000 /* Embedded Trace Buffer (ETB) */
|
||||
#define KINETIS_TFUN_BASE 0xe0043000 /* Embedded Trace Funnel */
|
||||
#define KINETIS_MCM_BASE 0xe0080000 /* Miscellaneous Control Module (including ETB Almost Full) */
|
||||
#define KINETIS_ROMTAB_BASE 0xe00ff000 /* ROM Table - allows auto-detection of debug components */
|
||||
|
||||
/************************************************************************************
|
||||
* Public Types
|
||||
************************************************************************************/
|
||||
|
||||
/************************************************************************************
|
||||
* Public Data
|
||||
************************************************************************************/
|
||||
|
||||
/************************************************************************************
|
||||
* Public Functions
|
||||
************************************************************************************/
|
||||
|
||||
#endif /* KINETIS_K40 */
|
||||
#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_K40MEMORYMAP_H */
|
||||
+5
-5
@@ -1,7 +1,7 @@
|
||||
/********************************************************************************************
|
||||
* arch/arm/src/kinetis/kinetis_k40pinmux.h
|
||||
* arch/arm/src/kinetis/chip/kinetis_k40pinmux.h
|
||||
*
|
||||
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
|
||||
* Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
@@ -33,8 +33,8 @@
|
||||
*
|
||||
********************************************************************************************/
|
||||
|
||||
#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_K40PINMUX_H
|
||||
#define __ARCH_ARM_SRC_KINETIS_KINETIS_K40PINMUX_H
|
||||
#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_K40PINMUX_H
|
||||
#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_K40PINMUX_H
|
||||
|
||||
/********************************************************************************************
|
||||
* Included Files
|
||||
@@ -515,4 +515,4 @@
|
||||
* Public Functions
|
||||
********************************************************************************************/
|
||||
|
||||
#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_K40PINMUX_H */
|
||||
#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_K40PINMUX_H */
|
||||
@@ -0,0 +1,196 @@
|
||||
/************************************************************************************
|
||||
* arch/arm/src/kinetis/chip/kinetis_k60memorymap.h
|
||||
*
|
||||
* Copyright (C) 2011, 2015-2016 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_K60MEMORYMAP_H
|
||||
#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_K60MEMORYMAP_H
|
||||
|
||||
/************************************************************************************
|
||||
* Included Files
|
||||
************************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include "chip.h"
|
||||
|
||||
#ifdef KINETIS_K64
|
||||
|
||||
/************************************************************************************
|
||||
* Pre-processor Definitions
|
||||
************************************************************************************/
|
||||
|
||||
/* Memory Map ***********************************************************************/
|
||||
/* K60 Family
|
||||
*
|
||||
* The memory map for the following parts is defined in Freescale document
|
||||
* K60P144M100SF2RM
|
||||
*/
|
||||
|
||||
#define KINETIS_FLASH_BASE 0x00000000 /* -0x0fffffff Program flash and read-
|
||||
* only data (Includes exception
|
||||
* vectors in first 1024 bytes) */
|
||||
#if !defined(KINETIS_FLEXMEM_SIZE)
|
||||
# define KINETIS_FLEXNVM_BASE 0x10000000 /* -0x13ffffff FlexNVM */
|
||||
# define KINETIS_FLEXRAM_BASE 0x14000000 /* -0x17ffffff FlexRAM */
|
||||
#endif
|
||||
#define KINETIS_SRAML_BASE 0x18000000 /* -0x1fffffff SRAM_L: Lower SRAM
|
||||
* (ICODE/DCODE) */
|
||||
#define KINETIS_SRAMU_BASE 0x20000000 /* -0x200fffff SRAM_U: Upper SRAM bitband
|
||||
* region */
|
||||
/* 0x20100000 * -0x21ffffff Reserved */
|
||||
#define KINETIS_SALIAS_BASE 0x22000000 /* -0x23ffffff Aliased to SRAM_U bitband */
|
||||
/* 0x24000000 * -0x3fffffff Reserved */
|
||||
#define KINETIS_BRIDGE0_BASE 0x40000000 /* -0x4007ffff Bitband region for peripheral
|
||||
* bridge 0 (AIPS-Lite0) */
|
||||
#define KINETIS_BRIDGE1_BASE 0x40080000 /* -0x400fffff Bitband region for peripheral
|
||||
* bridge 1 (AIPS-Lite1) */
|
||||
#define KINETIS_GPIOBB_BASE 0x400ff000 /* -0x400fffff Bitband region for general
|
||||
* purpose input/output (GPIO) */
|
||||
/* 0x40100000 * -0x41ffffff Reserved */
|
||||
#define KINETIS_PALIAS_BASE 0x42000000 /* -0x43ffffff Aliased to peripheral bridge
|
||||
* (AIPS-Lite) and general purpose
|
||||
* input/output (GPIO) bitband */
|
||||
/* 0x44000000 * -0x5fffffff Reserved */
|
||||
#define KINETIS_FLEXBUS_BASE 0x60000000 /* -0x7fffffff FlexBus */
|
||||
#define KINETIS_PERIPH_BASE 0xe0000000 /* -0xe00fffff Private peripherals */
|
||||
/* 0xe0100000 * -0xffffffff Reserved */
|
||||
|
||||
/* Peripheral Bridge 0 Memory Map ***************************************************/
|
||||
|
||||
#define KINETIS_AIPS0_BASE 0x40000000 /* Peripheral bridge 0 (AIPS-Lite 0) */
|
||||
#define KINETIS_XBAR_BASE 0x40004000 /* Crossbar switch */
|
||||
#define KINETIS_DMAC_BASE 0x40008000 /* DMA controller */
|
||||
#define KINETIS_DMADESC_BASE 0x40009000 /* DMA controller transfer control descriptors */
|
||||
#define KINETIS_FLEXBUSC_BASE 0x4000c000 /* FlexBus controller */
|
||||
#define KINETIS_MPU_BASE 0x4000d000 /* MPU */
|
||||
#define KINETIS_FMC_BASE 0x4001f000 /* Flash memory controller */
|
||||
#define KINETIS_FTFL_BASE 0x40020000 /* Flash memory */
|
||||
#define KINETIS_DMAMUX0_BASE 0x40021000 /* DMA channel mutiplexer 0 */
|
||||
#define KINETIS_CAN0_BASE 0x40024000 /* FlexCAN 0 */
|
||||
#define KINETIS_SPI0_BASE 0x4002c000 /* DSPI 0 */
|
||||
#define KINETIS_SPI1_BASE 0x4002d000 /* DSPI 1 */
|
||||
#define KINETIS_I2S0_BASE 0x4002f000 /* I2S 0 */
|
||||
#define KINETIS_CRC_BASE 0x40032000 /* CRC */
|
||||
#define KINETIS_USBDCD_BASE 0x40035000 /* USB DCD */
|
||||
#define KINETIS_PDB0_BASE 0x40036000 /* Programmable delay block */
|
||||
#define KINETIS_PIT_BASE 0x40037000 /* Periodic interrupt timers (PIT) */
|
||||
#define KINETIS_FTM0_BASE 0x40038000 /* FlexTimer (FTM) 0 */
|
||||
#define KINETIS_FTM1_BASE 0x40039000 /* FlexTimer (FTM) 1 */
|
||||
#define KINETIS_ADC0_BASE 0x4003b000 /* Analog-to-digital converter (ADC) 0 */
|
||||
#define KINETIS_RTC_BASE 0x4003d000 /* Real time clock */
|
||||
#define KINETIS_VBATR_BASE 0x4003e000 /* VBAT register file */
|
||||
#define KINETIS_LPTMR_BASE 0x40040000 /* Low power timer */
|
||||
#define KINETIS_SYSR_BASE 0x40041000 /* System register file */
|
||||
#define KINETIS_DRYICE_BASE 0x40042000 /* DryIce */
|
||||
#define KINETIS_DRYICESS_BASE 0x40043000 /* DryIce secure storage */
|
||||
#define KINETIS_TSI0_BASE 0x40045000 /* Touch sense interface */
|
||||
#define KINETIS_SIMLP_BASE 0x40047000 /* SIM low-power logic */
|
||||
#define KINETIS_SIM_BASE 0x40048000 /* System integration module (SIM) */
|
||||
#define KINETIS_PORT_BASE(n) (0x40049000 + ((n) << 12))
|
||||
#define KINETIS_PORTA_BASE 0x40049000 /* Port A multiplexing control */
|
||||
#define KINETIS_PORTB_BASE 0x4004a000 /* Port B multiplexing control */
|
||||
#define KINETIS_PORTC_BASE 0x4004b000 /* Port C multiplexing control */
|
||||
#define KINETIS_PORTD_BASE 0x4004c000 /* Port D multiplexing control */
|
||||
#define KINETIS_PORTE_BASE 0x4004d000 /* Port E multiplexing control */
|
||||
#define KINETIS_WDOG_BASE 0x40052000 /* Software watchdog */
|
||||
#define KINETIS_EWM_BASE 0x40061000 /* External watchdog */
|
||||
#define KINETIS_CMT_BASE 0x40062000 /* Carrier modulator timer (CMT) */
|
||||
#define KINETIS_MCG_BASE 0x40064000 /* Multi-purpose Clock Generator (MCG) */
|
||||
#define KINETIS_OSC_BASE 0x40065000 /* System oscillator (XOSC) */
|
||||
#define KINETIS_I2C0_BASE 0x40066000 /* I2C 0 */
|
||||
#define KINETIS_I2C1_BASE 0x40067000 /* I2C 1 */
|
||||
#define KINETIS_UART0_BASE 0x4006a000 /* UART0 */
|
||||
#define KINETIS_UART1_BASE 0x4006b000 /* UART1 */
|
||||
#define KINETIS_UART2_BASE 0x4006c000 /* UART2 */
|
||||
#define KINETIS_UART3_BASE 0x4006d000 /* UART3 */
|
||||
#define KINETIS_USB0_BASE 0x40072000 /* USB OTG FS/LS */
|
||||
#define KINETIS_CMP_BASE 0x40073000 /* Analog comparator (CMP) / 6-bit digital-to-analog converter (DAC) */
|
||||
#define KINETIS_VREF_BASE 0x40074000 /* Voltage reference (VREF) */
|
||||
#define KINETIS_LLWU_BASE 0x4007c000 /* Low-leakage wakeup unit (LLWU) */
|
||||
#define KINETIS_PMC_BASE 0x4007d000 /* Power management controller (PMC) */
|
||||
#define KINETIS_SMC_BASE 0x4007e000 /* System Mode controller (SMC) */
|
||||
|
||||
/* Peripheral Bridge 1 Memory Map ***************************************************/
|
||||
|
||||
#define KINETIS_AIPS1_BASE 0x40080000 /* Peripheral bridge 1 (AIPS-Lite 1) */
|
||||
#define KINETIS_RNGB_BASE 0x400a0000 /* Random number generator (RNGB) */
|
||||
#define KINETIS_CAN1_BASE 0x400a4000 /* FlexCAN 1 */
|
||||
#define KINETIS_SPI2_BASE 0x400ac000 /* DSPI 2 */
|
||||
#define KINETIS_SDHC_BASE 0x400b1000 /* SDHC */
|
||||
#define KINETIS_FTM2_BASE 0x400b8000 /* FlexTimer 2 */
|
||||
#define KINETIS_ADC1_BASE 0x400bb000 /* Analog-to-digital converter (ADC) 1 */
|
||||
#define KINETIS_EMAC_BASE 0x400c0000 /* Ethernet MAC and IEEE 1588 timers */
|
||||
#define KINETIS_DAC0_BASE 0x400cc000 /* 12-bit digital-to-analog converter (DAC) 0 */
|
||||
#define KINETIS_DAC1_BASE 0x400cd000 /* 12-bit digital-to-analog converter (DAC) 1 */
|
||||
#define KINETIS_UART4_BASE 0x400ea000 /* UART4 */
|
||||
#define KINETIS_UART5_BASE 0x400eb000 /* UART5 */
|
||||
#define KINETIS_XBARSS_BASE 0x400ff000 /* Not an AIPS-Lite slot. The 32-bit general
|
||||
* purpose input/output module that shares the
|
||||
* crossbar switch slave port with the AIPS-Lite
|
||||
* is accessed at this address. */
|
||||
#define KINETIS_GPIO_BASE(n) (0x400ff000 + ((n) << 6))
|
||||
#define KINETIS_GPIOA_BASE 0x400ff000 /* GPIO PORTA registers */
|
||||
#define KINETIS_GPIOB_BASE 0x400ff040 /* GPIO PORTB registers */
|
||||
#define KINETIS_GPIOC_BASE 0x400ff080 /* GPIO PORTC registers */
|
||||
#define KINETIS_GPIOD_BASE 0x400ff0c0 /* GPIO PORTD registers */
|
||||
#define KINETIS_GPIOE_BASE 0x400ff100 /* GPIO PORTE registers */
|
||||
|
||||
/* Private Peripheral Bus (PPB) Memory Map ******************************************/
|
||||
|
||||
#define KINETIS_ITM_BASE 0xe0000000 /* Instrumentation Trace Macrocell (ITM) */
|
||||
#define KINETIS_DWT_BASE 0xe0001000 /* Data Watchpoint and Trace (DWT) */
|
||||
#define KINETIS_FPB_BASE 0xe0002000 /* Flash Patch and Breakpoint (FPB) */
|
||||
#define KINETIS_SCS_BASE 0xe000e000 /* System Control Space (SCS) (for NVIC) */
|
||||
#define KINETIS_TPIU_BASE 0xe0040000 /* Trace Port Interface Unit (TPIU) */
|
||||
#define KINETIS_ETM_BASE 0xe0041000 /* Embedded Trace Macrocell (ETM) */
|
||||
#define KINETIS_ETB_BASE 0xe0042000 /* Embedded Trace Buffer (ETB) */
|
||||
#define KINETIS_TFUN_BASE 0xe0043000 /* Embedded Trace Funnel */
|
||||
#define KINETIS_MCM_BASE 0xe0080000 /* Miscellaneous Control Module (including ETB Almost Full) */
|
||||
#define KINETIS_MMCAU_BASE 0xe0081000 /* Memory Mapped Cryptographic Acceleration Unit (MMCAU) */
|
||||
#define KINETIS_ROMTAB_BASE 0xe00ff000 /* ROM Table - allows auto-detection of debug components */
|
||||
|
||||
/************************************************************************************
|
||||
* Public Types
|
||||
************************************************************************************/
|
||||
|
||||
/************************************************************************************
|
||||
* Public Data
|
||||
************************************************************************************/
|
||||
|
||||
/************************************************************************************
|
||||
* Public Functions
|
||||
************************************************************************************/
|
||||
|
||||
#endif /* KINETIS_K64 */
|
||||
#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_K60MEMORYMAP_H */
|
||||
+5
-5
@@ -1,7 +1,7 @@
|
||||
/********************************************************************************************
|
||||
* arch/arm/src/kinetis/kinetis_k60pinset.h
|
||||
* arch/arm/src/kinetis/chip/kinetis_k60pinset.h
|
||||
*
|
||||
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
|
||||
* Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
@@ -33,8 +33,8 @@
|
||||
*
|
||||
********************************************************************************************/
|
||||
|
||||
#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_K60PINMUX_H
|
||||
#define __ARCH_ARM_SRC_KINETIS_KINETIS_K60PINMUX_H
|
||||
#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_K60PINMUX_H
|
||||
#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_K60PINMUX_H
|
||||
|
||||
/********************************************************************************************
|
||||
* Included Files
|
||||
@@ -479,4 +479,4 @@
|
||||
* Public Functions
|
||||
********************************************************************************************/
|
||||
|
||||
#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_K60PINMUX_H */
|
||||
#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_K60PINMUX_H */
|
||||
@@ -0,0 +1,293 @@
|
||||
/************************************************************************************
|
||||
* arch/arm/src/kinetis/kinetis_k64fmc.h
|
||||
*
|
||||
* Copyright (C) 2016 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_K64FMC_H
|
||||
#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_K64FMC_H
|
||||
|
||||
/************************************************************************************
|
||||
* Included Files
|
||||
************************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include "chip.h"
|
||||
|
||||
/************************************************************************************
|
||||
* Pre-processor Definitions
|
||||
************************************************************************************/
|
||||
|
||||
/* Register Offsets *****************************************************************/
|
||||
|
||||
#define KINETIS_FMC_PFAPR_OFFSET 0x0000 /* Flash Access Protection Register */
|
||||
#define KINETIS_FMC_PFB0CR_OFFSET 0x0004 /* Flash Bank 0 Control Register */
|
||||
#define KINETIS_FMC_PFB1CR_OFFSET 0x0008 /* Flash Bank 1 Control Register */
|
||||
|
||||
/* Cache Directory Storage for way=w and set=s, w=0..3, s=0..7 */
|
||||
|
||||
#define KINETIS_FMC_TAGVD_OFFSET(w,s) (0x100 + ((w) << 5) + ((s) << 2))
|
||||
|
||||
#define KINETIS_FMC_TAGVDW0S0_OFFSET 0x0100 /* Cache Directory Storage */
|
||||
#define KINETIS_FMC_TAGVDW0S1_OFFSET 0x0104 /* Cache Directory Storage */
|
||||
#define KINETIS_FMC_TAGVDW0S2_OFFSET 0x0108 /* Cache Directory Storage */
|
||||
#define KINETIS_FMC_TAGVDW0S3_OFFSET 0x010c /* Cache Directory Storage */
|
||||
|
||||
#define KINETIS_FMC_TAGVDW1S0_OFFSET 0x0110 /* Cache Directory Storage */
|
||||
#define KINETIS_FMC_TAGVDW1S1_OFFSET 0x0114 /* Cache Directory Storage */
|
||||
#define KINETIS_FMC_TAGVDW1S2_OFFSET 0x0118 /* Cache Directory Storage */
|
||||
#define KINETIS_FMC_TAGVDW1S3_OFFSET 0x011c /* Cache Directory Storage */
|
||||
|
||||
#define KINETIS_FMC_TAGVDW2S0_OFFSET 0x0120 /* Cache Directory Storage */
|
||||
#define KINETIS_FMC_TAGVDW2S1_OFFSET 0x0124 /* Cache Directory Storage */
|
||||
#define KINETIS_FMC_TAGVDW2S2_OFFSET 0x0128 /* Cache Directory Storage */
|
||||
#define KINETIS_FMC_TAGVDW2S3_OFFSET 0x012c /* Cache Directory Storage */
|
||||
|
||||
#define KINETIS_FMC_TAGVDW3S0_OFFSET 0x0130 /* Cache Directory Storage */
|
||||
#define KINETIS_FMC_TAGVDW3S1_OFFSET 0x0134 /* Cache Directory Storage */
|
||||
#define KINETIS_FMC_TAGVDW3S2_OFFSET 0x0138 /* Cache Directory Storage */
|
||||
#define KINETIS_FMC_TAGVDW3S3_OFFSET 0x013c /* Cache Directory Storage */
|
||||
|
||||
/* Cache Data Storage (upper and lower) for way=w and set=s, w=0..3, s=0..7 */
|
||||
|
||||
#define KINETIS_FMC_DATAU_OFFSET(w,s) (0x200 + ((w) << 6) + ((s) << 2))
|
||||
#define KINETIS_FMC_DATAL_OFFSET(w,s) (0x204 + ((w) << 6) + ((s) << 2))
|
||||
|
||||
#define KINETIS_FMC_DATAW0S0U_OFFSET 0x0200 /* Cache Data Storage (upper word) */
|
||||
#define KINETIS_FMC_DATAW0S0L_OFFSET 0x0204 /* Cache Data Storage (lower word) */
|
||||
#define KINETIS_FMC_DATAW0S1U_OFFSET 0x0208 /* Cache Data Storage (upper word) */
|
||||
#define KINETIS_FMC_DATAW0S1L_OFFSET 0x020c /* Cache Data Storage (lower word) */
|
||||
#define KINETIS_FMC_DATAW0S2U_OFFSET 0x0210 /* Cache Data Storage (upper word) */
|
||||
#define KINETIS_FMC_DATAW0S2L_OFFSET 0x0214 /* Cache Data Storage (lower word) */
|
||||
#define KINETIS_FMC_DATAW0S3U_OFFSET 0x0218 /* Cache Data Storage (upper word) */
|
||||
#define KINETIS_FMC_DATAW0S3L_OFFSET 0x021c /* Cache Data Storage (lower word) */
|
||||
|
||||
#define KINETIS_FMC_DATAW1S0U_OFFSET 0x0220 /* Cache Data Storage (upper word) */
|
||||
#define KINETIS_FMC_DATAW1S0L_OFFSET 0x0224 /* Cache Data Storage (lower word) */
|
||||
#define KINETIS_FMC_DATAW1S1U_OFFSET 0x0228 /* Cache Data Storage (upper word) */
|
||||
#define KINETIS_FMC_DATAW1S1L_OFFSET 0x022c /* Cache Data Storage (lower word) */
|
||||
#define KINETIS_FMC_DATAW1S2U_OFFSET 0x0230 /* Cache Data Storage (upper word) */
|
||||
#define KINETIS_FMC_DATAW1S2L_OFFSET 0x0234 /* Cache Data Storage (lower word) */
|
||||
#define KINETIS_FMC_DATAW1S3U_OFFSET 0x0238 /* Cache Data Storage (upper word) */
|
||||
#define KINETIS_FMC_DATAW1S3L_OFFSET 0x023c /* Cache Data Storage (lower word) */
|
||||
|
||||
#define KINETIS_FMC_DATAW2S0U_OFFSET 0x0240 /* Cache Data Storage (upper word) */
|
||||
#define KINETIS_FMC_DATAW2S0L_OFFSET 0x0244 /* Cache Data Storage (lower word) */
|
||||
#define KINETIS_FMC_DATAW2S1U_OFFSET 0x0248 /* Cache Data Storage (upper word) */
|
||||
#define KINETIS_FMC_DATAW2S1L_OFFSET 0x024c /* Cache Data Storage (lower word) */
|
||||
#define KINETIS_FMC_DATAW2S2U_OFFSET 0x0250 /* Cache Data Storage (upper word) */
|
||||
#define KINETIS_FMC_DATAW2S2L_OFFSET 0x0254 /* Cache Data Storage (lower word) */
|
||||
#define KINETIS_FMC_DATAW2S3U_OFFSET 0x0258 /* Cache Data Storage (upper word) */
|
||||
#define KINETIS_FMC_DATAW2S3L_OFFSET 0x025c /* Cache Data Storage (lower word) */
|
||||
|
||||
#define KINETIS_FMC_DATAW3S0U_OFFSET 0x0260 /* Cache Data Storage (upper word) */
|
||||
#define KINETIS_FMC_DATAW3S0L_OFFSET 0x0264 /* Cache Data Storage (lower word) */
|
||||
#define KINETIS_FMC_DATAW3S1U_OFFSET 0x0268 /* Cache Data Storage (upper word) */
|
||||
#define KINETIS_FMC_DATAW3S1L_OFFSET 0x026c /* Cache Data Storage (lower word) */
|
||||
#define KINETIS_FMC_DATAW3S2U_OFFSET 0x0270 /* Cache Data Storage (upper word) */
|
||||
#define KINETIS_FMC_DATAW3S2L_OFFSET 0x0274 /* Cache Data Storage (lower word) */
|
||||
#define KINETIS_FMC_DATAW3S3U_OFFSET 0x0278 /* Cache Data Storage (upper word) */
|
||||
#define KINETIS_FMC_DATAW3S3L_OFFSET 0x027c /* Cache Data Storage (lower word) */
|
||||
|
||||
/* Register Addresses ***************************************************************/
|
||||
|
||||
#define KINETIS_FMC_PFAPR (KINETIS_FMC_BASE+KINETIS_FMC_PFAPR_OFFSET)
|
||||
#define KINETIS_FMC_PFB0CR (KINETIS_FMC_BASE+KINETIS_FMC_PFB0CR_OFFSET)
|
||||
#define KINETIS_FMC_PFB1CR (KINETIS_FMC_BASE+KINETIS_FMC_PFB1CR_OFFSET)
|
||||
|
||||
/* Cache Directory Storage for way=w and set=s, w=0..3, s=0..7 */
|
||||
|
||||
#define KINETIS_FMC_TAGVD(w,s) (KINETIS_FMC_BASE+KINETIS_FMC_TAGVD_OFFSET(w,s))
|
||||
|
||||
#define KINETIS_FMC_TAGVDW0S0 (KINETIS_FMC_BASE+KINETIS_FMC_TAGVDW0S0_OFFSET)
|
||||
#define KINETIS_FMC_TAGVDW0S1 (KINETIS_FMC_BASE+KINETIS_FMC_TAGVDW0S1_OFFSET)
|
||||
#define KINETIS_FMC_TAGVDW0S2 (KINETIS_FMC_BASE+KINETIS_FMC_TAGVDW0S2_OFFSET)
|
||||
#define KINETIS_FMC_TAGVDW0S3 (KINETIS_FMC_BASE+KINETIS_FMC_TAGVDW0S3_OFFSET)
|
||||
|
||||
#define KINETIS_FMC_TAGVDW1S0 (KINETIS_FMC_BASE+KINETIS_FMC_TAGVDW1S0_OFFSET)
|
||||
#define KINETIS_FMC_TAGVDW1S1 (KINETIS_FMC_BASE+KINETIS_FMC_TAGVDW1S1_OFFSET)
|
||||
#define KINETIS_FMC_TAGVDW1S2 (KINETIS_FMC_BASE+KINETIS_FMC_TAGVDW1S2_OFFSET)
|
||||
#define KINETIS_FMC_TAGVDW1S3 (KINETIS_FMC_BASE+KINETIS_FMC_TAGVDW1S3_OFFSET)
|
||||
|
||||
#define KINETIS_FMC_TAGVDW2S0 (KINETIS_FMC_BASE+KINETIS_FMC_TAGVDW2S0_OFFSET)
|
||||
#define KINETIS_FMC_TAGVDW2S1 (KINETIS_FMC_BASE+KINETIS_FMC_TAGVDW2S1_OFFSET)
|
||||
#define KINETIS_FMC_TAGVDW2S2 (KINETIS_FMC_BASE+KINETIS_FMC_TAGVDW2S2_OFFSET)
|
||||
#define KINETIS_FMC_TAGVDW2S3 (KINETIS_FMC_BASE+KINETIS_FMC_TAGVDW2S3_OFFSET)
|
||||
|
||||
#define KINETIS_FMC_TAGVDW3S0 (KINETIS_FMC_BASE+KINETIS_FMC_TAGVDW3S0_OFFSET)
|
||||
#define KINETIS_FMC_TAGVDW3S1 (KINETIS_FMC_BASE+KINETIS_FMC_TAGVDW3S1_OFFSET)
|
||||
#define KINETIS_FMC_TAGVDW3S2 (KINETIS_FMC_BASE+KINETIS_FMC_TAGVDW3S2_OFFSET)
|
||||
#define KINETIS_FMC_TAGVDW3S3 (KINETIS_FMC_BASE+KINETIS_FMC_TAGVDW3S3_OFFSET)
|
||||
|
||||
/* Cache Data Storage (upper and lower) for way=w and set=s, w=0..3, s=0..7 */
|
||||
|
||||
#define KINETIS_FMC_DATAU(w,s) (KINETIS_FMC_BASE+KINETIS_FMC_DATAU_OFFSET(w,s))
|
||||
#define KINETIS_FMC_DATAL(w,s) (KINETIS_FMC_BASE+KINETIS_FMC_DATAL_OFFSET(w,s))
|
||||
|
||||
#define KINETIS_FMC_DATAW0S0U (KINETIS_FMC_BASE+KINETIS_FMC_DATAW0S0U_OFFSET)
|
||||
#define KINETIS_FMC_DATAW0S0L (KINETIS_FMC_BASE+KINETIS_FMC_DATAW0S0L_OFFSET)
|
||||
#define KINETIS_FMC_DATAW0S1U (KINETIS_FMC_BASE+KINETIS_FMC_DATAW0S1U_OFFSET)
|
||||
#define KINETIS_FMC_DATAW0S1L (KINETIS_FMC_BASE+KINETIS_FMC_DATAW0S1L_OFFSET)
|
||||
#define KINETIS_FMC_DATAW0S2U (KINETIS_FMC_BASE+KINETIS_FMC_DATAW0S2U_OFFSET)
|
||||
#define KINETIS_FMC_DATAW0S2L (KINETIS_FMC_BASE+KINETIS_FMC_DATAW0S2L_OFFSET)
|
||||
#define KINETIS_FMC_DATAW0S3U (KINETIS_FMC_BASE+KINETIS_FMC_DATAW0S3U_OFFSET)
|
||||
#define KINETIS_FMC_DATAW0S3L (KINETIS_FMC_BASE+KINETIS_FMC_DATAW0S3L_OFFSET)
|
||||
|
||||
#define KINETIS_FMC_DATAW1S0U (KINETIS_FMC_BASE+KINETIS_FMC_DATAW1S0U_OFFSET)
|
||||
#define KINETIS_FMC_DATAW1S0L (KINETIS_FMC_BASE+KINETIS_FMC_DATAW1S0L_OFFSET)
|
||||
#define KINETIS_FMC_DATAW1S1U (KINETIS_FMC_BASE+KINETIS_FMC_DATAW1S1U_OFFSET)
|
||||
#define KINETIS_FMC_DATAW1S1L (KINETIS_FMC_BASE+KINETIS_FMC_DATAW1S1L_OFFSET)
|
||||
#define KINETIS_FMC_DATAW1S2U (KINETIS_FMC_BASE+KINETIS_FMC_DATAW1S2U_OFFSET)
|
||||
#define KINETIS_FMC_DATAW1S2L (KINETIS_FMC_BASE+KINETIS_FMC_DATAW1S2L_OFFSET)
|
||||
#define KINETIS_FMC_DATAW1S3U (KINETIS_FMC_BASE+KINETIS_FMC_DATAW1S3U_OFFSET)
|
||||
#define KINETIS_FMC_DATAW1S3L (KINETIS_FMC_BASE+KINETIS_FMC_DATAW1S3L_OFFSET)
|
||||
|
||||
#define KINETIS_FMC_DATAW2S0U (KINETIS_FMC_BASE+KINETIS_FMC_DATAW2S0U_OFFSET)
|
||||
#define KINETIS_FMC_DATAW2S0L (KINETIS_FMC_BASE+KINETIS_FMC_DATAW2S0L_OFFSET)
|
||||
#define KINETIS_FMC_DATAW2S1U (KINETIS_FMC_BASE+KINETIS_FMC_DATAW2S1U_OFFSET)
|
||||
#define KINETIS_FMC_DATAW2S1L (KINETIS_FMC_BASE+KINETIS_FMC_DATAW2S1L_OFFSET)
|
||||
#define KINETIS_FMC_DATAW2S2U (KINETIS_FMC_BASE+KINETIS_FMC_DATAW2S2U_OFFSET)
|
||||
#define KINETIS_FMC_DATAW2S2L (KINETIS_FMC_BASE+KINETIS_FMC_DATAW2S2L_OFFSET)
|
||||
#define KINETIS_FMC_DATAW2S3U (KINETIS_FMC_BASE+KINETIS_FMC_DATAW2S3U_OFFSET)
|
||||
#define KINETIS_FMC_DATAW2S3L (KINETIS_FMC_BASE+KINETIS_FMC_DATAW2S3L_OFFSET)
|
||||
|
||||
#define KINETIS_FMC_DATAW3S0U (KINETIS_FMC_BASE+KINETIS_FMC_DATAW3S0U_OFFSET)
|
||||
#define KINETIS_FMC_DATAW3S0L (KINETIS_FMC_BASE+KINETIS_FMC_DATAW3S0L_OFFSET)
|
||||
#define KINETIS_FMC_DATAW3S1U (KINETIS_FMC_BASE+KINETIS_FMC_DATAW3S1U_OFFSET)
|
||||
#define KINETIS_FMC_DATAW3S1L (KINETIS_FMC_BASE+KINETIS_FMC_DATAW3S1L_OFFSET)
|
||||
#define KINETIS_FMC_DATAW3S2U (KINETIS_FMC_BASE+KINETIS_FMC_DATAW3S2U_OFFSET)
|
||||
#define KINETIS_FMC_DATAW3S2L (KINETIS_FMC_BASE+KINETIS_FMC_DATAW3S2L_OFFSET)
|
||||
#define KINETIS_FMC_DATAW3S3U (KINETIS_FMC_BASE+KINETIS_FMC_DATAW3S3U_OFFSET)
|
||||
#define KINETIS_FMC_DATAW3S3L (KINETIS_FMC_BASE+KINETIS_FMC_DATAW3S3L_OFFSET)
|
||||
|
||||
/* Register Bit Definitions *********************************************************/
|
||||
|
||||
/* Flash Access Protection Register */
|
||||
/* Access protection bits (all masters) */
|
||||
|
||||
#define FMC_PFAPR_NONE 0 /* No access may be performed by this master */
|
||||
#define FMC_PFAPR_RDONLY 1 /* Only read accesses may be performed by this master */
|
||||
#define FMC_PFAPR_WRONLY 2 /* Only write accesses may be performed by this master */
|
||||
#define FMC_PFAPR_RDWR 3 /* Both read and write accesses may be performed by this master */
|
||||
|
||||
#define FMC_PFAPR_M0AP_SHIFT (0) /* Bits 0-1: Master 0 Access Protection */
|
||||
#define FMC_PFAPR_M0AP_MASK (3 << FMC_PFAPR_M0AP_SHIFT)
|
||||
#define FMC_PFAPR_M1AP_SHIFT (2) /* Bits 2-3: Master 1 Access Protection */
|
||||
#define FMC_PFAPR_M1AP_MASK (3 << FMC_PFAPR_M1AP_SHIFT)
|
||||
#define FMC_PFAPR_M2AP_SHIFT (4) /* Bits 4-5: Master 2 Access Protection */
|
||||
#define FMC_PFAPR_M2AP_MASK (3 << FMC_PFAPR_M2AP_SHIFT)
|
||||
#define FMC_PFAPR_M3AP_SHIFT (6) /* Bits 6-7: Master 3 Access Protection */
|
||||
#define FMC_PFAPR_M3AP_MASK (3 << FMC_PFAPR_M3AP_SHIFT)
|
||||
#define FMC_PFAPR_M4AP_SHIFT (8) /* Bits 8-9: Master 4 Access Protection */
|
||||
#define FMC_PFAPR_M4AP_MASK (3 << FMC_PFAPR_M4AP_SHIFT)
|
||||
#define FMC_PFAPR_M5AP_SHIFT (10) /* Bits 10-11: Master 5 Access Protection */
|
||||
#define FMC_PFAPR_M5AP_MASK (3 << FMC_PFAPR_M5AP_SHIFT)
|
||||
#define FMC_PFAPR_M6AP_SHIFT (12) /* Bits 12-13: Master 6 Access Protection */
|
||||
#define FMC_PFAPR_M6AP_MASK (3 << FMC_PFAPR_M6AP_SHIFT)
|
||||
#define FMC_PFAPR_M7AP_SHIFT (14) /* Bits 14-15: Master 7 Access Protection */
|
||||
#define FMC_PFAPR_M7AP_MASK (3 << FMC_PFAPR_M7AP_SHIFT)
|
||||
#define FMC_PFAPR_M0PFD (1 << 16) /* Bit 16: Master 0 Prefetch Disable */
|
||||
#define FMC_PFAPR_M1PFD (1 << 17) /* Bit 17: Master 1 Prefetch Disable */
|
||||
#define FMC_PFAPR_M2PFD (1 << 18) /* Bit 18: Master 2 Prefetch Disable */
|
||||
#define FMC_PFAPR_M3PFD (1 << 19) /* Bit 19: Master 3 Prefetch Disable */
|
||||
#define FMC_PFAPR_M4PFD (1 << 20) /* Bit 20: Master 4 Prefetch Disable */
|
||||
#define FMC_PFAPR_M5PFD (1 << 21) /* Bit 21: Master 5 Prefetch Disable */
|
||||
#define FMC_PFAPR_M6PFD (1 << 22) /* Bit 22: Master 6 Prefetch Disable */
|
||||
#define FMC_PFAPR_M7PFD (1 << 23) /* Bit 23: Master 7 Prefetch Disable */
|
||||
/* Bits 24-31: Reserved */
|
||||
/* Flash Bank 0 Control Register */
|
||||
|
||||
#define FMC_PFB0CR_B0SEBE (1 << 0) /* Bit 0: Bank 0 Single Entry Buffer Enable */
|
||||
#define FMC_PFB0CR_B0IPE (1 << 1) /* Bit 1: Bank 0 Instruction Prefetch Enable */
|
||||
#define FMC_PFB0CR_B0DPE (1 << 2) /* Bit 2: Bank 0 Data Prefetch Enable */
|
||||
#define FMC_PFB0CR_B0ICE (1 << 3) /* Bit 3: Bank 0 Instruction Cache Enable */
|
||||
#define FMC_PFB0CR_B0DCE (1 << 4) /* Bit 4: Bank 0 Data Cache Enable */
|
||||
#define FMC_PFB0CR_CRC_SHIFT (5) /* Bits 5-7: Cache Replacement Control */
|
||||
#define FMC_PFB0CR_CRC_MASK (7 << FMC_PFB0CR_CRC_SHIFT)
|
||||
# define FMC_PFB0CR_CRC_ALL (0 << FMC_PFB0CR_CRC_SHIFT) /* LRU all four ways */
|
||||
# define FMC_PFB0CR_CRC_I01D23 (2 << FMC_PFB0CR_CRC_SHIFT) /* LRU ifetches 0-1 data 2-3 */
|
||||
# define FMC_PFB0CR_CRC_I012D3 (3 << FMC_PFB0CR_CRC_SHIFT) /* LRU ifetches 0-3 data 3 */
|
||||
/* Bits 8-16: Reserved */
|
||||
#define FMC_PFB0CR_B0MW_SHIFT (17) /* Bits 17-18: Bank 0 Memory Width */
|
||||
#define FMC_PFB0CR_B0MW_MASK (3 << FMC_PFB0CR_B0MW_SHIFT)
|
||||
# define FMC_PFB0CR_B0MW_32BITS (0 << FMC_PFB0CR_B0MW_SHIFT) /* 32 bits */
|
||||
# define FMC_PFB0CR_B0MW_64BITS (1 << FMC_PFB0CR_B0MW_SHIFT) /* 64 bits */
|
||||
#define FMC_PFB0CR_S_B_INV (1 << 19) /* Bit 19: Invalidate Prefetch Speculation Buffer */
|
||||
#define FMC_PFB0CR_CINV_WAY_SHIFT (20) /* Bits 20-23: Cache Invalidate Way x */
|
||||
#define FMC_PFB0CR_CINV_WAY_MASK (15 << FMC_PFB0CR_CINV_WAY_SHIFT)
|
||||
#define FMC_PFB0CR_CLCK_WAY_SHIFT (24) /* Bits 24-27: Cache Lock Way x */
|
||||
#define FMC_PFB0CR_CLCK_WAY_MASK (15 << FMC_PFB0CR_CLCK_WAY_SHIFT)
|
||||
#define FMC_PFB0CR_B0RWSC_SHIFT (28) /* Bits 28-31: Bank 0 Read Wait State Control */
|
||||
#define FMC_PFB0CR_B0RWSC_MASK (15 << FMC_PFB0CR_B0RWSC_SHIFT)
|
||||
|
||||
/* Flash Bank 1 Control Register */
|
||||
|
||||
#define FMC_PFB1CR_B1SEBE (1 << 0) /* Bit 0: Bank 1 Single Entry Buffer Enable */
|
||||
#define FMC_PFB1CR_B1IPE (1 << 1) /* Bit 1: Bank 1 Instruction Prefetch Enable */
|
||||
#define FMC_PFB1CR_B1DPE (1 << 2) /* Bit 2: Bank 1 Data Prefetch Enable */
|
||||
#define FMC_PFB1CR_B1ICE (1 << 3) /* Bit 3: Bank 1 Instruction Cache Enable */
|
||||
#define FMC_PFB1CR_B1DCE (1 << 4) /* Bit 4: Bank 1 Data Cache Enable */
|
||||
/* Bits 5-16: Reserved */
|
||||
#define FMC_PFB1CR_B1MW_SHIFT (17) /* Bits 17-18: Bank 1 Memory Width */
|
||||
#define FMC_PFB1CR_B1MW_MASK (3 << FMC_PFB1CR_B1MW_SHIFT)
|
||||
# define FMC_PFB1CR_B1MW_32BITS (0 << FMC_PFB1CR_B1MW_SHIFT) /* 32 bits */
|
||||
# define FMC_PFB1CR_B1MW_64BITS (1 << FMC_PFB1CR_B1MW_SHIFT) /* 64 bits */
|
||||
/* Bits 19-27: Reserved */
|
||||
#define FMC_PFB1CR_B1RWSC_SHIFT (28) /* Bits 28-31: Bank 1 Read Wait State Control */
|
||||
#define FMC_PFB1CR_B1RWSC_MASK (15 << FMC_PFB1CR_B0RWSC_SHIFT)
|
||||
|
||||
/* Cache Directory Storage for way=w and set=s, w=0..3, s=0..7 */
|
||||
|
||||
#define FMC_TAGVD_VALID (1 << 0) /* Bit 0: 1-bit valid for cache entry */
|
||||
/* Bits 1-4: Reserved */
|
||||
#define FMC_TAGVD_TAG_SHIFT (5) /* Bits 5-18: 13-bit tag for cache entry */
|
||||
#define FMC_TAGVD_TAG_MASK (0x1fff << FMC_TAGVD_TAG_SHIFT)
|
||||
/* Bits 19-31: Reserved */
|
||||
|
||||
/* Cache Data Storage (upper and lower) for way=w and set=s, w=0..3, s=0..7.
|
||||
* 64-bit data in two 32-bit registers.
|
||||
*/
|
||||
|
||||
/************************************************************************************
|
||||
* Public Types
|
||||
************************************************************************************/
|
||||
|
||||
/************************************************************************************
|
||||
* Public Data
|
||||
************************************************************************************/
|
||||
|
||||
/************************************************************************************
|
||||
* Public Functions
|
||||
************************************************************************************/
|
||||
|
||||
#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_K64FMC_H */
|
||||
@@ -0,0 +1,213 @@
|
||||
/************************************************************************************
|
||||
* arch/arm/src/kinetis/chip/kinetis_k64memorymap.h
|
||||
*
|
||||
* Copyright (C) 2016 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_K64MEMORYMAP_H
|
||||
#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_K64MEMORYMAP_H
|
||||
|
||||
/************************************************************************************
|
||||
* Included Files
|
||||
************************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include "chip.h"
|
||||
|
||||
#ifdef KINETIS_K64
|
||||
|
||||
/************************************************************************************
|
||||
* Pre-processor Definitions
|
||||
************************************************************************************/
|
||||
|
||||
/* Memory Map ***********************************************************************/
|
||||
/* K64 Family
|
||||
*
|
||||
* The memory map for the following parts is defined in NXP document
|
||||
* K64P144M120SF5RM.pdf
|
||||
*/
|
||||
|
||||
#if defined(CONFIG_ARCH_CHIP_MK64FX512VLL12) || defined(CONFIG_ARCH_CHIP_MK64FN1M0VLL12) || \
|
||||
defined(CONFIG_ARCH_CHIP_MK64FX512VDC12) || defined(CONFIG_ARCH_CHIP_MK64FN1M0VDC12) || \
|
||||
defined(CONFIG_ARCH_CHIP_MK64FX512VLQ12) || defined(CONFIG_ARCH_CHIP_MK64FX512VMD12) || \
|
||||
defined(CONFIG_ARCH_CHIP_MK64FN1M0VLQ12) || defined(CONFIG_ARCH_CHIP_MK64FN1M0VMD12)
|
||||
|
||||
# define KINETIS_FLASH_BASE 0x00000000 /* -0x0fffffff Program flash and read-
|
||||
* only data (Includes exception
|
||||
* vectors in first 1024 bytes) */
|
||||
# if !defined(KINETIS_FLEXMEM_SIZE)
|
||||
# define KINETIS_FLEXNVM_BASE 0x10000000 /* -0x13ffffff FlexNVM */
|
||||
# define KINETIS_FLEXRAM_BASE 0x14000000 /* -0x17ffffff FlexRAM */
|
||||
# endif
|
||||
# define KINETIS_SRAML_BASE 0x18000000 /* -0x1fffffff SRAM_L: Lower SRAM
|
||||
* (ICODE/DCODE) */
|
||||
# define KINETIS_SRAMU_BASE 0x20000000 /* -0x200fffff SRAM_U: Upper SRAM bitband
|
||||
* region */
|
||||
/* 0x20100000 * -0x21ffffff Reserved */
|
||||
# define KINETIS_SALIAS_BASE 0x22000000 /* -0x23ffffff Aliased to SRAM_U bitband */
|
||||
/* 0x24000000 * -0x3fffffff Reserved */
|
||||
# define KINETIS_BRIDGE0_BASE 0x40000000 /* -0x4007ffff Bitband region for peripheral
|
||||
* bridge 0 (AIPS-Lite0) */
|
||||
# define KINETIS_BRIDGE1_BASE 0x40080000 /* -0x400fffff Bitband region for peripheral
|
||||
* bridge 1 (AIPS-Lite1) */
|
||||
# define KINETIS_GPIOBB_BASE 0x400ff000 /* -0x400fffff Bitband region for general
|
||||
* purpose input/output (GPIO) */
|
||||
/* 0x40100000 * -0x41ffffff Reserved */
|
||||
# define KINETIS_PALIAS_BASE 0x42000000 /* -0x43ffffff Aliased to peripheral bridge
|
||||
* (AIPS-Lite) and general purpose
|
||||
* input/output (GPIO) bitband */
|
||||
/* 0x44000000 * -0x5fffffff Reserved */
|
||||
# define KINETIS_FLEXBUS_BASE 0x60000000 /* -0x7fffffff FlexBus */
|
||||
# define KINETIS_PERIPH_BASE 0xe0000000 /* -0xe00fffff Private peripherals */
|
||||
/* 0xe0100000 * -0xffffffff Reserved */
|
||||
|
||||
/* Peripheral Bridge 0 Memory Map ***************************************************/
|
||||
|
||||
# define KINETIS_AIPS0_BASE 0x40000000 /* Peripheral bridge 0 (AIPS-Lite 0) */
|
||||
# define KINETIS_XBAR_BASE 0x40004000 /* Crossbar switch */
|
||||
# define KINETIS_DMAC_BASE 0x40008000 /* DMA controller */
|
||||
# define KINETIS_DMADESC_BASE 0x40009000 /* DMA controller transfer control descriptors */
|
||||
# define KINETIS_FLEXBUSC_BASE 0x4000c000 /* FlexBus controller */
|
||||
# define KINETIS_MPU_BASE 0x4000d000 /* MPU */
|
||||
# define KINETIS_FMC_BASE 0x4001f000 /* Flash memory controller */
|
||||
# define KINETIS_FTFE_BASE 0x40020000 /* Flash memory */
|
||||
# define KINETIS_DMAMUX0_BASE 0x40021000 /* DMA channel mutiplexer 0 */
|
||||
# define KINETIS_CAN0_BASE 0x40024000 /* FlexCAN 0 */
|
||||
# define KINETIS_SPI0_BASE 0x4002c000 /* DSPI 0 */
|
||||
# define KINETIS_SPI1_BASE 0x4002d000 /* DSPI 1 */
|
||||
# define KINETIS_I2S0_BASE 0x4002f000 /* I2S 0 */
|
||||
# define KINETIS_CRC_BASE 0x40032000 /* CRC */
|
||||
# define KINETIS_USBDCD_BASE 0x40035000 /* USB DCD */
|
||||
# define KINETIS_PDB0_BASE 0x40036000 /* Programmable delay block */
|
||||
# define KINETIS_PIT_BASE 0x40037000 /* Periodic interrupt timers (PIT) */
|
||||
# define KINETIS_FTM0_BASE 0x40038000 /* FlexTimer (FTM) 0 */
|
||||
# define KINETIS_FTM1_BASE 0x40039000 /* FlexTimer (FTM) 1 */
|
||||
# define KINETIS_ADC0_BASE 0x4003b000 /* Analog-to-digital converter (ADC) 0 */
|
||||
# define KINETIS_RTC_BASE 0x4003d000 /* Real time clock */
|
||||
# define KINETIS_VBATR_BASE 0x4003e000 /* VBAT register file */
|
||||
# define KINETIS_LPTMR_BASE 0x40040000 /* Low power timer */
|
||||
# define KINETIS_SYSR_BASE 0x40041000 /* System register file */
|
||||
# define KINETIS_DRYICE_BASE 0x40042000 /* DryIce */
|
||||
# define KINETIS_DRYICESS_BASE 0x40043000 /* DryIce secure storage */
|
||||
# define KINETIS_TSI0_BASE 0x40045000 /* Touch sense interface */
|
||||
# define KINETIS_SIMLP_BASE 0x40047000 /* SIM low-power logic */
|
||||
# define KINETIS_SIM_BASE 0x40048000 /* System integration module (SIM) */
|
||||
# define KINETIS_PORT_BASE(n) (0x40049000 + ((n) << 12))
|
||||
# define KINETIS_PORTA_BASE 0x40049000 /* Port A multiplexing control */
|
||||
# define KINETIS_PORTB_BASE 0x4004a000 /* Port B multiplexing control */
|
||||
# define KINETIS_PORTC_BASE 0x4004b000 /* Port C multiplexing control */
|
||||
# define KINETIS_PORTD_BASE 0x4004c000 /* Port D multiplexing control */
|
||||
# define KINETIS_PORTE_BASE 0x4004d000 /* Port E multiplexing control */
|
||||
# define KINETIS_WDOG_BASE 0x40052000 /* Software watchdog */
|
||||
# define KINETIS_EWM_BASE 0x40061000 /* External watchdog */
|
||||
# define KINETIS_CMT_BASE 0x40062000 /* Carrier modulator timer (CMT) */
|
||||
# define KINETIS_MCG_BASE 0x40064000 /* Multi-purpose Clock Generator (MCG) */
|
||||
# define KINETIS_OSC_BASE 0x40065000 /* System oscillator (XOSC) */
|
||||
# define KINETIS_I2C0_BASE 0x40066000 /* I2C 0 */
|
||||
# define KINETIS_I2C1_BASE 0x40067000 /* I2C 1 */
|
||||
# define KINETIS_I2C2_BASE 0x400E6000 /* I2C 2 */
|
||||
# define KINETIS_UART0_BASE 0x4006a000 /* UART0 */
|
||||
# define KINETIS_UART1_BASE 0x4006b000 /* UART1 */
|
||||
# define KINETIS_UART2_BASE 0x4006c000 /* UART2 */
|
||||
# define KINETIS_UART3_BASE 0x4006d000 /* UART3 */
|
||||
# define KINETIS_USB0_BASE 0x40072000 /* USB OTG FS/LS */
|
||||
# define KINETIS_CMP_BASE 0x40073000 /* Analog comparator (CMP) / 6-bit digital-to-analog converter (DAC) */
|
||||
# define KINETIS_VREF_BASE 0x40074000 /* Voltage reference (VREF) */
|
||||
# define KINETIS_LLWU_BASE 0x4007c000 /* Low-leakage wakeup unit (LLWU) */
|
||||
# define KINETIS_PMC_BASE 0x4007d000 /* Power management controller (PMC) */
|
||||
# define KINETIS_SMC_BASE 0x4007e000 /* System Mode controller (SMC) */
|
||||
|
||||
/* Peripheral Bridge 1 Memory Map ***************************************************/
|
||||
|
||||
# define KINETIS_AIPS1_BASE 0x40080000 /* Peripheral bridge 1 (AIPS-Lite 1) */
|
||||
# define KINETIS_RNGB_BASE 0x400a0000 /* Random number generator (RNGB) */
|
||||
# define KINETIS_CAN1_BASE 0x400a4000 /* FlexCAN 1 */
|
||||
# define KINETIS_SPI2_BASE 0x400ac000 /* DSPI 2 */
|
||||
# define KINETIS_SDHC_BASE 0x400b1000 /* SDHC */
|
||||
# define KINETIS_FTM2_BASE 0x4003a000 /* FlexTimer 2 */
|
||||
# define KINETIS_FTM3_BASE 0x400b9000 /* FlexTimer 3 */
|
||||
# define KINETIS_ADC1_BASE 0x400bb000 /* Analog-to-digital converter (ADC) 1 */
|
||||
# define KINETIS_EMAC_BASE 0x400c0000 /* Ethernet MAC and IEEE 1588 timers */
|
||||
# define KINETIS_DAC0_BASE 0x400cc000 /* 12-bit digital-to-analog converter (DAC) 0 */
|
||||
# define KINETIS_DAC1_BASE 0x400cd000 /* 12-bit digital-to-analog converter (DAC) 1 */
|
||||
# define KINETIS_UART4_BASE 0x400ea000 /* UART4 */
|
||||
# define KINETIS_UART5_BASE 0x400eb000 /* UART5 */
|
||||
# define KINETIS_XBARSS_BASE 0x400ff000 /* Not an AIPS-Lite slot. The 32-bit general
|
||||
* purpose input/output module that shares the
|
||||
* crossbar switch slave port with the AIPS-Lite
|
||||
* is accessed at this address. */
|
||||
# define KINETIS_GPIO_BASE(n) (0x400ff000 + ((n) << 6))
|
||||
# define KINETIS_GPIOA_BASE 0x400ff000 /* GPIO PORTA registers */
|
||||
# define KINETIS_GPIOB_BASE 0x400ff040 /* GPIO PORTB registers */
|
||||
# define KINETIS_GPIOC_BASE 0x400ff080 /* GPIO PORTC registers */
|
||||
# define KINETIS_GPIOD_BASE 0x400ff0c0 /* GPIO PORTD registers */
|
||||
# define KINETIS_GPIOE_BASE 0x400ff100 /* GPIO PORTE registers */
|
||||
|
||||
/* Private Peripheral Bus (PPB) Memory Map ******************************************/
|
||||
|
||||
# define KINETIS_ITM_BASE 0xe0000000 /* Instrumentation Trace Macrocell (ITM) */
|
||||
# define KINETIS_DWT_BASE 0xe0001000 /* Data Watchpoint and Trace (DWT) */
|
||||
# define KINETIS_FPB_BASE 0xe0002000 /* Flash Patch and Breakpoint (FPB) */
|
||||
# define KINETIS_SCS_BASE 0xe000e000 /* System Control Space (SCS) (for NVIC) */
|
||||
# define KINETIS_TPIU_BASE 0xe0040000 /* Trace Port Interface Unit (TPIU) */
|
||||
# define KINETIS_ETM_BASE 0xe0041000 /* Embedded Trace Macrocell (ETM) */
|
||||
# define KINETIS_ETB_BASE 0xe0042000 /* Embedded Trace Buffer (ETB) */
|
||||
# define KINETIS_TFUN_BASE 0xe0043000 /* Embedded Trace Funnel */
|
||||
# define KINETIS_MCM_BASE 0xe0080000 /* Miscellaneous Control Module (including ETB Almost Full) */
|
||||
# define KINETIS_MMCAU_BASE 0xe0081000 /* Memory Mapped Cryptographic Acceleration Unit (MMCAU) */
|
||||
# define KINETIS_ROMTAB_BASE 0xe00ff000 /* ROM Table - allows auto-detection of debug components */
|
||||
|
||||
#else
|
||||
/* The memory map for other parts is defined in other documents and may or may not
|
||||
* be the same as above (the family members are all very similar) This error just
|
||||
* means that you have to look at the document and determine for yourself if the
|
||||
* memory map is the same.
|
||||
*/
|
||||
|
||||
# error "No memory map for this K64 part"
|
||||
#endif
|
||||
|
||||
/************************************************************************************
|
||||
* Public Types
|
||||
************************************************************************************/
|
||||
|
||||
/************************************************************************************
|
||||
* Public Data
|
||||
************************************************************************************/
|
||||
|
||||
/************************************************************************************
|
||||
* Public Functions
|
||||
************************************************************************************/
|
||||
|
||||
#endif /* KINETIS_K64 */
|
||||
#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_K64MEMORYMAP_H */
|
||||
@@ -0,0 +1,358 @@
|
||||
/****************************************************************************************************
|
||||
* arch/arm/src/kinetis/kinetis_mpu.h
|
||||
*
|
||||
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
****************************************************************************************************/
|
||||
|
||||
#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_MPU_H
|
||||
#define __ARCH_ARM_SRC_KINETIS_KINETIS_MPU_H
|
||||
|
||||
/****************************************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include "chip.h"
|
||||
|
||||
/****************************************************************************************************
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************************************/
|
||||
|
||||
/* Register Offsets *********************************************************************************/
|
||||
|
||||
#define KINETIS_MPU_CESR_OFFSET 0x0000 /* Control/Error Status Register */
|
||||
|
||||
#define KINETIS_MPU_EAR_OFFSET(n) (0x0010+((n)<<3)) /* Error Address Register, Slave Port n */
|
||||
#define KINETIS_MPU_EDR_OFFSET(n) (0x0014+((n)<<3)) /* Error Detail Register, Slave Port n */
|
||||
|
||||
#define KINETIS_MPU_EAR0_OFFSET 0x0010 /* Error Address Register, Slave Port 0 */
|
||||
#define KINETIS_MPU_EDR0_OFFSET 0x0014 /* Error Detail Register, Slave Port 0 */
|
||||
#define KINETIS_MPU_EAR1_OFFSET 0x0018 /* Error Address Register, Slave Port 1 */
|
||||
#define KINETIS_MPU_EDR1_OFFSET 0x001c /* Error Detail Register, Slave Port 1 */
|
||||
#define KINETIS_MPU_EAR2_OFFSET 0x0020 /* Error Address Register, Slave Port 2 */
|
||||
#define KINETIS_MPU_EDR2_OFFSET 0x0024 /* Error Detail Register, Slave Port 2 */
|
||||
#define KINETIS_MPU_EAR3_OFFSET 0x0028 /* Error Address Register, Slave Port 3 */
|
||||
#define KINETIS_MPU_EDR3_OFFSET 0x002c /* Error Detail Register, Slave Port 3 */
|
||||
#define KINETIS_MPU_EAR4_OFFSET 0x0030 /* Error Address Register, Slave Port 4 */
|
||||
#define KINETIS_MPU_EDR4_OFFSET 0x0034 /* Error Detail Register, Slave Port 4 */
|
||||
|
||||
#define KINETIS_MPU_RGD_WORD_OFFSET(n,m) (x0400+((n)<<4)+((m)<< 2) /* Region Descriptor n, Word m */
|
||||
|
||||
#define KINETIS_MPU_RGD0_WORD0_OFFSET 0x0400 /* Region Descriptor 0, Word 0 */
|
||||
#define KINETIS_MPU_RGD0_WORD1_OFFSET 0x0404 /* Region Descriptor 0, Word 1 */
|
||||
#define KINETIS_MPU_RGD0_WORD2_OFFSET 0x0408 /* Region Descriptor 0, Word 2 */
|
||||
#define KINETIS_MPU_RGD0_WORD3_OFFSET 0x040c /* Region Descriptor 0, Word 3 */
|
||||
#define KINETIS_MPU_RGD1_WORD0_OFFSET 0x0410 /* Region Descriptor 1, Word 0 */
|
||||
#define KINETIS_MPU_RGD1_WORD1_OFFSET 0x0414 /* Region Descriptor 1, Word 1 */
|
||||
#define KINETIS_MPU_RGD1_WORD2_OFFSET 0x0418 /* Region Descriptor 1, Word 2 */
|
||||
#define KINETIS_MPU_RGD1_WORD3_OFFSET 0x041c /* Region Descriptor 1, Word 3 */
|
||||
#define KINETIS_MPU_RGD2_WORD0_OFFSET 0x0420 /* Region Descriptor 2, Word 0 */
|
||||
#define KINETIS_MPU_RGD2_WORD1_OFFSET 0x0424 /* Region Descriptor 2, Word 1 */
|
||||
#define KINETIS_MPU_RGD2_WORD2_OFFSET 0x0428 /* Region Descriptor 2, Word 2 */
|
||||
#define KINETIS_MPU_RGD2_WORD3_OFFSET 0x042c /* Region Descriptor 2, Word 3 */
|
||||
#define KINETIS_MPU_RGD3_WORD0_OFFSET 0x0430 /* Region Descriptor 3, Word 0 */
|
||||
#define KINETIS_MPU_RGD3_WORD1_OFFSET 0x0434 /* Region Descriptor 3, Word 1 */
|
||||
#define KINETIS_MPU_RGD3_WORD2_OFFSET 0x0438 /* Region Descriptor 3, Word 2 */
|
||||
#define KINETIS_MPU_RGD3_WORD3_OFFSET 0x043c /* Region Descriptor 3, Word 3 */
|
||||
#define KINETIS_MPU_RGD4_WORD0_OFFSET 0x0440 /* Region Descriptor 4, Word 0 */
|
||||
#define KINETIS_MPU_RGD4_WORD1_OFFSET 0x0444 /* Region Descriptor 4, Word 1 */
|
||||
#define KINETIS_MPU_RGD4_WORD2_OFFSET 0x0448 /* Region Descriptor 4, Word 2 */
|
||||
#define KINETIS_MPU_RGD4_WORD3_OFFSET 0x044c /* Region Descriptor 4, Word 3 */
|
||||
#define KINETIS_MPU_RGD5_WORD0_OFFSET 0x0450 /* Region Descriptor 5, Word 0 */
|
||||
#define KINETIS_MPU_RGD5_WORD1_OFFSET 0x0454 /* Region Descriptor 5, Word 1 */
|
||||
#define KINETIS_MPU_RGD5_WORD2_OFFSET 0x0458 /* Region Descriptor 5, Word 2 */
|
||||
#define KINETIS_MPU_RGD5_WORD3_OFFSET 0x045c /* Region Descriptor 5, Word 3 */
|
||||
#define KINETIS_MPU_RGD6_WORD0_OFFSET 0x0460 /* Region Descriptor 6, Word 0 */
|
||||
#define KINETIS_MPU_RGD6_WORD1_OFFSET 0x0464 /* Region Descriptor 6, Word 1 */
|
||||
#define KINETIS_MPU_RGD6_WORD2_OFFSET 0x0468 /* Region Descriptor 6, Word 2 */
|
||||
#define KINETIS_MPU_RGD6_WORD3_OFFSET 0x046c /* Region Descriptor 6, Word 3 */
|
||||
#define KINETIS_MPU_RGD7_WORD0_OFFSET 0x0470 /* Region Descriptor 7, Word 0 */
|
||||
#define KINETIS_MPU_RGD7_WORD1_OFFSET 0x0474 /* Region Descriptor 7, Word 1 */
|
||||
#define KINETIS_MPU_RGD7_WORD2_OFFSET 0x0478 /* Region Descriptor 7, Word 2 */
|
||||
#define KINETIS_MPU_RGD7_WORD3_OFFSET 0x047c /* Region Descriptor 7, Word 3 */
|
||||
#define KINETIS_MPU_RGD8_WORD0_OFFSET 0x0480 /* Region Descriptor 8, Word 0 */
|
||||
#define KINETIS_MPU_RGD8_WORD1_OFFSET 0x0484 /* Region Descriptor 8, Word 1 */
|
||||
#define KINETIS_MPU_RGD8_WORD2_OFFSET 0x0488 /* Region Descriptor 8, Word 2 */
|
||||
#define KINETIS_MPU_RGD8_WORD3_OFFSET 0x048c /* Region Descriptor 8, Word 3 */
|
||||
#define KINETIS_MPU_RGD9_WORD0_OFFSET 0x0490 /* Region Descriptor 9, Word 0 */
|
||||
#define KINETIS_MPU_RGD9_WORD1_OFFSET 0x0494 /* Region Descriptor 9, Word 1 */
|
||||
#define KINETIS_MPU_RGD9_WORD2_OFFSET 0x0498 /* Region Descriptor 9, Word 2 */
|
||||
#define KINETIS_MPU_RGD9_WORD3_OFFSET 0x049c /* Region Descriptor 9, Word 3 */
|
||||
#define KINETIS_MPU_RGD10_WORD0_OFFSET 0x04a0 /* Region Descriptor 10, Word 0 */
|
||||
#define KINETIS_MPU_RGD10_WORD1_OFFSET 0x04a4 /* Region Descriptor 10, Word 1 */
|
||||
#define KINETIS_MPU_RGD10_WORD2_OFFSET 0x04a8 /* Region Descriptor 10, Word 2 */
|
||||
#define KINETIS_MPU_RGD10_WORD3_OFFSET 0x04ac /* Region Descriptor 10, Word 3 */
|
||||
#define KINETIS_MPU_RGD11_WORD0_OFFSET 0x04b0 /* Region Descriptor 11, Word 0 */
|
||||
#define KINETIS_MPU_RGD11_WORD1_OFFSET 0x04b4 /* Region Descriptor 11, Word 1 */
|
||||
#define KINETIS_MPU_RGD11_WORD2_OFFSET 0x04b8 /* Region Descriptor 11, Word 2 */
|
||||
#define KINETIS_MPU_RGD11_WORD3_OFFSET 0x04bc /* Region Descriptor 11, Word 3 */
|
||||
|
||||
#define KINETIS_MPU_RGDAAC_OFFSET(n) (0x0800+((n)<<2)) /* Region Descriptor Alternate Access Control n */
|
||||
|
||||
#define KINETIS_MPU_RGDAAC0_OFFSET 0x0800 /* Region Descriptor Alternate Access Control 0 */
|
||||
#define KINETIS_MPU_RGDAAC1_OFFSET 0x0804 /* Region Descriptor Alternate Access Control 1 */
|
||||
#define KINETIS_MPU_RGDAAC2_OFFSET 0x0808 /* Region Descriptor Alternate Access Control 2 */
|
||||
#define KINETIS_MPU_RGDAAC3_OFFSET 0x080c /* Region Descriptor Alternate Access Control 3 */
|
||||
#define KINETIS_MPU_RGDAAC4_OFFSET 0x0810 /* Region Descriptor Alternate Access Control 4 */
|
||||
#define KINETIS_MPU_RGDAAC5_OFFSET 0x0814 /* Region Descriptor Alternate Access Control 5 */
|
||||
#define KINETIS_MPU_RGDAAC6_OFFSET 0x0818 /* Region Descriptor Alternate Access Control 6 */
|
||||
#define KINETIS_MPU_RGDAAC7_OFFSET 0x081c /* Region Descriptor Alternate Access Control 7 */
|
||||
#define KINETIS_MPU_RGDAAC8_OFFSET 0x0820 /* Region Descriptor Alternate Access Control 8 */
|
||||
#define KINETIS_MPU_RGDAAC9_OFFSET 0x0824 /* Region Descriptor Alternate Access Control 9 */
|
||||
#define KINETIS_MPU_RGDAAC10_OFFSET 0x0828 /* Region Descriptor Alternate Access Control 10 */
|
||||
#define KINETIS_MPU_RGDAAC11_OFFSET 0x082c /* Region Descriptor Alternate Access Control 11 */
|
||||
|
||||
/* Register Addresses *******************************************************************************/
|
||||
|
||||
#define KINETIS_MPU_CESR (KINETIS_MPU_BASE+KINETIS_MPU_CESR_OFFSET)
|
||||
|
||||
#define KINETIS_MPU_EAR(n) (KINETIS_MPU_BASE+KINETIS_MPU_EAR_OFFSET(n))
|
||||
#define KINETIS_MPU_EDR(n) (KINETIS_MPU_BASE+KINETIS_MPU_EDR_OFFSET(n))
|
||||
|
||||
#define KINETIS_MPU_EAR0 (KINETIS_MPU_BASE+KINETIS_MPU_EAR0_OFFSET)
|
||||
#define KINETIS_MPU_EDR0 (KINETIS_MPU_BASE+KINETIS_MPU_EDR0_OFFSET)
|
||||
#define KINETIS_MPU_EAR1 (KINETIS_MPU_BASE+KINETIS_MPU_EAR1_OFFSET)
|
||||
#define KINETIS_MPU_EDR1 (KINETIS_MPU_BASE+KINETIS_MPU_EDR1_OFFSET)
|
||||
#define KINETIS_MPU_EAR2 (KINETIS_MPU_BASE+KINETIS_MPU_EAR2_OFFSET)
|
||||
#define KINETIS_MPU_EDR2 (KINETIS_MPU_BASE+KINETIS_MPU_EDR2_OFFSET)
|
||||
#define KINETIS_MPU_EAR3 (KINETIS_MPU_BASE+KINETIS_MPU_EAR3_OFFSET)
|
||||
#define KINETIS_MPU_EDR3 (KINETIS_MPU_BASE+KINETIS_MPU_EDR3_OFFSET)
|
||||
#define KINETIS_MPU_EAR4 (KINETIS_MPU_BASE+KINETIS_MPU_EAR4_OFFSET)
|
||||
#define KINETIS_MPU_EDR4 (KINETIS_MPU_BASE+KINETIS_MPU_EDR4_OFFSET)
|
||||
|
||||
#define KINETIS_MPU_RGD_WORD(n,m) (KINETIS_MPU_BASE+KINETIS_MPU_RGD_WORD_OFFSET(n,m))
|
||||
|
||||
#define KINETIS_MPU_RGD0_WORD0 (KINETIS_MPU_BASE+KINETIS_MPU_RGD0_WORD0_OFFSET)
|
||||
#define KINETIS_MPU_RGD0_WORD1 (KINETIS_MPU_BASE+KINETIS_MPU_RGD0_WORD1_OFFSET)
|
||||
#define KINETIS_MPU_RGD0_WORD2 (KINETIS_MPU_BASE+KINETIS_MPU_RGD0_WORD2_OFFSET)
|
||||
#define KINETIS_MPU_RGD0_WORD3 (KINETIS_MPU_BASE+KINETIS_MPU_RGD0_WORD3_OFFSET)
|
||||
#define KINETIS_MPU_RGD1_WORD0 (KINETIS_MPU_BASE+KINETIS_MPU_RGD1_WORD0_OFFSET)
|
||||
#define KINETIS_MPU_RGD1_WORD1 (KINETIS_MPU_BASE+KINETIS_MPU_RGD1_WORD1_OFFSET)
|
||||
#define KINETIS_MPU_RGD1_WORD2 (KINETIS_MPU_BASE+KINETIS_MPU_RGD1_WORD2_OFFSET)
|
||||
#define KINETIS_MPU_RGD1_WORD3 (KINETIS_MPU_BASE+KINETIS_MPU_RGD1_WORD3_OFFSET)
|
||||
#define KINETIS_MPU_RGD2_WORD0 (KINETIS_MPU_BASE+KINETIS_MPU_RGD2_WORD0_OFFSET)
|
||||
#define KINETIS_MPU_RGD2_WORD1 (KINETIS_MPU_BASE+KINETIS_MPU_RGD2_WORD1_OFFSET)
|
||||
#define KINETIS_MPU_RGD2_WORD2 (KINETIS_MPU_BASE+KINETIS_MPU_RGD2_WORD2_OFFSET)
|
||||
#define KINETIS_MPU_RGD2_WORD3 (KINETIS_MPU_BASE+KINETIS_MPU_RGD2_WORD3_OFFSET)
|
||||
#define KINETIS_MPU_RGD3_WORD0 (KINETIS_MPU_BASE+KINETIS_MPU_RGD3_WORD0_OFFSET)
|
||||
#define KINETIS_MPU_RGD3_WORD1 (KINETIS_MPU_BASE+KINETIS_MPU_RGD3_WORD1_OFFSET)
|
||||
#define KINETIS_MPU_RGD3_WORD2 (KINETIS_MPU_BASE+KINETIS_MPU_RGD3_WORD2_OFFSET)
|
||||
#define KINETIS_MPU_RGD3_WORD3 (KINETIS_MPU_BASE+KINETIS_MPU_RGD3_WORD3_OFFSET)
|
||||
#define KINETIS_MPU_RGD4_WORD0 (KINETIS_MPU_BASE+KINETIS_MPU_RGD4_WORD0_OFFSET)
|
||||
#define KINETIS_MPU_RGD4_WORD1 (KINETIS_MPU_BASE+KINETIS_MPU_RGD4_WORD1_OFFSET)
|
||||
#define KINETIS_MPU_RGD4_WORD2 (KINETIS_MPU_BASE+KINETIS_MPU_RGD4_WORD2_OFFSET)
|
||||
#define KINETIS_MPU_RGD4_WORD3 (KINETIS_MPU_BASE+KINETIS_MPU_RGD4_WORD3_OFFSET)
|
||||
#define KINETIS_MPU_RGD5_WORD0 (KINETIS_MPU_BASE+KINETIS_MPU_RGD5_WORD0_OFFSET)
|
||||
#define KINETIS_MPU_RGD5_WORD1 (KINETIS_MPU_BASE+KINETIS_MPU_RGD5_WORD1_OFFSET)
|
||||
#define KINETIS_MPU_RGD5_WORD2 (KINETIS_MPU_BASE+KINETIS_MPU_RGD5_WORD2_OFFSET)
|
||||
#define KINETIS_MPU_RGD5_WORD3 (KINETIS_MPU_BASE+KINETIS_MPU_RGD5_WORD3_OFFSET)
|
||||
#define KINETIS_MPU_RGD6_WORD0 (KINETIS_MPU_BASE+KINETIS_MPU_RGD6_WORD0_OFFSET)
|
||||
#define KINETIS_MPU_RGD6_WORD1 (KINETIS_MPU_BASE+KINETIS_MPU_RGD6_WORD1_OFFSET)
|
||||
#define KINETIS_MPU_RGD6_WORD2 (KINETIS_MPU_BASE+KINETIS_MPU_RGD6_WORD2_OFFSET)
|
||||
#define KINETIS_MPU_RGD6_WORD3 (KINETIS_MPU_BASE+KINETIS_MPU_RGD6_WORD3_OFFSET)
|
||||
#define KINETIS_MPU_RGD7_WORD0 (KINETIS_MPU_BASE+KINETIS_MPU_RGD7_WORD0_OFFSET)
|
||||
#define KINETIS_MPU_RGD7_WORD1 (KINETIS_MPU_BASE+KINETIS_MPU_RGD7_WORD1_OFFSET)
|
||||
#define KINETIS_MPU_RGD7_WORD2 (KINETIS_MPU_BASE+KINETIS_MPU_RGD7_WORD2_OFFSET)
|
||||
#define KINETIS_MPU_RGD7_WORD3 (KINETIS_MPU_BASE+KINETIS_MPU_RGD7_WORD3_OFFSET)
|
||||
#define KINETIS_MPU_RGD8_WORD0 (KINETIS_MPU_BASE+KINETIS_MPU_RGD8_WORD0_OFFSET)
|
||||
#define KINETIS_MPU_RGD8_WORD1 (KINETIS_MPU_BASE+KINETIS_MPU_RGD8_WORD1_OFFSET)
|
||||
#define KINETIS_MPU_RGD8_WORD2 (KINETIS_MPU_BASE+KINETIS_MPU_RGD8_WORD2_OFFSET)
|
||||
#define KINETIS_MPU_RGD8_WORD3 (KINETIS_MPU_BASE+KINETIS_MPU_RGD8_WORD3_OFFSET)
|
||||
#define KINETIS_MPU_RGD9_WORD0 (KINETIS_MPU_BASE+KINETIS_MPU_RGD9_WORD0_OFFSET)
|
||||
#define KINETIS_MPU_RGD9_WORD1 (KINETIS_MPU_BASE+KINETIS_MPU_RGD9_WORD1_OFFSET)
|
||||
#define KINETIS_MPU_RGD9_WORD2 (KINETIS_MPU_BASE+KINETIS_MPU_RGD9_WORD2_OFFSET)
|
||||
#define KINETIS_MPU_RGD9_WORD3 (KINETIS_MPU_BASE+KINETIS_MPU_RGD9_WORD3_OFFSET)
|
||||
#define KINETIS_MPU_RGD10_WORD0 (KINETIS_MPU_BASE+KINETIS_MPU_RGD10_WORD0_OFFSET)
|
||||
#define KINETIS_MPU_RGD10_WORD1 (KINETIS_MPU_BASE+KINETIS_MPU_RGD10_WORD1_OFFSET)
|
||||
#define KINETIS_MPU_RGD10_WORD2 (KINETIS_MPU_BASE+KINETIS_MPU_RGD10_WORD2_OFFSET)
|
||||
#define KINETIS_MPU_RGD10_WORD3 (KINETIS_MPU_BASE+KINETIS_MPU_RGD10_WORD3_OFFSET)
|
||||
#define KINETIS_MPU_RGD11_WORD0 (KINETIS_MPU_BASE+KINETIS_MPU_RGD11_WORD0_OFFSET)
|
||||
#define KINETIS_MPU_RGD11_WORD1 (KINETIS_MPU_BASE+KINETIS_MPU_RGD11_WORD1_OFFSET)
|
||||
#define KINETIS_MPU_RGD11_WORD2 (KINETIS_MPU_BASE+KINETIS_MPU_RGD11_WORD2_OFFSET)
|
||||
#define KINETIS_MPU_RGD11_WORD3 (KINETIS_MPU_BASE+KINETIS_MPU_RGD11_WORD3_OFFSET)
|
||||
|
||||
#define KINETIS_MPU_RGDAAC(n) (KINETIS_MPU_BASE+KINETIS_MPU_RGDAAC_OFFSET(n))
|
||||
|
||||
#define KINETIS_MPU_RGDAAC0 (KINETIS_MPU_BASE+KINETIS_MPU_RGDAAC0_OFFSET)
|
||||
#define KINETIS_MPU_RGDAAC1 (KINETIS_MPU_BASE+KINETIS_MPU_RGDAAC1_OFFSET)
|
||||
#define KINETIS_MPU_RGDAAC2 (KINETIS_MPU_BASE+KINETIS_MPU_RGDAAC2_OFFSET)
|
||||
#define KINETIS_MPU_RGDAAC3 (KINETIS_MPU_BASE+KINETIS_MPU_RGDAAC3_OFFSET)
|
||||
#define KINETIS_MPU_RGDAAC4 (KINETIS_MPU_BASE+KINETIS_MPU_RGDAAC4_OFFSET)
|
||||
#define KINETIS_MPU_RGDAAC5 (KINETIS_MPU_BASE+KINETIS_MPU_RGDAAC5_OFFSET)
|
||||
#define KINETIS_MPU_RGDAAC6 (KINETIS_MPU_BASE+KINETIS_MPU_RGDAAC6_OFFSET)
|
||||
#define KINETIS_MPU_RGDAAC7 (KINETIS_MPU_BASE+KINETIS_MPU_RGDAAC7_OFFSET)
|
||||
#define KINETIS_MPU_RGDAAC8 (KINETIS_MPU_BASE+KINETIS_MPU_RGDAAC8_OFFSET)
|
||||
#define KINETIS_MPU_RGDAAC9 (KINETIS_MPU_BASE+KINETIS_MPU_RGDAAC9_OFFSET)
|
||||
#define KINETIS_MPU_RGDAAC10 (KINETIS_MPU_BASE+KINETIS_MPU_RGDAAC10_OFFSET)
|
||||
#define KINETIS_MPU_RGDAAC11 (KINETIS_MPU_BASE+KINETIS_MPU_RGDAAC11_OFFSET)
|
||||
|
||||
/* Register Bit Definitions *************************************************************************/
|
||||
|
||||
/* Control/Error Status Register */
|
||||
|
||||
#define MPU_CESR_VLD (1 << 0) /* Bit 0: Valid (global enable/disable for the MPU) */
|
||||
/* Bits 1-7: Reserved */
|
||||
#define MPU_CESR_NRGD_SHIFT (8) /* Bits 8-11: Number of region descriptors */
|
||||
#define MPU_CESR_NRGD_MASK (15 << MPU_CESR_NRGD_SHIFT)
|
||||
# define MPU_CESR_NRGD_8DESC (0 << MPU_CESR_NRGD_SHIFT) /* 8 region descriptors */
|
||||
# define MPU_CESR_NRGD_12DESC (1 << MPU_CESR_NRGD_SHIFT) /* 12 region descriptors */
|
||||
# define MPU_CESR_NRGD_16DESC (2 << MPU_CESR_NRGD_SHIFT) /* 16 region descriptors */
|
||||
#define MPU_CESR_NSP_SHIFT (12) /* Bits 12-15: Number of slave ports */
|
||||
#define MPU_CESR_NSP_MASK (15 << MPU_CESR_NSP_SHIFT)
|
||||
#define MPU_CESR_HRL_SHIFT (16) /* Bits 16-19: Hardware revision level */
|
||||
#define MPU_CESR_HRL_MASK (15 << MPU_CESR_HRL_SHIFT)
|
||||
/* Bits 20-26: Reserved */
|
||||
#define MPU_CESR_SPERR_SHIFT (27) /* Bits 27-31: Slave port n error */
|
||||
#define MPU_CESR_SPERR_MASK (31 << MPU_CESR_SPERR_SHIFT)
|
||||
# define MPU_CESR_SPERR_SPORT(n) ((1 << (4-(n))) << MPU_CESR_SPERR_SHIFT) /* Slave port nn */
|
||||
# define MPU_CESR_SPERR_SPORT0 (16 << MPU_CESR_SPERR_SHIFT) /* Slave port 0 */
|
||||
# define MPU_CESR_SPERR_SPORT1 (8 << MPU_CESR_SPERR_SHIFT) /* Slave port 1 */
|
||||
# define MPU_CESR_SPERR_SPORT2 (4 << MPU_CESR_SPERR_SHIFT) /* Slave port 2 */
|
||||
# define MPU_CESR_SPERR_SPORT3 (2 << MPU_CESR_SPERR_SHIFT) /* Slave port 3 */
|
||||
# define MPU_CESR_SPERR_SPORT4 (1 << MPU_CESR_SPERR_SHIFT) /* Slave port 4 */
|
||||
|
||||
/* Error Address Register, Slave Port n. 32-bit error address. */
|
||||
|
||||
/* Error Detail Register, Slave Port n */
|
||||
|
||||
#define MPU_EDR_ERW (1 << 0) /* Bit 0: Error read/write */
|
||||
#define MPU_EDR_EATTR_SHIFT (1) /* Bits 1-3: Error attributes */
|
||||
#define MPU_EDR_EATTR_MASK (7 << MPU_EDR_EATTR_SHIFT)
|
||||
# define MPU_EDR_EATTR_USRINST (0 << MPU_EDR_EATTR_SHIFT) /* User mode, instruction access */
|
||||
# define MPU_EDR_EATTR_USRDATA (1 << MPU_EDR_EATTR_SHIFT) /* User mode, data access */
|
||||
# define MPU_EDR_EATTR_SUPINST (2 << MPU_EDR_EATTR_SHIFT) /* Supervisor mode, instruction access */
|
||||
# define MPU_EDR_EATTR_SUPDATA (3 << MPU_EDR_EATTR_SHIFT) /* Supervisor mode, data access */
|
||||
#define MPU_EDR_EMN_SHIFT (4) /* Bits 4-7: Error master number */
|
||||
#define MPU_EDR_EMN_MASK (15 << MPU_EDR_EMN_SHIFT)
|
||||
/* Bits 8-15: Reserved */
|
||||
#define MPU_EDR_EACD_SHIFT (26) /* Bits 16-31: Error access control detail */
|
||||
#define MPU_EDR_EACD_MASK (0xffff << MPU_EDR_EACD_SHIFT)
|
||||
|
||||
/* Region Descriptor n, Word 0 */
|
||||
/* Bits 0-4: Reserved */
|
||||
#define MPU_RGD_WORD0_SRTADDR_SHIFT (5) /* Bits 5-31: Start address */
|
||||
#define MPU_RGD_WORD0_SRTADDR_MASK (0xffffffe0)
|
||||
|
||||
/* Region Descriptor n, Word 1 */
|
||||
/* Bits 0-4: Reserved */
|
||||
#define MPU_RGD_WORD1_ENDADDR_SHIFT (5) /* Bits 5-31: End address */
|
||||
#define MPU_RGD_WORD1_ENDADDR_MASK (0xffffffe0)
|
||||
|
||||
/* Region Descriptor n, Word 2 */
|
||||
|
||||
#define MPU_RGD_MSM_RWX 0 /* R/W/X; read, write and execute allowed */
|
||||
#define MPU_RGD_MSM_RX 1 /* R/X; read and execute allowed, but no write */
|
||||
#define MPU_RGD_MSM_RW 2 /* R/W; read and write allowed, but no execute */
|
||||
#define MPU_RGD_MSM_UM 3 /* Same as user mode defined in MUM */
|
||||
|
||||
#define MPU_RGD_MUM_R 4 /* Read allowed */
|
||||
#define MPU_RGD_MUM_W 2 /* Write allowed */
|
||||
#define MPU_RGD_MUM_X 1 /* Execute allocated */
|
||||
|
||||
#define MPU_RGD_WORD2_M0UM_SHIFT (0) /* Bits 0-2: Bus master 0 user mode access control */
|
||||
#define MPU_RGD_WORD2_M0UM_MASK (7 << MPU_RGD_WORD2_M0UM_SHIFT)
|
||||
#define MPU_RGD_WORD2_M0SM_SHIFT (3) /* Bits 3-4: Bus master 0 supervisor mode access control */
|
||||
#define MPU_RGD_WORD2_M0SM_MASK (3 << MPU_RGD_WORD2_M0SM_SHIFT)
|
||||
#define MPU_RGD_WORD2_M0PE (1 << 5) /* Bit 5: Bus Master 0 Process Identifier Enable */
|
||||
#define MPU_RGD_WORD2_M1UM_SHIFT (6) /* Bits 6-8: Bus master 1 user mode access control */
|
||||
#define MPU_RGD_WORD2_M1UM_MASK (7 << MPU_RGD_WORD2_M1UM_SHIFT)
|
||||
#define MPU_RGD_WORD2_M1SM_SHIFT (9) /* Bits 9-10: Bus master 1 supervisor mode access control */
|
||||
#define MPU_RGD_WORD2_M1SM_MASK (3 << MPU_RGD_WORD2_M1SM_SHIFT)
|
||||
#define MPU_RGD_WORD2_M1PE (1 << 11) /* Bit 11: Bus Master 1 Process Identifier Enable */
|
||||
#define MPU_RGD_WORD2_M2UM_SHIFT (12) /* Bits 12-14: Bus master 2 user mode access control */
|
||||
#define MPU_RGD_WORD2_M2UM_MASK (7 << MPU_RGD_WORD2_M2UM_SHIFT)
|
||||
#define MPU_RGD_WORD2_M2SM_SHIFT (15) /* Bits 15-16: Bus master 2 supervisor mode access control */
|
||||
#define MPU_RGD_WORD2_M2SM_MASK (3 << MPU_RGD_WORD2_M2SM_SHIFT)
|
||||
#define MPU_RGD_WORD2_M2PE (1 << 17) /* Bit 17: Bus Master 2 Process Identifier Enable */
|
||||
#define MPU_RGD_WORD2_M3UM_SHIFT (18) /* Bits 18-20: Bus master 3 user mode access control */
|
||||
#define MPU_RGD_WORD2_M3UM_MASK (7 << MPU_RGD_WORD2_M3UM_SHIFT)
|
||||
#define MPU_RGD_WORD2_M3SM_SHIFT (21) /* Bits 21-22: Bus master 3 supervisor mode access control */
|
||||
#define MPU_RGD_WORD2_M3SM_MASK (3 << MPU_RGD_WORD2_M3SM_SHIFT)
|
||||
#define MPU_RGD_WORD2_M3PE (1 << 23) /* Bit 23: Bus Master 3 Process Identifier Enable */
|
||||
#define MPU_RGD_WORD2_M4WE (1 << 24) /* Bit 24: Bus master 4 write enable */
|
||||
#define MPU_RGD_WORD2_M4RE (1 << 25) /* Bit 25: Bus master 4 read enable */
|
||||
#define MPU_RGD_WORD2_M5WE (1 << 26) /* Bit 26: Bus master 5 write enable */
|
||||
#define MPU_RGD_WORD2_M5RE (1 << 27) /* Bit 27: Bus master 5 read enable */
|
||||
#define MPU_RGD_WORD2_M6WE (1 << 28) /* Bit 28: Bus master 6 write enable */
|
||||
#define MPU_RGD_WORD2_M6RE (1 << 29) /* Bit 29: Bus master 6 read enable */
|
||||
#define MPU_RGD_WORD2_M7WE (1 << 30) /* Bit 30: Bus master 7 write enable */
|
||||
#define MPU_RGD_WORD2_M7RE (1 << 31) /* Bit 31: Bus master 7 read enable */
|
||||
|
||||
/* Region Descriptor n, Word 3 */
|
||||
|
||||
#define MPU_RGD_WORD3_VLD (1 << 0) /* Bit 0: Valid */
|
||||
/* Bits 1-31: Reserved */
|
||||
/* Region Descriptor Alternate Access Control n */
|
||||
|
||||
#define MPU_RGD_RBDACC_M0UM_SHIFT (0) /* Bits 0-2: Bus master 0 user mode access control */
|
||||
#define MPU_RGD_RBDACC_M0UM_MASK (7 << MPU_RGD_RBDACC_M0UM_SHIFT)
|
||||
#define MPU_RGD_RBDACC_M0SM_SHIFT (3) /* Bits 3-4: Bus master 0 supervisor mode access control */
|
||||
#define MPU_RGD_RBDACC_M0SM_MASK (3 << MPU_RGD_RBDACC_M0SM_SHIFT)
|
||||
/* Bit 5: Reserved */
|
||||
#define MPU_RGD_RBDACC_M1UM_SHIFT (6) /* Bits 6-8: Bus master 1 user mode access control */
|
||||
#define MPU_RGD_RBDACC_M1UM_MASK (7 << MPU_RGD_RBDACC_M1UM_SHIFT)
|
||||
#define MPU_RGD_RBDACC_M1SM_SHIFT (9) /* Bits 9-10: Bus master 1 supervisor mode access control */
|
||||
#define MPU_RGD_RBDACC_M1SM_MASK (3 << MPU_RGD_RBDACC_M1SM_SHIFT)
|
||||
/* Bit 11: Reserved */
|
||||
#define MPU_RGD_RBDACC_M2UM_SHIFT (12) /* Bits 12-14: Bus master 2 user mode access control */
|
||||
#define MPU_RGD_RBDACC_M2UM_MASK (7 << MPU_RGD_RBDACC_M2UM_SHIFT)
|
||||
#define MPU_RGD_RBDACC_M2SM_SHIFT (15) /* Bits 15-16: Bus master 2 supervisor mode access control */
|
||||
#define MPU_RGD_RBDACC_M2SM_MASK (3 << MPU_RGD_RBDACC_M2SM_SHIFT)
|
||||
/* Bit 17: Reserved */
|
||||
#define MPU_RGD_RBDACC_M3UM_SHIFT (18) /* Bits 18-20: Bus master 3 user mode access control */
|
||||
#define MPU_RGD_RBDACC_M3UM_MASK (7 << MPU_RGD_RBDACC_M3UM_SHIFT)
|
||||
#define MPU_RGD_RBDACC_M3SM_SHIFT (21) /* Bits 21-22: Bus master 3 supervisor mode access control */
|
||||
#define MPU_RGD_RBDACC_M3SM_MASK (3 << MPU_RGD_RBDACC_M3SM_SHIFT)
|
||||
/* Bit 23: Reserved */
|
||||
#define MPU_RGD_RBDACC_M4WE (1 << 24) /* Bit 24: Bus master 4 write enable */
|
||||
#define MPU_RGD_RBDACC_M4RE (1 << 25) /* Bit 25: Bus master 4 read enable */
|
||||
#define MPU_RGD_RBDACC_M5WE (1 << 26) /* Bit 26: Bus master 5 write enable */
|
||||
#define MPU_RGD_RBDACC_M5RE (1 << 27) /* Bit 27: Bus master 5 read enable */
|
||||
#define MPU_RGD_RBDACC_M6WE (1 << 28) /* Bit 28: Bus master 6 write enable */
|
||||
#define MPU_RGD_RBDACC_M6RE (1 << 29) /* Bit 29: Bus master 6 read enable */
|
||||
#define MPU_RGD_RBDACC_M7WE (1 << 30) /* Bit 30: Bus master 7 write enable */
|
||||
#define MPU_RGD_RBDACC_M7RE (1 << 31) /* Bit 31: Bus master 7 read enable */
|
||||
|
||||
/****************************************************************************************************
|
||||
* Public Types
|
||||
****************************************************************************************************/
|
||||
|
||||
/****************************************************************************************************
|
||||
* Public Data
|
||||
****************************************************************************************************/
|
||||
|
||||
/****************************************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************************************/
|
||||
|
||||
#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_MPU_H */
|
||||
File diff suppressed because it is too large
Load Diff
@@ -1,7 +1,7 @@
|
||||
/************************************************************************************
|
||||
* arch/arm/src/kinetis/kinetis_llwu.h
|
||||
* arch/arm/src/kinetis/chip/kinetis_llwu.h
|
||||
*
|
||||
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
|
||||
* Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
@@ -33,8 +33,8 @@
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_LLWU_H
|
||||
#define __ARCH_ARM_SRC_KINETIS_KINETIS_LLWU_H
|
||||
#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_LLWU_H
|
||||
#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_LLWU_H
|
||||
|
||||
/************************************************************************************
|
||||
* Included Files
|
||||
@@ -249,4 +249,4 @@
|
||||
* Public Functions
|
||||
************************************************************************************/
|
||||
|
||||
#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_LLWU_H */
|
||||
#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_LLWU_H */
|
||||
@@ -1,7 +1,7 @@
|
||||
/****************************************************************************************************
|
||||
* arch/arm/src/kinetis/kinetis_lptmr.h
|
||||
* arch/arm/src/kinetis/chip/kinetis_lptmr.h
|
||||
*
|
||||
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
|
||||
* Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
@@ -33,8 +33,8 @@
|
||||
*
|
||||
****************************************************************************************************/
|
||||
|
||||
#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_LPTMR_H
|
||||
#define __ARCH_ARM_SRC_KINETIS_KINETIS_LPTMR_H
|
||||
#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_LPTMR_H
|
||||
#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_LPTMR_H
|
||||
|
||||
/****************************************************************************************************
|
||||
* Included Files
|
||||
@@ -130,4 +130,4 @@
|
||||
* Public Functions
|
||||
****************************************************************************************************/
|
||||
|
||||
#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_LPTMR_H */
|
||||
#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_LPTMR_H */
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user