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Merged in raiden00/nuttx (pull request #442)

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stm32_hrtim

Approved-by: Gregory Nutt <gnutt@nuttx.org>
This commit is contained in:
Mateusz Szafoni
2017-07-22 13:36:44 +00:00
committed by Gregory Nutt
parent 664320342b f6c1d59531
commit 795ee47660
4 changed files with 472 additions and 97 deletions
Download Patch File Download Diff File Expand all files Collapse all files
arch/arm/src/stm32/stm32_hrtim.c
+355 -27
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File diff suppressed because it is too large Load Diff
arch/arm/src/stm32/stm32_hrtim.h
+108 -66
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@@ -86,6 +86,12 @@
# define HRTIM_HAVE_CHOPPER 1
#endif
#if defined(CONFIG_STM32_HRTIM_TIMA_BURST) || defined(CONFIG_STM32_HRTIM_TIMB_BURST) || \
defined(CONFIG_STM32_HRTIM_TIMC_BURST) || defined(CONFIG_STM32_HRTIM_TIMD_BURST) || \
defined(CONFIG_STM32_HRTIM_TIME_BURST)
# define HRTIM_HAVE_BURST_MODE 1
#endif
#if defined(CONFIG_STM32_HRTIM_SCOUT) || defined(CONFIG_STM32_HRTIM_SCIN)
# define HRTIM_HAVE_SYNC 1
#endif
@@ -108,14 +114,48 @@
defined(CONFIG_STM32_HRTIM_TIMB_IRQ) || defined(CONFIG_STM32_HRTIM_TIMC_IRQ) || \
defined(CONFIG_STM32_HRTIM_TIMD_IRQ) || defined(CONFIG_STM32_HRTIM_TIME_IRQ) || \
defined(CONFIG_STM32_HRTIM_CMN_IRQ)
# defined HRTIM_HAVE_INTERRUPTS
# define HRTIM_HAVE_INTERRUPTS 1
#endif
#if defined(CONFIG_STM32_HRTIM_ADC_TRG1) || defined(CONFIG_STM32_HRTIM_ADC_TRG2) || \
defined(CONFIG_STM32_HRTIM_ADC_TRG3) || defined(CONFIG_STM32_HRTIM_ADC_TRG4)
# define HRTIM_HAVE_ADC
# define HRTIM_HAVE_ADC 1
#endif
/* TIMX PWM configuration checking */
#ifdef CONFIG_STM32_HRTIM_TIMA_PWM
# if !defined(CONFIG_STM32_HRTIM_TIMA_PWM_CH1) && \
!defined(CONFIG_STM32_HRTIM_TIMA_PWM_CH2)
# error "HRTIM TIMA PWM set but no channel selected"
# endif
#endif
#ifdef CONFIG_STM32_HRTIM_TIMB_PWM
# if !defined(CONFIG_STM32_HRTIM_TIMB_PWM_CH1) && \
!defined(CONFIG_STM32_HRTIM_TIMB_PWM_CH2)
# error "HRTIM TIMB PWM set but no channel selected"
# endif
#endif
#ifdef CONFIG_STM32_HRTIM_TIMC_PWM
# if !defined(CONFIG_STM32_HRTIM_TIMC_PWM_CH1) && \
!defined(CONFIG_STM32_HRTIM_TIMC_PWM_CH2)
# error "HRTIM TIMC PWM set but no channel selected"
# endif
#endif
#ifdef CONFIG_STM32_HRTIM_TIMD_PWM
# if !defined(CONFIG_STM32_HRTIM_TIMD_PWM_CH1) && \
!defined(CONFIG_STM32_HRTIM_TIMD_PWM_CH2)
# error "HRTIM TIMD PWM set but no channel selected"
# endif
#endif
#ifdef CONFIG_STM32_HRTIM_TIME_PWM
# if !defined(CONFIG_STM32_HRTIM_TIME_PWM_CH1) && \
!defined(CONFIG_STM32_HRTIM_TIME_PWM_CH2)
# error "HRTIM TIME PWM set but no channel selected"
# endif
#endif
/************************************************************************************
* Public Types
************************************************************************************/
@@ -147,76 +187,78 @@ enum stm32_hrtim_tim_e
enum stm32_hrtim_out_rst_e
{
HRTIM_OUT_RST_UPDATE = (1 << 0),
HRTIM_OUT_RST_EXTEVNT10 = (1 << 1),
HRTIM_OUT_RST_EXTEVNT9 = (1 << 2),
HRTIM_OUT_RST_EXTEVNT8 = (1 << 3),
HRTIM_OUT_RST_EXTEVNT7 = (1 << 4),
HRTIM_OUT_RST_EXTEVNT6 = (1 << 5),
HRTIM_OUT_RST_EXTEVNT5 = (1 << 6),
HRTIM_OUT_RST_EXTEVNT4 = (1 << 7),
HRTIM_OUT_RST_EXTEVNT3 = (1 << 8),
HRTIM_OUT_RST_EXTEVNT2 = (1 << 9),
HRTIM_OUT_RST_EXTEVNT1 = (1 << 10),
HRTIM_OUT_RST_TIMEVNT9 = (1 << 11),
HRTIM_OUT_RST_TIMEVNT8 = (1 << 12),
HRTIM_OUT_RST_TIMEVNT7 = (1 << 13),
HRTIM_OUT_RST_TIMEVNT6 = (1 << 14),
HRTIM_OUT_RST_TIMEVNT5 = (1 << 15),
HRTIM_OUT_RST_TIMEVNT4 = (1 << 16),
HRTIM_OUT_RST_TIMEVNT3 = (1 << 17),
HRTIM_OUT_RST_TIMEVNT2 = (1 << 18),
HRTIM_OUT_RST_TIMEVNT1 = (1 << 19),
HRTIM_OUT_RST_MSTCMP4 = (1 << 20),
HRTIM_OUT_RST_MSTCMP3 = (1 << 21),
HRTIM_OUT_RST_MSTCMP2 = (1 << 22),
HRTIM_OUT_RST_MSTCMP1 = (1 << 23),
HRTIM_OUT_RST_MSTPER = (1 << 24),
HRTIM_OUT_RST_CMP4 = (1 << 25),
HRTIM_OUT_RST_CMP3 = (1 << 26),
HRTIM_OUT_RST_CMP2 = (1 << 27),
HRTIM_OUT_RST_CMP1 = (1 << 28),
HRTIM_OUT_RST_PER = (1 << 29),
HRTIM_OUT_RST_RESYNC = (1 << 30),
HRTIM_OUT_RST_SOFT = (1 << 31)
HRTIM_OUT_RST_NONE = 0,
HRTIM_OUT_RST_SOFT = (1 << 0),
HRTIM_OUT_RST_RESYNC = (1 << 1),
HRTIM_OUT_RST_PER = (1 << 2),
HRTIM_OUT_RST_CMP1 = (1 << 3),
HRTIM_OUT_RST_CMP2 = (1 << 4),
HRTIM_OUT_RST_CMP3 = (1 << 5),
HRTIM_OUT_RST_CMP4 = (1 << 6),
HRTIM_OUT_RST_MSTPER = (1 << 7),
HRTIM_OUT_RST_MSTCMP1 = (1 << 8),
HRTIM_OUT_RST_MSTCMP2 = (1 << 9),
HRTIM_OUT_RST_MSTCMP3 = (1 << 10),
HRTIM_OUT_RST_MSTCMP4 = (1 << 11),
HRTIM_OUT_RST_TIMEVNT1 = (1 << 12),
HRTIM_OUT_RST_TIMEVNT2 = (1 << 13),
HRTIM_OUT_RST_TIMEVNT3 = (1 << 14),
HRTIM_OUT_RST_TIMEVNT4 = (1 << 15),
HRTIM_OUT_RST_TIMEVNT5 = (1 << 16),
HRTIM_OUT_RST_TIMEVNT6 = (1 << 17),
HRTIM_OUT_RST_TIMEVNT7 = (1 << 18),
HRTIM_OUT_RST_TIMEVNT8 = (1 << 19),
HRTIM_OUT_RST_TIMEVNT9 = (1 << 20),
HRTIM_OUT_RST_EXTEVNT1 = (1 << 21),
HRTIM_OUT_RST_EXTEVNT2 = (1 << 22),
HRTIM_OUT_RST_EXTEVNT3 = (1 << 23),
HRTIM_OUT_RST_EXTEVNT4 = (1 << 24),
HRTIM_OUT_RST_EXTEVNT5 = (1 << 25),
HRTIM_OUT_RST_EXTEVNT6 = (1 << 26),
HRTIM_OUT_RST_EXTEVNT7 = (1 << 27),
HRTIM_OUT_RST_EXTEVNT8 = (1 << 28),
HRTIM_OUT_RST_EXTEVNT9 = (1 << 29),
HRTIM_OUT_RST_EXTEVNT10 = (1 << 30),
HRTIM_OUT_RST_UPDATE = (1 << 31),
};
/* Source which can force the Tx1/Tx2 output to its active state */
enum stm32_hrtim_out_set_e
{
HRTIM_OUT_SET_UPDATE = (1 << 0),
HRTIM_OUT_SET_EXTEVNT10 = (1 << 1),
HRTIM_OUT_SET_EXTEVNT9 = (1 << 2),
HRTIM_OUT_SET_EXTEVNT8 = (1 << 3),
HRTIM_OUT_SET_EXTEVNT7 = (1 << 4),
HRTIM_OUT_SET_EXTEVNT6 = (1 << 5),
HRTIM_OUT_SET_EXTEVNT5 = (1 << 6),
HRTIM_OUT_SET_EXTEVNT4 = (1 << 7),
HRTIM_OUT_SET_EXTEVNT3 = (1 << 8),
HRTIM_OUT_SET_EXTEVNT2 = (1 << 9),
HRTIM_OUT_SET_EXTEVNT1 = (1 << 10),
HRTIM_OUT_SET_TIMEVNT9 = (1 << 11),
HRTIM_OUT_SET_TIMEVNT8 = (1 << 12),
HRTIM_OUT_SET_TIMEVNT7 = (1 << 13),
HRTIM_OUT_SET_TIMEVNT6 = (1 << 14),
HRTIM_OUT_SET_TIMEVNT5 = (1 << 15),
HRTIM_OUT_SET_TIMEVNT4 = (1 << 16),
HRTIM_OUT_SET_TIMEVNT3 = (1 << 17),
HRTIM_OUT_SET_TIMEVNT2 = (1 << 18),
HRTIM_OUT_SET_TIMEVNT1 = (1 << 19),
HRTIM_OUT_SET_MSTCMP4 = (1 << 20),
HRTIM_OUT_SET_MSTCMP3 = (1 << 21),
HRTIM_OUT_SET_MSTCMP2 = (1 << 22),
HRTIM_OUT_SET_MSTCMP1 = (1 << 23),
HRTIM_OUT_SET_MSTPER = (1 << 24),
HRTIM_OUT_SET_CMP4 = (1 << 25),
HRTIM_OUT_SET_CMP3 = (1 << 26),
HRTIM_OUT_SET_CMP2 = (1 << 27),
HRTIM_OUT_SET_CMP1 = (1 << 28),
HRTIM_OUT_SET_PER = (1 << 29),
HRTIM_OUT_SET_RESYNC = (1 << 30),
HRTIM_OUT_SET_SOFT = (1 << 31)
HRTIM_OUT_SET_NONE = 0,
HRTIM_OUT_SET_SOFT = (1 << 0),
HRTIM_OUT_SET_RESYNC = (1 << 1),
HRTIM_OUT_SET_PER = (1 << 2),
HRTIM_OUT_SET_CMP1 = (1 << 3),
HRTIM_OUT_SET_CMP2 = (1 << 4),
HRTIM_OUT_SET_CMP3 = (1 << 5),
HRTIM_OUT_SET_CMP4 = (1 << 6),
HRTIM_OUT_SET_MSTPER = (1 << 7),
HRTIM_OUT_SET_MSTCMP1 = (1 << 8),
HRTIM_OUT_SET_MSTCMP2 = (1 << 9),
HRTIM_OUT_SET_MSTCMP3 = (1 << 10),
HRTIM_OUT_SET_MSTCMP4 = (1 << 11),
HRTIM_OUT_SET_TIMEVNT1 = (1 << 12),
HRTIM_OUT_SET_TIMEVNT2 = (1 << 13),
HRTIM_OUT_SET_TIMEVNT3 = (1 << 14),
HRTIM_OUT_SET_TIMEVNT4 = (1 << 15),
HRTIM_OUT_SET_TIMEVNT5 = (1 << 16),
HRTIM_OUT_SET_TIMEVNT6 = (1 << 17),
HRTIM_OUT_SET_TIMEVNT7 = (1 << 18),
HRTIM_OUT_SET_TIMEVNT8 = (1 << 19),
HRTIM_OUT_SET_TIMEVNT9 = (1 << 20),
HRTIM_OUT_SET_EXTEVNT1 = (1 << 21),
HRTIM_OUT_SET_EXTEVNT2 = (1 << 22),
HRTIM_OUT_SET_EXTEVNT3 = (1 << 23),
HRTIM_OUT_SET_EXTEVNT4 = (1 << 24),
HRTIM_OUT_SET_EXTEVNT5 = (1 << 25),
HRTIM_OUT_SET_EXTEVNT6 = (1 << 26),
HRTIM_OUT_SET_EXTEVNT7 = (1 << 27),
HRTIM_OUT_SET_EXTEVNT8 = (1 << 28),
HRTIM_OUT_SET_EXTEVNT9 = (1 << 29),
HRTIM_OUT_SET_EXTEVNT10 = (1 << 30),
HRTIM_OUT_SET_UPDATE = (1 << 31),
};
/* Events that can reset TimerX Counter */
configs/nucleo-f334r8/include/board.h
+7 -2
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@@ -231,8 +231,13 @@
/* USART */
#define GPIO_USART2_RX GPIO_USART2_RX_2
#define GPIO_USART2_TX GPIO_USART2_TX_2
/* By default the USART2 is connected to STLINK Virtual COM Port:
* USART2_RX - PA3
* USART2_TX - PA4
*/
#define GPIO_USART2_RX GPIO_USART2_RX_1 /* PA3 */
#define GPIO_USART2_TX GPIO_USART2_TX_1 /* PA4 */
#define GPIO_USART1_RX GPIO_USART1_RX_1 /* PA10 */
#define GPIO_USART1_TX GPIO_USART1_TX_1 /* PA9 */
configs/nucleo-f334r8/nsh/defconfig
+2 -2
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@@ -91,11 +91,11 @@ CONFIG_START_YEAR=2011
CONFIG_STM32_CCMEXCLUDE=y
CONFIG_STM32_JTAG_SW_ENABLE=y
CONFIG_STM32_PWR=y
CONFIG_STM32_USART1=y
CONFIG_STM32_USART2=y
CONFIG_SYSLOG_NONE=y
CONFIG_TASK_NAME_SIZE=0
CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=512
CONFIG_USART1_SERIAL_CONSOLE=y
CONFIG_USART2_SERIAL_CONSOLE=y
CONFIG_USER_ENTRYPOINT="nsh_main"
CONFIG_USERMAIN_STACKSIZE=1024
CONFIG_WDOG_INTRESERVE=0