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https://github.com/apache/nuttx.git
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Added support for Raspberry Pi Pico W
This commit is contained in:
committed by
Alan Carvalho de Assis
parent
e03c2c321a
commit
74f1bfbfd7
Binary file not shown.
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===============================
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Raspberry Pi Pico
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===============================
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The `Raspberry Pi Pico <https://www.raspberrypi.com/products/raspberry-pi-pico/>`_ is a general purpose board supplied by
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the Raspberry Pi Foundation. The W variant adds built in WiFi communications.
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.. figure:: RaspberryPiPicoW.png
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:align: center
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Features
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========
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* RP2040 microcontroller chip
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* Dual-core ARM Cortex M0+ processor, flexible clock running up to 133 MHz
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* 264kB of SRAM, and 2MB of on-board Flash memory
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* Castellated module allows soldering direct to carrier boards
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* USB 1.1 Host and Device support
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* Low-power sleep and dormant modes
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* Drag & drop programming using mass storage over USB
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* 26 multi-function GPIO pins
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* 2× SPI, 2× I2C, 2× UART, 3× 12-bit ADC, 16× controllable PWM channels
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* Accurate clock and timer on-chip
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* Temperature sensor
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* Accelerated floating point libraries on-chip
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* 8 × Programmable IO (PIO) state machines for custom peripheral support
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* Built in WiFi radio (Infineon CYW43439)
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Serial Console
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==============
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By default a serial console appears on pins 1 (TX GPIO0) and pin 2
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(RX GPIO1). This console runs a 115200-8N1.
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The board can be configured to use the USB connection as the serial console.
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Buttons and LEDs
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================
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LED controlled by GPIO0 of the wireless chip (not the RP2040 processor).
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A BOOTSEL button, which if held down when power is first
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applied to the board, will cause the RP2040 to boot into programming
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mode and appear as a storage device to a computer connected via USB.
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Saving a .UF2 file to this device will replace the Flash ROM contents
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on the RP2040.
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Wireless Communication
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======================
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The on board Infineon CYW43439 supports 2.4 GHz WiFi 4 communications
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(802.11n), WPS3 and SoftAP with up to four clients.
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Pin Mapping
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===========
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===== ========== ==========
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Pin Signal Notes
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===== ========== ==========
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1 GPIO0 Default TX for UART0 serial console
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2 GPIO1 Default RX for UART1 serial console
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3 Ground
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4 GPIO2
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5 GPIO3
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6 GPIO4
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7 GPIO5
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8 Ground
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9 GPIO6
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10 GPIO7
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11 GPIO8
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12 GPIO9
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13 Ground
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14 GPIO10
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15 GPIO11
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16 GPIO12
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17 GPIO13
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18 Ground
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19 GPIO14
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20 GPIO15
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21 GPIO16
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22 GPIO17
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23 Ground
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24 GPIO18
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25 GPIO19
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26 GPIO20
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27 GPIO21
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28 Ground
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29 GPIO22
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30 Run
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31 GPIO26 ADC0
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32 GPIO27 ADC1
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33 AGND Analog Ground
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34 GPIO28 ADC2
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35 ADC_VREF
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36 3V3 Power output to peripherals
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37 3V3_EN Pull to ground to turn off.
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38 Ground
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39 VSYS +5V Supply to board
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40 VBUS Connected to USB +5V
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===== ========== ==========
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Other RP2040 Pins
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=================
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GPIO23 Output - WiFi controller enable.
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GPIO24 I/O - WiFi controller data line.
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GPIO25 Output - WiFi controller chip select line.
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GPIO29 Output - WiFi controller clock line.
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ADC3 Input - Analog voltage equal to one third of VSys voltage.
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Note: ADC3 and GPIO29 share the same pin on the RP2040. If the
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GPIO25 line is held high (Wifi controller NOT selected) then a voltage
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equal to one third of the VSys voltage with appear on this line and
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can be read with ADC3. When the WiFi chip is selected this voltage
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will be removed so the line can be used as a clock for data exchange
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with the WiFi controller.
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Separate pins for the Serial Debug Port (SDB) are available
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WiFi Controller GPIO
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====================
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GPIO0 - Output - On board LED.
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GPIO1 - Output - Power supply control.
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GPIO2 - Input - High if USB port or Pad 40 supplying power.
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Power Supply
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============
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The Raspberry Pi Pico can be powered via the USB connector,
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or by supplying +5V to pin 39. The board had a diode that prevents
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power from pin 39 from flowing back to the USB socket, although
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the socket can be power via pin 30.
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The Raspberry Pi Pico chip run on 3.3 volts. This is supplied
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by an onboard voltage regulator. This regulator can be disabled
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by pulling pin 37 to ground.
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The regulator can run in two modes. By default the regulator runs
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in PFM mode which provides the best efficiency, but may be
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switched to PWM mode for improved ripple by outputting a one
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on the wireless chip's GPIO1 (not the RP2040's GPIO1).
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Configurations
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==============
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audiopack
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---------
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NuttShell configuration (console enabled in UART0, at 115200 bps) with
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support for NSPlayer audio player.
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composite
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---------
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NuttShell configuration (console enabled in UART0, at 115200 bps) with support for
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CDC/ACM with MSC USB composite driver.
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displaypack
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-----------
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NuttShell configuration (console enabled in USB Port, at 115200 bps) supporting
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ST7789 video display.
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enc28j60
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--------
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NuttShell configuration (console enabled in UART0, at 115200 bps) with support for
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NC28J60.
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lcd1602
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-------
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NuttShell configuration (console enabled in UART0, at 115200 bps) with support for
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LCD1602.
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nsh
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---
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Basic NuttShell configuration (console enabled in UART0, at 115200 bps).
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nshsram
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-------
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NuttShell configuration (console enabled in UART0, at 115200 bps) with interrupt
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vectors in RAM.
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smp
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---
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Basic NuttShell configuration (console enabled in UART0, at 115200 bps) with
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both ARM cores enabled.
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spisd
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-----
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NuttShell configuration (console enabled in UART0, at 115200 bps) with SPI configured.
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ssd1306
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-------
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NuttShell configuration (console enabled in UART0, at 115200 bps) with support for
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ssd1306.
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st7735
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------
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NuttShell configuration (console enabled in UART0, at 115200 bps) with support for
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st7735.
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usbmsc
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------
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NuttShell configuration (console enabled in UART0, at 115200 bps) with support for
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usbmsc.
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usbnsh
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------
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Basic NuttShell configuration (console enabled in USB Port, at 115200 bps).
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waveshare-lcd-1.14
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------------------
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NuttShell configuration (console enabled in UART0, at 115200 bps) with support for
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st7789.
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waveshare-lcd-1.3
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-----------------
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NuttShell configuration (console enabled in UART0, at 115200 bps) with support for
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usbmsc.
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@@ -39,9 +39,9 @@ Buttons and LEDs
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User LED controlled by GPIO25.
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A BOOTSEL button, which if held down when power is first
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applied to the board, the cause the RP2040 to boot programming mode
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and appear to a computer connected via USB as a storage device.
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Saving a .UF2 file to this device will replace the Flash ROM contents
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applied to the board, will cause the RP2040 to boot into programming
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mode and appear as a storage device to a computer connected via USB .
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Saving a .UF2 file to this device will replace the Flash ROM contents
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on the RP2040.
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Pin Mapping
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@@ -83,19 +83,27 @@ Pad Signal Notes
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30 Run
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31 GPIO26 ADC0
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32 GPIO27 ADC1
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33 AGND Analog Ground
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33 AGND Analog Ground
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34 GPIO28 ADC2
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35 ADC_VREF
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36 3V3 Power output to peripherals
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37 3V3_EN Pull to ground to turn off.
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37 3V3_EN Pull to ground to turn off.
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38 Ground
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39 VSYS +5V Supply to board
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40 VBUS Connected to USB +5V
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===== ========== ==========
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Other RP2040 Pins
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=================
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GPIO23 Output - Power supply control.
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GPIO24 Input - High if USB port or Pad 40 supplying power.
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GPIO25 Output - On board LED.
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ADC3 Input - Analog voltage equal to one third of VSys voltage.
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Separate pins for the Serial Debug Port (SDB) are available
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Power Supply
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Power Supply
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============
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The Raspberry Pi Pico can be powered via the USB connector,
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@@ -108,9 +116,9 @@ by an onboard voltage regulator. This regulator can be disabled
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by pulling pin 37 to ground.
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The regulator can run in two modes. By default the regulator runs
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in PFM mode which provides the best efficiency, but may be
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in PFM mode which provides the best efficiency, but may be
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switched to PWM mode for improved ripple by outputting a one
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on GPIO23.
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on GPIO23.
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Configurations
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==============
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@@ -392,7 +392,7 @@ if RP2040_PWM
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if RP2040_PWM3
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config RP2040_PWM3A_GPIO
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config RP2040_PWM3A_INVERT
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bool "PWM3 channel 1 invert"
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default n
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@@ -425,7 +425,7 @@ if RP2040_PWM
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See the Board Selection menu to configure the pins used by I2C0.
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if RP2040_PWM4
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config RP2040_PWM4A_INVERT
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bool "PWM4 channel 1 invert"
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default n
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@@ -458,7 +458,7 @@ if RP2040_PWM
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See the Board Selection menu to configure the pins used by I2C0.
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if RP2040_PWM5
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config RP2040_PWM5A_INVERT
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bool "PWM5 channel 1 invert"
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default n
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@@ -491,7 +491,7 @@ if RP2040_PWM
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See the Board Selection menu to configure the pins used by I2C0.
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if RP2040_PWM6
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config RP2040_PWM6A_INVERT
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bool "PWM6 channel 1 invert"
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default n
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@@ -524,7 +524,7 @@ if RP2040_PWM
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See the Board Selection menu to configure the pins used by I2C0.
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if RP2040_PWM7
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config RP2040_PWM7A_INVERT
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bool "PWM7 channel 1 invert"
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default n
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@@ -550,7 +550,7 @@ if RP2040_PWM
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default n
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endif # RP2040_PWM7
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endif # RP2040_PWM
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#####################################################################
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@@ -591,7 +591,7 @@ if RP2040_I2S
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range 0 3
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endif
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#####################################################################
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# I2S Configuration
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#####################################################################
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@@ -672,11 +672,11 @@ if RP2040_ADC
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---help---
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If y, then the ADC chip temperature
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will be read.
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endif # ADC
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endif # RP2040_ADC
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#####################################################################
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# WS2812 Configuration
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#####################################################################
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@@ -685,6 +685,7 @@ config RP2040_BOARD_HAS_WS2812
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bool "Has ws2812 pixels"
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default n
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depends on WS2812
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select WS2812_NON_SPI_DRIVER
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---help---
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See the Board Selection menu to configure the pins used
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by ws2812.
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@@ -82,4 +82,9 @@ ifeq ($(CONFIG_RP2040_FLASH_BOOT),y)
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ifneq ($(PICO_SDK_PATH),)
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include chip/boot2/Make.defs
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endif
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ifeq ($(CONFIG_IEEE80211_INFINEON_CYW43439),y)
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CHIP_CSRCS += rp2040_cyw43439.c
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endif
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endif
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@@ -69,11 +69,11 @@
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#define RP2040_PADS_BANK0_GPIO_OD (1 << 7) /* Output disable. Has priority over output enable from peripherals */
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#define RP2040_PADS_BANK0_GPIO_IE (1 << 6) /* Input enable */
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#define RP2040_PADS_BANK0_GPIO_DRIVE_SHIFT (4) /* Drive strength. */
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#define RP2040_PADS_BANK0_GPIO_DRIVE_MASK (0x03 << RP2040_PADS_BANK0_GPIO0_DRIVE_SHIFT)
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#define RP2040_PADS_BANK0_GPIO_DRIVE_2MA (0x0 << RP2040_PADS_BANK0_GPIO0_DRIVE_SHIFT)
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#define RP2040_PADS_BANK0_GPIO_DRIVE_4MA (0x1 << RP2040_PADS_BANK0_GPIO0_DRIVE_SHIFT)
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#define RP2040_PADS_BANK0_GPIO_DRIVE_8MA (0x2 << RP2040_PADS_BANK0_GPIO0_DRIVE_SHIFT)
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#define RP2040_PADS_BANK0_GPIO_DRIVE_12MA (0x3 << RP2040_PADS_BANK0_GPIO0_DRIVE_SHIFT)
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#define RP2040_PADS_BANK0_GPIO_DRIVE_MASK (0x03 << RP2040_PADS_BANK0_GPIO_DRIVE_SHIFT)
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#define RP2040_PADS_BANK0_GPIO_DRIVE_2MA (0x0 << RP2040_PADS_BANK0_GPIO_DRIVE_SHIFT)
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#define RP2040_PADS_BANK0_GPIO_DRIVE_4MA (0x1 << RP2040_PADS_BANK0_GPIO_DRIVE_SHIFT)
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#define RP2040_PADS_BANK0_GPIO_DRIVE_8MA (0x2 << RP2040_PADS_BANK0_GPIO_DRIVE_SHIFT)
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#define RP2040_PADS_BANK0_GPIO_DRIVE_12MA (0x3 << RP2040_PADS_BANK0_GPIO_DRIVE_SHIFT)
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#define RP2040_PADS_BANK0_GPIO_PUE (1 << 3) /* Pull up enable */
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#define RP2040_PADS_BANK0_GPIO_PDE (1 << 2) /* Pull down enable */
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#define RP2040_PADS_BANK0_GPIO_SCHMITT (1 << 1) /* Enable schmitt trigger */
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@@ -207,6 +207,9 @@
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#define RP2040_PIO_FLEVEL_TX0_SHIFT (0)
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#define RP2040_PIO_FLEVEL_TX0_MASK (0x0f)
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#define RP2040_PIO_FLEVEL_TX_MASK(n) (0x0f << 8*n)
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#define RP2040_PIO_FLEVEL_RX_MASK(n) (0xf0 << 8*n)
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#define RP2040_PIO_IRQ_MASK (0xff)
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#define RP2040_PIO_IRQ_FORCE_MASK (0xff)
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File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,115 @@
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/****************************************************************************
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* arch/arm/src/rp2040/rp2040_cyw43439.h
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*
|
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* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership. The
|
||||
* ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||
* "License"); you may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
* License for the specific language governing permissions and limitations
|
||||
* under the License.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __BOARDS_ARM_RP2040_COMMON_INCLUDE_RP2040_CYW43439_H
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#define __BOARDS_ARM_RP2040_COMMON_INCLUDE_RP2040_CYW43439_H
|
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|
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/****************************************************************************
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* Included Files
|
||||
****************************************************************************/
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||||
|
||||
#include <nuttx/config.h>
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#include <nuttx/net/netdev.h>
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||||
#include <nuttx/wireless/ieee80211/bcmf_gspi.h>
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/****************************************************************************
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* Public Types
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****************************************************************************/
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#ifndef __ASSEMBLY__
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/****************************************************************************
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* Public Data
|
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****************************************************************************/
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#undef EXTERN
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#if defined(__cplusplus)
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#define EXTERN extern "C"
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extern "C"
|
||||
{
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#else
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#define EXTERN extern
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#endif
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/****************************************************************************
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* Public Types
|
||||
****************************************************************************/
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typedef struct rp2040_gspi_s
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{
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uint32_t pio; /* The pio instance we are using. */
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uint32_t pio_sm; /* The state machine we are using. */
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uint32_t pio_location; /* the program location in the pio. */
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uint8_t gpio_on; /* Set high to power chip on */
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uint8_t gpio_select; /* Pull low to select chip */
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uint8_t gpio_data; /* Data line -- idle high */
|
||||
uint8_t gpio_clock; /* Clock line -- idle low */
|
||||
uint8_t gpio_intr; /* May be shared with data */
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||||
} rp2040_gspi_t;
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||||
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||||
typedef struct cyw_pio_program_s
|
||||
{
|
||||
const uint16_t *instructions;
|
||||
uint8_t length;
|
||||
int8_t origin; /* required instruction memory origin or -1 */
|
||||
} cyw_pio_program_t;
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||||
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||||
/****************************************************************************
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||||
* Public Function Prototypes
|
||||
****************************************************************************/
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||||
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||||
/****************************************************************************
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||||
* Name: rp2040_cyw_setup
|
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*
|
||||
* Description:
|
||||
* Initialize the cyw43439 device.
|
||||
*
|
||||
* Returns:
|
||||
* A pointer to the cyw43439 device
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
gspi_dev_t *rp2040_cyw_setup(uint8_t gpio_on,
|
||||
uint8_t gpio_select,
|
||||
uint8_t gpio_data,
|
||||
uint8_t gpio_clock,
|
||||
uint8_t gpio_intr);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: rp2040_cyw_remove
|
||||
*
|
||||
* Description:
|
||||
* Deinitialize the cyw43439 device.
|
||||
*
|
||||
* Parameters:
|
||||
* A pointer (as returned by rp2040_cyw_setup) to the device to remove.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void rp2040_cyw_remove(FAR gspi_dev_t *dev);
|
||||
|
||||
#undef EXTERN
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
#endif /* __BOARDS_ARM_RP2040_COMMON_INCLUDE_RP2040_CYW43439_H */
|
||||
@@ -53,7 +53,6 @@ struct dma_channel_s
|
||||
{
|
||||
uint8_t chan; /* DMA channel number (0-RP2040_DMA_NCHANNELS) */
|
||||
bool inuse; /* TRUE: The DMA channel is in use */
|
||||
dma_config_t config; /* Current configuration */
|
||||
dma_callback_t callback; /* Callback invoked when the DMA completes */
|
||||
void *arg; /* Argument passed to callback function */
|
||||
};
|
||||
@@ -334,10 +333,6 @@ void rp2040_rxdmasetup(DMA_HANDLE handle, uintptr_t paddr, uintptr_t maddr,
|
||||
DEBUGASSERT(dmach != NULL && dmach->inuse);
|
||||
ch = dmach->chan;
|
||||
|
||||
/* Save the configuration (for rp2040_dmastart()). */
|
||||
|
||||
dmach->config = config;
|
||||
|
||||
DEBUGASSERT(config.size >= RP2040_DMA_SIZE_BYTE &&
|
||||
config.size <= RP2040_DMA_SIZE_WORD);
|
||||
|
||||
@@ -395,10 +390,6 @@ void rp2040_txdmasetup(DMA_HANDLE handle, uintptr_t paddr, uintptr_t maddr,
|
||||
DEBUGASSERT(dmach != NULL && dmach->inuse);
|
||||
ch = dmach->chan;
|
||||
|
||||
/* Save the configuration (for rp2040_dmastart()). */
|
||||
|
||||
dmach->config = config;
|
||||
|
||||
DEBUGASSERT(config.size >= RP2040_DMA_SIZE_BYTE &&
|
||||
config.size <= RP2040_DMA_SIZE_WORD);
|
||||
|
||||
@@ -429,6 +420,115 @@ void rp2040_txdmasetup(DMA_HANDLE handle, uintptr_t paddr, uintptr_t maddr,
|
||||
putreg32(ctrl, RP2040_DMA_CTRL_TRIG(ch));
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: rp2040_ctrl_dmasetup
|
||||
*
|
||||
* Description:
|
||||
* Configure a dma channel to send a list of channel control blocks to
|
||||
* a second dma channel..
|
||||
*
|
||||
* Input Parameters:
|
||||
* control - the DMA handle that reads the control blocks. This is
|
||||
* the one that should be started.
|
||||
* transfer - the DMA handle the transfers data to the peripheral.
|
||||
* ctrl_blks - the array of control blocks to used. Terminate this
|
||||
* list with an all zero control block.
|
||||
* callback - callback when last transfer completes
|
||||
* arg - arg to pass to callback
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void rp2040_ctrl_dmasetup(DMA_HANDLE control,
|
||||
DMA_HANDLE transfer,
|
||||
dma_control_block_t *ctrl_blks,
|
||||
dma_callback_t callback,
|
||||
void *arg)
|
||||
{
|
||||
struct dma_channel_s *ctrl_dmach = (struct dma_channel_s *)control;
|
||||
struct dma_channel_s *xfer_dmach = (struct dma_channel_s *)transfer;
|
||||
uint32_t ctrl_ch;
|
||||
uint32_t xfer_ch;
|
||||
uint32_t xfer_reg_addr;
|
||||
uint32_t ctrl;
|
||||
|
||||
DEBUGASSERT(ctrl_dmach && ctrl_dmach->inuse);
|
||||
DEBUGASSERT(xfer_dmach && xfer_dmach->inuse);
|
||||
|
||||
ctrl_ch = ctrl_dmach->chan;
|
||||
xfer_ch = xfer_dmach->chan;
|
||||
|
||||
xfer_dmach->callback = callback;
|
||||
xfer_dmach->arg = arg;
|
||||
|
||||
xfer_reg_addr = RP2040_DMA_AL1_CTRL(xfer_ch);
|
||||
|
||||
/* Set DMA registers */
|
||||
|
||||
putreg32((uint32_t)ctrl_blks, RP2040_DMA_READ_ADDR(ctrl_ch));
|
||||
putreg32(xfer_reg_addr, RP2040_DMA_WRITE_ADDR(ctrl_ch));
|
||||
putreg32(4, RP2040_DMA_TRANS_COUNT(ctrl_ch));
|
||||
|
||||
/* Configure the xfer dma channel as follows:
|
||||
* clear read and write error flags
|
||||
* set increment on both read and write
|
||||
* set 32-bit (word) transfer size
|
||||
* run the ctrl at high priority
|
||||
* RING_SIZE applies to write
|
||||
* set RING_SIZE to wrap every 16 bytes
|
||||
* don't chain to another dma (chain set to ourself)
|
||||
* use un-paced transfer mode TREQ_SEL = 0x3f
|
||||
*/
|
||||
|
||||
ctrl = RP2040_DMA_CTRL_TRIG_READ_ERROR
|
||||
| RP2040_DMA_CTRL_TRIG_WRITE_ERROR
|
||||
| RP2040_DMA_CTRL_TRIG_INCR_READ
|
||||
| RP2040_DMA_CTRL_TRIG_INCR_WRITE
|
||||
| RP2040_DMA_CTRL_TRIG_HIGH_PRIORITY
|
||||
| RP2040_DMA_CTRL_TRIG_RING_SEL
|
||||
| (4 << RP2040_DMA_CTRL_TRIG_RING_SIZE_SHIFT)
|
||||
| (RP2040_DMA_SIZE_WORD << RP2040_DMA_CTRL_TRIG_DATA_SIZE_SHIFT)
|
||||
| (ctrl_ch << RP2040_DMA_CTRL_TRIG_CHAIN_TO_SHIFT)
|
||||
| (0x3f << RP2040_DMA_CTRL_TRIG_TREQ_SEL_SHIFT);
|
||||
|
||||
putreg32(ctrl, RP2040_DMA_CTRL_TRIG(ctrl_ch));
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: rp2040_ctrl_dmasetup
|
||||
*
|
||||
* Description:
|
||||
* Configure a dma channel to send a list of channel control blocks to
|
||||
* a second dma channel..
|
||||
*
|
||||
* Input Parameters:
|
||||
* control - the DMA handle that reads the control blocks. This is
|
||||
* the one that should be started.
|
||||
* size - transfer size for this block
|
||||
* pacing - dma pacing register for this block
|
||||
* ctrl - Additional bits to set in CTRL_TRIG for this block.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
uint32_t rp2040_dma_ctrl_blk_ctrl(DMA_HANDLE control,
|
||||
int size,
|
||||
uint32_t pacing,
|
||||
uint32_t ctrl)
|
||||
{
|
||||
struct dma_channel_s *ctrl_dmach = (struct dma_channel_s *)control;
|
||||
uint32_t ctrl_ch;
|
||||
|
||||
DEBUGASSERT(ctrl_dmach && ctrl_dmach->inuse);
|
||||
|
||||
ctrl_ch = ctrl_dmach->chan;
|
||||
|
||||
return RP2040_DMA_CTRL_TRIG_EN
|
||||
| RP2040_DMA_CTRL_TRIG_IRQ_QUIET
|
||||
| (ctrl_ch << RP2040_DMA_CTRL_TRIG_CHAIN_TO_SHIFT)
|
||||
| (size << RP2040_DMA_CTRL_TRIG_DATA_SIZE_SHIFT)
|
||||
| (pacing << RP2040_DMA_CTRL_TRIG_TREQ_SEL_SHIFT)
|
||||
| ctrl;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: rp2040_dmastart
|
||||
*
|
||||
@@ -491,3 +591,26 @@ void rp2040_dmastop(DMA_HANDLE handle)
|
||||
}
|
||||
while (stat & bit);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: rp2040_dma_register
|
||||
*
|
||||
* Description:
|
||||
* Get the address of a DMA register based on the given dma handle that
|
||||
* can be used in the various putreg, getreg and modifyreg functions.
|
||||
*
|
||||
* This allows other configuration options not normally supplied.
|
||||
*
|
||||
* Assumptions:
|
||||
* - DMA handle allocated by rp2040_dmachannel()
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
uintptr_t rp2040_dma_register(DMA_HANDLE handle, uint16_t offset)
|
||||
{
|
||||
struct dma_channel_s *dmach = (struct dma_channel_s *)handle;
|
||||
|
||||
DEBUGASSERT(dmach && dmach->inuse);
|
||||
|
||||
return RP2040_DMA_CH(dmach->chan) + offset;
|
||||
}
|
||||
|
||||
@@ -84,6 +84,16 @@
|
||||
#define RP2040_DMA_SIZE_HALFWORD 1
|
||||
#define RP2040_DMA_SIZE_WORD 2
|
||||
|
||||
/* Use this as last item in a DMA control block chain */
|
||||
|
||||
#define RP2040_DMA_CTRL_BLOCK_END \
|
||||
{ \
|
||||
RP2040_DMA_CTRL_TRIG_IRQ_QUIET, \
|
||||
0, \
|
||||
0, \
|
||||
0 \
|
||||
}
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
#undef EXTERN
|
||||
@@ -129,6 +139,18 @@ typedef struct
|
||||
uint8_t noincr;
|
||||
} dma_config_t;
|
||||
|
||||
/* Type of items in the array items to 'ctrl_blks' argument for
|
||||
* rp2040_ctrl_dmasetup().
|
||||
*/
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint32_t ctrl_trig;
|
||||
uintptr_t read_addr;
|
||||
uintptr_t write_addr;
|
||||
uint32_t xfer_count;
|
||||
} dma_control_block_t;
|
||||
|
||||
/****************************************************************************
|
||||
* Public Data
|
||||
****************************************************************************/
|
||||
@@ -221,6 +243,52 @@ void rp2040_rxdmasetup(DMA_HANDLE handle, uintptr_t paddr, uintptr_t maddr,
|
||||
void rp2040_txdmasetup(DMA_HANDLE handle, uintptr_t paddr, uintptr_t maddr,
|
||||
size_t nbytes, dma_config_t config);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: rp2040_ctrl_dmasetup
|
||||
*
|
||||
* Description:
|
||||
* Configure a dma channel to send a list of channel control blocks to
|
||||
* a second dma channel..
|
||||
*
|
||||
* Input Parameters:
|
||||
* control - the DMA handle that reads the control blocks. This is
|
||||
* the one that should be started.
|
||||
* transfer - the DMA handle the transfers data to the peripheral. No
|
||||
* setup of this handle is required by the caller.
|
||||
* ctrl_blks - the array of control blocks to used. Terminate this
|
||||
* list with an all zero control block.
|
||||
* callback - callback when last transfer completes
|
||||
* arg - arg to pass to callback
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void rp2040_ctrl_dmasetup(DMA_HANDLE control,
|
||||
DMA_HANDLE transfer,
|
||||
dma_control_block_t *ctrl_blks,
|
||||
dma_callback_t callback,
|
||||
void *arg);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: rp2040_ctrl_dmasetup
|
||||
*
|
||||
* Description:
|
||||
* Configure a dma channel to send a list of channel control blocks to
|
||||
* a second dma channel..
|
||||
*
|
||||
* Input Parameters:
|
||||
* control - the DMA handle that reads the control blocks. This is
|
||||
* the one that should be started.
|
||||
* size - transfer size for this block
|
||||
* pacing - dma pacing register for this block
|
||||
* ctrl - Additional bits to set in CTRL_TRIG for this block.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
uint32_t rp2040_dma_ctrl_blk_ctrl(DMA_HANDLE control,
|
||||
int size,
|
||||
uint32_t pacing,
|
||||
uint32_t ctrl);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: rp2040_dmastart
|
||||
*
|
||||
@@ -250,6 +318,22 @@ void rp2040_dmastart(DMA_HANDLE handle, dma_callback_t callback, void *arg);
|
||||
|
||||
void rp2040_dmastop(DMA_HANDLE handle);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: rp2040_dma_register
|
||||
*
|
||||
* Description:
|
||||
* Get the address of a DMA register based on the given DMA handle that
|
||||
* can be used in the various putreg, getreg and modifyreg functions.
|
||||
*
|
||||
* This allows other configuration options not normally supplied.
|
||||
*
|
||||
* Assumptions:
|
||||
* - DMA handle allocated by rp2040_dmachannel()
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
uintptr_t rp2040_dma_register(DMA_HANDLE handle, uint16_t offset);
|
||||
|
||||
#undef EXTERN
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
|
||||
@@ -361,6 +361,31 @@ void rp2040_gpio_disable_irq(uint32_t gpio)
|
||||
}
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: rp2040_gpio_clear_interrupt
|
||||
*
|
||||
* Description:
|
||||
* Clear the interrupt flags for a gpio pin.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void rp2040_gpio_clear_interrupt(uint32_t gpio,
|
||||
bool edge_low,
|
||||
bool edge_high)
|
||||
{
|
||||
uint32_t reg;
|
||||
uint32_t bits = 0;
|
||||
|
||||
DEBUGASSERT(gpio < RP2040_GPIO_NUM);
|
||||
|
||||
reg = RP2040_IO_BANK0_INTR(gpio);
|
||||
|
||||
if (edge_low) bits |= 0x04 << (gpio % 8);
|
||||
if (edge_high) bits |= 0x08 << (gpio % 8);
|
||||
|
||||
clrbits_reg32(bits, reg);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: r2040_gpio_initialize
|
||||
*
|
||||
|
||||
@@ -126,6 +126,60 @@ static inline void rp2040_gpio_setdir(uint32_t gpio, int out)
|
||||
}
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: rp2040_gpio_set_input_hysteresis_enabled
|
||||
*
|
||||
* Description:
|
||||
* Set whether the pin's input hysteresis will be enabled.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static inline void rp2040_gpio_set_input_hysteresis_enabled(uint32_t gpio,
|
||||
bool enabled)
|
||||
{
|
||||
DEBUGASSERT(gpio < RP2040_GPIO_NUM);
|
||||
|
||||
modbits_reg32(enabled ? RP2040_PADS_BANK0_GPIO_SCHMITT : 0,
|
||||
RP2040_PADS_BANK0_GPIO_SCHMITT,
|
||||
RP2040_PADS_BANK0_GPIO(gpio));
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: rp2040_gpio_set_slew_fast
|
||||
*
|
||||
* Description:
|
||||
* Set whether the pin's fast slew rate will be enabled.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static inline void rp2040_gpio_set_slew_fast(uint32_t gpio,
|
||||
bool enabled)
|
||||
{
|
||||
DEBUGASSERT(gpio < RP2040_GPIO_NUM);
|
||||
|
||||
modbits_reg32(enabled ? RP2040_PADS_BANK0_GPIO_SLEWFAST : 0,
|
||||
RP2040_PADS_BANK0_GPIO_SLEWFAST,
|
||||
RP2040_PADS_BANK0_GPIO(gpio));
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: rp2040_gpio_set_drive_strength
|
||||
*
|
||||
* Description:
|
||||
* Set the pin's drive strength.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static inline void rp2040_gpio_set_drive_strength(uint32_t gpio,
|
||||
uint32_t drive_strength)
|
||||
{
|
||||
DEBUGASSERT(gpio < RP2040_GPIO_NUM);
|
||||
|
||||
modbits_reg32(drive_strength,
|
||||
RP2040_PADS_BANK0_GPIO_DRIVE_MASK,
|
||||
RP2040_PADS_BANK0_GPIO(gpio));
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Public Function Prototypes
|
||||
****************************************************************************/
|
||||
@@ -201,6 +255,18 @@ void rp2040_gpio_enable_irq(uint32_t gpio);
|
||||
|
||||
void rp2040_gpio_disable_irq(uint32_t gpio);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: rp2040_gpio_clear_interrupt
|
||||
*
|
||||
* Description:
|
||||
* Clear the interrupt flags for a gpio pin.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void rp2040_gpio_clear_interrupt(uint32_t gpio,
|
||||
bool edge_low,
|
||||
bool edge_high);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: r2040_gpio_initialize
|
||||
*
|
||||
|
||||
@@ -1960,6 +1960,30 @@ void rp2040_pio_sm_unclaim(uint32_t pio, uint32_t sm);
|
||||
|
||||
int rp2040_pio_claim_unused_sm(uint32_t pio, bool required);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: rp2040_pio_set_input_sync_bypass
|
||||
*
|
||||
* Description:
|
||||
* Set the input synchronizer bypess bit for a GPIO pin
|
||||
*
|
||||
* Input Parameters:
|
||||
* pio - PIO index (0..1)
|
||||
* pin - GPIO pin number (0-29)
|
||||
* bypass - bypass set true to bypass the synchronizer.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static inline void rp2040_pio_set_input_sync_bypass(uint32_t pio,
|
||||
uint32_t pin,
|
||||
bool bypass)
|
||||
{
|
||||
DEBUGASSERT(pin < RP2040_GPIO_NUM);
|
||||
|
||||
modbits_reg32(bypass ? (1 << pin) : 0,
|
||||
(1 << pin),
|
||||
RP2040_PIO_INPUT_SYNC_BYPASS(pio));
|
||||
}
|
||||
|
||||
#undef EXTERN
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
|
||||
@@ -174,8 +174,9 @@ static int my_open(FAR struct file *filep)
|
||||
rp2040_pio_sm_config config;
|
||||
int divisor;
|
||||
int ret;
|
||||
irqstate_t flags;
|
||||
|
||||
nxsem_wait(&dev_data->exclsem);
|
||||
flags = enter_critical_section();
|
||||
|
||||
priv->open_count += 1;
|
||||
|
||||
@@ -213,7 +214,7 @@ static int my_open(FAR struct file *filep)
|
||||
|
||||
priv->pio_sm = rp2040_pio_claim_unused_sm(priv->pio, false);
|
||||
|
||||
/* If we did not get one try the nest pio block, if any */
|
||||
/* If we did not get one try the next pio block, if any */
|
||||
|
||||
if (priv->pio_sm < 0) continue;
|
||||
|
||||
@@ -322,7 +323,7 @@ static int my_open(FAR struct file *filep)
|
||||
ret = OK;
|
||||
|
||||
post_and_return:
|
||||
nxsem_post(&dev_data->exclsem);
|
||||
leave_critical_section(flags);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
+11
-1
@@ -1489,11 +1489,17 @@ config ARCH_BOARD_INTEL64_QEMU
|
||||
generic Intel64 hardware.
|
||||
|
||||
config ARCH_BOARD_RASPBERRYPI_PICO
|
||||
bool "Raspberry Pi Pico board"
|
||||
bool "Raspberry Pi Pico board (not W)"
|
||||
depends on ARCH_CHIP_RP2040
|
||||
---help---
|
||||
This is a port to the Raspberry Pi Pico board.
|
||||
|
||||
config ARCH_BOARD_RASPBERRYPI_PICO_W
|
||||
bool "Raspberry Pi Pico W board"
|
||||
depends on ARCH_CHIP_RP2040
|
||||
---help---
|
||||
This is a port to the Raspberry Pi Pico W board.
|
||||
|
||||
config ARCH_BOARD_PIMORONI_TINY2040
|
||||
bool "Pimoroni Tiny2040 board"
|
||||
depends on ARCH_CHIP_RP2040
|
||||
@@ -2706,6 +2712,7 @@ config ARCH_BOARD
|
||||
default "qemu-i486" if ARCH_BOARD_QEMU_I486
|
||||
default "intel64-qemu" if ARCH_BOARD_INTEL64_QEMU
|
||||
default "raspberrypi-pico" if ARCH_BOARD_RASPBERRYPI_PICO
|
||||
default "raspberrypi-pico-w" if ARCH_BOARD_RASPBERRYPI_PICO_W
|
||||
default "pimoroni-tiny2040" if ARCH_BOARD_PIMORONI_TINY2040
|
||||
default "adafruit-feather-rp2040" if ARCH_BOARD_ADAFRUIT_FEATHER_RP2040
|
||||
default "adafruit-kb2040" if ARCH_BOARD_ADAFRUIT_KB2040
|
||||
@@ -3059,6 +3066,9 @@ endif
|
||||
if ARCH_BOARD_RASPBERRYPI_PICO
|
||||
source "boards/arm/rp2040/raspberrypi-pico/Kconfig"
|
||||
endif
|
||||
if ARCH_BOARD_RASPBERRYPI_PICO_W
|
||||
source "boards/arm/rp2040/raspberrypi-pico-w/Kconfig"
|
||||
endif
|
||||
if ARCH_BOARD_PIMORONI_TINY2040
|
||||
source "boards/arm/rp2040/pimoroni-tiny2040/Kconfig"
|
||||
endif
|
||||
|
||||
@@ -75,4 +75,3 @@ CONFIG_TESTING_GETPRIME=y
|
||||
CONFIG_TESTING_OSTEST=y
|
||||
CONFIG_UART0_SERIAL_CONSOLE=y
|
||||
CONFIG_WS2812=y
|
||||
CONFIG_WS2812_NON_SPI_DRIVER=y
|
||||
|
||||
@@ -78,4 +78,3 @@ CONFIG_USBMSC=y
|
||||
CONFIG_USBMSC_COMPOSITE=y
|
||||
CONFIG_USBMSC_NOT_STALL_BULKEP=y
|
||||
CONFIG_WS2812=y
|
||||
CONFIG_WS2812_NON_SPI_DRIVER=y
|
||||
|
||||
@@ -102,4 +102,3 @@ CONFIG_USBDEV=y
|
||||
CONFIG_USBDEV_BUSPOWERED=y
|
||||
CONFIG_VIDEO_FB=y
|
||||
CONFIG_WS2812=y
|
||||
CONFIG_WS2812_NON_SPI_DRIVER=y
|
||||
|
||||
@@ -86,4 +86,3 @@ CONFIG_TESTING_OSTEST=y
|
||||
CONFIG_UART0_SERIAL_CONSOLE=y
|
||||
CONFIG_WQUEUE_NOTIFIER=y
|
||||
CONFIG_WS2812=y
|
||||
CONFIG_WS2812_NON_SPI_DRIVER=y
|
||||
|
||||
@@ -58,4 +58,3 @@ CONFIG_TESTING_GETPRIME=y
|
||||
CONFIG_TESTING_OSTEST=y
|
||||
CONFIG_UART0_SERIAL_CONSOLE=y
|
||||
CONFIG_WS2812=y
|
||||
CONFIG_WS2812_NON_SPI_DRIVER=y
|
||||
|
||||
@@ -49,4 +49,3 @@ CONFIG_TESTING_GETPRIME=y
|
||||
CONFIG_TESTING_OSTEST=y
|
||||
CONFIG_UART0_SERIAL_CONSOLE=y
|
||||
CONFIG_WS2812=y
|
||||
CONFIG_WS2812_NON_SPI_DRIVER=y
|
||||
|
||||
@@ -49,4 +49,3 @@ CONFIG_TESTING_GETPRIME=y
|
||||
CONFIG_TESTING_OSTEST=y
|
||||
CONFIG_UART0_SERIAL_CONSOLE=y
|
||||
CONFIG_WS2812=y
|
||||
CONFIG_WS2812_NON_SPI_DRIVER=y
|
||||
|
||||
@@ -55,4 +55,3 @@ CONFIG_TESTING_OSTEST=y
|
||||
CONFIG_TESTING_SMP=y
|
||||
CONFIG_UART0_SERIAL_CONSOLE=y
|
||||
CONFIG_WS2812=y
|
||||
CONFIG_WS2812_NON_SPI_DRIVER=y
|
||||
|
||||
@@ -60,4 +60,3 @@ CONFIG_TESTING_GETPRIME=y
|
||||
CONFIG_TESTING_OSTEST=y
|
||||
CONFIG_UART0_SERIAL_CONSOLE=y
|
||||
CONFIG_WS2812=y
|
||||
CONFIG_WS2812_NON_SPI_DRIVER=y
|
||||
|
||||
@@ -77,4 +77,3 @@ CONFIG_TESTING_GETPRIME=y
|
||||
CONFIG_TESTING_OSTEST=y
|
||||
CONFIG_UART0_SERIAL_CONSOLE=y
|
||||
CONFIG_WS2812=y
|
||||
CONFIG_WS2812_NON_SPI_DRIVER=y
|
||||
|
||||
@@ -59,4 +59,3 @@ CONFIG_TESTING_OSTEST=y
|
||||
CONFIG_UART0_SERIAL_CONSOLE=y
|
||||
CONFIG_VIDEO_FB=y
|
||||
CONFIG_WS2812=y
|
||||
CONFIG_WS2812_NON_SPI_DRIVER=y
|
||||
|
||||
@@ -71,4 +71,3 @@ CONFIG_USBDEV_BUSPOWERED=y
|
||||
CONFIG_USBMSC=y
|
||||
CONFIG_USBMSC_NOT_STALL_BULKEP=y
|
||||
CONFIG_WS2812=y
|
||||
CONFIG_WS2812_NON_SPI_DRIVER=y
|
||||
|
||||
@@ -53,4 +53,3 @@ CONFIG_TESTING_OSTEST=y
|
||||
CONFIG_USBDEV=y
|
||||
CONFIG_USBDEV_BUSPOWERED=y
|
||||
CONFIG_WS2812=y
|
||||
CONFIG_WS2812_NON_SPI_DRIVER=y
|
||||
|
||||
@@ -95,4 +95,3 @@ CONFIG_TESTING_OSTEST=y
|
||||
CONFIG_UART0_SERIAL_CONSOLE=y
|
||||
CONFIG_VIDEO_FB=y
|
||||
CONFIG_WS2812=y
|
||||
CONFIG_WS2812_NON_SPI_DRIVER=y
|
||||
|
||||
@@ -92,4 +92,3 @@ CONFIG_TESTING_OSTEST=y
|
||||
CONFIG_UART0_SERIAL_CONSOLE=y
|
||||
CONFIG_VIDEO_FB=y
|
||||
CONFIG_WS2812=y
|
||||
CONFIG_WS2812_NON_SPI_DRIVER=y
|
||||
|
||||
@@ -32,6 +32,10 @@
|
||||
#include "arm_internal.h"
|
||||
#include "rp2040_gpio.h"
|
||||
|
||||
#ifdef CONFIG_ARCH_BOARD_COMMON
|
||||
#include "rp2040_common_initialize.h"
|
||||
#endif /* CONFIG_ARCH_BOARD_COMMON */
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
@@ -53,52 +57,17 @@
|
||||
|
||||
void rp2040_boardearlyinitialize(void)
|
||||
{
|
||||
rp2040_gpio_initialize();
|
||||
#ifdef CONFIG_ARCH_BOARD_COMMON
|
||||
rp2040_common_earlyinitialize();
|
||||
#endif
|
||||
|
||||
/* Disable IE on GPIO 26-29 */
|
||||
|
||||
clrbits_reg32(RP2040_PADS_BANK0_GPIO_IE, RP2040_PADS_BANK0_GPIO(26));
|
||||
clrbits_reg32(RP2040_PADS_BANK0_GPIO_IE, RP2040_PADS_BANK0_GPIO(27));
|
||||
clrbits_reg32(RP2040_PADS_BANK0_GPIO_IE, RP2040_PADS_BANK0_GPIO(28));
|
||||
clrbits_reg32(RP2040_PADS_BANK0_GPIO_IE, RP2040_PADS_BANK0_GPIO(29));
|
||||
/* --- Place any board specific early initialization here --- */
|
||||
|
||||
/* Set board LED pin */
|
||||
|
||||
rp2040_gpio_init(BOARD_GPIO_LED_PIN);
|
||||
rp2040_gpio_setdir(BOARD_GPIO_LED_PIN, true);
|
||||
rp2040_gpio_put(BOARD_GPIO_LED_PIN, true);
|
||||
|
||||
/* Set default UART pin */
|
||||
|
||||
#ifdef CONFIG_RP2040_UART0
|
||||
rp2040_gpio_set_function(CONFIG_RP2040_UART0_TX_GPIO,
|
||||
RP2040_GPIO_FUNC_UART); /* TX */
|
||||
rp2040_gpio_set_function(CONFIG_RP2040_UART0_RX_GPIO,
|
||||
RP2040_GPIO_FUNC_UART); /* RX */
|
||||
#ifdef CONFIG_SERIAL_OFLOWCONTROL
|
||||
rp2040_gpio_set_function(CONFIG_RP2040_UART0_CTS_GPIO,
|
||||
RP2040_GPIO_FUNC_UART); /* CTS */
|
||||
#endif
|
||||
#ifdef CONFIG_SERIAL_IFLOWCONTROL
|
||||
rp2040_gpio_set_function(CONFIG_RP2040_UART0_RTS_GPIO,
|
||||
RP2040_GPIO_FUNC_UART); /* RTS */
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_RP2040_UART1
|
||||
rp2040_gpio_set_function(CONFIG_RP2040_UART1_TX_GPIO,
|
||||
RP2040_GPIO_FUNC_UART); /* TX */
|
||||
rp2040_gpio_set_function(CONFIG_RP2040_UART1_RX_GPIO,
|
||||
RP2040_GPIO_FUNC_UART); /* RX */
|
||||
#ifdef CONFIG_SERIAL_OFLOWCONTROL
|
||||
rp2040_gpio_set_function(CONFIG_RP2040_UART1_CTS_GPIO,
|
||||
RP2040_GPIO_FUNC_UART); /* CTS */
|
||||
#endif
|
||||
#ifdef CONFIG_SERIAL_IFLOWCONTROL
|
||||
rp2040_gpio_set_function(CONFIG_RP2040_UART1_RTS_GPIO,
|
||||
RP2040_GPIO_FUNC_UART); /* RTS */
|
||||
#endif
|
||||
#endif
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
@@ -110,57 +79,9 @@ void rp2040_boardearlyinitialize(void)
|
||||
|
||||
void rp2040_boardinitialize(void)
|
||||
{
|
||||
/* Set default I2C pin */
|
||||
#ifdef CONFIG_ARCH_BOARD_COMMON
|
||||
rp2040_common_initialize();
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_RP2040_I2C0
|
||||
rp2040_gpio_set_function(CONFIG_RP2040_I2C0_SDA_GPIO,
|
||||
RP2040_GPIO_FUNC_I2C); /* SDA */
|
||||
rp2040_gpio_set_function(CONFIG_RP2040_I2C0_SCL_GPIO,
|
||||
RP2040_GPIO_FUNC_I2C); /* SCL */
|
||||
|
||||
rp2040_gpio_set_pulls(CONFIG_RP2040_I2C0_SDA_GPIO, true, false); /* Pull up */
|
||||
rp2040_gpio_set_pulls(CONFIG_RP2040_I2C0_SCL_GPIO, true, false);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_RP2040_I2C1
|
||||
rp2040_gpio_set_function(CONFIG_RP2040_I2C1_SDA_GPIO,
|
||||
RP2040_GPIO_FUNC_I2C); /* SDA */
|
||||
rp2040_gpio_set_function(CONFIG_RP2040_I2C1_SCL_GPIO,
|
||||
RP2040_GPIO_FUNC_I2C); /* SCL */
|
||||
|
||||
rp2040_gpio_set_pulls(CONFIG_RP2040_I2C1_SDA_GPIO, true, false); /* Pull up */
|
||||
rp2040_gpio_set_pulls(CONFIG_RP2040_I2C1_SCL_GPIO, true, false);
|
||||
#endif
|
||||
|
||||
/* Set default SPI pin */
|
||||
|
||||
#ifdef CONFIG_RP2040_SPI0
|
||||
rp2040_gpio_set_function(CONFIG_RP2040_SPI0_RX_GPIO,
|
||||
RP2040_GPIO_FUNC_SPI); /* RX */
|
||||
rp2040_gpio_set_function(CONFIG_RP2040_SPI0_SCK_GPIO,
|
||||
RP2040_GPIO_FUNC_SPI); /* SCK */
|
||||
rp2040_gpio_set_function(CONFIG_RP2040_SPI0_TX_GPIO,
|
||||
RP2040_GPIO_FUNC_SPI); /* TX */
|
||||
|
||||
/* CSn is controlled by board-specific logic */
|
||||
|
||||
rp2040_gpio_init(CONFIG_RP2040_SPI0_CS_GPIO); /* CSn */
|
||||
rp2040_gpio_setdir(CONFIG_RP2040_SPI0_CS_GPIO, true);
|
||||
rp2040_gpio_put(CONFIG_RP2040_SPI0_CS_GPIO, true);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_RP2040_SPI1
|
||||
rp2040_gpio_set_function(CONFIG_RP2040_SPI1_RX_GPIO,
|
||||
RP2040_GPIO_FUNC_SPI); /* RX */
|
||||
rp2040_gpio_set_function(CONFIG_RP2040_SPI1_SCK_GPIO,
|
||||
RP2040_GPIO_FUNC_SPI); /* SCK */
|
||||
rp2040_gpio_set_function(CONFIG_RP2040_SPI1_TX_GPIO,
|
||||
RP2040_GPIO_FUNC_SPI); /* TX */
|
||||
|
||||
/* CSn is controlled by board-specific logic */
|
||||
|
||||
rp2040_gpio_init(CONFIG_RP2040_SPI1_CS_GPIO); /* CSn */
|
||||
rp2040_gpio_setdir(CONFIG_RP2040_SPI1_CS_GPIO, true);
|
||||
rp2040_gpio_put(CONFIG_RP2040_SPI1_CS_GPIO, true);
|
||||
#endif
|
||||
/* --- Place any board specific initialization here --- */
|
||||
}
|
||||
|
||||
@@ -33,50 +33,9 @@
|
||||
|
||||
#include "rp2040_pico.h"
|
||||
|
||||
#ifdef CONFIG_LCD_BACKPACK
|
||||
#include "rp2040_lcd_backpack.h"
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_LCD
|
||||
#include <nuttx/board.h>
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_LCD_DEV
|
||||
#include <nuttx/lcd/lcd_dev.h>
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_VIDEO_FB
|
||||
#include <nuttx/video/fb.h>
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SENSORS_INA219
|
||||
#include <nuttx/sensors/ina219.h>
|
||||
#include "rp2040_ina219.h"
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SENSORS_BMP180
|
||||
#include <nuttx/sensors/bmp180.h>
|
||||
#include "rp2040_bmp180.h"
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_RP2040_PWM
|
||||
#include "rp2040_pwm.h"
|
||||
#include "rp2040_pwmdev.h"
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_RP2040_BOARD_HAS_WS2812) && defined(CONFIG_WS2812)
|
||||
#include "rp2040_ws2812.h"
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_WS2812_HAS_WHITE
|
||||
#define HAS_WHITE true
|
||||
#else /* CONFIG_WS2812_HAS_WHITE */
|
||||
#define HAS_WHITE false
|
||||
#endif /* CONFIG_WS2812_HAS_WHITE */
|
||||
|
||||
#if defined(CONFIG_ADC) && defined(CONFIG_RP2040_ADC)
|
||||
#include "rp2040_adc.h"
|
||||
#endif
|
||||
#ifdef CONFIG_ARCH_BOARD_COMMON
|
||||
#include "rp2040_common_bringup.h"
|
||||
#endif /* CONFIG_ARCH_BOARD_COMMON */
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
@@ -88,425 +47,17 @@
|
||||
|
||||
int rp2040_bringup(void)
|
||||
{
|
||||
int ret = 0;
|
||||
#ifdef CONFIG_ARCH_BOARD_COMMON
|
||||
|
||||
#ifdef CONFIG_RP2040_I2C_DRIVER
|
||||
#ifdef CONFIG_RP2040_I2C0
|
||||
ret = board_i2cdev_initialize(0);
|
||||
int ret = rp2040_common_bringup();
|
||||
if (ret < 0)
|
||||
{
|
||||
_err("ERROR: Failed to initialize I2C0.\n");
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_RP2040_I2C1
|
||||
ret = board_i2cdev_initialize(1);
|
||||
if (ret < 0)
|
||||
{
|
||||
_err("ERROR: Failed to initialize I2C1.\n");
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_RP2040_SPI_DRIVER
|
||||
#ifdef CONFIG_RP2040_SPI0
|
||||
ret = board_spidev_initialize(0);
|
||||
if (ret < 0)
|
||||
{
|
||||
_err("ERROR: Failed to initialize SPI0.\n");
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_RP2040_SPI1
|
||||
ret = board_spidev_initialize(1);
|
||||
if (ret < 0)
|
||||
{
|
||||
_err("ERROR: Failed to initialize SPI1.\n");
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_RP2040_PWM
|
||||
# ifdef CONFIG_RP2040_PWM0
|
||||
# if defined(CONFIG_PWM_NCHANNELS) && CONFIG_PWM_NCHANNELS == 2
|
||||
ret = rp2040_pwmdev_initialize(0,
|
||||
CONFIG_RP2040_PWM0A_GPIO,
|
||||
CONFIG_RP2040_PWM0B_GPIO,
|
||||
(0
|
||||
# ifdef CONFIG_RP2040_PWM0A_INVERT
|
||||
| RP2040_PWM_CSR_A_INV
|
||||
# endif
|
||||
# ifdef CONFIG_RP2040_PWM0B_INVERT
|
||||
| RP2040_PWM_CSR_B_INV
|
||||
# endif
|
||||
# ifdef CONFIG_RP2040_PWM0_PHASE_CORRECT
|
||||
| RP2040_PWM_CSR_PH_CORRECT
|
||||
# endif
|
||||
));
|
||||
# else
|
||||
ret = rp2040_pwmdev_initialize(0,
|
||||
CONFIG_RP2040_PWM0A_GPIO,
|
||||
(0
|
||||
# ifdef CONFIG_RP2040_PWM0A_INVERT
|
||||
| RP2040_PWM_CSR_A_INV
|
||||
# endif
|
||||
# ifdef CONFIG_RP2040_PWM0_PHASE_CORRECT
|
||||
| RP2040_PWM_CSR_PH_CORRECT
|
||||
# endif
|
||||
));
|
||||
# endif
|
||||
if (ret < 0)
|
||||
{
|
||||
_err("ERROR: Failed to initialize PWM0.\n");
|
||||
}
|
||||
# endif
|
||||
|
||||
# ifdef CONFIG_RP2040_PWM1
|
||||
# if defined(CONFIG_PWM_NCHANNELS) && CONFIG_PWM_NCHANNELS == 2
|
||||
ret = rp2040_pwmdev_initialize(1,
|
||||
CONFIG_RP2040_PWM1A_GPIO,
|
||||
CONFIG_RP2040_PWM1B_GPIO,
|
||||
(0
|
||||
# ifdef CONFIG_RP2040_PWM1A_INVERT
|
||||
| RP2040_PWM_CSR_A_INV
|
||||
# endif
|
||||
# ifdef CONFIG_RP2040_PWM1B_INVERT
|
||||
| RP2040_PWM_CSR_B_INV
|
||||
# endif
|
||||
# ifdef CONFIG_RP2040_PWM1_PHASE_CORRECT
|
||||
| RP2040_PWM_CSR_PH_CORRECT
|
||||
# endif
|
||||
));
|
||||
# else
|
||||
ret = rp2040_pwmdev_initialize(1,
|
||||
CONFIG_RP2040_PWM1A_GPIO,
|
||||
(0
|
||||
# ifdef CONFIG_RP2040_PWM1A_INVERT
|
||||
| RP2040_PWM_CSR_A_INV
|
||||
# endif
|
||||
# ifdef CONFIG_RP2040_PWM1_PHASE_CORRECT
|
||||
| RP2040_PWM_CSR_PH_CORRECT
|
||||
# endif
|
||||
));
|
||||
# endif
|
||||
if (ret < 0)
|
||||
{
|
||||
_err("ERROR: Failed to initialize PWM1.\n");
|
||||
}
|
||||
# endif
|
||||
|
||||
# ifdef CONFIG_RP2040_PWM2
|
||||
# if defined(CONFIG_PWM_NCHANNELS) && CONFIG_PWM_NCHANNELS == 2
|
||||
ret = rp2040_pwmdev_initialize(2,
|
||||
CONFIG_RP2040_PWM2A_GPIO,
|
||||
CONFIG_RP2040_PWM2B_GPIO,
|
||||
(0
|
||||
# ifdef CONFIG_RP2040_PWM2A_INVERT
|
||||
| RP2040_PWM_CSR_A_INV
|
||||
# endif
|
||||
# ifdef CONFIG_RP2040_PWM2B_INVERT
|
||||
| RP2040_PWM_CSR_B_INV
|
||||
# endif
|
||||
# ifdef CONFIG_RP2040_PWM2_PHASE_CORRECT
|
||||
| RP2040_PWM_CSR_PH_CORRECT
|
||||
# endif
|
||||
));
|
||||
# else
|
||||
ret = rp2040_pwmdev_initialize(2,
|
||||
CONFIG_RP2040_PWM2A_GPIO,
|
||||
(0
|
||||
# ifdef CONFIG_RP2040_PWM2A_INVERT
|
||||
| RP2040_PWM_CSR_A_INV
|
||||
# endif
|
||||
# ifdef CONFIG_RP2040_PWM2_PHASE_CORRECT
|
||||
| RP2040_PWM_CSR_PH_CORRECT
|
||||
# endif
|
||||
));
|
||||
# endif
|
||||
if (ret < 0)
|
||||
{
|
||||
_err("ERROR: Failed to initialize PWM2.\n");
|
||||
}
|
||||
# endif
|
||||
|
||||
# ifdef CONFIG_RP2040_PWM3
|
||||
# if defined(CONFIG_PWM_NCHANNELS) && CONFIG_PWM_NCHANNELS == 2
|
||||
ret = rp2040_pwmdev_initialize(3,
|
||||
CONFIG_RP2040_PWM3A_GPIO,
|
||||
CONFIG_RP2040_PWM3B_GPIO,
|
||||
(0
|
||||
# ifdef CONFIG_RP2040_PWM3A_INVERT
|
||||
| RP2040_PWM_CSR_A_INV
|
||||
# endif
|
||||
# ifdef CONFIG_RP2040_PWM3B_INVERT
|
||||
| RP2040_PWM_CSR_B_INV
|
||||
# endif
|
||||
# ifdef CONFIG_RP2040_PWM3_PHASE_CORRECT
|
||||
| RP2040_PWM_CSR_PH_CORRECT
|
||||
# endif
|
||||
));
|
||||
# else
|
||||
ret = rp2040_pwmdev_initialize(3,
|
||||
CONFIG_RP2040_PWM3A_GPIO,
|
||||
(0
|
||||
# ifdef CONFIG_RP2040_PWM3A_INVERT
|
||||
| RP2040_PWM_CSR_A_INV
|
||||
# endif
|
||||
# ifdef CONFIG_RP2040_PWM3_PHASE_CORRECT
|
||||
| RP2040_PWM_CSR_PH_CORRECT
|
||||
# endif
|
||||
));
|
||||
# endif
|
||||
if (ret < 0)
|
||||
{
|
||||
_err("ERROR: Failed to initialize PWM3.\n");
|
||||
}
|
||||
# endif
|
||||
|
||||
# ifdef CONFIG_RP2040_PWM4
|
||||
# if defined(CONFIG_PWM_NCHANNELS) && CONFIG_PWM_NCHANNELS == 2
|
||||
ret = rp2040_pwmdev_initialize(4,
|
||||
CONFIG_RP2040_PWM4A_GPIO,
|
||||
CONFIG_RP2040_PWM4B_GPIO,
|
||||
(0
|
||||
# ifdef CONFIG_RP2040_PWM4A_INVERT
|
||||
| RP2040_PWM_CSR_A_INV
|
||||
# endif
|
||||
# ifdef CONFIG_RP2040_PWM4B_INVERT
|
||||
| RP2040_PWM_CSR_B_INV
|
||||
# endif
|
||||
# ifdef CONFIG_RP2040_PWM4_PHASE_CORRECT
|
||||
| RP2040_PWM_CSR_PH_CORRECT
|
||||
# endif
|
||||
));
|
||||
# else
|
||||
ret = rp2040_pwmdev_initialize(4,
|
||||
CONFIG_RP2040_PWM4A_GPIO,
|
||||
(0
|
||||
# ifdef CONFIG_RP2040_PWM4A_INVERT
|
||||
| RP2040_PWM_CSR_A_INV
|
||||
# endif
|
||||
# ifdef CONFIG_RP2040_PWM4_PHASE_CORRECT
|
||||
| RP2040_PWM_CSR_PH_CORRECT
|
||||
# endif
|
||||
));
|
||||
# endif
|
||||
if (ret < 0)
|
||||
{
|
||||
_err("ERROR: Failed to initialize PWM4.\n");
|
||||
}
|
||||
# endif
|
||||
|
||||
# ifdef CONFIG_RP2040_PWM5
|
||||
# if defined(CONFIG_PWM_NCHANNELS) && CONFIG_PWM_NCHANNELS == 2
|
||||
ret = rp2040_pwmdev_initialize(5,
|
||||
CONFIG_RP2040_PWM5A_GPIO,
|
||||
CONFIG_RP2040_PWM5B_GPIO,
|
||||
(0
|
||||
# ifdef CONFIG_RP2040_PWM5A_INVERT
|
||||
| RP2040_PWM_CSR_A_INV
|
||||
# endif
|
||||
# ifdef CONFIG_RP2040_PWM5B_INVERT
|
||||
| RP2040_PWM_CSR_B_INV
|
||||
# endif
|
||||
# ifdef CONFIG_RP2040_PWM5_PHASE_CORRECT
|
||||
| RP2040_PWM_CSR_PH_CORRECT
|
||||
# endif
|
||||
));
|
||||
# else
|
||||
ret = rp2040_pwmdev_initialize(5,
|
||||
CONFIG_RP2040_PWM5A_GPIO,
|
||||
(0
|
||||
# ifdef CONFIG_RP2040_PWM5A_INVERT
|
||||
| RP2040_PWM_CSR_A_INV
|
||||
# endif
|
||||
# ifdef CONFIG_RP2040_PWM5_PHASE_CORRECT
|
||||
| RP2040_PWM_CSR_PH_CORRECT
|
||||
# endif
|
||||
));
|
||||
# endif
|
||||
if (ret < 0)
|
||||
{
|
||||
_err("ERROR: Failed to initialize PWM5.\n");
|
||||
}
|
||||
# endif
|
||||
|
||||
# ifdef CONFIG_RP2040_PWM6
|
||||
# if defined(CONFIG_PWM_NCHANNELS) && CONFIG_PWM_NCHANNELS == 2
|
||||
ret = rp2040_pwmdev_initialize(6,
|
||||
CONFIG_RP2040_PWM6A_GPIO,
|
||||
CONFIG_RP2040_PWM6B_GPIO,
|
||||
(0
|
||||
# ifdef CONFIG_RP2040_PWM6A_INVERT
|
||||
| RP2040_PWM_CSR_A_INV
|
||||
# endif
|
||||
# ifdef CONFIG_RP2040_PWM6B_INVERT
|
||||
| RP2040_PWM_CSR_B_INV
|
||||
# endif
|
||||
# ifdef CONFIG_RP2040_PWM6_PHASE_CORRECT
|
||||
| RP2040_PWM_CSR_PH_CORRECT
|
||||
# endif
|
||||
));
|
||||
# else
|
||||
ret = rp2040_pwmdev_initialize(6,
|
||||
CONFIG_RP2040_PWM6A_GPIO,
|
||||
(0
|
||||
# ifdef CONFIG_RP2040_PWM6A_INVERT
|
||||
| RP2040_PWM_CSR_A_INV
|
||||
# endif
|
||||
# ifdef CONFIG_RP2040_PWM6_PHASE_CORRECT
|
||||
| RP2040_PWM_CSR_PH_CORRECT
|
||||
# endif
|
||||
));
|
||||
# endif
|
||||
if (ret < 0)
|
||||
{
|
||||
_err("ERROR: Failed to initialize PWM6.\n");
|
||||
}
|
||||
# endif
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_RP2040_SPISD
|
||||
/* Mount the SPI-based MMC/SD block driver */
|
||||
|
||||
ret = board_spisd_initialize(0, CONFIG_RP2040_SPISD_SPI_CH);
|
||||
if (ret < 0)
|
||||
{
|
||||
_err("ERROR: Failed to initialize SPI device to MMC/SD: %d\n",
|
||||
ret);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_FS_PROCFS
|
||||
/* Mount the procfs file system */
|
||||
|
||||
ret = nx_mount(NULL, "/proc", "procfs", 0, NULL);
|
||||
if (ret < 0)
|
||||
{
|
||||
serr("ERROR: Failed to mount procfs at %s: %d\n", "/proc", ret);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SENSORS_BMP180
|
||||
/* Try to register BMP180 device in I2C0 */
|
||||
|
||||
ret = board_bmp180_initialize(0);
|
||||
if (ret < 0)
|
||||
{
|
||||
syslog(LOG_ERR, "Failed to initialize BMP180 driver: %d\n", ret);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SENSORS_INA219
|
||||
/* Configure and initialize the INA219 sensor in I2C0 */
|
||||
|
||||
ret = board_ina219_initialize(0);
|
||||
if (ret < 0)
|
||||
{
|
||||
syslog(LOG_ERR, "ERROR: rp2040_ina219_initialize() failed: %d\n", ret);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_VIDEO_FB
|
||||
ret = fb_register(0, 0);
|
||||
if (ret < 0)
|
||||
{
|
||||
_err("ERROR: Failed to initialize Frame Buffer Driver.\n");
|
||||
}
|
||||
#elif defined(CONFIG_LCD)
|
||||
ret = board_lcd_initialize();
|
||||
if (ret < 0)
|
||||
{
|
||||
syslog(LOG_ERR, "ERROR: Failed to initialize LCD.\n");
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_LCD_DEV
|
||||
ret = lcddev_register(0);
|
||||
if (ret < 0)
|
||||
{
|
||||
syslog(LOG_ERR, "ERROR: lcddev_register() failed: %d\n", ret);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_LCD_BACKPACK
|
||||
/* slcd:0, i2c:0, rows=2, cols=16 */
|
||||
|
||||
ret = board_lcd_backpack_init(0, 0, 2, 16);
|
||||
if (ret < 0)
|
||||
{
|
||||
syslog(LOG_ERR, "Failed to initialize PCF8574 LCD, error %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_RP2040_I2S
|
||||
ret = board_i2sdev_initialize(0);
|
||||
if (ret < 0)
|
||||
{
|
||||
_err("ERROR: Failed to initialize I2S.\n");
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_DEV_GPIO
|
||||
ret = rp2040_dev_gpio_init();
|
||||
if (ret < 0)
|
||||
{
|
||||
syslog(LOG_ERR, "Failed to initialize GPIO Driver: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
#endif
|
||||
|
||||
/* Initialize board neo-pixel */
|
||||
|
||||
#if defined(CONFIG_RP2040_BOARD_HAS_WS2812) && defined(CONFIG_WS2812)
|
||||
rp2040_ws2812_setup("/dev/leds0",
|
||||
CONFIG_RP2040_WS2812_GPIO_PIN,
|
||||
CONFIG_RP2040_WS2812_PWR_GPIO,
|
||||
CONFIG_WS2812_LED_COUNT,
|
||||
HAS_WHITE);
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_ADC) && defined(CONFIG_RP2040_ADC)
|
||||
|
||||
# ifdef CONFIG_RPC2040_ADC_CHANNEL0
|
||||
# define ADC_0 true
|
||||
# else
|
||||
# define ADC_0 false
|
||||
# endif
|
||||
|
||||
# ifdef CONFIG_RPC2040_ADC_CHANNEL1
|
||||
# define ADC_1 true
|
||||
# else
|
||||
# define ADC_1 false
|
||||
# endif
|
||||
|
||||
# ifdef CONFIG_RPC2040_ADC_CHANNEL2
|
||||
# define ADC_2 true
|
||||
# else
|
||||
# define ADC_2 false
|
||||
# endif
|
||||
|
||||
# ifdef CONFIG_RPC2040_ADC_CHANNEL3
|
||||
# define ADC_3 true
|
||||
# else
|
||||
# define ADC_3 false
|
||||
# endif
|
||||
|
||||
# ifdef CONFIG_RPC2040_ADC_TEMPERATURE
|
||||
# define ADC_TEMP true
|
||||
# else
|
||||
# define ADC_TEMP false
|
||||
# endif
|
||||
|
||||
ret = rp2040_adc_setup("/dev/adc0", ADC_0, ADC_1, ADC_2, ADC_3, ADC_TEMP);
|
||||
if (ret != OK)
|
||||
{
|
||||
syslog(LOG_ERR, "Failed to initialize ADC Driver: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
#endif /* defined(CONFIG_ADC) && defined(CONFIG_RP2040_ADC) */
|
||||
#endif /* CONFIG_ARCH_BOARD_COMMON */
|
||||
|
||||
return ret;
|
||||
/* --- Place any board specific bringup code here --- */
|
||||
|
||||
return OK;
|
||||
}
|
||||
|
||||
@@ -75,4 +75,3 @@ CONFIG_TESTING_GETPRIME=y
|
||||
CONFIG_TESTING_OSTEST=y
|
||||
CONFIG_UART0_SERIAL_CONSOLE=y
|
||||
CONFIG_WS2812=y
|
||||
CONFIG_WS2812_NON_SPI_DRIVER=y
|
||||
|
||||
@@ -78,4 +78,3 @@ CONFIG_USBMSC=y
|
||||
CONFIG_USBMSC_COMPOSITE=y
|
||||
CONFIG_USBMSC_NOT_STALL_BULKEP=y
|
||||
CONFIG_WS2812=y
|
||||
CONFIG_WS2812_NON_SPI_DRIVER=y
|
||||
|
||||
@@ -102,4 +102,3 @@ CONFIG_USBDEV=y
|
||||
CONFIG_USBDEV_BUSPOWERED=y
|
||||
CONFIG_VIDEO_FB=y
|
||||
CONFIG_WS2812=y
|
||||
CONFIG_WS2812_NON_SPI_DRIVER=y
|
||||
|
||||
@@ -87,4 +87,3 @@ CONFIG_TESTING_OSTEST=y
|
||||
CONFIG_UART0_SERIAL_CONSOLE=y
|
||||
CONFIG_WQUEUE_NOTIFIER=y
|
||||
CONFIG_WS2812=y
|
||||
CONFIG_WS2812_NON_SPI_DRIVER=y
|
||||
|
||||
@@ -56,4 +56,3 @@ CONFIG_TESTING_GETPRIME=y
|
||||
CONFIG_TESTING_OSTEST=y
|
||||
CONFIG_UART0_SERIAL_CONSOLE=y
|
||||
CONFIG_WS2812=y
|
||||
CONFIG_WS2812_NON_SPI_DRIVER=y
|
||||
|
||||
@@ -49,4 +49,3 @@ CONFIG_TESTING_GETPRIME=y
|
||||
CONFIG_TESTING_OSTEST=y
|
||||
CONFIG_UART0_SERIAL_CONSOLE=y
|
||||
CONFIG_WS2812=y
|
||||
CONFIG_WS2812_NON_SPI_DRIVER=y
|
||||
|
||||
@@ -49,4 +49,3 @@ CONFIG_TESTING_GETPRIME=y
|
||||
CONFIG_TESTING_OSTEST=y
|
||||
CONFIG_UART0_SERIAL_CONSOLE=y
|
||||
CONFIG_WS2812=y
|
||||
CONFIG_WS2812_NON_SPI_DRIVER=y
|
||||
|
||||
@@ -55,4 +55,3 @@ CONFIG_TESTING_OSTEST=y
|
||||
CONFIG_TESTING_SMP=y
|
||||
CONFIG_UART0_SERIAL_CONSOLE=y
|
||||
CONFIG_WS2812=y
|
||||
CONFIG_WS2812_NON_SPI_DRIVER=y
|
||||
|
||||
@@ -64,4 +64,3 @@ CONFIG_TESTING_GETPRIME=y
|
||||
CONFIG_TESTING_OSTEST=y
|
||||
CONFIG_UART0_SERIAL_CONSOLE=y
|
||||
CONFIG_WS2812=y
|
||||
CONFIG_WS2812_NON_SPI_DRIVER=y
|
||||
|
||||
@@ -75,4 +75,3 @@ CONFIG_TESTING_GETPRIME=y
|
||||
CONFIG_TESTING_OSTEST=y
|
||||
CONFIG_UART0_SERIAL_CONSOLE=y
|
||||
CONFIG_WS2812=y
|
||||
CONFIG_WS2812_NON_SPI_DRIVER=y
|
||||
|
||||
@@ -60,4 +60,3 @@ CONFIG_TESTING_OSTEST=y
|
||||
CONFIG_UART0_SERIAL_CONSOLE=y
|
||||
CONFIG_VIDEO_FB=y
|
||||
CONFIG_WS2812=y
|
||||
CONFIG_WS2812_NON_SPI_DRIVER=y
|
||||
|
||||
@@ -71,4 +71,3 @@ CONFIG_USBDEV_BUSPOWERED=y
|
||||
CONFIG_USBMSC=y
|
||||
CONFIG_USBMSC_NOT_STALL_BULKEP=y
|
||||
CONFIG_WS2812=y
|
||||
CONFIG_WS2812_NON_SPI_DRIVER=y
|
||||
|
||||
@@ -53,4 +53,3 @@ CONFIG_TESTING_OSTEST=y
|
||||
CONFIG_USBDEV=y
|
||||
CONFIG_USBDEV_BUSPOWERED=y
|
||||
CONFIG_WS2812=y
|
||||
CONFIG_WS2812_NON_SPI_DRIVER=y
|
||||
|
||||
@@ -95,4 +95,3 @@ CONFIG_TESTING_OSTEST=y
|
||||
CONFIG_UART0_SERIAL_CONSOLE=y
|
||||
CONFIG_VIDEO_FB=y
|
||||
CONFIG_WS2812=y
|
||||
CONFIG_WS2812_NON_SPI_DRIVER=y
|
||||
|
||||
@@ -92,4 +92,3 @@ CONFIG_TESTING_OSTEST=y
|
||||
CONFIG_UART0_SERIAL_CONSOLE=y
|
||||
CONFIG_VIDEO_FB=y
|
||||
CONFIG_WS2812=y
|
||||
CONFIG_WS2812_NON_SPI_DRIVER=y
|
||||
|
||||
@@ -32,6 +32,10 @@
|
||||
#include "arm_internal.h"
|
||||
#include "rp2040_gpio.h"
|
||||
|
||||
#ifdef CONFIG_ARCH_BOARD_COMMON
|
||||
#include "rp2040_common_initialize.h"
|
||||
#endif /* CONFIG_ARCH_BOARD_COMMON */
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
@@ -53,46 +57,11 @@
|
||||
|
||||
void rp2040_boardearlyinitialize(void)
|
||||
{
|
||||
rp2040_gpio_initialize();
|
||||
#ifdef CONFIG_ARCH_BOARD_COMMON
|
||||
rp2040_common_earlyinitialize();
|
||||
#endif
|
||||
|
||||
/* Disable IE on GPIO 26-29 */
|
||||
|
||||
clrbits_reg32(RP2040_PADS_BANK0_GPIO_IE, RP2040_PADS_BANK0_GPIO(26));
|
||||
clrbits_reg32(RP2040_PADS_BANK0_GPIO_IE, RP2040_PADS_BANK0_GPIO(27));
|
||||
clrbits_reg32(RP2040_PADS_BANK0_GPIO_IE, RP2040_PADS_BANK0_GPIO(28));
|
||||
clrbits_reg32(RP2040_PADS_BANK0_GPIO_IE, RP2040_PADS_BANK0_GPIO(29));
|
||||
|
||||
/* Set default UART pin */
|
||||
|
||||
#ifdef CONFIG_RP2040_UART0
|
||||
rp2040_gpio_set_function(CONFIG_RP2040_UART0_TX_GPIO,
|
||||
RP2040_GPIO_FUNC_UART); /* TX */
|
||||
rp2040_gpio_set_function(CONFIG_RP2040_UART0_RX_GPIO,
|
||||
RP2040_GPIO_FUNC_UART); /* RX */
|
||||
#ifdef CONFIG_SERIAL_OFLOWCONTROL
|
||||
rp2040_gpio_set_function(CONFIG_RP2040_UART0_CTS_GPIO,
|
||||
RP2040_GPIO_FUNC_UART); /* CTS */
|
||||
#endif
|
||||
#ifdef CONFIG_SERIAL_IFLOWCONTROL
|
||||
rp2040_gpio_set_function(CONFIG_RP2040_UART0_RTS_GPIO,
|
||||
RP2040_GPIO_FUNC_UART); /* RTS */
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_RP2040_UART1
|
||||
rp2040_gpio_set_function(CONFIG_RP2040_UART1_TX_GPIO,
|
||||
RP2040_GPIO_FUNC_UART); /* TX */
|
||||
rp2040_gpio_set_function(CONFIG_RP2040_UART1_RX_GPIO,
|
||||
RP2040_GPIO_FUNC_UART); /* RX */
|
||||
#ifdef CONFIG_SERIAL_OFLOWCONTROL
|
||||
rp2040_gpio_set_function(CONFIG_RP2040_UART1_CTS_GPIO,
|
||||
RP2040_GPIO_FUNC_UART); /* CTS */
|
||||
#endif
|
||||
#ifdef CONFIG_SERIAL_IFLOWCONTROL
|
||||
rp2040_gpio_set_function(CONFIG_RP2040_UART1_RTS_GPIO,
|
||||
RP2040_GPIO_FUNC_UART); /* RTS */
|
||||
#endif
|
||||
#endif
|
||||
/* --- Place any board specific early initialization here --- */
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
@@ -104,57 +73,9 @@ void rp2040_boardearlyinitialize(void)
|
||||
|
||||
void rp2040_boardinitialize(void)
|
||||
{
|
||||
/* Set default I2C pin */
|
||||
#ifdef CONFIG_ARCH_BOARD_COMMON
|
||||
rp2040_common_initialize();
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_RP2040_I2C0
|
||||
rp2040_gpio_set_function(CONFIG_RP2040_I2C0_SDA_GPIO,
|
||||
RP2040_GPIO_FUNC_I2C); /* SDA */
|
||||
rp2040_gpio_set_function(CONFIG_RP2040_I2C0_SCL_GPIO,
|
||||
RP2040_GPIO_FUNC_I2C); /* SCL */
|
||||
|
||||
rp2040_gpio_set_pulls(CONFIG_RP2040_I2C0_SDA_GPIO, true, false); /* Pull up */
|
||||
rp2040_gpio_set_pulls(CONFIG_RP2040_I2C0_SCL_GPIO, true, false);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_RP2040_I2C1
|
||||
rp2040_gpio_set_function(CONFIG_RP2040_I2C1_SDA_GPIO,
|
||||
RP2040_GPIO_FUNC_I2C); /* SDA */
|
||||
rp2040_gpio_set_function(CONFIG_RP2040_I2C1_SCL_GPIO,
|
||||
RP2040_GPIO_FUNC_I2C); /* SCL */
|
||||
|
||||
rp2040_gpio_set_pulls(CONFIG_RP2040_I2C1_SDA_GPIO, true, false); /* Pull up */
|
||||
rp2040_gpio_set_pulls(CONFIG_RP2040_I2C1_SCL_GPIO, true, false);
|
||||
#endif
|
||||
|
||||
/* Set default SPI pin */
|
||||
|
||||
#ifdef CONFIG_RP2040_SPI0
|
||||
rp2040_gpio_set_function(CONFIG_RP2040_SPI0_RX_GPIO,
|
||||
RP2040_GPIO_FUNC_SPI); /* RX */
|
||||
rp2040_gpio_set_function(CONFIG_RP2040_SPI0_SCK_GPIO,
|
||||
RP2040_GPIO_FUNC_SPI); /* SCK */
|
||||
rp2040_gpio_set_function(CONFIG_RP2040_SPI0_TX_GPIO,
|
||||
RP2040_GPIO_FUNC_SPI); /* TX */
|
||||
|
||||
/* CSn is controlled by board-specific logic */
|
||||
|
||||
rp2040_gpio_init(CONFIG_RP2040_SPI0_CS_GPIO); /* CSn */
|
||||
rp2040_gpio_setdir(CONFIG_RP2040_SPI0_CS_GPIO, true);
|
||||
rp2040_gpio_put(CONFIG_RP2040_SPI0_CS_GPIO, true);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_RP2040_SPI1
|
||||
rp2040_gpio_set_function(CONFIG_RP2040_SPI1_RX_GPIO,
|
||||
RP2040_GPIO_FUNC_SPI); /* RX */
|
||||
rp2040_gpio_set_function(CONFIG_RP2040_SPI1_SCK_GPIO,
|
||||
RP2040_GPIO_FUNC_SPI); /* SCK */
|
||||
rp2040_gpio_set_function(CONFIG_RP2040_SPI1_TX_GPIO,
|
||||
RP2040_GPIO_FUNC_SPI); /* TX */
|
||||
|
||||
/* CSn is controlled by board-specific logic */
|
||||
|
||||
rp2040_gpio_init(CONFIG_RP2040_SPI1_CS_GPIO); /* CSn */
|
||||
rp2040_gpio_setdir(CONFIG_RP2040_SPI1_CS_GPIO, true);
|
||||
rp2040_gpio_put(CONFIG_RP2040_SPI1_CS_GPIO, true);
|
||||
#endif
|
||||
/* --- Place any board specific initialization here --- */
|
||||
}
|
||||
|
||||
@@ -33,50 +33,9 @@
|
||||
|
||||
#include "rp2040_pico.h"
|
||||
|
||||
#ifdef CONFIG_LCD_BACKPACK
|
||||
#include "rp2040_lcd_backpack.h"
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_LCD
|
||||
#include <nuttx/board.h>
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_LCD_DEV
|
||||
#include <nuttx/lcd/lcd_dev.h>
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_VIDEO_FB
|
||||
#include <nuttx/video/fb.h>
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SENSORS_INA219
|
||||
#include <nuttx/sensors/ina219.h>
|
||||
#include "rp2040_ina219.h"
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SENSORS_BMP180
|
||||
#include <nuttx/sensors/bmp180.h>
|
||||
#include "rp2040_bmp180.h"
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_RP2040_PWM
|
||||
#include "rp2040_pwm.h"
|
||||
#include "rp2040_pwmdev.h"
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_RP2040_BOARD_HAS_WS2812) && defined(CONFIG_WS2812)
|
||||
#include "rp2040_ws2812.h"
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_WS2812_HAS_WHITE
|
||||
#define HAS_WHITE true
|
||||
#else /* CONFIG_WS2812_HAS_WHITE */
|
||||
#define HAS_WHITE false
|
||||
#endif /* CONFIG_WS2812_HAS_WHITE */
|
||||
|
||||
#if defined(CONFIG_ADC) && defined(CONFIG_RP2040_ADC)
|
||||
#include "rp2040_adc.h"
|
||||
#endif
|
||||
#ifdef CONFIG_ARCH_BOARD_COMMON
|
||||
#include "rp2040_common_bringup.h"
|
||||
#endif /* CONFIG_ARCH_BOARD_COMMON */
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
@@ -88,425 +47,17 @@
|
||||
|
||||
int rp2040_bringup(void)
|
||||
{
|
||||
int ret = 0;
|
||||
#ifdef CONFIG_ARCH_BOARD_COMMON
|
||||
|
||||
#ifdef CONFIG_RP2040_I2C_DRIVER
|
||||
#ifdef CONFIG_RP2040_I2C0
|
||||
ret = board_i2cdev_initialize(0);
|
||||
int ret = rp2040_common_bringup();
|
||||
if (ret < 0)
|
||||
{
|
||||
_err("ERROR: Failed to initialize I2C0.\n");
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_RP2040_I2C1
|
||||
ret = board_i2cdev_initialize(1);
|
||||
if (ret < 0)
|
||||
{
|
||||
_err("ERROR: Failed to initialize I2C1.\n");
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_RP2040_SPI_DRIVER
|
||||
#ifdef CONFIG_RP2040_SPI0
|
||||
ret = board_spidev_initialize(0);
|
||||
if (ret < 0)
|
||||
{
|
||||
_err("ERROR: Failed to initialize SPI0.\n");
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_RP2040_SPI1
|
||||
ret = board_spidev_initialize(1);
|
||||
if (ret < 0)
|
||||
{
|
||||
_err("ERROR: Failed to initialize SPI1.\n");
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_RP2040_PWM
|
||||
# ifdef CONFIG_RP2040_PWM0
|
||||
# if defined(CONFIG_PWM_NCHANNELS) && CONFIG_PWM_NCHANNELS == 2
|
||||
ret = rp2040_pwmdev_initialize(0,
|
||||
CONFIG_RP2040_PWM0A_GPIO,
|
||||
CONFIG_RP2040_PWM0B_GPIO,
|
||||
(0
|
||||
# ifdef CONFIG_RP2040_PWM0A_INVERT
|
||||
| RP2040_PWM_CSR_A_INV
|
||||
# endif
|
||||
# ifdef CONFIG_RP2040_PWM0B_INVERT
|
||||
| RP2040_PWM_CSR_B_INV
|
||||
# endif
|
||||
# ifdef CONFIG_RP2040_PWM0_PHASE_CORRECT
|
||||
| RP2040_PWM_CSR_PH_CORRECT
|
||||
# endif
|
||||
));
|
||||
# else
|
||||
ret = rp2040_pwmdev_initialize(0,
|
||||
CONFIG_RP2040_PWM0A_GPIO,
|
||||
(0
|
||||
# ifdef CONFIG_RP2040_PWM0A_INVERT
|
||||
| RP2040_PWM_CSR_A_INV
|
||||
# endif
|
||||
# ifdef CONFIG_RP2040_PWM0_PHASE_CORRECT
|
||||
| RP2040_PWM_CSR_PH_CORRECT
|
||||
# endif
|
||||
));
|
||||
# endif
|
||||
if (ret < 0)
|
||||
{
|
||||
_err("ERROR: Failed to initialize PWM0.\n");
|
||||
}
|
||||
# endif
|
||||
|
||||
# ifdef CONFIG_RP2040_PWM1
|
||||
# if defined(CONFIG_PWM_NCHANNELS) && CONFIG_PWM_NCHANNELS == 2
|
||||
ret = rp2040_pwmdev_initialize(1,
|
||||
CONFIG_RP2040_PWM1A_GPIO,
|
||||
CONFIG_RP2040_PWM1B_GPIO,
|
||||
(0
|
||||
# ifdef CONFIG_RP2040_PWM1A_INVERT
|
||||
| RP2040_PWM_CSR_A_INV
|
||||
# endif
|
||||
# ifdef CONFIG_RP2040_PWM1B_INVERT
|
||||
| RP2040_PWM_CSR_B_INV
|
||||
# endif
|
||||
# ifdef CONFIG_RP2040_PWM1_PHASE_CORRECT
|
||||
| RP2040_PWM_CSR_PH_CORRECT
|
||||
# endif
|
||||
));
|
||||
# else
|
||||
ret = rp2040_pwmdev_initialize(1,
|
||||
CONFIG_RP2040_PWM1A_GPIO,
|
||||
(0
|
||||
# ifdef CONFIG_RP2040_PWM1A_INVERT
|
||||
| RP2040_PWM_CSR_A_INV
|
||||
# endif
|
||||
# ifdef CONFIG_RP2040_PWM1_PHASE_CORRECT
|
||||
| RP2040_PWM_CSR_PH_CORRECT
|
||||
# endif
|
||||
));
|
||||
# endif
|
||||
if (ret < 0)
|
||||
{
|
||||
_err("ERROR: Failed to initialize PWM1.\n");
|
||||
}
|
||||
# endif
|
||||
|
||||
# ifdef CONFIG_RP2040_PWM2
|
||||
# if defined(CONFIG_PWM_NCHANNELS) && CONFIG_PWM_NCHANNELS == 2
|
||||
ret = rp2040_pwmdev_initialize(2,
|
||||
CONFIG_RP2040_PWM2A_GPIO,
|
||||
CONFIG_RP2040_PWM2B_GPIO,
|
||||
(0
|
||||
# ifdef CONFIG_RP2040_PWM2A_INVERT
|
||||
| RP2040_PWM_CSR_A_INV
|
||||
# endif
|
||||
# ifdef CONFIG_RP2040_PWM2B_INVERT
|
||||
| RP2040_PWM_CSR_B_INV
|
||||
# endif
|
||||
# ifdef CONFIG_RP2040_PWM2_PHASE_CORRECT
|
||||
| RP2040_PWM_CSR_PH_CORRECT
|
||||
# endif
|
||||
));
|
||||
# else
|
||||
ret = rp2040_pwmdev_initialize(2,
|
||||
CONFIG_RP2040_PWM2A_GPIO,
|
||||
(0
|
||||
# ifdef CONFIG_RP2040_PWM2A_INVERT
|
||||
| RP2040_PWM_CSR_A_INV
|
||||
# endif
|
||||
# ifdef CONFIG_RP2040_PWM2_PHASE_CORRECT
|
||||
| RP2040_PWM_CSR_PH_CORRECT
|
||||
# endif
|
||||
));
|
||||
# endif
|
||||
if (ret < 0)
|
||||
{
|
||||
_err("ERROR: Failed to initialize PWM2.\n");
|
||||
}
|
||||
# endif
|
||||
|
||||
# ifdef CONFIG_RP2040_PWM3
|
||||
# if defined(CONFIG_PWM_NCHANNELS) && CONFIG_PWM_NCHANNELS == 2
|
||||
ret = rp2040_pwmdev_initialize(3,
|
||||
CONFIG_RP2040_PWM3A_GPIO,
|
||||
CONFIG_RP2040_PWM3B_GPIO,
|
||||
(0
|
||||
# ifdef CONFIG_RP2040_PWM3A_INVERT
|
||||
| RP2040_PWM_CSR_A_INV
|
||||
# endif
|
||||
# ifdef CONFIG_RP2040_PWM3B_INVERT
|
||||
| RP2040_PWM_CSR_B_INV
|
||||
# endif
|
||||
# ifdef CONFIG_RP2040_PWM3_PHASE_CORRECT
|
||||
| RP2040_PWM_CSR_PH_CORRECT
|
||||
# endif
|
||||
));
|
||||
# else
|
||||
ret = rp2040_pwmdev_initialize(3,
|
||||
CONFIG_RP2040_PWM3A_GPIO,
|
||||
(0
|
||||
# ifdef CONFIG_RP2040_PWM3A_INVERT
|
||||
| RP2040_PWM_CSR_A_INV
|
||||
# endif
|
||||
# ifdef CONFIG_RP2040_PWM3_PHASE_CORRECT
|
||||
| RP2040_PWM_CSR_PH_CORRECT
|
||||
# endif
|
||||
));
|
||||
# endif
|
||||
if (ret < 0)
|
||||
{
|
||||
_err("ERROR: Failed to initialize PWM3.\n");
|
||||
}
|
||||
# endif
|
||||
|
||||
# ifdef CONFIG_RP2040_PWM4
|
||||
# if defined(CONFIG_PWM_NCHANNELS) && CONFIG_PWM_NCHANNELS == 2
|
||||
ret = rp2040_pwmdev_initialize(4,
|
||||
CONFIG_RP2040_PWM4A_GPIO,
|
||||
CONFIG_RP2040_PWM4B_GPIO,
|
||||
(0
|
||||
# ifdef CONFIG_RP2040_PWM4A_INVERT
|
||||
| RP2040_PWM_CSR_A_INV
|
||||
# endif
|
||||
# ifdef CONFIG_RP2040_PWM4B_INVERT
|
||||
| RP2040_PWM_CSR_B_INV
|
||||
# endif
|
||||
# ifdef CONFIG_RP2040_PWM4_PHASE_CORRECT
|
||||
| RP2040_PWM_CSR_PH_CORRECT
|
||||
# endif
|
||||
));
|
||||
# else
|
||||
ret = rp2040_pwmdev_initialize(4,
|
||||
CONFIG_RP2040_PWM4A_GPIO,
|
||||
(0
|
||||
# ifdef CONFIG_RP2040_PWM4A_INVERT
|
||||
| RP2040_PWM_CSR_A_INV
|
||||
# endif
|
||||
# ifdef CONFIG_RP2040_PWM4_PHASE_CORRECT
|
||||
| RP2040_PWM_CSR_PH_CORRECT
|
||||
# endif
|
||||
));
|
||||
# endif
|
||||
if (ret < 0)
|
||||
{
|
||||
_err("ERROR: Failed to initialize PWM4.\n");
|
||||
}
|
||||
# endif
|
||||
|
||||
# ifdef CONFIG_RP2040_PWM5
|
||||
# if defined(CONFIG_PWM_NCHANNELS) && CONFIG_PWM_NCHANNELS == 2
|
||||
ret = rp2040_pwmdev_initialize(5,
|
||||
CONFIG_RP2040_PWM5A_GPIO,
|
||||
CONFIG_RP2040_PWM5B_GPIO,
|
||||
(0
|
||||
# ifdef CONFIG_RP2040_PWM5A_INVERT
|
||||
| RP2040_PWM_CSR_A_INV
|
||||
# endif
|
||||
# ifdef CONFIG_RP2040_PWM5B_INVERT
|
||||
| RP2040_PWM_CSR_B_INV
|
||||
# endif
|
||||
# ifdef CONFIG_RP2040_PWM5_PHASE_CORRECT
|
||||
| RP2040_PWM_CSR_PH_CORRECT
|
||||
# endif
|
||||
));
|
||||
# else
|
||||
ret = rp2040_pwmdev_initialize(5,
|
||||
CONFIG_RP2040_PWM5A_GPIO,
|
||||
(0
|
||||
# ifdef CONFIG_RP2040_PWM5A_INVERT
|
||||
| RP2040_PWM_CSR_A_INV
|
||||
# endif
|
||||
# ifdef CONFIG_RP2040_PWM5_PHASE_CORRECT
|
||||
| RP2040_PWM_CSR_PH_CORRECT
|
||||
# endif
|
||||
));
|
||||
# endif
|
||||
if (ret < 0)
|
||||
{
|
||||
_err("ERROR: Failed to initialize PWM5.\n");
|
||||
}
|
||||
# endif
|
||||
|
||||
# ifdef CONFIG_RP2040_PWM6
|
||||
# if defined(CONFIG_PWM_NCHANNELS) && CONFIG_PWM_NCHANNELS == 2
|
||||
ret = rp2040_pwmdev_initialize(6,
|
||||
CONFIG_RP2040_PWM6A_GPIO,
|
||||
CONFIG_RP2040_PWM6B_GPIO,
|
||||
(0
|
||||
# ifdef CONFIG_RP2040_PWM6A_INVERT
|
||||
| RP2040_PWM_CSR_A_INV
|
||||
# endif
|
||||
# ifdef CONFIG_RP2040_PWM6B_INVERT
|
||||
| RP2040_PWM_CSR_B_INV
|
||||
# endif
|
||||
# ifdef CONFIG_RP2040_PWM6_PHASE_CORRECT
|
||||
| RP2040_PWM_CSR_PH_CORRECT
|
||||
# endif
|
||||
));
|
||||
# else
|
||||
ret = rp2040_pwmdev_initialize(6,
|
||||
CONFIG_RP2040_PWM6A_GPIO,
|
||||
(0
|
||||
# ifdef CONFIG_RP2040_PWM6A_INVERT
|
||||
| RP2040_PWM_CSR_A_INV
|
||||
# endif
|
||||
# ifdef CONFIG_RP2040_PWM6_PHASE_CORRECT
|
||||
| RP2040_PWM_CSR_PH_CORRECT
|
||||
# endif
|
||||
));
|
||||
# endif
|
||||
if (ret < 0)
|
||||
{
|
||||
_err("ERROR: Failed to initialize PWM6.\n");
|
||||
}
|
||||
# endif
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_RP2040_SPISD
|
||||
/* Mount the SPI-based MMC/SD block driver */
|
||||
|
||||
ret = board_spisd_initialize(0, CONFIG_RP2040_SPISD_SPI_CH);
|
||||
if (ret < 0)
|
||||
{
|
||||
_err("ERROR: Failed to initialize SPI device to MMC/SD: %d\n",
|
||||
ret);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_FS_PROCFS
|
||||
/* Mount the procfs file system */
|
||||
|
||||
ret = nx_mount(NULL, "/proc", "procfs", 0, NULL);
|
||||
if (ret < 0)
|
||||
{
|
||||
serr("ERROR: Failed to mount procfs at %s: %d\n", "/proc", ret);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SENSORS_BMP180
|
||||
/* Try to register BMP180 device in I2C0 */
|
||||
|
||||
ret = board_bmp180_initialize(0);
|
||||
if (ret < 0)
|
||||
{
|
||||
syslog(LOG_ERR, "Failed to initialize BMP180 driver: %d\n", ret);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SENSORS_INA219
|
||||
/* Configure and initialize the INA219 sensor in I2C0 */
|
||||
|
||||
ret = board_ina219_initialize(0);
|
||||
if (ret < 0)
|
||||
{
|
||||
syslog(LOG_ERR, "ERROR: rp2040_ina219_initialize() failed: %d\n", ret);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_VIDEO_FB
|
||||
ret = fb_register(0, 0);
|
||||
if (ret < 0)
|
||||
{
|
||||
_err("ERROR: Failed to initialize Frame Buffer Driver.\n");
|
||||
}
|
||||
#elif defined(CONFIG_LCD)
|
||||
ret = board_lcd_initialize();
|
||||
if (ret < 0)
|
||||
{
|
||||
syslog(LOG_ERR, "ERROR: Failed to initialize LCD.\n");
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_LCD_DEV
|
||||
ret = lcddev_register(0);
|
||||
if (ret < 0)
|
||||
{
|
||||
syslog(LOG_ERR, "ERROR: lcddev_register() failed: %d\n", ret);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_LCD_BACKPACK
|
||||
/* slcd:0, i2c:0, rows=2, cols=16 */
|
||||
|
||||
ret = board_lcd_backpack_init(0, 0, 2, 16);
|
||||
if (ret < 0)
|
||||
{
|
||||
syslog(LOG_ERR, "Failed to initialize PCF8574 LCD, error %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_RP2040_I2S
|
||||
ret = board_i2sdev_initialize(0);
|
||||
if (ret < 0)
|
||||
{
|
||||
_err("ERROR: Failed to initialize I2S.\n");
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_DEV_GPIO
|
||||
ret = rp2040_dev_gpio_init();
|
||||
if (ret < 0)
|
||||
{
|
||||
syslog(LOG_ERR, "Failed to initialize GPIO Driver: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
#endif
|
||||
|
||||
/* Initialize board neo-pixel */
|
||||
|
||||
#if defined(CONFIG_RP2040_BOARD_HAS_WS2812) && defined(CONFIG_WS2812)
|
||||
rp2040_ws2812_setup("/dev/leds0",
|
||||
CONFIG_RP2040_WS2812_GPIO_PIN,
|
||||
CONFIG_RP2040_WS2812_PWR_GPIO,
|
||||
CONFIG_WS2812_LED_COUNT,
|
||||
HAS_WHITE);
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_ADC) && defined(CONFIG_RP2040_ADC)
|
||||
|
||||
# ifdef CONFIG_RPC2040_ADC_CHANNEL0
|
||||
# define ADC_0 true
|
||||
# else
|
||||
# define ADC_0 false
|
||||
# endif
|
||||
|
||||
# ifdef CONFIG_RPC2040_ADC_CHANNEL1
|
||||
# define ADC_1 true
|
||||
# else
|
||||
# define ADC_1 false
|
||||
# endif
|
||||
|
||||
# ifdef CONFIG_RPC2040_ADC_CHANNEL2
|
||||
# define ADC_2 true
|
||||
# else
|
||||
# define ADC_2 false
|
||||
# endif
|
||||
|
||||
# ifdef CONFIG_RPC2040_ADC_CHANNEL3
|
||||
# define ADC_3 true
|
||||
# else
|
||||
# define ADC_3 false
|
||||
# endif
|
||||
|
||||
# ifdef CONFIG_RPC2040_ADC_TEMPERATURE
|
||||
# define ADC_TEMP true
|
||||
# else
|
||||
# define ADC_TEMP false
|
||||
# endif
|
||||
|
||||
ret = rp2040_adc_setup("/dev/adc0", ADC_0, ADC_1, ADC_2, ADC_3, ADC_TEMP);
|
||||
if (ret != OK)
|
||||
{
|
||||
syslog(LOG_ERR, "Failed to initialize ADC Driver: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
#endif /* defined(CONFIG_ADC) && defined(CONFIG_RP2040_ADC) */
|
||||
#endif /* CONFIG_ARCH_BOARD_COMMON */
|
||||
|
||||
return ret;
|
||||
/* --- Place any board specific bringup code here --- */
|
||||
|
||||
return OK;
|
||||
}
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user