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port nuttx to sparc-v8 commit

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includes following parts:
add support of sparc in arch/Kconfig
add support of sparc in boards/Kconfig
add sparc dir in arch, add sparc dir in boards
add support of sparc in libs/libc/machine
modify all the coding style problem about saprc
This commit is contained in:
zouboan
2022-01-17 09:09:29 -03:00
committed by Alan Carvalho de Assis
parent 10d98f64d3
commit 74aeb5d0c5
125 changed files with 21751 additions and 1 deletions
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arch/Kconfig
+9
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@@ -131,6 +131,13 @@ config ARCH_OR1K
---help---
OpenRISC architectures.
config ARCH_SPARC
bool "SPARC"
select ARCH_HAVE_INTERRUPTSTACK
select ARCH_HAVE_CUSTOMOPT
---help---
SPARC architectures (SPARC V8)
endchoice
config ARCH
@@ -148,6 +155,7 @@ config ARCH
default "z16" if ARCH_Z16
default "z80" if ARCH_Z80
default "or1k" if ARCH_OR1K
default "sparc" if ARCH_SPARC
source "arch/arm/Kconfig"
source "arch/avr/Kconfig"
@@ -163,6 +171,7 @@ source "arch/xtensa/Kconfig"
source "arch/z16/Kconfig"
source "arch/z80/Kconfig"
source "arch/or1k/Kconfig"
source "arch/sparc/Kconfig"
config ARCH_CHIP_CUSTOM
bool
arch/sparc/Kconfig
+57
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@@ -0,0 +1,57 @@
#
# For a description of the syntax of this configuration file,
# see the file kconfig-language.txt in the NuttX tools repository.
#
if ARCH_SPARC
choice
prompt "SPARC chip selection"
default ARCH_CHIP_BM3803
config ARCH_CHIP_BM3803
bool "BM3803"
select ARCH_SPARC_V8
select ARCH_HAVE_MATH_H
select ARCH_HAVE_RESET
select ARCH_HAVE_IRQPRIO
select ARCH_VECNOTIRQ
select ARCH_HAVE_RAMFUNCS
select ARCH_HAVE_TICKLESS
select ARCH_HAVE_SERIAL_TERMIOS
---help---
Microchip BM3803 (ARCH_SPARC_V8)
config ARCH_CHIP_BM3823
bool "BM3823"
select ARCH_SPARC_V8
select ARCH_HAVE_MATH_H
select ARCH_HAVE_IRQPRIO
select ARCH_VECNOTIRQ
select ARCH_HAVE_RAMFUNCS
select ARCH_HAVE_SERIAL_TERMIOS
---help---
Microchip BM3823 (ARCH_SPARC_V8)
endchoice
config ARCH_SPARC_V8
bool
default n
select ARCH_HAVE_STACKCHECK
config ARCH_FAMILY
string
default "sparc_v8" if ARCH_SPARC_V8
config ARCH_CHIP
string
default "bm3803" if ARCH_CHIP_BM3803
default "bm3823" if ARCH_CHIP_BM3823
source arch/sparc/src/common/Kconfig
source arch/sparc/src/sparc_v8/Kconfig
source arch/sparc/src/bm3803/Kconfig
source arch/sparc/src/bm3823/Kconfig
endif
arch/sparc/include/arch.h
+68
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@@ -0,0 +1,68 @@
/****************************************************************************
* arch/sparc/include/arch.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/* This file should never be included directed but, rather,
* only indirectly through nuttx/arch.h
*/
#ifndef __ARCH_SPARC_INCLUDE_ARCH_H
#define __ARCH_SPARC_INCLUDE_ARCH_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Inline functions
****************************************************************************/
/****************************************************************************
* Public Types
****************************************************************************/
/****************************************************************************
* Public Data
****************************************************************************/
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
#ifdef __cplusplus
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
#undef EXTERN
#ifdef __cplusplus
}
#endif
#endif /* __ARCH_SPARC_INCLUDE_ARCH_H */
arch/sparc/include/bm3803/irq.h
+158
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@@ -0,0 +1,158 @@
/****************************************************************************
* arch/sparc/include/bm3803/irq.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/* This file should never be included directed but, rather, only indirectly
* through nuttx/irq.h
*/
#ifndef __ARCH_SPARC_INCLUDE_BM3803_IRQ_H
#define __ARCH_SPARC_INCLUDE_BM3803_IRQ_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/irq.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Interrupt Sources The interrupt source numbers directly map to the trap
* type and to the bits used in the Interrupt Clear, Interrupt Force,
* Interrupt Mask, and the Interrupt Pending Registers.
*/
#if defined(CONFIG_ARCH_CHIP_BM3803)
#define BM3803_IRQ_FIRST 0x00
#define BM3803_IRQ_RESET 0x00
#define BM3803_IRQ_INST_ACC_EXCEPTION 0x01
#define BM3803_IRQ_ILL_INST 0x02
#define BM3803_IRQ_PRIVELEGE_INST 0x03
#define BM3803_IRQ_FP_DISABLED 0x04
#define BM3803_IRQ_WINDOW_OVERFLOW 0x05
#define BM3803_IRQ_WINDOW_UNDERFLOW 0x06
#define BM3803_IRQ_ADD_NOT_ALIGNED 0x07
#define BM3803_IRQ_ADD_FP_EXCEPTION 0x08
#define BM3803_IRQ_DATA_ACC_EXCEPTION 0x09
#define BM3803_IRQ_TAG_OVERFLOW 0x0A
#define BM3803_IRQ_HW_UNDEFINED_0B 0x0B
#define BM3803_IRQ_HW_UNDEFINED_0C 0x0C
#define BM3803_IRQ_HW_UNDEFINED_0D 0x0D
#define BM3803_IRQ_HW_UNDEFINED_0E 0x0E
#define BM3803_IRQ_HW_UNDEFINED_0F 0x0F
#define BM3803_IRQ_HW_UNDEFINED_10 0x10
#define BM3803_IRQ_FIRST_INTERRUPT 0x11
#define BM3803_IRQ_CORRECTABLE_MEMORY_ERROR 0x11
#define BM3803_IRQ_UART_2_RX_TX 0x12
#define BM3803_IRQ_UART_1_RX_TX 0x13
#define BM3803_IRQ_EXTERNAL_0 0x14
#define BM3803_IRQ_EXTERNAL_1 0x15
#define BM3803_IRQ_EXTERNAL_2 0x16
#define BM3803_IRQ_EXTERNAL_3 0x17
#define BM3803_IRQ_TIMER1 0x18
#define BM3803_IRQ_TIMER2 0x19
#define BM3803_IRQ_EMPTY1 0x1A
#define BM3803_IRQ_EMPTY2 0x1B
#define BM3803_IRQ_UART_3_RX_TX 0x1C
#define BM3803_IRQ_EMPTY4 0x1D
#define BM3803_IRQ_EMPTY5 0x1E
#define BM3803_IRQ_EMPTY6 0x1F
#define BM3803_IRQ_LAST_INTERRUPT 0x1F
#define BM3803_IRQ_HW_UNDEFINED_20 0x20
#define BM3803_IRQ_HW_UNDEFINED_21 0x21
#define BM3803_IRQ_HW_UNDEFINED_22 0x22
#define BM3803_IRQ_HW_UNDEFINED_23 0x23
#define BM3803_IRQ_CP_DISABLED 0x24
#define BM3803_IRQ_HW_UNDEFINED_25 0x25
#define BM3803_IRQ_HW_UNDEFINED_26 0x26
#define BM3803_IRQ_HW_UNDEFINED_27 0x27
#define BM3803_IRQ_CP_EXCEPTION 0x28
#define BM3803_IRQ_HW_UNDEFINED_29 0x29
#define BM3803_IRQ_HW_UNDEFINED_7F 0x7F
#define BM3803_IRQ_SW_SYSCALL_TA0 0x80
#define BM3803_IRQ_SW_UNDEFINED_81 0x81
#define BM3803_IRQ_SW_UNDEFINED_82 0x82
#define BM3803_IRQ_SW_FLUSH_WINDOWS 0x83
#define BM3803_IRQ_SW_UNDEFINED_84 0x84
#define BM3803_IRQ_SW_UNDEFINED_85 0x85
#define BM3803_IRQ_SW_UNDEFINED_86 0x86
#define BM3803_IRQ_SW_UNDEFINED_87 0x87
#define BM3803_IRQ_SW_SYSCALL_TA8 0x88
#define BM3803_IRQ_SW_SYSCALL_IRQDIS 0x89
#define BM3803_IRQ_SW_SYSCALL_IRQEN 0x8A
#define BM3803_IRQ_SW_UNDEFINED_8B 0x8B
#define BM3803_IRQ_SW_UNDEFINED_FF 0xFF
#define BM3803_IRQ_LAST 0xFF
# define NR_IRQS 256
#else
#error "Unrecognized chip"
#endif
/****************************************************************************
* Public Types
****************************************************************************/
/****************************************************************************
* Inline functions
****************************************************************************/
#ifndef __ASSEMBLY__
#endif /* __ASSEMBLY__ */
/****************************************************************************
* Public Data
****************************************************************************/
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
#ifndef __ASSEMBLY__
#ifdef __cplusplus
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
#undef EXTERN
#ifdef __cplusplus
}
#endif
#endif
#endif /* __ARCH_SPARC_INCLUDE_BM3803_IRQ_H */
arch/sparc/include/bm3823/irq.h
+160
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@@ -0,0 +1,160 @@
/****************************************************************************
* arch/sparc/include/bm3823/irq.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/* This file should never be included directed but, rather, only indirectly
* through nuttx/irq.h
*/
#ifndef __ARCH_SPARC_INCLUDE_BM3823_IRQ_H
#define __ARCH_SPARC_INCLUDE_BM3823_IRQ_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/irq.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Interrupt Sources
*
* The interrupt source numbers directly map to the trap type and to
* the bits used in the Interrupt Clear, Interrupt Force, Interrupt Mask,
* and the Interrupt Pending Registers.
*/
#if defined(CONFIG_ARCH_CHIP_BM3823)
#define BM3823_IRQ_FIRST 0x00
#define BM3823_IRQ_RESET 0x00
#define BM3823_IRQ_INST_ACC_EXCEPTION 0x01
#define BM3823_IRQ_ILL_INST 0x02
#define BM3823_IRQ_PRIVELEGE_INST 0x03
#define BM3823_IRQ_FP_DISABLED 0x04
#define BM3823_IRQ_WINDOW_OVERFLOW 0x05
#define BM3823_IRQ_WINDOW_UNDERFLOW 0x06
#define BM3823_IRQ_ADD_NOT_ALIGNED 0x07
#define BM3823_IRQ_ADD_FP_EXCEPTION 0x08
#define BM3823_IRQ_DATA_ACC_EXCEPTION 0x09
#define BM3823_IRQ_TAG_OVERFLOW 0x0A
#define BM3823_IRQ_HW_UNDEFINED_0B 0x0B
#define BM3823_IRQ_HW_UNDEFINED_0C 0x0C
#define BM3823_IRQ_HW_UNDEFINED_0D 0x0D
#define BM3823_IRQ_HW_UNDEFINED_0E 0x0E
#define BM3823_IRQ_HW_UNDEFINED_0F 0x0F
#define BM3823_IRQ_HW_UNDEFINED_10 0x10
#define BM3823_IRQ_FIRST_INTERRUPT 0x11
#define BM3823_IRQ_AHB_ERROR 0x11
#define BM3823_IRQ_UART_2_RX_TX 0x12
#define BM3823_IRQ_UART_1_RX_TX 0x13
#define BM3823_IRQ_EXTERNAL_0 0x14
#define BM3823_IRQ_EXTERNAL_1 0x15
#define BM3823_IRQ_EXTERNAL_2 0x16
#define BM3823_IRQ_EXTERNAL_3 0x17
#define BM3823_IRQ_EXTERNAL_4 0x18
#define BM3823_IRQ_EXTERNAL_5 0x19
#define BM3823_IRQ_SECOND 0x1A
#define BM3823_IRQ_DSUTRACWBUFF 0x1B
#define BM3823_IRQ_PCI 0x1C
#define BM3823_IRQ_TIMER2 0x1D
#define BM3823_IRQ_TIMER1 0x1E
#define BM3823_IRQ_NONMASK 0x1F
#define BM3823_IRQ_LAST_INTERRUPT 0x1F
#define BM3823_IRQ_HW_UNDEFINED_20 0x20
#define BM3823_IRQ_HW_UNDEFINED_21 0x21
#define BM3823_IRQ_HW_UNDEFINED_22 0x22
#define BM3823_IRQ_HW_UNDEFINED_23 0x23
#define BM3823_IRQ_CP_DISABLED 0x24
#define BM3823_IRQ_HW_UNDEFINED_25 0x25
#define BM3823_IRQ_HW_UNDEFINED_26 0x26
#define BM3823_IRQ_HW_UNDEFINED_27 0x27
#define BM3823_IRQ_CP_EXCEPTION 0x28
#define BM3823_IRQ_HW_UNDEFINED_29 0x29
#define BM3823_IRQ_HW_UNDEFINED_7F 0x7F
#define BM3823_IRQ_SW_SYSCALL_TA0 0x80
#define BM3823_IRQ_SW_UNDEFINED_81 0x81
#define BM3823_IRQ_SW_UNDEFINED_82 0x82
#define BM3823_IRQ_SW_FLUSH_WINDOWS 0x83
#define BM3823_IRQ_SW_UNDEFINED_84 0x84
#define BM3823_IRQ_SW_UNDEFINED_85 0x85
#define BM3823_IRQ_SW_UNDEFINED_86 0x86
#define BM3823_IRQ_SW_UNDEFINED_87 0x87
#define BM3823_IRQ_SW_SYSCALL_TA8 0x88
#define BM3823_IRQ_SW_SYSCALL_IRQDIS 0x89
#define BM3823_IRQ_SW_SYSCALL_IRQEN 0x8A
#define BM3823_IRQ_SW_UNDEFINED_8B 0x8B
#define BM3823_IRQ_SW_UNDEFINED_FF 0xFF
#define BM3823_IRQ_LAST 0xFF
# define NR_IRQS 256
#else
#error "Unrecognized chip"
#endif
/****************************************************************************
* Public Types
****************************************************************************/
/****************************************************************************
* Inline functions
****************************************************************************/
#ifndef __ASSEMBLY__
#endif /* __ASSEMBLY__ */
/****************************************************************************
* Public Data
****************************************************************************/
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
#ifndef __ASSEMBLY__
#ifdef __cplusplus
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
#undef EXTERN
#ifdef __cplusplus
}
#endif
#endif
#endif /* __ARCH_SPARC_INCLUDE_BM3823_IRQ_H */
arch/sparc/include/elf.h
+84
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@@ -0,0 +1,84 @@
/****************************************************************************
* arch/sparc/include/elf.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __ARCH_SPARC_INCLUDE_ELF_H
#define __ARCH_SPARC_INCLUDE_ELF_H
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Relocation codes */
#define R_SPARC_NONE 0
#define R_SPARC_8 1
#define R_SPARC_16 2
#define R_SPARC_32 3
#define R_SPARC_DISP8 4
#define R_SPARC_DISP16 5
#define R_SPARC_DISP32 6
#define R_SPARC_WDISP30 7
#define R_SPARC_WDISP22 8
#define R_SPARC_HI22 9
#define R_SPARC_22 10
#define R_SPARC_13 11
#define R_SPARC_LO10 12
#define R_SPARC_GOT10 13
#define R_SPARC_GOT13 14
#define R_SPARC_GOT22 15
#define R_SPARC_PC10 16
#define R_SPARC_PC22 17
#define R_SPARC_WPLT30 18
#define R_SPARC_COPY 19
#define R_SPARC_GLOB_DAT 20
#define R_SPARC_JMP_SLOT 21
#define R_SPARC_RELATIVE 22
#define R_SPARC_UA32 23
#define R_SPARC_PLT32 24
#define R_SPARC_HIPLT22 25
#define R_SPARC_LOPLT10 26
#define R_SPARC_PCPLT32 27
#define R_SPARC_PCPLT22 28
#define R_SPARC_PCPLT10 29
#define R_SPARC_10 30
#define R_SPARC_11 31
#define R_SPARC_64 32
#define R_SPARC_OLO10 33
#define R_SPARC_HH22 34
#define R_SPARC_HM10 35
#define R_SPARC_LM22 36
#define R_SPARC_PC_HH22 37
#define R_SPARC_PC_HM10 38
#define R_SPARC_PC_LM22 39
#define R_SPARC_WDISP16 40
#define R_SPARC_WDISP19 41
#define R_SPARC_GLOB_JMP 42
#define R_SPARC_7 43
#define R_SPARC_5 44
#define R_SPARC_6 45
#define OPCODE_NOP 0x01000000 /* nop */
#define OPCODE_CALL 0x40000000 /* call ?; add PC-rel word address */
#define OPCODE_SETHI_G1 0x03000000 /* sethi ?, %g1; add value>>10 */
#define OPCODE_JMP_G1 0x81c06000 /* jmp %g1+?; add lo 10 bits of value */
#define OPCODE_SAVE_SP 0x9de3bfa8 /* save %sp, -(16+6)*4, %sp */
#define OPCODE_BA 0x30800000 /* b,a ?; add PC-rel word address */
#endif /* __ARCH_SPARC_INCLUDE_ELF_H */
arch/sparc/include/inttypes.h
+119
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@@ -0,0 +1,119 @@
/****************************************************************************
* arch/sparc/include/inttypes.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __ARCH_MIPS_INCLUDE_INTTYPES_H
#define __ARCH_MIPS_INCLUDE_INTTYPES_H
/****************************************************************************
* Included Files
****************************************************************************/
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#define PRId8 "d"
#define PRId16 "d"
#define PRId32 "ld"
#define PRId64 "lld"
#define PRIdPTR "d"
#define PRIi8 "i"
#define PRIi16 "i"
#define PRIi32 "li"
#define PRIi64 "lli"
#define PRIiPTR "i"
#define PRIo8 "o"
#define PRIo16 "o"
#define PRIo32 "lo"
#define PRIo64 "llo"
#define PRIoPTR "o"
#define PRIu8 "u"
#define PRIu16 "u"
#define PRIu32 "lu"
#define PRIu64 "llu"
#define PRIuPTR "u"
#define PRIx8 "x"
#define PRIx16 "x"
#define PRIx32 "lx"
#define PRIx64 "llx"
#define PRIxPTR "x"
#define PRIX8 "X"
#define PRIX16 "X"
#define PRIX32 "lX"
#define PRIX64 "llX"
#define PRIXPTR "X"
#define SCNd8 "hhd"
#define SCNd16 "hd"
#define SCNd32 "ld"
#define SCNd64 "lld"
#define SCNdPTR "d"
#define SCNi8 "hhi"
#define SCNi16 "hi"
#define SCNi32 "li"
#define SCNi64 "lli"
#define SCNiPTR "i"
#define SCNo8 "hho"
#define SCNo16 "ho"
#define SCNo32 "lo"
#define SCNo64 "llo"
#define SCNoPTR "o"
#define SCNu8 "hhu"
#define SCNu16 "hu"
#define SCNu32 "lu"
#define SCNu64 "llu"
#define SCNuPTR "u"
#define SCNx8 "hhx"
#define SCNx16 "hx"
#define SCNx32 "lx"
#define SCNx64 "llx"
#define SCNxPTR "x"
#define INT8_C(x) x
#define INT16_C(x) x
#define INT32_C(x) x ## l
#define INT64_C(x) x ## ll
#define UINT8_C(x) x
#define UINT16_C(x) x
#define UINT32_C(x) x ## ul
#define UINT64_C(x) x ## ull
#endif /* __ARCH_SPARC_INCLUDE_INTTYPES_H */
arch/sparc/include/irq.h
+85
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@@ -0,0 +1,85 @@
/****************************************************************************
* arch/sparc/include/irq.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/* This file should never be included directed but, rather, only indirectly
* through nuttx/irq.h
*/
#ifndef __ARCH_SPARC_INCLUDE_IRQ_H
#define __ARCH_SPARC_INCLUDE_IRQ_H
/****************************************************************************
* Included Files
****************************************************************************/
/* Include NuttX-specific IRQ definitions */
#include <nuttx/irq.h>
/* Include chip-specific IRQ definitions (including IRQ numbers) */
#include <arch/chip/irq.h>
/* Include AVR architecture-specific IRQ definitions (including register
* save structure and up_irq_save()/up_irq_restore() macros
*/
#ifdef CONFIG_ARCH_SPARC_V8
# include <arch/sparc_v8/irq.h>
#endif
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Public Types
****************************************************************************/
#ifndef __ASSEMBLY__
/****************************************************************************
* Inline functions
****************************************************************************/
/****************************************************************************
* Public Data
****************************************************************************/
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
#ifdef __cplusplus
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
#undef EXTERN
#ifdef __cplusplus
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_SPARC_INCLUDE_IRQ_H */
arch/sparc/include/limits.h
+72
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@@ -0,0 +1,72 @@
/****************************************************************************
* arch/sparc/include/limits.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __ARCH_SPARC_INCLUDE_LIMITS_H
#define __ARCH_SPARC_INCLUDE_LIMITS_H
/****************************************************************************
* Included Files
****************************************************************************/
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#define CHAR_BIT 8
#define SCHAR_MIN (-SCHAR_MAX - 1)
#define SCHAR_MAX 127
#define UCHAR_MAX 255
/* These could be different on machines where char is unsigned */
#ifdef __CHAR_UNSIGNED__
#define CHAR_MIN 0
#define CHAR_MAX UCHAR_MAX
#else
#define CHAR_MIN SCHAR_MIN
#define CHAR_MAX SCHAR_MAX
#endif
#define SHRT_MIN (-SHRT_MAX - 1)
#define SHRT_MAX 32767
#define USHRT_MAX 65535U
#define INT_MIN (-INT_MAX - 1)
#define INT_MAX 2147483647
#define UINT_MAX 4294967295U
/* These change on 32-bit and 64-bit platforms */
#define LONG_MIN (-LONG_MAX - 1)
#define LONG_MAX 2147483647L
#define ULONG_MAX 4294967295UL
#define LLONG_MIN (-LLONG_MAX - 1)
#define LLONG_MAX 9223372036854775807LL
#define ULLONG_MAX 18446744073709551615ULL
/* A pointer is 4 bytes */
#define PTR_MIN (-PTR_MAX - 1)
#define PTR_MAX 2147483647
#define UPTR_MAX 4294967295U
#endif /* __ARCH_SPARC_INCLUDE_LIMITS_H */
arch/sparc/include/sparc_v8/irq.h
+753
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arch/sparc/include/sparc_v8/syscall.h
+195
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/****************************************************************************
* arch/sparc/include/sparc_v8/syscall.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/* This file should never be included directed but, rather, only indirectly
* through include/syscall.h or include/sys/sycall.h
*/
#ifndef __ARCH_SPARC_INCLUDE_SPARC_V8_SYSCALL_H
#define __ARCH_SPARC_INCLUDE_SPARC_V8_SYSCALL_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#ifndef __ASSEMBLY__
# include <stdint.h>
#endif
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#define SYS_syscall 0x80
/* Configuration ************************************************************/
/* SYS call 1 and 2 are defined for internal use by the RISC-V port (see
* arch/riscv/include/mips32/syscall.h). In addition, SYS call 3 is the
* return from a SYS call in kernel mode. The first four syscall values must
* therefore, be reserved (0 is not used).
*/
#ifdef CONFIG_BUILD_KERNEL
# ifndef CONFIG_SYS_RESERVED
# error "CONFIG_SYS_RESERVED must be defined to the value 4"
# elif CONFIG_SYS_RESERVED != 4
# error "CONFIG_SYS_RESERVED must have the value 4"
# endif
#endif
/* sys_call macros **********************************************************/
#ifndef __ASSEMBLY__
/* Context switching system calls *******************************************/
/* SYS call 0: (not used) */
/* SYS call 1:
*
* void up_fullcontextrestore(uint32_t *restoreregs) noreturn_function;
*/
#define SYS_restore_context (1)
#define up_fullcontextrestore(restoreregs) \
(void)sys_call1(SYS_restore_context, (uintptr_t)restoreregs)
/* SYS call 2:
*
* void up_switchcontext(uint32_t *saveregs, uint32_t *restoreregs);
*/
#define SYS_switch_context (2)
#define up_switchcontext(saveregs, restoreregs) \
(void)sys_call2(SYS_switch_context, (uintptr_t)saveregs, (uintptr_t)restoreregs)
#ifdef CONFIG_BUILD_KERNEL
/* SYS call 3:
*
* void up_syscall_return(void);
*/
#define SYS_syscall_return (3)
#define up_syscall_return() (void)sys_call0(SYS_syscall_return)
#endif
#endif /* __ASSEMBLY__ */
/****************************************************************************
* Public Types
****************************************************************************/
/****************************************************************************
* Inline functions
****************************************************************************/
#ifndef __ASSEMBLY__
/****************************************************************************
* Public Data
****************************************************************************/
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
#ifdef __cplusplus
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
/****************************************************************************
* Name: up_syscall0
*
* Description:
* System call SYS_ argument and no additional parameters.
*
****************************************************************************/
uintptr_t sys_call0(unsigned int nbr);
/****************************************************************************
* Name: up_syscall1
*
* Description:
* System call SYS_ argument and one additional parameter.
*
****************************************************************************/
uintptr_t sys_call1(unsigned int nbr, uintptr_t parm1);
/****************************************************************************
* Name: up_syscall2
*
* Description:
* System call SYS_ argument and two additional parameters.
*
****************************************************************************/
uintptr_t sys_call2(unsigned int nbr, uintptr_t parm1, uintptr_t parm2);
/****************************************************************************
* Name: up_syscall3
*
* Description:
* System call SYS_ argument and three additional parameters.
*
****************************************************************************/
uintptr_t sys_call3(unsigned int nbr, uintptr_t parm1, uintptr_t parm2,
uintptr_t parm3);
/****************************************************************************
* Name: up_syscall4
*
* Description:
* System call SYS_ argument and four additional parameters.
*
****************************************************************************/
uintptr_t sys_call4(unsigned int nbr, uintptr_t parm1, uintptr_t parm2,
uintptr_t parm3, uintptr_t parm4);
/****************************************************************************
* Name: up_syscall5
*
* Description:
* System call SYS_ argument and five additional parameters.
*
****************************************************************************/
uintptr_t sys_call5(unsigned int nbr, uintptr_t parm1, uintptr_t parm2,
uintptr_t parm3, uintptr_t parm4, uintptr_t parm5);
#undef EXTERN
#ifdef __cplusplus
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_SPARC_INCLUDE_SPARC_V8_SYSCALL_H */
arch/sparc/include/spinlock.h
+84
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/****************************************************************************
* arch/sparc/include/spinlock.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __ARCH_SPARC_INCLUDE_SPINLOCK_H
#define __ARCH_SPARC_INCLUDE_SPINLOCK_H
/****************************************************************************
* Included Files
****************************************************************************/
#ifndef __ASSEMBLY__
# include <stdint.h>
#endif /* __ASSEMBLY__ */
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#define SP_UNLOCKED 0 /* The Un-locked state */
#define SP_LOCKED 1 /* The Locked state */
/****************************************************************************
* Public Types
****************************************************************************/
#ifndef __ASSEMBLY__
/* The Type of a spinlock.
*
* This must be a uint32_ becaue it will be set using S32C1I instruction.
* That instruction atomically stores to a memory location only if its
* current value is the expected one. The state register (SCOMPARE1) is
* used to provide the additional comparison operand. Some implementations
* also have a state register (ATOMCTL) for further control of the atomic
* operation in cache and on the PIF bus.
*/
typedef uint32_t spinlock_t;
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
/****************************************************************************
* Name: up_testset
*
* Description:
* Perform an atomic test and set operation on the provided spinlock.
*
* This function must be provided via the architecture-specific logic.
*
* Input Parameters:
* lock - The address of spinlock object.
*
* Returned Value:
* The spinlock is always locked upon return. The value of previous value
* of the spinlock variable is returned, either SP_LOCKED if the spinlock
* as previously locked (meaning that the test-and-set operation failed to
* obtain the lock) or SP_UNLOCKED if the spinlock was previously unlocked
* (meaning that we successfully obtained the lock)
*
****************************************************************************/
/* See prototype in nuttx/include/nuttx/spinlock.h */
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_SPARC_INCLUDE_SPINLOCK_H */
arch/sparc/include/syscall.h
+74
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/****************************************************************************
* arch/sparc/include/syscall.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/* This file should never be included directed but, rather, only indirectly
* through include/syscall.h or include/sys/sycall.h
*/
#ifndef __ARCH_SPARC_INCLUDE_SYSCALL_H
#define __ARCH_SPARC_INCLUDE_SYSCALL_H
/****************************************************************************
* Included Files
****************************************************************************/
/* Include ARM architecture-specific syscall macros */
#ifdef CONFIG_ARCH_SPARC_V8
# include <arch/sparc_v8/syscall.h>
#endif
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Public Types
****************************************************************************/
/****************************************************************************
* Inline functions
****************************************************************************/
/****************************************************************************
* Public Data
****************************************************************************/
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
#ifndef __ASSEMBLY__
#ifdef __cplusplus
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
#undef EXTERN
#ifdef __cplusplus
}
#endif
#endif
#endif /* __ARCH_SPARC_INCLUDE_SYSCALL_H */
arch/sparc/include/types.h
+105
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@@ -0,0 +1,105 @@
/****************************************************************************
* arch/sparc/include/types.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/* This file should never be included directly but, rather, only indirectly
* through sys/types.h
*/
#ifndef __ARCH_SPARC_INCLUDE_TYPES_H
#define __ARCH_SPARC_INCLUDE_TYPES_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
/****************************************************************************
* Pre-processor Prototypes
****************************************************************************/
/****************************************************************************
* Type Declarations
****************************************************************************/
#ifndef __ASSEMBLY__
/* These are the sizes of the standard integer types. NOTE that these type
* names have a leading underscore character. This file will be included
* (indirectly) by include/stdint.h and typedef'ed to the final name without
* the underscore character. This roundabout way of doings things allows
* the stdint.h to be removed from the include/ directory in the event that
* the user prefers to use the definitions provided by their toolchain header
* files
*/
typedef signed char _int8_t;
typedef unsigned char _uint8_t;
typedef signed short _int16_t;
typedef unsigned short _uint16_t;
typedef signed int _int32_t;
typedef unsigned int _uint32_t;
typedef signed long long _int64_t;
typedef unsigned long long _uint64_t;
#define __INT64_DEFINED
typedef _int64_t _intmax_t;
typedef _uint64_t _uintmax_t;
#if defined(__WCHAR_TYPE__)
typedef __WCHAR_TYPE__ _wchar_t;
#else
typedef int _wchar_t;
#endif
/* A size is 4 bytes */
#if defined(__SIZE_TYPE__)
/* If __SIZE_TYPE__ is defined we define ssize_t based on size_t.
* We simply change "unsigned" to "signed" for this single definition
* to make sure ssize_t and size_t only differ by their signedness.
*/
#define unsigned signed
typedef __SIZE_TYPE__ _ssize_t;
#undef unsigned
typedef __SIZE_TYPE__ _size_t;
#elif defined(CONFIG_ARCH_SIZET_LONG)
typedef signed long _ssize_t;
typedef unsigned long _size_t;
#else
typedef signed int _ssize_t;
typedef unsigned int _size_t;
#endif
/* This is the size of the interrupt state save returned by up_irq_save(). */
typedef unsigned int irqstate_t;
#endif /* __ASSEMBLY__ */
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
#endif /* __ARCH_SPARC_INCLUDE_TYPES_H */
arch/sparc/src/Makefile
+173
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@@ -0,0 +1,173 @@
############################################################################
# arch/sparc/src/Makefile
#
# Licensed to the Apache Software Foundation (ASF) under one or more
# contributor license agreements. See the NOTICE file distributed with
# this work for additional information regarding copyright ownership. The
# ASF licenses this file to you under the Apache License, Version 2.0 (the
# "License"); you may not use this file except in compliance with the
# License. You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations
# under the License.
#
############################################################################
-include $(TOPDIR)/Make.defs
-include chip/Make.defs
ARCH_SUBDIR = sparc_v8
ifeq ($(CONFIG_WINDOWS_NATIVE),y)
ARCH_SRCDIR = $(TOPDIR)\arch\$(CONFIG_ARCH)\src
NUTTX = "$(TOPDIR)\nuttx$(EXEEXT)"
INCLUDES += -I "$(ARCH_SRCDIR)\chip"
INCLUDES += -I "$(ARCH_SRCDIR)\common"
INCLUDES += -I "$(ARCH_SRCDIR)\$(ARCH_SUBDIR)"
INCLUDES += -I "$(TOPDIR)\sched"
else
ARCH_SRCDIR = $(TOPDIR)/arch/$(CONFIG_ARCH)/src
ifeq ($(WINTOOL),y)
NUTTX = "${shell cygpath -w $(TOPDIR)/nuttx$(EXEEXT)}"
INCLUDES += -I "${shell cygpath -w $(ARCH_SRCDIR)/chip}"
INCLUDES += -I "${shell cygpath -w $(ARCH_SRCDIR)/common}"
INCLUDES += -I "${shell cygpath -w $(ARCH_SRCDIR)/$(ARCH_SUBDIR)}"
INCLUDES += -I "${shell cygpath -w $(TOPDIR)/sched}"
else
NUTTX = "$(TOPDIR)/nuttx$(EXEEXT)"
INCLUDES += -I "$(ARCH_SRCDIR)/chip"
INCLUDES += -I "$(ARCH_SRCDIR)/common"
INCLUDES += -I "$(ARCH_SRCDIR)/$(ARCH_SUBDIR)"
INCLUDES += -I "$(TOPDIR)/sched"
endif
endif
CPPFLAGS += $(INCLUDES) $(EXTRADEFINES)
CFLAGS += $(INCLUDES) $(EXTRADEFINES)
CXXFLAGS += $(INCLUDES) $(EXTRADEFINES)
AFLAGS += $(INCLUDES) $(EXTRADEFINES)
HEAD_OBJ = $(HEAD_ASRC:.S=$(OBJEXT))
STARTUP_OBJS ?= $(HEAD_OBJ)
ASRCS = $(CHIP_ASRCS) $(CMN_ASRCS)
AOBJS = $(ASRCS:.S=$(OBJEXT))
CSRCS = $(CHIP_CSRCS) $(CMN_CSRCS)
COBJS = $(CSRCS:.c=$(OBJEXT))
SRCS = $(ASRCS) $(CSRCS)
OBJS = $(AOBJS) $(COBJS)
# Override in Make.defs if linker is not 'ld'
LDSTARTGROUP ?= --start-group
LDENDGROUP ?= --end-group
LDFLAGS += $(ARCHSCRIPT)
EXTRA_LIBS ?=
LINKLIBS ?=
ifeq ($(CONFIG_WINDOWS_NATIVE),y)
BOARDMAKE = $(if $(wildcard .\board\Makefile),y,)
LIBPATHS += -L"$(TOPDIR)\staging"
ifeq ($(BOARDMAKE),y)
LIBPATHS += -L"$(TOPDIR)\arch\$(CONFIG_ARCH)\src\board"
endif
else
BOARDMAKE = $(if $(wildcard ./board/Makefile),y,)
ifeq ($(WINTOOL),y)
LIBPATHS += -L"${shell cygpath -w "$(TOPDIR)/staging"}"
ifeq ($(BOARDMAKE),y)
LIBPATHS += -L"${shell cygpath -w "$(TOPDIR)/arch/$(CONFIG_ARCH)/src/board"}"
endif
else
LIBPATHS += -L"$(TOPDIR)/staging"
ifeq ($(BOARDMAKE),y)
LIBPATHS += -L"$(TOPDIR)/arch/$(CONFIG_ARCH)/src/board"
endif
endif
endif
LDLIBS = $(patsubst %.a,%,$(patsubst lib%,-l%,$(LINKLIBS)))
ifeq ($(BOARDMAKE),y)
LDLIBS += -lboard
endif
LIBGCC = "${shell "$(CC)" $(ARCHCPUFLAGS) -print-libgcc-file-name}"
VPATH = chip:common:$(ARCH_SUBDIR)
all: $(HEAD_OBJ) libarch$(LIBEXT)
.PHONY: board/libboard$(LIBEXT)
$(AOBJS) $(HEAD_OBJ): %$(OBJEXT): %.S
$(call ASSEMBLE, $<, $@)
$(COBJS): %$(OBJEXT): %.c
$(call COMPILE, $<, $@)
libarch$(LIBEXT): $(OBJS)
$(call ARCHIVE, $@, $(OBJS))
board/libboard$(LIBEXT):
$(Q) $(MAKE) -C board TOPDIR="$(TOPDIR)" libboard$(LIBEXT) EXTRADEFINES=$(EXTRADEFINES)
nuttx$(EXEEXT): $(HEAD_OBJ) board/libboard$(LIBEXT)
@echo "LD: nuttx"
$(Q) $(LD) --entry=__start $(LDFLAGS) $(LIBPATHS) -o $(NUTTX) $(HEAD_OBJ) $(EXTRA_OBJS) \
$(LDSTARTGROUP) $(LDLIBS) $(EXTRA_LIBS) $(LIBGCC) $(LDENDGROUP)
ifneq ($(CONFIG_WINDOWS_NATIVE),y)
$(Q) $(NM) $(NUTTX) | \
grep -v '\(compiled\)\|\(\$(OBJEXT)$$\)\|\( [aUw] \)\|\(\.\.ng$$\)\|\(LASH[RL]DI\)' | \
sort > $(TOPDIR)/System.map
endif
# This is part of the top-level export target
export_startup: board/libboard$(LIBEXT) $(STARTUP_OBJS)
$(Q) if [ -d "$(EXPORT_DIR)/startup" ]; then \
cp -f $(STARTUP_OBJS) "$(EXPORT_DIR)/startup"; \
else \
echo "$(EXPORT_DIR)/startup does not exist"; \
exit 1; \
fi
# Dependencies
.depend: Makefile chip/Make.defs $(SRCS)
ifeq ($(BOARDMAKE),y)
$(Q) $(MAKE) -C board TOPDIR="$(TOPDIR)" depend
endif
$(Q) $(MKDEP) --dep-path chip --dep-path common --dep-path $(ARCH_SUBDIR) \
"$(CC)" -- $(CFLAGS) -- $(SRCS) >Make.dep
$(Q) touch $@
depend: .depend
context::
clean:
ifeq ($(BOARDMAKE),y)
$(Q) $(MAKE) -C board TOPDIR="$(TOPDIR)" clean
endif
$(call DELFILE, libarch$(LIBEXT))
$(call CLEAN)
distclean: clean
ifeq ($(BOARDMAKE),y)
$(Q) $(MAKE) -C board TOPDIR="$(TOPDIR)" distclean
endif
$(call DELFILE, Make.dep)
$(call DELFILE, .depend)
-include Make.dep
arch/sparc/src/bm3803/Kconfig
+123
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@@ -0,0 +1,123 @@
#
# For a description of the syntax of this configuration file,
# see the file kconfig-language.txt in the NuttX tools repository.
#
if ARCH_CHIP_BM3803
comment "BM3803 Configuration Options"
menu "BM3803 Peripheral Support"
config BM3803_WDG
bool "Watchdog timer (WDT)"
default n
select WATCHDOG
config BM3803_TIM1
bool "Timer 1 (T1)"
default n
config BM3803_TIM2
bool "Timer 2 (T2)"
default n
config BM3803_UART1
bool "UART1"
default n
select UART1_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
config BM3803_UART2
bool "UART2"
default n
select UART2_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
config BM3803_UART3
bool "UART3"
default n
select UART3_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
endmenu # BM3803 Peripheral Selections
menuconfig BM3803_GPIOIRQ
bool "GPIO Interrupt Support"
default n
---help---
Build in support for interrupts based on GPIO inputs from IOPorts
if BM3803_GPIOIRQ
config BM3803_GPIOIRQ_PORT4
bool "I/O PORT4 Interrupt Support"
default n
config BM3803_GPIOIRQ_PORT5
bool "I/O PORT5 Interrupt Support"
default n
config BM3803_GPIOIRQ_PORT6
bool "I/O PORT6 Interrupt Support"
default n
config BM3803_GPIOIRQ_PORT7
bool "I/O PORT7 Interrupt Support"
default n
endif # BM3803_GPIOIRQ
menu "Timer Configuration"
if SCHED_TICKLESS
config BM3803_ONESHOT
bool
default y
config BM3803_FREERUN
bool
default y
config BM3803_TICKLESS_ONESHOT
int "Tickless one-shot timer channel"
default 1
range 1 2
depends on BM3803_ONESHOT
---help---
If the Tickless OS feature is enabled, then one clock must be
assigned to provide the one-shot timer needed by the OS.
config BM3803_TICKLESS_FREERUN
int "Tickless free-running timer channel"
default 2
range 1 2
depends on BM3803_FREERUN
---help---
If the Tickless OS feature is enabled, then one clock must be
assigned to provide the free-running timer needed by the OS.
endif # SCHED_TICKLESS
if !SCHED_TICKLESS
config BM3803_ONESHOT
bool "TIM one-shot wrapper"
default n
---help---
Enable a wrapper around the low level timer/counter functions to
support one-shot timer.
config BM3803_FREERUN
bool "TIM free-running wrapper"
default n
---help---
Enable a wrapper around the low level timer/counter functions to
support a free-running timer.
endif # !SCHED_TICKLESS
endmenu # Timer Configuration
endif
arch/sparc/src/bm3803/Make.defs
+77
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@@ -0,0 +1,77 @@
############################################################################
# arch/sparc/src/bm3803/Make.defs
#
# Licensed to the Apache Software Foundation (ASF) under one or more
# contributor license agreements. See the NOTICE file distributed with
# this work for additional information regarding copyright ownership. The
# ASF licenses this file to you under the Apache License, Version 2.0 (the
# "License"); you may not use this file except in compliance with the
# License. You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations
# under the License.
#
############################################################################
# The start-up, "head", file
HEAD_ASRC = bm3803_head.S
# Common SPARC files
CMN_ASRCS = up_syscall.S
CMN_CSRCS = up_allocateheap.c up_assert.c up_blocktask.c up_copystate.c up_systemreset.c
CMN_CSRCS += up_createstack.c up_doirq.c up_exit.c up_idle.c up_initialize.c
CMN_CSRCS += up_initialstate.c up_interruptcontext.c up_irq.c up_lowputs.c
CMN_CSRCS += up_mdelay.c up_modifyreg8.c up_modifyreg16.c up_modifyreg32.c
CMN_CSRCS += up_puts.c up_releasepending.c up_releasestack.c
CMN_CSRCS += up_reprioritizertr.c up_schedulesigaction.c up_sigdeliver.c
CMN_CSRCS += up_stackframe.c up_swint1.c up_udelay.c up_unblocktask.c up_usestack.c
# Configuration-dependent common files
ifeq ($(CONFIG_ARCH_STACKDUMP),y)
CMN_CSRCS += up_dumpstate.c
endif
ifeq ($(CONFIG_STACK_COLORATION),y)
CMN_CSRCS += up_checkstack.c
endif
# Required BM3803 files
CHIP_ASRCS = bm3803_exceptions.S
CHIP_CSRCS = bm3803-lowconsole.c bm3803-lowinit.c bm3803-serial.c bm3803-irq.c bm3803_tim.c
ifeq ($(CONFIG_TIMER),y)
CHIP_CSRCS += bm3803_tim_lowerhalf.c
endif
ifeq ($(CONFIG_BM3803_WDG),y)
CHIP_CSRCS += bm3803_wdg.c
endif
ifneq ($(CONFIG_SCHED_TICKLESS),y)
CHIP_CSRCS += bm3803-timerisr.c
else
CHIP_CSRCS += bm3803_tickless.c
endif
ifeq ($(CONFIG_BM3803_ONESHOT),y)
CHIP_CSRCS += bm3803_oneshot.c bm3803_oneshot_lowerhalf.c
endif
ifeq ($(CONFIG_BM3803_FREERUN),y)
CHIP_CSRCS += bm3803_freerun.c
endif
# Configuration-dependent files
ifeq ($(CONFIG_BM3803_GPIOIRQ),y)
CHIP_CSRCS += bm3803_exti_gpio.c
endif
arch/sparc/src/bm3803/bm3803-config.h
+101
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@@ -0,0 +1,101 @@
/****************************************************************************
* arch/sparc/src/bm3803/bm3803-config.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __ARCH_SPARC_SRC_BM3803_CONFIG_H
#define __ARCH_SPARC_SRC_BM3803_CONFIG_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <arch/board/board.h>
#include "chip.h"
#include "bm3803-memorymap.h"
#include "bm3803-uart.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* SYS calls ****************************************************************/
/* SYS call 1 and 2 are defined for internal use by the BM3803 port (see
* arch/sparc/include/sparc32/syscall.h). In addition, SYS call 3 is the
* return from a SYS call in kernel mode. The first four syscall values
* must, therefore, be reserved (0 is not used).
*/
#ifdef CONFIG_BUILD_KERNEL
# if !defined(CONFIG_SYS_RESERVED) || CONFIG_SYS_RESERVED < 4
# error "CONFIG_SYS_RESERVED must be defined to be 4 for a kernel build"
# elif CONFIG_SYS_RESERVED > 4
# warning "CONFIG_SYS_RESERVED should be defined to be 4 for a kernel build"
# endif
#endif
/* UARTs ********************************************************************/
/* Don't enable UARTs not supported by the chip. */
#if CHIP_NUARTS < 1
# undef CONFIG_BM3803_UART1
# undef CONFIG_BM3803_UART2
# undef CONFIG_BM3803_UART3
#elif CHIP_NUARTS < 2
# undef CONFIG_BM3803_UART2
# undef CONFIG_BM3803_UART3
#elif CHIP_NUARTS < 3
# undef CONFIG_BM3803_UART3
#endif
/* Are any UARTs enabled? */
#undef HAVE_UART_DEVICE
#if defined(CONFIG_BM3803_UART1) || defined(CONFIG_BM3803_UART2) || defined(CONFIG_BM3803_UART3)
# define HAVE_UART_DEVICE 1
#endif
/* Is there a serial console? There should be no more than one defined. It
* could be on any UARTn, n=1,.. CHIP_NUARTS
*/
#if defined(CONFIG_UART1_SERIAL_CONSOLE) && defined(CONFIG_BM3803_UART1)
# undef CONFIG_UART2_SERIAL_CONSOLE
# undef CONFIG_UART3_SERIAL_CONSOLE
# define HAVE_SERIAL_CONSOLE 1
#elif defined(CONFIG_UART2_SERIAL_CONSOLE) && defined(CONFIG_BM3803_UART2)
# undef CONFIG_UART1_SERIAL_CONSOLE
# undef CONFIG_UART3_SERIAL_CONSOLE
# define HAVE_SERIAL_CONSOLE 1
#elif defined(CONFIG_UART3_SERIAL_CONSOLE) && defined(CONFIG_BM3803_UART3)
# undef CONFIG_UART1_SERIAL_CONSOLE
# undef CONFIG_UART2_SERIAL_CONSOLE
# define HAVE_SERIAL_CONSOLE 1
#else
# undef CONFIG_UART1_SERIAL_CONSOLE
# undef CONFIG_UART2_SERIAL_CONSOLE
# undef CONFIG_UART3_SERIAL_CONSOLE
# undef HAVE_SERIAL_CONSOLE
#endif
#endif /* __ARCH_SPARC_SRC_BM3803_CONFIG_H */
arch/sparc/src/bm3803/bm3803-irq.c
+321
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@@ -0,0 +1,321 @@
/****************************************************************************
* arch/sparc/src/bm3803/bm3803-irq.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <errno.h>
#include <assert.h>
#include <debug.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include <arch/irq.h>
#include "up_arch.h"
#include "up_internal.h"
#include "bm3803.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Public Data
****************************************************************************/
volatile uint32_t *g_current_regs;
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
#ifndef CONFIG_ARCH_IRQPRIO
static int up_prioritize_irq(int irq, int priority);
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: up_irqinitialize
****************************************************************************/
void up_irqinitialize(void)
{
int irq;
for (irq = 1; irq < NR_IRQS; irq++)
{
/* Skip window overflow, underflow, and flush as well as software
* trap 0,9,10 which we will use as a shutdown, IRQ disable, IRQ
* enable.Also avoid trap 0x70 - 0x7f which cannot happen and where
* some of the space is used to pass parameters to the program.
*/
if (((irq >= 0x00) && (irq <= 0x11)) ||
((irq >= 0x20) && (irq <= 0xff)))
{
continue;
}
/* Set all interrupts to the default (low) priority */
up_prioritize_irq(irq, 0);
/* Disable all interrupts */
up_disable_irq(irq);
}
/* Attach software interrupts */
irq_attach(BM3803_IRQ_SW_SYSCALL_TA0, up_swint0, NULL);
irq_attach(BM3803_IRQ_SW_SYSCALL_TA8, up_swint1, NULL);
/* currents_regs is non-NULL only while processing an interrupt */
g_current_regs = NULL;
/* And finally, enable interrupts */
/* Interrupts are enabled by setting the te bit in the psr status
* register
*/
up_irq_enable();
}
/****************************************************************************
* Name: up_disable_irq
*
* Description:
* Disable the IRQ specified by 'irq'
*
****************************************************************************/
void up_disable_irq(int irq)
{
int bitno;
/* Disable the interrupt by clearing the associated bit in the IEC
* register
*/
DEBUGASSERT(irq >= BM3803_IRQ_FIRST_INTERRUPT &&
irq <= BM3803_IRQ_LAST_INTERRUPT);
if (irq >= BM3803_IRQ_FIRST_INTERRUPT)
{
if (irq <= BM3803_IRQ_LAST_INTERRUPT)
{
/* Disable the interrupt */
bitno = irq - BM3803_IRQ_FIRST_INTERRUPT + 1;
BM3803_REG.int_mask &= (~(1 << bitno));
}
else
{
/* Value out of range.. just ignore */
return;
}
}
}
/****************************************************************************
* Name: up_enable_irq
*
* Description:
* Enable the IRQ specified by 'irq'
*
****************************************************************************/
void up_enable_irq(int irq)
{
int bitno;
/* Enable the interrupt by setting the associated bit in the Interrupt_Mask
* Register
*/
DEBUGASSERT(irq >= BM3803_IRQ_FIRST_INTERRUPT &&
irq <= BM3803_IRQ_LAST_INTERRUPT);
if (irq >= BM3803_IRQ_FIRST_INTERRUPT)
{
if (irq <= BM3803_IRQ_LAST_INTERRUPT)
{
/* Enable the interrupt */
bitno = irq - BM3803_IRQ_FIRST_INTERRUPT + 1;
BM3803_REG.int_mask |= (1 << bitno);
}
else
{
/* Value out of range.. just ignore */
return;
}
}
}
/****************************************************************************
* Name: up_pending_irq
*
* Description:
* Return true if the interrupt is pending and unmasked.
*
****************************************************************************/
bool up_pending_irq(int irq)
{
int bitno;
uint16_t regval;
uint16_t regval1;
uint16_t regval2;
/* Test if the interrupt is pending by reading both the IEC and IFS
* register. Return true if the bit associated with the irq is both pending
* the IFs and enabled in the IEC.
*/
DEBUGASSERT(irq >= BM3803_IRQ_FIRST_INTERRUPT &&
irq <= BM3803_IRQ_LAST_INTERRUPT);
if (irq >= BM3803_IRQ_FIRST_INTERRUPT)
{
if (irq <= BM3803_IRQ_LAST_INTERRUPT)
{
/* Get the set of unmasked, pending interrupts. */
regval1 = BM3803_REG.int_mask;
regval2 = BM3803_REG.int_pend;
regval = regval1 & regval2;
}
else
{
/* Value out of range.. just ignore */
return false;
}
/* Return true if the interrupt is pending and unmask. */
bitno = irq - BM3803_IRQ_FIRST_INTERRUPT + 1;
return (regval & (1 << bitno)) != 0;
}
return false;
}
/****************************************************************************
* Name: up_clrpend_irq
*
* Description:
* Clear any pending interrupt
*
****************************************************************************/
void up_clrpend_irq(int irq)
{
int bitno;
/* Acknowledge the interrupt by clearing the associated bit in the ITP
* register. It is necessary to do this BEFORE lowering the interrupt
* priority level otherwise recursive interrupts would occur.
*/
DEBUGASSERT(irq >= BM3803_IRQ_FIRST_INTERRUPT &&
irq <= BM3803_IRQ_LAST_INTERRUPT);
if (irq >= BM3803_IRQ_FIRST_INTERRUPT)
{
if (irq <= BM3803_IRQ_LAST_INTERRUPT)
{
/* written with a ‘1’, in Interrupt Clear Register
* will clear the corresponding bit(s) in the interrupt pending
* register
*/
bitno = irq - BM3803_IRQ_FIRST_INTERRUPT + 1;
BM3803_REG.int_clear |= (1 << bitno);
}
else
{
/* Value out of range.. just ignore */
return;
}
}
}
/****************************************************************************
* Name: up_prioritize_irq
*
* Description:
* It is possible to change the priority level of an interrupt using the two
* priority levels from the interrupt mask and priority register (ITMP).
* Each interrupt can be assigned to one of two levels as programmed in the
* Interrupt mask and priority register. Level 1 has higher priority than
* level 0. Within each level the interrupts are prioritised
****************************************************************************/
#ifndef CONFIG_ARCH_IRQPRIO
static
#endif
int up_prioritize_irq(int irq, int priority)
{
int bitno;
int shift;
/* Don't allow this function to be used for disabling interrupts. */
DEBUGASSERT((unsigned)irq < NR_IRQS && (unsigned)(priority) < 2);
if (irq >= BM3803_IRQ_FIRST_INTERRUPT)
{
if (irq <= BM3803_IRQ_LAST_INTERRUPT)
{
bitno = irq - BM3803_IRQ_FIRST_INTERRUPT + 1;
shift = bitno + 16;
/* Set the new interrupt priority (momentarily disabling
* interrupts)
*/
BM3803_REG.int_mask &= (~(1 << shift));
BM3803_REG.int_mask |= (priority << shift);
}
else
{
/* Value out of range.. just ignore */
return -EINVAL;
}
}
return OK;
}
arch/sparc/src/bm3803/bm3803-lowconsole.c
+307
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@@ -0,0 +1,307 @@
/****************************************************************************
* arch/sparc/src/bm3803/bm3803-lowconsole.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <arch/board/board.h>
#include "bm3803-config.h"
#include <assert.h>
#include <debug.h>
#include <arch/irq.h>
#include "up_arch.h"
#include "up_internal.h"
#include "bm3803-uart.h"
#include "bm3803.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Private Function Prototypes
****************************************************************************/
/****************************************************************************
* Public Data
****************************************************************************/
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: usart0_reset and usart1_reset
*
* Description:
* Reset USART0 or USART1.
*
****************************************************************************/
#ifdef CONFIG_BM3803_UART1
void uart1_reset(void)
{
/* Clear USART configuration */
uart1_disable();
uart1_parity_config(NONE);
uart1_flow_ctrl_config(OFF);
uart1_loopback_config(OFF);
}
#endif
#ifdef CONFIG_BM3803_UART2
void uart2_reset(void)
{
/* Clear USART configuration */
uart2_disable();
uart2_parity_config(NONE);
uart2_flow_ctrl_config(OFF);
uart2_loopback_config(OFF);
}
#endif
#ifdef CONFIG_BM3803_UART3
void uart3_reset(void)
{
/* Clear USART configuration */
uart3_disable();
uart3_parity_config(NONE);
uart3_flow_ctrl_config(OFF);
uart3_loopback_config(OFF);
}
#endif
/****************************************************************************
* Name: bm3803_uartconfigure
*
* Description:
* Configure a UART as a console.
*
****************************************************************************/
#ifdef HAVE_UART_DEVICE
void bm3803_uartconfigure(uintptr_t uart_base, uint32_t baudrate,
unsigned int parity, unsigned int nbits,
bool stop2)
{
if (uart_base == BM3803_UART1_BASE)
{
/* Select baud. */
uart1_set_baudrate(baudrate);
/* Select parity */
if (parity == 1)
{
uart1_parity_config(ODD); /* Odd parity */
}
else if (parity == 2)
{
uart1_parity_config(EVEN); /* Even parity */
}
else
{
uart1_parity_config(NONE); /* Even none */
}
uart1_flow_ctrl_config(OFF);
uart1_loopback_config(OFF);
uart1_enable();
}
else if (uart_base == BM3803_UART2_BASE)
{
/* Select baud. */
uart2_set_baudrate(baudrate);
/* Select parity */
if (parity == 1)
{
uart2_parity_config(ODD); /* Odd parity */
}
else if (parity == 2)
{
uart2_parity_config(EVEN); /* Even parity */
}
else
{
uart2_parity_config(NONE); /* Even none */
}
uart2_flow_ctrl_config(OFF);
uart2_loopback_config(OFF);
uart2_enable();
}
else
{
return;
}
}
#endif
#ifdef CONFIG_BM3803_UART1
void uart1_configure(void)
{
/* Select baud. */
uart1_set_baudrate(CONFIG_UART1_BAUD);
/* Select parity */
#if CONFIG_UART1_PARITY == 1
uart1_parity_config(ODD); /* Odd parity */
#elif CONFIG_UART1_PARITY == 2
uart1_parity_config(EVEN); /* Even parity */
#else
uart1_parity_config(NONE); /* Even none */
#endif
uart1_flow_ctrl_config(OFF);
uart1_loopback_config(OFF);
uart1_enable();
}
#endif
#ifdef CONFIG_BM3803_UART2
void uart2_configure(void)
{
/* Select baud. */
uart2_set_baudrate(CONFIG_UART2_BAUD);
/* Select parity */
#if CONFIG_UART2_PARITY == 1
uart2_parity_config(ODD); /* Odd parity */
#elif CONFIG_UART2_PARITY == 2
uart2_parity_config(EVEN); /* Even parity */
#else
uart2_parity_config(NONE); /* Even none */
#endif
uart2_flow_ctrl_config(OFF);
uart2_loopback_config(OFF);
uart2_enable();
}
#endif
#ifdef CONFIG_BM3803_UART3
void uart3_configure(void)
{
/* Select baud. */
uart3_set_baudrate(CONFIG_UART3_BAUD);
/* Select parity */
#if CONFIG_UART3_PARITY == 1
uart2_parity_config(ODD); /* Odd parity */
#elif CONFIG_UART3_PARITY == 2
uart3_parity_config(EVEN); /* Even parity */
#else
uart3_parity_config(NONE); /* Even none */
#endif
uart3_flow_ctrl_config(OFF);
uart3_loopback_config(OFF);
uart3_enable();
}
#endif
/****************************************************************************
* Name: up_consoleinit
*
* Description:
* Initialize a console for debug output. This function is called very
* early in the initialization sequence to configure the serial console
* uart
* (only).
*
****************************************************************************/
void up_consoleinit(void)
{
#ifdef HAVE_SERIAL_CONSOLE
#if defined(CONFIG_UART1_SERIAL_CONSOLE)
uart1_configure();
#elif defined(CONFIG_UART2_SERIAL_CONSOLE)
uart2_configure();
#elif defined(CONFIG_UART3_SERIAL_CONSOLE)
uart3_configure();
#endif
#endif
}
/****************************************************************************
* Name: up_lowputc
*
* Description:
* Output one byte on the serial console
*
****************************************************************************/
void up_lowputc(char ch)
{
#ifdef HAVE_SERIAL_CONSOLE
#if defined(CONFIG_UART1_SERIAL_CONSOLE)
while (!uart1_tx_ready())
{
}
uart1_send_byte(ch);
#elif defined(CONFIG_UART2_SERIAL_CONSOLE)
while (!uart2_tx_ready())
{
}
uart2_send_byte(ch);
#elif defined(CONFIG_UART3_SERIAL_CONSOLE)
while (!uart3_tx_ready())
{
}
uart3_send_byte(ch);
#endif
#endif
}
arch/sparc/src/bm3803/bm3803-lowinit.c
+119
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@@ -0,0 +1,119 @@
/****************************************************************************
* arch/sparc/src/bm3803/bm3803-lowinit.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include "bm3803-config.h"
#include "up_internal.h"
#include "bm3803.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Private Types
****************************************************************************/
/****************************************************************************
* Private Function Prototypes
****************************************************************************/
/****************************************************************************
* Public Data
****************************************************************************/
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: showprogress
*
* Description:
* Print a character on the UART to show boot status.
*
****************************************************************************/
#ifdef CONFIG_DEBUG_FEATURES
# define showprogress(c) up_lowputc(c)
#else
# define showprogress(c)
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: up_lowinit
*
* Description:
* This performs basic initialization of the USART used for the serial
* console. Its purpose is to get the console output available as soon
* as possible.
*
****************************************************************************/
void up_lowinit(void)
{
uint32_t *dest;
/* Initialize a console (probably a serial console) */
up_consoleinit();
showprogress('A');
/* Clear .bss. We'll do this inline (vs. calling memset) just to be
* certain that there are no issues with the state of global variables.
*/
for (dest = &_bss_start; dest < &_end; )
{
*dest++ = 0;
}
showprogress('B');
/* Perform early serial initialization (so that we will have debug output
* available as soon as possible).
*/
#ifdef USE_EARLYSERIALINIT
up_earlyserialinit();
#endif
/* Perform board-level initialization */
bm3803_boardinitialize();
/* Then start NuttX */
showprogress('\r');
showprogress('\n');
}
arch/sparc/src/bm3803/bm3803-memorymap.h
+41
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@@ -0,0 +1,41 @@
/****************************************************************************
* arch/sparc/src/bm3803/bm3803-memorymap.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __ARCH_SPARC_SRC_BM3803_BM3803_MEMORYMAP_H
#define __ARCH_SPARC_SRC_BM3803_BM3803_MEMORYMAP_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
# define BM3803_REG_BASE 0x80000000
/* UART 1-3 Register Base Addresses */
# define BM3803_UART1_BASE (BM3803_REG_BASE + 0x70)
# define BM3803_UART2_BASE (BM3803_REG_BASE + 0x80)
# define BM3803_UART3_BASE (BM3803_REG_BASE + 0xE0)
#endif /* __ARCH_SPARC_SRC_BM3803_BM3803_MEMORYMAP_H */
arch/sparc/src/bm3803/bm3803-serial.c
+955
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arch/sparc/src/bm3803/bm3803-timerisr.c
+138
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@@ -0,0 +1,138 @@
/****************************************************************************
* arch/sparc/src/bm3803/bm3803-timerisr.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <time.h>
#include <debug.h>
#include <nuttx/arch.h>
#include <arch/board/board.h>
#include "up_internal.h"
#include "up_arch.h"
#include "bm3803.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* The CPU frequency is given by BOARD_CPU_CLOCK (defined in board.h). The
* desired interrupt frequency is given by CONFIG_USEC_PER_TICK. An unscaled
* ideal match is given by:
*
* CLOCK = CPU_CLOCK / DIVISOR # CPU clocks/sec
* MATCH = CLOCK / CLOCKS_PER_SEC # CPU clocks/timer tick
* MATCH = CPU_CLOCK / DIVISOR / CLOCKS_PER_SEC # CPU clocks/timer tick
*
* But we only have 16-bits of accuracy so we need to pick the smallest
* divisor using the following brute force calculation:
*/
#define BM3803_TIMER_CLOCK 1000000
#define MATCH1 (( 1000000 / CLOCKS_PER_SEC) - 1)
/* Bit 0: enables the timer when set */
#define TIMCTR_ENABLE_COUNTER (1 << 0)
/* Bit 1: automatically reloaded with the reload value after each underflow */
#define TIMCTR_AUTO_RELOAD (1 << 1)
/* Bit 2: Set 1, will load the timer reload register into the timer counter
* register
*/
#define TIMCTR_LOAD_COUNTER (1 << 2)
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Function: bm3803_timerisr
*
* Description:
* The timer ISR will perform a variety of services for various portions
* of the systems.
*
****************************************************************************/
static int bm3803_timerisr(int irq, uint32_t *regs, FAR void *arg)
{
/* Clear the pending timer interrupt */
up_clrpend_irq(BM3803_IRQ_TIMER1);
/* Process timer interrupt */
nxsched_process_timer();
return 0;
}
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Function: up_timer_initialize
*
* Description:
* This function is called during start-up to initialize the timer
* interrupt. NOTE: This function depends on setup of OSC32 by
* up_clkinitialize().
*
****************************************************************************/
void up_timer_initialize(void)
{
BM3803_REG.scaler_load = (BOARD_CPU_CLOCK / BM3803_TIMER_CLOCK) - 1;
BM3803_REG.scaler_cnt = (BOARD_CPU_CLOCK / BM3803_TIMER_CLOCK) - 1;
/* Setup timer 1 compare match A to generate a tick interrupt.
*
* First, setup the match value for compare match A.
*/
BM3803_REG.timer_cnt1 = (uint32_t)MATCH1;
BM3803_REG.timer_load1 = (uint32_t)MATCH1;
BM3803_REG.timer_ctrl1 = (TIMCTR_ENABLE_COUNTER | TIMCTR_AUTO_RELOAD |
TIMCTR_LOAD_COUNTER);
/* Configure the timer interrupt */
up_clrpend_irq(BM3803_IRQ_TIMER1);
#ifdef CONFIG_ARCH_IRQPRIO
(void)up_prioritize_irq(BM3803_IRQ_TIMER1, CONFIG_BM3803_TIMER1PRIO);
#endif
/* Attach the timer interrupt vector */
(void)irq_attach(BM3803_IRQ_TIMER1, (xcpt_t)bm3803_timerisr, NULL);
/* And enable the timer interrupt */
up_enable_irq(BM3803_IRQ_TIMER1);
}
arch/sparc/src/bm3803/bm3803-uart.h
+235
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@@ -0,0 +1,235 @@
/****************************************************************************
* arch/sparc/src/bm3803/bm3803-uart.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __ARCH_SPARC_SRC_BM3803_BM3803_UART_H
#define __ARCH_SPARC_SRC_BM3803_BM3803_UART_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include "chip.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Register Offsets *************************************************^*******/
#define BM3803_UART_TXREG_OFFSET 0x0000 /* UARTx transmit register */
#define BM3803_UART_RXREG_OFFSET 0x0000 /* UARTx receive register */
#define BM3803_UART_STATREG_OFFSET 0x0004 /* UARTx status register */
#define BM3803_UART_CTRLREG_OFFSET 0x0008 /* UARTx control register */
#define BM3803_UART_SCALREG_OFFSET 0x000c /* UARTx scaler register */
/* Register Addresses *******************************************************/
#if CHIP_NUARTS > 0
#define BM3803_UART1_TXREG (BM3803_UART1_BASE+BM3803_UART_TXREG_OFFSET)
#define BM3803_UART1_RXREG (BM3803_UART1_BASE+BM3803_UART_RXREG_OFFSET)
#define BM3803_UART1_STATREG (BM3803_UART1_BASE+BM3803_UART_STATREG_OFFSET)
#define BM3803_UART1_CTRLREG (BM3803_UART1_BASE+BM3803_UART_CTRLREG_OFFSET)
#define BM3803_UART1_SCALREG (BM3803_UART1_BASE+BM3803_UART_SCALREG_OFFSET)
#endif
#if CHIP_NUARTS > 1
#define BM3803_UART2_TXREG (BM3803_UART2_BASE+BM3803_UART_TXREG_OFFSET)
#define BM3803_UART2_RXREG (BM3803_UART2_BASE+BM3803_UART_RXREG_OFFSET)
#define BM3803_UART2_STATREG (BM3803_UART2_BASE+BM3803_UART_STATREG_OFFSET)
#define BM3803_UART2_CTRLREG (BM3803_UART2_BASE+BM3803_UART_CTRLREG_OFFSET)
#define BM3803_UART2_SCALREG (BM3803_UART2_BASE+BM3803_UART_SCALREG_OFFSET)
#endif
#if CHIP_NUARTS > 2
#define BM3803_UART3_TXREG (BM3803_UART3_BASE+BM3803_UART_TXREG_OFFSET)
#define BM3803_UART3_RXREG (BM3803_UART3_BASE+BM3803_UART_RXREG_OFFSET)
#define BM3803_UART3_STATREG (BM3803_UART3_BASE+BM3803_UART_STATREG_OFFSET)
#define BM3803_UART3_CTRLREG (BM3803_UART3_BASE+BM3803_UART_CTRLREG_OFFSET)
#define BM3803_UART3_SCALREG (BM3803_UART3_BASE+BM3803_UART_SCALREG_OFFSET)
#endif
/* Register Bit-Field Definitions *******************************************/
#define ODD 1
#define EVEN 0
#define ON 1
#define OFF 0
#define NONE 2
#define RX 0
#define TX 1
#define RXTX 3
/** Uart control list - Mask */
#define MSK_UART_ENABLE_RX 0x01
#define MSK_UART_ENABLE_TX 0x02
#define MSK_UART_ENABLE_RXIT 0x04
#define MSK_UART_ENABLE_TXIT 0x08
#define MSK_UART_ENABLE_PAR 0x20
#define MSK_UART_PAR 0x10
#define MSK_UART_ENABLE_FLOW 0x40
#define MSK_UART_LOOPBACK 0x80
#define MSK_UART_CLOCK 0x100
#define MSK_UART_ALLINTS 0x0C
#define MSK_UART_DATA_READY 0x01
#define MSK_UART_TXS_READY 0x02
#define MSK_UART_TXH_READY 0x04
#define MSK_UART_BREAK 0x08
#define MSK_UART_OVERRUN 0x10
#define MSK_UART_PAR_ERR 0x20
#define MSK_UART_FRAME_ERR 0x40
/* UARTx transmit register */
#define UART_TXREG_MASK 0xff
/* UARTx receive register */
#define UART_RXREG_MASK 0xff
/* UARTx baud rate register */
#define UART_BRG_MASK 0xfff
#define uart1_set_baudrate(baudrate) (BM3803_REG.uart_scaler1 = (uint32_t)((((BOARD_CPU_CLOCK*10)/(baudrate * 8))-5)/10))
#define uart1_parity_config(uart_parity) ( uart_parity == ODD \
? (BM3803_REG.uart_ctrl1 = ((BM3803_REG.uart_ctrl1 | MSK_UART_PAR) | MSK_UART_ENABLE_PAR)) \
: ( uart_parity == EVEN \
? (BM3803_REG.uart_ctrl1 = ((BM3803_REG.uart_ctrl1 & ~MSK_UART_PAR) | MSK_UART_ENABLE_PAR)) \
: (BM3803_REG.uart_ctrl1 &= ~MSK_UART_ENABLE_PAR ) \
) \
)
#define Uart_interrupt_config(uart_its) ( uart_its == RXTX \
? (UART_CONTROL |= (MSK_UART_ENABLE_RXIT | MSK_UART_ENABLE_TXIT))\
: ( uart_its == RX \
? (UART_CONTROL |= (MSK_UART_ENABLE_RXIT & ~MSK_UART_ENABLE_TXIT))\
: ( uart_its == TX \
? (UART_CONTROL |= (MSK_UART_ENABLE_TXIT & ~MSK_UART_ENABLE_RXIT))\
: (UART_CONTROL &= ~(MSK_UART_ENABLE_RXIT | MSK_UART_ENABLE_TXIT))\
) \
) \
)
#define uart1_flow_ctrl_config(uart_flow) ( uart_flow == ON \
? (BM3803_REG.uart_ctrl1 |= MSK_UART_ENABLE_FLOW) \
: (BM3803_REG.uart_ctrl1 &= ~MSK_UART_ENABLE_FLOW) \
)
#define uart1_loopback_config(uart_loopb) ( uart_loopb == ON \
? (BM3803_REG.uart_ctrl1 |= MSK_UART_LOOPBACK) \
: (BM3803_REG.uart_ctrl1 &= ~MSK_UART_LOOPBACK) \
)
#define uart1_enable() (BM3803_REG.uart_ctrl1 |= (MSK_UART_ENABLE_RX | MSK_UART_ENABLE_TX))
#define uart1_disable() (BM3803_REG.uart_ctrl1 &= ~(MSK_UART_ENABLE_RX | MSK_UART_ENABLE_TX))
#define uart1_tx_ready() ((BM3803_REG.uart_status1 & MSK_UART_TXH_READY) == MSK_UART_TXH_READY )
#define uart1_rx_ready() ((BM3803_REG.uart_status1 & MSK_UART_DATA_READY) == MSK_UART_DATA_READY)
#define uart1_send_byte(ch) (BM3803_REG.uart_data1 = ch)
#define uart2_set_baudrate(baudrate) (BM3803_REG.uart_scaler2 = (((BOARD_CPU_CLOCK*10)/(baudrate*8))-5)/10)
#define uart2_parity_config(uart_parity) ( uart_parity == ODD \
? (BM3803_REG.uart_ctrl2 = ((BM3803_REG.uart_ctrl2 | MSK_UART_PAR) | MSK_UART_ENABLE_PAR)) \
: ( uart_parity == EVEN \
? (BM3803_REG.uart_ctrl2 = ((BM3803_REG.uart_ctrl2 & ~MSK_UART_PAR) | MSK_UART_ENABLE_PAR)) \
: (BM3803_REG.uart_ctrl2 &= ~MSK_UART_ENABLE_PAR ) \
) \
)
#define uart2_flow_ctrl_config(uart_flow) ( uart_flow == ON \
? (BM3803_REG.uart_ctrl2 |= MSK_UART_ENABLE_FLOW) \
: (BM3803_REG.uart_ctrl2 &= ~MSK_UART_ENABLE_FLOW) \
)
#define uart2_loopback_config(uart_loopb) ( uart_loopb == ON \
? (BM3803_REG.uart_ctrl2 |= MSK_UART_LOOPBACK) \
: (BM3803_REG.uart_ctrl2 &= ~MSK_UART_LOOPBACK) \
)
#define uart2_enable() (BM3803_REG.uart_ctrl2 |= (MSK_UART_ENABLE_RX | MSK_UART_ENABLE_TX))
#define uart2_disable() (BM3803_REG.uart_ctrl2 &= ~(MSK_UART_ENABLE_RX | MSK_UART_ENABLE_TX))
#define uart2_tx_ready() ((BM3803_REG.uart_status2 & MSK_UART_TXH_READY) == MSK_UART_TXH_READY )
#define uart2_rx_ready() ((BM3803_REG.uart_status2 & MSK_UART_DATA_READY) == MSK_UART_DATA_READY)
#define uart2_send_byte(ch) (BM3803_REG.uart_data2 = ch)
#define uart3_set_baudrate(baudrate) (BM3803_REG.uart_scaler3 = (((BOARD_CPU_CLOCK*10)/(baudrate*8))-5)/10)
#define uart3_parity_config(uart_parity) ( uart_parity == ODD \
? (BM3803_REG.uart_ctrl3 = ((BM3803_REG.uart_ctrl3 | MSK_UART_PAR) | MSK_UART_ENABLE_PAR)) \
: ( uart_parity == EVEN \
? (BM3803_REG.uart_ctrl3 = ((BM3803_REG.uart_ctrl3 & ~MSK_UART_PAR) | MSK_UART_ENABLE_PAR)) \
: (BM3803_REG.uart_ctrl3 &= ~MSK_UART_ENABLE_PAR ) \
) \
)
#define uart3_flow_ctrl_config(uart_flow) ( uart_flow == ON \
? (BM3803_REG.uart_ctrl3 |= MSK_UART_ENABLE_FLOW) \
: (BM3803_REG.uart_ctrl3 &= ~MSK_UART_ENABLE_FLOW) \
)
#define uart3_loopback_config(uart_loopb) ( uart_loopb == ON \
? (BM3803_REG.uart_ctrl3 |= MSK_UART_LOOPBACK) \
: (BM3803_REG.uart_ctrl3 &= ~MSK_UART_LOOPBACK) \
)
#define uart3_enable() (BM3803_REG.uart_ctrl3 |= (MSK_UART_ENABLE_RX | MSK_UART_ENABLE_TX))
#define uart3_disable() (BM3803_REG.uart_ctrl3 &= ~(MSK_UART_ENABLE_RX | MSK_UART_ENABLE_TX))
#define uart3_tx_ready() ((BM3803_REG.uart_status3 & MSK_UART_TXH_READY) == MSK_UART_TXH_READY )
#define uart3_rx_ready() ((BM3803_REG.uart_status3 & MSK_UART_DATA_READY) == MSK_UART_DATA_READY)
#define uart3_send_byte(ch) (BM3803_REG.uart_data3 = ch)
/****************************************************************************
* Public Types
****************************************************************************/
#ifndef __ASSEMBLY__
/****************************************************************************
* Inline Functions
****************************************************************************/
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
#ifdef __cplusplus
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
#undef EXTERN
#ifdef __cplusplus
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_SPARC_SRC_BM3803_BM3803_UART_H */
arch/sparc/src/bm3803/bm3803.h
+584
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arch/sparc/src/bm3803/bm3803_exceptions.S
+432
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@@ -0,0 +1,432 @@
/****************************************************************************
* arch/sparc/src/sparc_v8/up_exceptions.S
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <arch/irq.h>
/****************************************************************************
* External Symbols
****************************************************************************/
.global _ISR_Handler
.global up_doirq /* Dispatch an IRQ */
/*
* void _ISR_Handler()
*
* This routine provides the RTEMS interrupt management.
*
* We enter this handler from the 4 instructions in the trap table with
* the following registers assumed to be set as shown:
*
* l0 = PSR
* l1 = PC
* l2 = nPC
* l3 = trap type
*
* NOTE: By an executive defined convention, trap type is between 0 and 255 if
* it is an asynchonous trap and 256 and 511 if it is synchronous.
*/
.align 4
_ISR_Handler:
/*
* Fix the return address for synchronous traps.
*/
and %l3, 0xF0, %l6
cmp %l6, 0x10 ! Is this a synchronous trap?
be,a win_ovflow ! No, then skip the adjustment
nop ! DELAY
mov %l2, %l1 ! do not return to the instruction
add %l2, 4, %l2 ! indicated
win_ovflow:
/*
* Save the globals this block uses.
*
* These registers are not restored from the locals. Their contents
* are saved directly from the locals into the ISF below.
*/
mov %g4, %l4 ! save the globals this block uses
mov %g5, %l5
/*
* When at a "window overflow" trap, (wim == (1 << cwp)).
* If we get here like that, then process a window overflow.
*/
rd %wim, %g4
srl %g4, %l0, %g5 ! g5 = win >> cwp ; shift count and CWP
! are LS 5 bits ; how convenient :)
cmp %g5, 1 ! Is this an invalid window?
bne dont_do_the_window ! No, then skip all this stuff
nop
! we are using the delay slot
/*
* The following is same as a 1 position right rotate of WIM
*/
srl %g4, 1, %g5 ! g5 = WIM >> 1
sll %g4, SPARC_NUMBER_OF_REGISTER_WINDOWS-1 , %g4
! g4 = WIM << (Number Windows - 1)
or %g4, %g5, %g4 ! g4 = (WIM >> 1) |
! (WIM << (Number Windows - 1))
/*
* At this point:
*
* g4 = the new WIM
* g5 is free
*/
/*
* Since we are tinkering with the register windows, we need to
* make sure that all the required information is in global registers.
*/
save ! Save into the window
wr %g4, 0, %wim ! WIM = new WIM
nop ! delay slots
nop
nop
/*
* Now save the window just as if we overflowed to it.
*/
SAVE_WINDOW:
std %l0, [%sp + CPU_STACK_FRAME_L0_OFFSET]
std %l2, [%sp + CPU_STACK_FRAME_L2_OFFSET]
std %l4, [%sp + CPU_STACK_FRAME_L4_OFFSET]
std %l6, [%sp + CPU_STACK_FRAME_L6_OFFSET]
std %i0, [%sp + CPU_STACK_FRAME_I0_OFFSET]
std %i2, [%sp + CPU_STACK_FRAME_I2_OFFSET]
std %i4, [%sp + CPU_STACK_FRAME_I4_OFFSET]
std %i6, [%sp + CPU_STACK_FRAME_I6_FP_OFFSET]
restore
nop
dont_do_the_window:
/*
* Global registers %g4 and %g5 are saved directly from %l4 and
* %l5 directly into the ISF below.
*/
save_isf:
/*
* Save the state of the interrupted task -- especially the global
* registers -- in the Interrupt Stack Frame. Note that the ISF
* includes a regular minimum stack frame which will be used if
* needed by register window overflow and underflow handlers.
*
* REGISTERS SAME AS AT _ISR_Handler
*/
sub %fp, CONTEXT_CONTROL_INTERRUPT_FRAME_SIZE, %sp
! make space for ISF
std %l0, [%sp + ISF_PSR_OFFSET] ! save psr, PC
st %l2, [%sp + ISF_NPC_OFFSET] ! save nPC
st %g1, [%sp + ISF_G1_OFFSET] ! save g1
std %g2, [%sp + ISF_G2_OFFSET] ! save g2, g3
std %l4, [%sp + ISF_G4_OFFSET] ! save g4, g5 -- see above
std %g6, [%sp + ISF_G6_OFFSET] ! save g6, g7
std %i0, [%sp + ISF_I0_OFFSET] ! save i0, i1
std %i2, [%sp + ISF_I2_OFFSET] ! save i2, i3
std %i4, [%sp + ISF_I4_OFFSET] ! save i4, i5
std %i6, [%sp + ISF_I6_FP_OFFSET] ! save i6/fp, i7
rd %y, %g1
st %g1, [%sp + ISF_Y_OFFSET] ! save y
mov %sp, %o1 ! 2nd arg to ISR Handler
st %fsr, [%sp + ISF_FSR_OFFSET]
std %f0, [%sp + ISF_F0_OFFSET]
std %f2, [%sp + ISF_F2_OFFSET]
std %f4, [%sp + ISF_F4_OFFSET]
std %f6, [%sp + ISF_F6_OFFSET]
std %f8, [%sp + ISF_F8_OFFSET]
std %f10, [%sp + ISF_F10_OFFSET]
std %f12, [%sp + ISF_F12_OFFSET]
std %f14, [%sp + ISF_F14_OFFSET]
std %f16, [%sp + ISF_F16_OFFSET]
std %f18, [%sp + ISF_F18_OFFSET]
std %f20, [%sp + ISF_F20_OFFSET]
std %f22, [%sp + ISF_F22_OFFSET]
std %f24, [%sp + ISF_F24_OFFSET]
std %f26, [%sp + ISF_F26_OFFSET]
std %f28, [%sp + ISF_F28_OFFSET]
std %f30, [%sp + ISF_F30_OFFSET] ! total 32 word
fix_pil:
mov %l0, %g5
or %g5, SPARC_PSR_PIL_MASK, %g5 /* 0x00000F00 */
wr %g5, SPARC_PSR_ET_MASK, %psr ! **** ENABLE TRAPS **** /* 0x00000020 */
nop
nop
nop
/*==========================================================================*/
! o1 = 2nd arg = address of the ISF
! WAS LOADED WHEN ISF WAS SAVED!!!
mov %l3, %o0 ! o0 = 1st arg = vector number
call up_doirq /* call ISR dispatcher */
nop
/*==========================================================================*/
mov %l0, %psr ! **** DISABLE TRAPS ****
nop;
nop;
nop;
/* If a context switch occurred while processing the interrupt then
* %o0 may have change value. If we return any value different
* from the input regs %o1, then the lower level will know that a context
* switch occurred during interrupt processing.
*/
mov %o0, %g6 ! g6 = %o0
cmp %g6, %sp ! Is this a context switch occurred?
be,a simple_return ! No, then skip the window save
nop ! DELAY
/*
* Flush all windows with valid contents except the current one.
* In examining the set register windows, one may logically divide
* the windows into sets (some of which may be empty) based on their
* current status:
*
* + current (i.e. in use),
* + used (i.e. a restore would not trap)
* + invalid (i.e. 1 in corresponding bit in WIM)
* + unused
*
* Either the used or unused set of windows may be empty.
*
* NOTE: We assume only one bit is set in the WIM at a time.
*
* Given a CWP of 5 and a WIM of 0x1, the registers are divided
* into sets as follows:
*
* + 0 - invalid
* + 1-4 - unused
* + 5 - current
* + 6-7 - used
*
* In this case, we only would save the used windows -- 6 and 7.
*
* Traps are disabled for the same logical period as in a
* flush all windows trap handler.
*
* Register Usage while saving the windows:
* g1 = current PSR
* g2 = current wim
* g3 = CWP
* g4 = wim scratch
* g5 = scratch
*/
and %l0, SPARC_PSR_CWP_MASK, %g3 ! g3 = CWP
andn %l0, SPARC_PSR_ET_MASK, %g1 ! g1 = psr with traps disabled
! mov %g1, %psr ! **** DISABLE TRAPS ****
mov %wim, %g2 ! g2 = wim
mov 1, %g4
sll %g4, %g3, %g4 ! g4 = WIM mask for CW invalid
save_frame_loop:
sll %g4, 1, %g5 ! rotate the "wim" left 1
srl %g4, SPARC_NUMBER_OF_REGISTER_WINDOWS - 1, %g4
or %g4, %g5, %g4 ! g4 = wim if we do one restore
/*
* If a restore would not underflow, then continue.
*/
andcc %g4, %g2, %g0 ! Any windows to flush?
bnz done_flushing ! No, then continue
nop
restore ! back one window
/*
* Now save the window just as if we overflowed to it.
*/
std %l0, [%sp + CPU_STACK_FRAME_L0_OFFSET]
std %l2, [%sp + CPU_STACK_FRAME_L2_OFFSET]
std %l4, [%sp + CPU_STACK_FRAME_L4_OFFSET]
std %l6, [%sp + CPU_STACK_FRAME_L6_OFFSET]
std %i0, [%sp + CPU_STACK_FRAME_I0_OFFSET]
std %i2, [%sp + CPU_STACK_FRAME_I2_OFFSET]
std %i4, [%sp + CPU_STACK_FRAME_I4_OFFSET]
std %i6, [%sp + CPU_STACK_FRAME_I6_FP_OFFSET]
ba save_frame_loop
nop
done_flushing:
! Wait three instructions after the write to PSR before using
! non-global registers or instructions affecting the CWP
! g1 = psr with traps disabled
! g3 = CWP (interrupt regs window)
mov %g1, %psr ! restore cwp
add %g3, 1, %g2 ! calculate desired WIM
and %g2, SPARC_NUMBER_OF_REGISTER_WINDOWS - 1, %g2
mov 1, %g4
sll %g4, %g2, %g4 ! g4 = new WIM
mov %g4, %wim
mov %g6, %o0 ! %o0 = sp of context switch to
simple_return:
ldd [%o0 + ISF_I6_FP_OFFSET], %i6 ! restore i6/fp, i7
sub %fp, CONTEXT_CONTROL_INTERRUPT_FRAME_SIZE, %sp
ld [%o0 + ISF_Y_OFFSET], %l5 ! restore y
wr %l5, 0, %y
ldd [%o0 + ISF_PSR_OFFSET], %l0 ! restore psr, PC
ld [%o0 + ISF_NPC_OFFSET], %l2 ! restore nPC
rd %psr, %l3
and %l3, SPARC_PSR_CWP_MASK, %l3 ! want "current" CWP
andn %l0, SPARC_PSR_CWP_MASK, %l0 ! want rest from task
or %l3, %l0, %l0 ! install it later...
andn %l0, SPARC_PSR_ET_MASK, %l0 ! **** DISABLE TRAPS ****
/*
* Restore tasks global and out registers
*/
ld [%o0 + ISF_G1_OFFSET], %g1 ! restore g1 ! g1 is restored later
ldd [%o0 + ISF_G2_OFFSET], %g2 ! restore g2, g3
ldd [%o0 + ISF_G4_OFFSET], %g4 ! restore g4, g5
ldd [%o0 + ISF_G6_OFFSET], %g6 ! restore g6, g7
ldd [%o0 + ISF_I0_OFFSET], %i0 ! restore i0, i1
ldd [%o0 + ISF_I2_OFFSET], %i2 ! restore i2, i3
ldd [%o0 + ISF_I4_OFFSET], %i4 ! restore i4, i5
ldd [%o0 + ISF_F0_OFFSET] ,%f0
ldd [%o0 + ISF_F2_OFFSET] ,%f2
ldd [%o0 + ISF_F4_OFFSET] ,%f4
ldd [%o0 + ISF_F6_OFFSET] ,%f6
ldd [%o0 + ISF_F8_OFFSET] ,%f8
ldd [%o0 + ISF_F10_OFFSET],%f10
ldd [%o0 + ISF_F12_OFFSET],%f12
ldd [%o0 + ISF_F14_OFFSET],%f14
ldd [%o0 + ISF_F16_OFFSET],%f16
ldd [%o0 + ISF_F18_OFFSET],%f18
ldd [%o0 + ISF_F20_OFFSET],%f20
ldd [%o0 + ISF_F22_OFFSET],%f22
ldd [%o0 + ISF_F24_OFFSET],%f24
ldd [%o0 + ISF_F26_OFFSET],%f26
ldd [%o0 + ISF_F28_OFFSET],%f28
ldd [%o0 + ISF_F30_OFFSET],%f30
ld [%o0 + ISF_FSR_OFFSET],%fsr
nop
nop
nop
/*
* Registers:
*
* ALL global registers EXCEPT G1 and the input registers have
* already been restored and thuse off limits.
*
* The following is the contents of the local registers:
*
* %l0 = original psr
* %l1 = return address (i.e. PC)
* %l2 = nPC
* %l3 = %tbr
*/
/*
* if (CWP + 1) is an invalid window then we need to reload it.
*
* WARNING: Traps should now be disabled
*/
mov %l0, %psr ! **** DISABLE TRAPS ****
nop
nop
nop
rd %wim, %l4
add %l0, 1, %l6 ! l6 = cwp + 1
and %l6, SPARC_PSR_CWP_MASK, %l6 ! do the modulo on it
srl %l4, %l6, %l5 ! l5 = win >> cwp + 1 ; shift count
! and CWP are conveniently LS 5 bits
cmp %l5, 1 ! Is tasks window invalid?
bne good_task_window
/*
* The following code is the same as a 1 position left rotate of WIM.
*/
sll %l4, 1, %l5 ! l5 = WIM << 1
srl %l4, SPARC_NUMBER_OF_REGISTER_WINDOWS-1 , %l4
! l4 = WIM >> (Number Windows - 1)
or %l4, %l5, %l4 ! l4 = (WIM << 1) |
! (WIM >> (Number Windows - 1))
/*
* Now restore the window just as if we underflowed to it.
*/
wr %l4, 0, %wim ! WIM = new WIM
nop ! must delay after writing WIM
nop
nop
restore ! now into the tasks window
ldd [%sp + CPU_STACK_FRAME_L0_OFFSET], %l0
ldd [%sp + CPU_STACK_FRAME_L2_OFFSET], %l2
ldd [%sp + CPU_STACK_FRAME_L4_OFFSET], %l4
ldd [%sp + CPU_STACK_FRAME_L6_OFFSET], %l6
ldd [%sp + CPU_STACK_FRAME_I0_OFFSET], %i0
ldd [%sp + CPU_STACK_FRAME_I2_OFFSET], %i2
ldd [%sp + CPU_STACK_FRAME_I4_OFFSET], %i4
ldd [%sp + CPU_STACK_FRAME_I6_FP_OFFSET],%i6
! reload of sp clobbers ISF
save ! Back to ISR dispatch window
good_task_window:
mov %l0, %psr ! **** DISABLE TRAPS ****
nop;
nop;
nop
! and restore condition codes.
jmp %l1 ! transfer control and
rett %l2 ! go back to tasks window
nop
/* isr end */
/* trap handler end*/
arch/sparc/src/bm3803/bm3803_exti.h
+82
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@@ -0,0 +1,82 @@
/****************************************************************************
* arch/sparc/src/bm3803/bm3803_exti.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __ARCH_SPARC_SRC_BM3803_BM3803_EXTI_H
#define __ARCH_SPARC_SRC_BM3803_BM3803_EXTI_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/irq.h>
#include "chip.h"
/****************************************************************************
* Public Data
****************************************************************************/
#ifndef __ASSEMBLY__
#undef EXTERN
#if defined(__cplusplus)
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
/****************************************************************************
* Name: bm3803_gpioset_irq
*
* Description:
* Sets/clears GPIO based event and interrupt triggers.
*
* Input Parameters:
* - pinset: GPIO pin configuration
* - enable: Enables interrupt or not
* - trig: Trig interrupt on level or falling edges
* - edge: Trig interrupt on falling edges or rising edges
* - func: When non-NULL, generate interrupt
* - arg: Argument passed to the interrupt callback
*
* Returned Value:
* Zero (OK) on success; a negated errno value on failure indicating the
* nature of the failure.
*
****************************************************************************/
int bm3803_gpioset_irq(uint32_t pinset, bool enable, bool trig, bool edge,
xcpt_t func, void *arg);
#undef EXTERN
#if defined(__cplusplus)
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_SPARC_SRC_BM3803_BM3803_EXTI_H */
arch/sparc/src/bm3803/bm3803_exti_gpio.c
+270
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@@ -0,0 +1,270 @@
/****************************************************************************
* arch/sparc/src/bm3803/bm3803_exti_gpio.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include <stdint.h>
#include <stdbool.h>
#include <errno.h>
#include <debug.h>
#include <arch/irq.h>
#include "up_internal.h"
#include "up_arch.h"
#include "chip.h"
#include "bm3803.h"
/****************************************************************************
* Private Types
****************************************************************************/
struct gpio_callback_s
{
xcpt_t callback;
void *arg;
};
/****************************************************************************
* Private Data
****************************************************************************/
/* Interrupt handlers attached to each EXTI */
static struct gpio_callback_s g_gpio_callbacks[4];
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Interrupt Service Routines - Dispatchers
****************************************************************************/
static int bm3803_exti0_isr(int irq, void *context, void *arg)
{
int ret = OK;
/* Clear the pending interrupt */
up_clrpend_irq(BM3803_IRQ_EXTERNAL_0);
/* And dispatch the interrupt to the handler */
if (g_gpio_callbacks[0].callback != NULL)
{
xcpt_t callback = g_gpio_callbacks[0].callback;
void *cbarg = g_gpio_callbacks[0].arg;
ret = callback(irq, context, cbarg);
}
return ret;
}
static int bm3803_exti1_isr(int irq, void *context, void *arg)
{
int ret = OK;
/* And dispatch the interrupt to the handler */
if (g_gpio_callbacks[1].callback != NULL)
{
xcpt_t callback = g_gpio_callbacks[1].callback;
void *cbarg = g_gpio_callbacks[1].arg;
ret = callback(irq, context, cbarg);
}
/* Clear the pending interrupt */
up_clrpend_irq(BM3803_IRQ_EXTERNAL_1);
return ret;
}
static int bm3803_exti2_isr(int irq, void *context, void *arg)
{
int ret = OK;
/* And dispatch the interrupt to the handler */
if (g_gpio_callbacks[2].callback != NULL)
{
xcpt_t callback = g_gpio_callbacks[2].callback;
void *cbarg = g_gpio_callbacks[2].arg;
ret = callback(irq, context, cbarg);
}
/* Clear the pending interrupt */
up_clrpend_irq(BM3803_IRQ_EXTERNAL_2);
return ret;
}
static int bm3803_exti3_isr(int irq, void *context, void * arg)
{
int ret = OK;
/* And dispatch the interrupt to the handler */
if (g_gpio_callbacks[3].callback != NULL)
{
xcpt_t callback = g_gpio_callbacks[3].callback;
void *cbarg = g_gpio_callbacks[3].arg;
ret = callback(irq, context, cbarg);
}
/* Clear the pending interrupt */
up_clrpend_irq(BM3803_IRQ_EXTERNAL_3);
return ret;
}
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: bm3803_gpioset_irq
*
* Description:
* Sets/clears GPIO based event and interrupt triggers.
*
* Input Parameters:
* - pinset: GPIO pin configuration
* - enable: Enables interrupt or not
* - trig: Trig interrupt on level or falling edges
* - edge: Trig interrupt on falling edges or rising edges
* - func: When non-NULL, generate interrupt
* - arg: Argument passed to the interrupt callback
*
* Returned Value:
* Zero (OK) on success; a negated errno value on failure indicating the
* nature of the failure.
*
****************************************************************************/
int bm3803_gpioset_irq(uint32_t pinset, bool enable, bool trig, bool edge,
xcpt_t func, void *arg)
{
FAR struct gpio_callback_s *shared_cbs;
uint32_t pin = pinset & 0x3;
uint32_t en = 0x80 << (pin * 8);
uint32_t le = 0x40 << (pin * 8);
uint32_t pl = 0x20 << (pin * 8);
uint32_t isel = (pin + 4) << (pin * 8);
int irq;
xcpt_t handler;
int nshared;
int i;
/* Select the interrupt handler for this EXTI pin */
if (pin < 4)
{
irq = pin + BM3803_IRQ_EXTERNAL_0;
nshared = 1;
shared_cbs = &g_gpio_callbacks[pin];
switch (pin)
{
case 0:
handler = bm3803_exti0_isr;
break;
case 1:
handler = bm3803_exti1_isr;
break;
case 2:
handler = bm3803_exti2_isr;
break;
case 3:
handler = bm3803_exti3_isr;
break;
default:
handler = bm3803_exti3_isr;
break;
}
}
else
{
return ERROR;
}
/* Get the previous GPIO IRQ handler; Save the new IRQ handler. */
g_gpio_callbacks[pin].callback = func;
g_gpio_callbacks[pin].arg = arg;
/* Install external interrupt handlers */
if (func)
{
irq_attach(irq, handler, NULL);
up_enable_irq(irq);
}
else
{
/* Only disable IRQ if shared handler does not have any active
* callbacks
*/
for (i = 0; i < nshared; i++)
{
if (shared_cbs[i].callback != NULL)
{
break;
}
}
if (i == nshared)
{
up_disable_irq(irq);
}
}
/* Configure GPIO, enable EXTI line enabled if event or interrupt
* is enabled
*/
BM3803_REG.pio_dir = BM3803_REG.pio_dir & ~(1 << (pin + 4));
/* Configure rising/falling edges */
modifyreg32((uint32_t)&BM3803_REG.pio_irq, le, trig ? le : 0);
modifyreg32((uint32_t)&BM3803_REG.pio_irq, pl, edge ? pl : 0);
modifyreg32((uint32_t)&BM3803_REG.pio_irq, 0x1f << (pin * 8), isel);
modifyreg32((uint32_t)&BM3803_REG.pio_irq, en, enable ? en : 0);
return OK;
}
arch/sparc/src/bm3803/bm3803_freerun.c
+273
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@@ -0,0 +1,273 @@
/****************************************************************************
* arch/sparc/src/bm3803/bm3803_freerun.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <stdint.h>
#include <stdbool.h>
#include <assert.h>
#include <errno.h>
#include <nuttx/irq.h>
#include <nuttx/clock.h>
#include "bm3803_freerun.h"
#ifdef CONFIG_BM3803_FREERUN
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: bm3803_freerun_handler
*
* Description:
* Timer interrupt callback. When the freerun timer counter overflows,
* this interrupt will occur. We will just increment an overflow count.
*
* Input Parameters:
* tch - The handle that represents the timer state
* arg - An opaque argument provided when the interrupt was registered
* sr - The value of the timer interrupt status register at the time
* that the interrupt occurred.
*
* Returned Value:
* None
*
****************************************************************************/
static int bm3803_freerun_handler(int irq, FAR void *context, void *arg)
{
FAR struct bm3803_freerun_s *freerun = (FAR struct bm3803_freerun_s *) arg;
DEBUGASSERT(freerun != NULL && freerun->overflow < UINT24_MAX);
freerun->overflow++;
return OK;
}
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: bm3803_freerun_initialize
*
* Description:
* Initialize the freerun timer wrapper
*
* Input Parameters:
* freerun Caller allocated instance of the freerun state structure
* chan Timer counter channel to be used.
* resolution The required resolution of the timer in units of
* microseconds. NOTE that the range is restricted to the
* range of uint16_t (excluding zero).
*
* Returned Value:
* Zero (OK) is returned on success; a negated errno value is returned
* on failure.
*
****************************************************************************/
int bm3803_freerun_initialize(FAR struct bm3803_freerun_s *freerun, int chan,
uint16_t resolution)
{
uint32_t frequency;
tmrinfo("chan=%d resolution=%d usec\n", chan, resolution);
DEBUGASSERT(freerun != NULL && resolution > 0);
/* Get the TC frequency the corresponds to the requested resolution */
frequency = USEC_PER_SEC / (uint32_t)resolution;
freerun->frequency = frequency;
freerun->tch = bm3803_tim_init(chan);
if (!freerun->tch)
{
tmrerr("ERROR: Failed to allocate TIM%d\n", chan);
return -EBUSY;
}
BM3803_TIM_SETCLOCK(freerun->tch, frequency);
/* Initialize the remaining fields in the state structure and return
* success.
*/
freerun->chan = chan;
freerun->running = false;
freerun->overflow = 0;
/* Set up to receive the callback when the counter overflow occurs */
BM3803_TIM_SETISR(freerun->tch, bm3803_freerun_handler, freerun, 0);
/* Set timer period */
BM3803_TIM_SETPERIOD(freerun->tch, UINT24_MAX);
/* Start the counter */
BM3803_TIM_SETMODE(freerun->tch, BM3803_TIM_MODE_DOWN);
return OK;
}
/****************************************************************************
* Name: bm3803_freerun_counter
*
* Description:
* Read the counter register of the free-running timer.
*
* Input Parameters:
* freerun Caller allocated instance of the freerun state structure. This
* structure must have been previously initialized via a call to
* bm3803_freerun_initialize();
* ts The location in which to return the time from the free-running
* timer.
*
* Returned Value:
* Zero (OK) is returned on success; a negated errno value is returned
* on failure.
*
****************************************************************************/
int bm3803_freerun_counter(FAR struct bm3803_freerun_s *freerun,
FAR struct timespec *ts)
{
uint64_t usec;
uint32_t counter;
uint32_t verify;
uint32_t overflow;
uint32_t sec;
uint32_t period;
int pending;
irqstate_t flags;
DEBUGASSERT(freerun && freerun->tch && ts);
/* Temporarily disable the overflow counter. NOTE that we have to be
* careful here because bm3803_tc_getpending() will reset the pending
* interrupt status. If we do not handle the overflow here then, it will
* be lost.
*/
flags = enter_critical_section();
overflow = freerun->overflow;
counter = BM3803_TIM_GETCOUNTER(freerun->tch);
pending = BM3803_TIM_CHECKINT(freerun->tch, 0);
verify = BM3803_TIM_GETCOUNTER(freerun->tch);
/* If an interrupt was pending before we re-enabled interrupts,
* then the overflow needs to be incremented.
*/
if (pending)
{
BM3803_TIM_CLRINT(freerun->tch, 0);
/* Increment the overflow count and use the value of the
* guaranteed to be AFTER the overflow occurred.
*/
overflow++;
counter = verify;
/* Update freerun overflow counter. */
freerun->overflow = overflow;
}
leave_critical_section(flags);
tmrinfo("counter=%lu (%lu) overflow=%lu, pending=%i\n",
(unsigned long)counter, (unsigned long)verify,
(unsigned long)overflow, pending);
tmrinfo("frequency=%u\n", freerun->frequency);
/* Set timer period */
period = BM3803_TIM_GETPERIOD(freerun->tch);
/* Convert the whole thing to units of microseconds.
*
* frequency = ticks / second
* seconds = ticks * frequency
* usecs = (ticks * USEC_PER_SEC) / frequency;
*/
usec = ((((uint64_t)overflow << 24) + (uint64_t)(period - counter)) *
USEC_PER_SEC) / freerun->frequency;
/* And return the value of the timer */
sec = (uint32_t)(usec / USEC_PER_SEC);
ts->tv_sec = sec;
ts->tv_nsec = (usec - (sec * USEC_PER_SEC)) * NSEC_PER_USEC;
tmrinfo("usec=%llu ts=(%u, %lu)\n",
usec, (unsigned long)ts->tv_sec, (unsigned long)ts->tv_nsec);
return OK;
}
/****************************************************************************
* Name: bm3803_freerun_uninitialize
*
* Description:
* Stop the free-running timer and release all resources that it uses.
*
* Input Parameters:
* freerun Caller allocated instance of the freerun state structure. This
* structure must have been previously initialized via a call to
* bm3803_freerun_initialize();
*
* Returned Value:
* Zero (OK) is returned on success; a negated errno value is returned
* on failure.
*
****************************************************************************/
int bm3803_freerun_uninitialize(FAR struct bm3803_freerun_s *freerun)
{
DEBUGASSERT(freerun && freerun->tch);
/* Now we can disable the timer interrupt and disable the timer. */
BM3803_TIM_SETMODE(freerun->tch, BM3803_TIM_MODE_DISABLED);
BM3803_TIM_SETISR(freerun->tch, NULL, NULL, 0);
/* Free the timer */
bm3803_tim_deinit(freerun->tch);
freerun->tch = NULL;
return OK;
}
#endif /* CONFIG_BM3803_FREERUN */
arch/sparc/src/bm3803/bm3803_freerun.h
+143
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@@ -0,0 +1,143 @@
/****************************************************************************
* arch/sparc/src/bm3803/bm3803_freerun.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __ARCH_SPARC_SRC_BM3803_FREERUN_H
#define __ARCH_SPARC_SRC_BM3803_FREERUN_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <time.h>
#include <debug.h>
#include "bm3803_tim.h"
#ifdef CONFIG_BM3803_FREERUN
/****************************************************************************
* Public Types
****************************************************************************/
/* The freerun client must allocate an instance of this structure and called
* bm3803_freerun_initialize() before using the freerun facilities.The client
* should not access the contents of this structure directly since the
* contents are subject to change.
*/
struct bm3803_freerun_s
{
uint8_t chan; /* The timer/counter in use */
bool running; /* True: the timer is running */
uint32_t overflow; /* Timer counter overflow */
FAR struct bm3803_tim_dev_s *tch; /* Handle returned by bm3803_tim_init() */
uint32_t frequency;
};
/****************************************************************************
* Public Data
****************************************************************************/
#undef EXTERN
#if defined(__cplusplus)
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
/****************************************************************************
* Name: bm3803_freerun_initialize
*
* Description:
* Initialize the freerun timer wrapper
*
* Input Parameters:
* freerun Caller allocated instance of the freerun state structure
* chan Timer counter channel to be used.
* resolution The required resolution of the timer in units of
* microseconds. NOTE that the range is restricted to the
* range of uint16_t (excluding zero).
*
* Returned Value:
* Zero (OK) is returned on success; a negated errno value is returned
* on failure.
*
****************************************************************************/
int bm3803_freerun_initialize(struct bm3803_freerun_s *freerun, int chan,
uint16_t resolution);
/****************************************************************************
* Name: bm3803_freerun_counter
*
* Description:
* Read the counter register of the free-running timer.
*
* Input Parameters:
* freerun Caller allocated instance of the freerun state structure. This
* structure must have been previously initialized via a call to
* bm3803_freerun_initialize();
* ts The location in which to return the time remaining on the
* oneshot timer.
*
* Returned Value:
* Zero (OK) is returned on success; a negated errno value is returned
* on failure.
*
****************************************************************************/
int bm3803_freerun_counter(struct bm3803_freerun_s *freerun,
struct timespec *ts);
/****************************************************************************
* Name: bm3803_freerun_uninitialize
*
* Description:
* Stop the free-running timer and release all resources that it uses.
*
* Input Parameters:
* freerun Caller allocated instance of the freerun state structure. This
* structure must have been previously initialized via a call to
* bm3803_freerun_initialize();
*
* Returned Value:
* Zero (OK) is returned on success; a negated errno value is returned
* on failure.
*
****************************************************************************/
int bm3803_freerun_uninitialize(struct bm3803_freerun_s *freerun);
#undef EXTERN
#ifdef __cplusplus
}
#endif
#endif /* CONFIG_BM3803_FREERUN */
#endif /* __ARCH_SPARC_SRC_BM3803_FREERUN_H */
arch/sparc/src/bm3803/bm3803_head.S
+623
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arch/sparc/src/bm3803/bm3803_oneshot.c
+401
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@@ -0,0 +1,401 @@
/****************************************************************************
* arch/sparc/src/bm3803/bm3803_oneshot.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <stdint.h>
#include <stdbool.h>
#include <sched.h>
#include <assert.h>
#include <errno.h>
#include <debug.h>
#include <nuttx/irq.h>
#include <nuttx/clock.h>
#include "bm3803_oneshot.h"
#ifdef CONFIG_BM3803_ONESHOT
/****************************************************************************
* Private Function Prototypes
****************************************************************************/
static int bm3803_oneshot_handler(int irq, void *context, void *arg);
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: bm3803_oneshot_handler
*
* Description:
* Common timer interrupt callback. When any oneshot timer interrupt
* expires, this function will be called. It will forward the call to
* the next level up.
*
* Input Parameters:
* oneshot - The state associated with the expired timer
*
* Returned Value:
* Always returns OK
*
****************************************************************************/
static int bm3803_oneshot_handler(int irq, void *context, void *arg)
{
struct bm3803_oneshot_s *oneshot = (struct bm3803_oneshot_s *) arg;
oneshot_handler_t oneshot_handler;
FAR void *oneshot_arg;
tmrinfo("Expired...\n");
DEBUGASSERT(oneshot != NULL && oneshot->handler);
/* The clock was stopped, but not disabled when the RC match occurred.
* Disable the TC now and disable any further interrupts.
*/
BM3803_TIM_SETISR(oneshot->tch, NULL, NULL, 0);
BM3803_TIM_SETMODE(oneshot->tch, BM3803_TIM_MODE_DISABLED);
BM3803_TIM_CLRINT(oneshot->tch, 0);
/* The timer is no longer running */
oneshot->running = false;
/* Forward the event, clearing out any vestiges */
oneshot_handler = (oneshot_handler_t)oneshot->handler;
oneshot->handler = NULL;
oneshot_arg = (void *)oneshot->arg;
oneshot->arg = NULL;
oneshot_handler(oneshot_arg);
return OK;
}
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: bm3803_oneshot_initialize
*
* Description:
* Initialize the oneshot timer wrapper
*
* Input Parameters:
* oneshot Caller allocated instance of the oneshot state structure
* chan Timer counter channel to be used.
* resolution The required resolution of the timer in units of
* microseconds. NOTE that the range is restricted to the
* range of uint16_t (excluding zero).
*
* Returned Value:
* Zero (OK) is returned on success; a negated errno value is returned
* on failure.
*
****************************************************************************/
int bm3803_oneshot_initialize(FAR struct bm3803_oneshot_s *oneshot,
int chan, uint16_t resolution)
{
uint32_t frequency;
tmrinfo("chan=%d resolution=%d usec\n", chan, resolution);
DEBUGASSERT(oneshot && resolution > 0);
/* Get the TC frequency the corresponds to the requested resolution */
frequency = USEC_PER_SEC / (uint32_t)resolution;
oneshot->frequency = frequency;
oneshot->tch = bm3803_tim_init(chan);
if (!oneshot->tch)
{
tmrerr("ERROR: Failed to allocate TIM%d\n", chan);
return -EBUSY;
}
BM3803_TIM_SETCLOCK(oneshot->tch, frequency);
/* Initialize the remaining fields in the state structure. */
oneshot->chan = chan;
oneshot->running = false;
oneshot->handler = NULL;
oneshot->arg = NULL;
/* Assign a callback handler to the oneshot */
return OK;
}
/****************************************************************************
* Name: bm3803_oneshot_max_delay
*
* Description:
* Determine the maximum delay of the one-shot timer (in microseconds)
*
****************************************************************************/
int bm3803_oneshot_max_delay(FAR struct bm3803_oneshot_s *oneshot,
FAR uint64_t *usec)
{
DEBUGASSERT(oneshot != NULL && usec != NULL);
*usec = (uint64_t)(UINT24_MAX / oneshot->frequency) *
(uint64_t)USEC_PER_SEC;
return OK;
}
/****************************************************************************
* Name: bm3803_oneshot_start
*
* Description:
* Start the oneshot timer
*
* Input Parameters:
* oneshot Caller allocated instance of the oneshot state structure. This
* structure must have been previously initialized via a call to
* bm3803_oneshot_initialize();
* handler The function to call when when the oneshot timer expires.
* arg An opaque argument that will accompany the callback.
* ts Provides the duration of the one shot timer.
*
* Returned Value:
* Zero (OK) is returned on success; a negated errno value is returned
* on failure.
*
****************************************************************************/
int bm3803_oneshot_start(FAR struct bm3803_oneshot_s *oneshot,
oneshot_handler_t handler, FAR void *arg,
FAR const struct timespec *ts)
{
uint64_t usec;
uint64_t period;
irqstate_t flags;
tmrinfo("handler=%p arg=%p, ts=(%lu, %lu)\n", handler, arg,
(unsigned long)ts->tv_sec, (unsigned long)ts->tv_nsec);
DEBUGASSERT(oneshot && handler && ts);
DEBUGASSERT(oneshot->tch);
/* Was the oneshot already running? */
flags = enter_critical_section();
if (oneshot->running)
{
/* Yes.. then cancel it */
tmrinfo("Already running... cancelling\n");
(void)bm3803_oneshot_cancel(oneshot, NULL);
}
/* Save the new handler and its argument */
oneshot->handler = handler;
oneshot->arg = arg;
/* Express the delay in microseconds */
usec = (uint64_t)ts->tv_sec * USEC_PER_SEC +
(uint64_t)(ts->tv_nsec / NSEC_PER_USEC);
/* Get the timer counter frequency and determine the number of counts need
* to achieve the requested delay.
*
* frequency = ticks / second
* ticks = seconds * frequency
* = (usecs * frequency) / USEC_PER_SEC;
*/
period = (usec * (uint64_t)oneshot->frequency) / USEC_PER_SEC;
tmrinfo("usec=%llu period=%08llx\n", usec, period);
DEBUGASSERT(period <= UINT24_MAX);
/* Set up to receive the callback when the interrupt occurs */
BM3803_TIM_SETISR(oneshot->tch, bm3803_oneshot_handler, oneshot, 0);
/* Set timer period */
oneshot->period = (uint32_t)period;
BM3803_TIM_SETPERIOD(oneshot->tch, (uint32_t)period);
BM3803_TIM_CLRINT(oneshot->tch, 0);
/* Start the counter */
BM3803_TIM_SETMODE(oneshot->tch, BM3803_TIM_MODE_DOWN);
/* Enable interrupts. We should get the callback when the interrupt
* occurs.
*/
oneshot->running = true;
leave_critical_section(flags);
return OK;
}
/****************************************************************************
* Name: bm3803_oneshot_cancel
*
* Description:
* Cancel the oneshot timer and return the time remaining on the timer.
*
* NOTE: This function may execute at a high rate with no timer running (as
* when pre-emption is enabled and disabled).
*
* Input Parameters:
* oneshot Caller allocated instance of the oneshot state structure. This
* structure must have been previously initialized via a call to
* bm3803_oneshot_initialize();
* ts The location in which to return the time remaining on the
* oneshot timer. A time of zero is returned if the timer is
* not running. ts may be zero in which case the time remaining
* is not returned.
*
* Returned Value:
* Zero (OK) is returned on success. A call to up_timer_cancel() when
* the timer is not active should also return success; a negated errno
* value is returned on any failure.
*
****************************************************************************/
int bm3803_oneshot_cancel(FAR struct bm3803_oneshot_s *oneshot,
FAR struct timespec *ts)
{
irqstate_t flags;
uint64_t usec;
uint64_t sec;
uint64_t nsec;
uint32_t count;
uint32_t period;
/* Was the timer running? */
flags = enter_critical_section();
if (!oneshot->running)
{
/* No.. Just return zero timer remaining and successful cancellation.
* This function may execute at a high rate with no timer running
* (as when pre-emption is enabled and disabled).
*/
ts->tv_sec = 0;
ts->tv_nsec = 0;
leave_critical_section(flags);
return OK;
}
/* Yes.. Get the timer counter and period registers and stop the counter.
* If the counter expires while we are doing this, the counter clock will
* be stopped, but the clock will not be disabled.
*
* The expected behavior is that the counter register will freezes at
* a value equal to the RC register when the timer expires. The counter
* should have values between 0 and RC in all other cased.
*
* REVISIT: This does not appear to be the case.
*/
tmrinfo("Cancelling...\n");
count = BM3803_TIM_GETCOUNTER(oneshot->tch);
period = oneshot->period;
/* Now we can disable the interrupt and stop the timer. */
BM3803_TIM_SETISR(oneshot->tch, NULL, NULL, 0);
BM3803_TIM_SETMODE(oneshot->tch, BM3803_TIM_MODE_DISABLED);
oneshot->running = false;
oneshot->handler = NULL;
oneshot->arg = NULL;
leave_critical_section(flags);
/* Did the caller provide us with a location to return the time
* remaining?
*/
if (ts)
{
/* Yes.. then calculate and return the time remaining on the
* oneshot timer.
*/
tmrinfo("period=%lu count=%lu\n",
(unsigned long)period, (unsigned long)count);
/* REVISIT: I am not certain why the timer counter value sometimes
* exceeds RC. Might be a bug, or perhaps the counter does not stop
* in all cases.
*/
if (count >= period)
{
/* No time remaining (?) */
ts->tv_sec = 0;
ts->tv_nsec = 0;
}
else
{
/* The total time remaining is the difference. Convert the that
* to units of microseconds.
*
* frequency = ticks / second
* seconds = ticks * frequency
* usecs = (ticks * USEC_PER_SEC) / frequency;
*/
usec = (((uint64_t)count) * USEC_PER_SEC) /
oneshot->frequency;
/* Return the time remaining in the correct form */
sec = usec / USEC_PER_SEC;
nsec = ((usec) - (sec * USEC_PER_SEC)) * NSEC_PER_USEC;
ts->tv_sec = (time_t)sec;
ts->tv_nsec = (unsigned long)nsec;
}
tmrinfo("remaining (%lu, %lu)\n",
(unsigned long)ts->tv_sec, (unsigned long)ts->tv_nsec);
}
return OK;
}
#endif /* CONFIG_BM3803_ONESHOT */
arch/sparc/src/bm3803/bm3803_oneshot.h
+182
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/****************************************************************************
* arch/sparc/src/bm3803/bm3803_oneshot.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __ARCH_SPARC_SRC_BM3803_ONESHOT_H
#define __ARCH_SPARC_SRC_BM3803_ONESHOT_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <time.h>
#include <nuttx/irq.h>
#include "bm3803_tim.h"
#ifdef CONFIG_BM3803_ONESHOT
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Public Types
****************************************************************************/
/* This describes the callback function that will be invoked when the oneshot
* timer expires. The oneshot fires, the client will receive:
*
* arg - The opaque argument provided when the interrupt was registered
*/
typedef void (*oneshot_handler_t)(void *arg);
/* The oneshot client must allocate an instance of this structure and called
* bm3803_oneshot_initialize() before using the oneshot facilities.The client
* should not access the contents of this structure directly since the
* contents are subject to change.
*/
struct bm3803_oneshot_s
{
uint8_t chan; /* The timer/counter in use */
volatile bool running; /* True: the timer is running */
FAR struct bm3803_tim_dev_s *tch; /* Pointer returned by
* bm3803_tim_init() */
volatile oneshot_handler_t handler; /* Oneshot expiration callback */
volatile void *arg; /* The argument that will accompany
* the callback */
uint32_t frequency;
uint32_t period;
};
/****************************************************************************
* Public Data
****************************************************************************/
#undef EXTERN
#if defined(__cplusplus)
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
/****************************************************************************
* Name: bm3803_oneshot_initialize
*
* Description:
* Initialize the oneshot timer wrapper
*
* Input Parameters:
* oneshot Caller allocated instance of the oneshot state structure
* chan Timer counter channel to be used.
* resolution The required resolution of the timer in units of
* microseconds. NOTE that the range is restricted to the
* range of uint16_t (excluding zero).
*
* Returned Value:
* Zero (OK) is returned on success; a negated errno value is returned
* on failure.
*
****************************************************************************/
int bm3803_oneshot_initialize(struct bm3803_oneshot_s *oneshot, int chan,
uint16_t resolution);
/****************************************************************************
* Name: bm3803_oneshot_max_delay
*
* Description:
* Determine the maximum delay of the one-shot timer (in microseconds)
*
****************************************************************************/
int bm3803_oneshot_max_delay(struct bm3803_oneshot_s *oneshot,
uint64_t *usec);
/****************************************************************************
* Name: bm3803_oneshot_start
*
* Description:
* Start the oneshot timer
*
* Input Parameters:
* oneshot Caller allocated instance of the oneshot state structure. This
* structure must have been previously initialized via a call to
* bm3803_oneshot_initialize();
* handler The function to call when when the oneshot timer expires.
* arg An opaque argument that will accompany the callback.
* ts Provides the duration of the one shot timer.
*
* Returned Value:
* Zero (OK) is returned on success; a negated errno value is returned
* on failure.
*
****************************************************************************/
int bm3803_oneshot_start(struct bm3803_oneshot_s *oneshot,
oneshot_handler_t handler, void *arg,
const struct timespec *ts);
/****************************************************************************
* Name: bm3803_oneshot_cancel
*
* Description:
* Cancel the oneshot timer and return the time remaining on the timer.
*
* NOTE: This function may execute at a high rate with no timer running (as
* when pre-emption is enabled and disabled).
*
* Input Parameters:
* oneshot Caller allocated instance of the oneshot state structure. This
* structure must have been previously initialized via a call to
* bm3803_oneshot_initialize();
* ts The location in which to return the time remaining on the
* oneshot timer. A time of zero is returned if the timer is
* not running.
*
* Returned Value:
* Zero (OK) is returned on success. A call to up_timer_cancel() when
* the timer is not active should also return success; a negated errno
* value is returned on any failure.
*
****************************************************************************/
int bm3803_oneshot_cancel(struct bm3803_oneshot_s *oneshot,
struct timespec *ts);
#undef EXTERN
#ifdef __cplusplus
}
#endif
#endif /* CONFIG_BM3803_ONESHOT */
#endif /* __ARCH_SPARC_SRC_BM3803_ONESHOT_H */
arch/sparc/src/bm3803/bm3803_oneshot_lowerhalf.c
+334
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/****************************************************************************
* arch/sparc/src/bm3803/bm3803_oneshot_lowerhalf.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <time.h>
#include <assert.h>
#include <debug.h>
#include <nuttx/irq.h>
#include <nuttx/kmalloc.h>
#include <nuttx/timers/oneshot.h>
#include "bm3803_oneshot.h"
/****************************************************************************
* Private Types
****************************************************************************/
/* This structure describes the state of the oneshot timer lower-half
* driver
*/
struct bm3803_oneshot_lowerhalf_s
{
/* This is the part of the lower half driver that is visible to the upper-
* half client of the driver. This must be the first thing in this
* structure so that pointers to struct oneshot_lowerhalf_s are cast
* compatible to struct bm3803_oneshot_lowerhalf_s and vice versa.
*/
struct oneshot_lowerhalf_s lh; /* Common lower-half driver fields */
/* Private lower half data follows */
/* STM32-specific oneshot state */
struct bm3803_oneshot_s oneshot;
oneshot_callback_t callback; /* internal handler that receives callback */
FAR void *arg; /* Argument that is passed to the handler */
};
/****************************************************************************
* Private Function Prototypes
****************************************************************************/
static void bm3803_oneshot_handler(void *arg);
static int bm3803_max_delay(FAR struct oneshot_lowerhalf_s *lower,
FAR struct timespec *ts);
static int bm3803_start(FAR struct oneshot_lowerhalf_s *lower,
oneshot_callback_t callback, FAR void *arg,
FAR const struct timespec *ts);
static int bm3803_cancel(FAR struct oneshot_lowerhalf_s *lower,
FAR struct timespec *ts);
/****************************************************************************
* Private Data
****************************************************************************/
/* Lower half operations */
static const struct oneshot_operations_s g_oneshot_ops =
{
.max_delay = bm3803_max_delay,
.start = bm3803_start,
.cancel = bm3803_cancel,
};
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: bm3803_oneshot_handler
*
* Description:
* Timer expiration handler
*
* Input Parameters:
* arg - Should be the same argument provided when bm3803_oneshot_start()
* was called.
*
* Returned Value:
* None
*
****************************************************************************/
static void bm3803_oneshot_handler(void *arg)
{
FAR struct bm3803_oneshot_lowerhalf_s *priv =
(FAR struct bm3803_oneshot_lowerhalf_s *)arg;
oneshot_callback_t callback;
FAR void *cbarg;
DEBUGASSERT(priv != NULL);
/* Perhaps the callback was nullified in a race condition with
* bm3803_cancel?
*/
if (priv->callback)
{
/* Sample and nullify BEFORE executing callback (in case the callback
* restarts the oneshot).
*/
callback = priv->callback;
cbarg = priv->arg;
priv->callback = NULL;
priv->arg = NULL;
/* Then perform the callback */
callback(&priv->lh, cbarg);
}
}
/****************************************************************************
* Name: bm3803_max_delay
*
* Description:
* Determine the maximum delay of the one-shot timer (in microseconds)
*
* Input Parameters:
* lower An instance of the lower-half oneshot state structure. This
* structure must have been previously initialized via a call to
* oneshot_initialize();
* ts The location in which to return the maxumum delay.
*
* Returned Value:
* Zero (OK) is returned on success; a negated errno value is returned
* on failure.
*
****************************************************************************/
static int bm3803_max_delay(FAR struct oneshot_lowerhalf_s *lower,
FAR struct timespec *ts)
{
FAR struct bm3803_oneshot_lowerhalf_s *priv =
(FAR struct bm3803_oneshot_lowerhalf_s *)lower;
uint64_t usecs;
int ret;
DEBUGASSERT(priv != NULL && ts != NULL);
ret = bm3803_oneshot_max_delay(&priv->oneshot, &usecs);
if (ret >= 0)
{
uint64_t sec = usecs / 1000000;
usecs -= 1000000 * sec;
ts->tv_sec = (time_t)sec;
ts->tv_nsec = (long)(usecs * 1000);
}
return ret;
}
/****************************************************************************
* Name: bm3803_start
*
* Description:
* Start the oneshot timer
*
* Input Parameters:
* lower An instance of the lower-half oneshot state structure. This
* structure must have been previously initialized via a call to
* oneshot_initialize();
* handler The function to call when when the oneshot timer expires.
* arg An opaque argument that will accompany the callback.
* ts Provides the duration of the one shot timer.
*
* Returned Value:
* Zero (OK) is returned on success; a negated errno value is returned
* on failure.
*
****************************************************************************/
static int bm3803_start(FAR struct oneshot_lowerhalf_s *lower,
oneshot_callback_t callback, FAR void *arg,
FAR const struct timespec *ts)
{
FAR struct bm3803_oneshot_lowerhalf_s *priv =
(FAR struct bm3803_oneshot_lowerhalf_s *)lower;
irqstate_t flags;
int ret;
DEBUGASSERT(priv != NULL && callback != NULL && ts != NULL);
/* Save the callback information and start the timer */
flags = enter_critical_section();
priv->callback = callback;
priv->arg = arg;
ret = bm3803_oneshot_start(&priv->oneshot,
bm3803_oneshot_handler, priv, ts);
leave_critical_section(flags);
if (ret < 0)
{
tmrerr("ERROR: bm3803_oneshot_start failed: %d\n", flags);
}
return ret;
}
/****************************************************************************
* Name: bm3803_cancel
*
* Description:
* Cancel the oneshot timer and return the time remaining on the timer.
*
* NOTE: This function may execute at a high rate with no timer running (as
* when pre-emption is enabled and disabled).
*
* Input Parameters:
* lower Caller allocated instance of the oneshot state structure. This
* structure must have been previously initialized via a call to
* oneshot_initialize();
* ts The location in which to return the time remaining on the
* oneshot timer. A time of zero is returned if the timer is
* not running.
*
* Returned Value:
* Zero (OK) is returned on success. A call to up_timer_cancel() when
* the timer is not active should also return success; a negated errno
* value is returned on any failure.
*
****************************************************************************/
static int bm3803_cancel(FAR struct oneshot_lowerhalf_s *lower,
FAR struct timespec *ts)
{
FAR struct bm3803_oneshot_lowerhalf_s *priv =
(FAR struct bm3803_oneshot_lowerhalf_s *)lower;
irqstate_t flags;
int ret;
DEBUGASSERT(priv != NULL);
/* Cancel the timer */
flags = enter_critical_section();
ret = bm3803_oneshot_cancel(&priv->oneshot, ts);
priv->callback = NULL;
priv->arg = NULL;
leave_critical_section(flags);
if (ret < 0)
{
tmrerr("ERROR: bm3803_oneshot_cancel failed: %d\n", flags);
}
return ret;
}
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: oneshot_initialize
*
* Description:
* Initialize the oneshot timer and return a oneshot lower half driver
* instance.
*
* Input Parameters:
* chan Timer counter channel to be used.
* resolution The required resolution of the timer in units of
* microseconds. NOTE that the range is restricted to the
* range of uint16_t (excluding zero).
*
* Returned Value:
* On success, a non-NULL instance of the oneshot lower-half driver is
* returned. NULL is return on any failure.
*
****************************************************************************/
FAR struct oneshot_lowerhalf_s *oneshot_initialize(int chan,
uint16_t resolution)
{
FAR struct bm3803_oneshot_lowerhalf_s *priv;
int ret;
/* Allocate an instance of the lower half driver */
priv = (FAR struct bm3803_oneshot_lowerhalf_s *)
kmm_zalloc(sizeof(struct bm3803_oneshot_lowerhalf_s));
if (priv == NULL)
{
tmrerr("ERROR: Failed to initialized state structure\n");
return NULL;
}
/* Initialize the lower-half driver structure */
priv->lh.ops = &g_oneshot_ops;
/* Initialize the contained STM32 oneshot timer */
ret = bm3803_oneshot_initialize(&priv->oneshot, chan, resolution);
if (ret < 0)
{
tmrerr("ERROR: bm3803_oneshot_initialize failed: %d\n", ret);
kmm_free(priv);
return NULL;
}
return &priv->lh;
}
arch/sparc/src/bm3803/bm3803_tickless.c
+339
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@@ -0,0 +1,339 @@
/****************************************************************************
* arch/sparc/src/bm3803/bm3803_tickless.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Tickless OS Support.
*
* When CONFIG_SCHED_TICKLESS is enabled, all support for timer interrupts
* is suppressed and the platform specific code is expected to provide the
* following custom functions.
*
* void up_timer_initialize(void): Initializes the timer facilities.
* Called early in the initialization sequence (by up_initialize()).
* int up_timer_gettime(FAR struct timespec *ts): Returns the current
* time from the platform specific time source.
* int up_timer_cancel(void): Cancels the interval timer.
* int up_timer_start(FAR const struct timespec *ts): Start (or re-starts)
* the interval timer.
*
* The RTOS will provide the following interfaces for use by the platform-
* specific interval timer implementation:
*
* void nxsched_timer_expiration(void): Called by the platform-specific
* logic when the interval timer expires.
*
****************************************************************************/
/****************************************************************************
* BM3803 Timer Usage
*
* This current implementation uses two timers: A one-shot timer to provide
* the timed events and a free running timer to provide the current time.
* Since timers are a limited resource, that could be an issue on some
* systems.
*
* We could do the job with a single timer if we were to keep the single
* timer in a free-running at all times. The STM32 timer/counters have
* 16-bit/32-bit counters with the capability to generate a compare interrupt
* when the timer matches a compare value but also to continue counting
* without stopping (giving another, different interrupt when the timer
* rolls over from 0xffffffff to zero). So we could potentially just set
* the compare at the number of ticks you want PLUS the current value of
* timer. Then you could have both with a single timer: An interval timer
* and a free-running counter with the same timer!
*
* Patches are welcome!
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <stdbool.h>
#include <nuttx/arch.h>
#include <assert.h>
#include <debug.h>
#include "bm3803_oneshot.h"
#include "bm3803_freerun.h"
#ifdef CONFIG_SCHED_TICKLESS
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#ifndef CONFIG_BM3803_ONESHOT
# error CONFIG_BM3803_ONESHOT must be selected for the Tickless OS option
#endif
#ifndef CONFIG_BM3803_FREERUN
# error CONFIG_BM3803_FREERUN must be selected for the Tickless OS option
#endif
#ifndef CONFIG_BM3803_TICKLESS_FREERUN
# error CONFIG_BM3803_TICKLESS_FREERUN must be selected for the Tickless OS option
#endif
#ifndef CONFIG_BM3803_TICKLESS_ONESHOT
# error CONFIG_BM3803_TICKLESS_ONESHOT must be selected for the Tickless OS option
#endif
/****************************************************************************
* Private Types
****************************************************************************/
struct bm3803_tickless_s
{
struct bm3803_oneshot_s oneshot;
struct bm3803_freerun_s freerun;
};
/****************************************************************************
* Private Data
****************************************************************************/
static struct bm3803_tickless_s g_tickless;
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: bm3803_oneshot_handler
*
* Description:
* Called when the one shot timer expires
*
* Input Parameters:
* None
*
* Returned Value:
* None
*
* Assumptions:
* Called early in the initialization sequence before any special
* concurrency protections are required.
*
****************************************************************************/
static void bm3803_oneshot_handler(FAR void *arg)
{
tmrinfo("Expired...\n");
nxsched_timer_expiration();
}
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: up_timer_initialize
*
* Description:
* Initializes all platform-specific timer facilities. This function is
* called early in the initialization sequence by up_initialize().
* On return, the current up-time should be available from
* up_timer_gettime() and the interval timer is ready for use (but not
* actively timing.
*
* Provided by platform-specific code and called from the architecture-
* specific logic.
*
* Input Parameters:
* None
*
* Returned Value:
* None
*
* Assumptions:
* Called early in the initialization sequence before any special
* concurrency protections are required.
*
****************************************************************************/
void up_timer_initialize(void)
{
#ifdef CONFIG_SCHED_TICKLESS_LIMIT_MAX_SLEEP
uint64_t max_delay;
#endif
int ret;
/* Initialize the one-shot timer */
ret = bm3803_oneshot_initialize(&g_tickless.oneshot,
CONFIG_BM3803_TICKLESS_ONESHOT,
CONFIG_USEC_PER_TICK);
if (ret < 0)
{
tmrerr("ERROR: bm3803_oneshot_initialize failed\n");
DEBUGASSERT(0);
}
#ifdef CONFIG_SCHED_TICKLESS_LIMIT_MAX_SLEEP
/* Get the maximum delay of the one-shot timer in microseconds */
ret = bm3803_oneshot_max_delay(&g_tickless.oneshot, &max_delay);
if (ret < 0)
{
tmrerr("ERROR: bm3803_oneshot_max_delay failed\n");
DEBUGASSERT(0);
}
/* Convert this to configured clock ticks for use by the OS timer logic */
max_delay /= CONFIG_USEC_PER_TICK;
if (max_delay > UINT24_MAX)
{
g_oneshot_maxticks = UINT24_MAX;
}
else
{
g_oneshot_maxticks = max_delay;
}
#endif
/* Initialize the free-running timer */
ret = bm3803_freerun_initialize(&g_tickless.freerun,
CONFIG_BM3803_TICKLESS_FREERUN,
CONFIG_USEC_PER_TICK);
if (ret < 0)
{
tmrerr("ERROR: bm3803_freerun_initialize failed\n");
DEBUGASSERT(0);
}
}
/****************************************************************************
* Name: up_timer_gettime
*
* Description:
* Return the elapsed time since power-up (or, more correctly, since
* up_timer_initialize() was called). This function is functionally
* equivalent to:
*
* int clock_gettime(clockid_t clockid, FAR struct timespec *ts);
*
* when clockid is CLOCK_MONOTONIC.
*
* This function provides the basis for reporting the current time and
* also is used to eliminate error build-up from small errors in interval
* time calculations.
*
* Provided by platform-specific code and called from the RTOS base code.
*
* Input Parameters:
* ts - Provides the location in which to return the up-time.
*
* Returned Value:
* Zero (OK) is returned on success; a negated errno value is returned on
* any failure.
*
* Assumptions:
* Called from the normal tasking context. The implementation must
* provide whatever mutual exclusion is necessary for correct operation.
* This can include disabling interrupts in order to assure atomic register
* operations.
*
****************************************************************************/
int up_timer_gettime(FAR struct timespec *ts)
{
return bm3803_freerun_counter(&g_tickless.freerun, ts);
}
/****************************************************************************
* Name: up_timer_cancel
*
* Description:
* Cancel the interval timer and return the time remaining on the timer.
* These two steps need to be as nearly atomic as possible.
* nxsched_timer_expiration() will not be called unless the timer is
* restarted with up_timer_start().
*
* If, as a race condition, the timer has already expired when this
* function is called, then that pending interrupt must be cleared so
* that up_timer_start() and the remaining time of zero should be
* returned.
*
* NOTE: This function may execute at a high rate with no timer running (as
* when pre-emption is enabled and disabled).
*
* Provided by platform-specific code and called from the RTOS base code.
*
* Input Parameters:
* ts - Location to return the remaining time. Zero should be returned
* if the timer is not active. ts may be zero in which case the
* time remaining is not returned.
*
* Returned Value:
* Zero (OK) is returned on success. A call to up_timer_cancel() when
* the timer is not active should also return success; a negated errno
* value is returned on any failure.
*
* Assumptions:
* May be called from interrupt level handling or from the normal tasking
* level. Interrupts may need to be disabled internally to assure
* non-reentrancy.
*
****************************************************************************/
int up_timer_cancel(FAR struct timespec *ts)
{
return bm3803_oneshot_cancel(&g_tickless.oneshot, ts);
}
/****************************************************************************
* Name: up_timer_start
*
* Description:
* Start the interval timer. nxsched_timer_expiration() will be
* called at the completion of the timeout (unless up_timer_cancel
* is called to stop the timing.
*
* Provided by platform-specific code and called from the RTOS base code.
*
* Input Parameters:
* ts - Provides the time interval until nxsched_timer_expiration() is
* called.
*
* Returned Value:
* Zero (OK) is returned on success; a negated errno value is returned on
* any failure.
*
* Assumptions:
* May be called from interrupt level handling or from the normal tasking
* level. Interrupts may need to be disabled internally to assure
* non-reentrancy.
*
****************************************************************************/
int up_timer_start(FAR const struct timespec *ts)
{
return bm3803_oneshot_start(&g_tickless.oneshot, bm3803_oneshot_handler,
NULL, ts);
}
#endif /* CONFIG_SCHED_TICKLESS */
arch/sparc/src/bm3803/bm3803_tim.c
+648
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arch/sparc/src/bm3803/bm3803_tim.h
+154
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/****************************************************************************
* arch/sparc/src/bm3803/bm3803_tim.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __ARCH_SPARC_SRC_BM3803_BM3803_TIM_H
#define __ARCH_SPARC_SRC_BM3803_BM3803_TIM_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include "chip.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#define BM3803_TIM1_BASE 0x80000040
#define BM3803_TIM2_BASE 0x80000050
#define BM3803_TIM12PRE_BASE 0x80000060
#define BM3803_TIM_WDG_OFFSET 0x000C /* wdg register 1 (16-bit) */
#define BM3803_TIM_CR_OFFSET 0x0008 /* Control register 1 (16-bit) */
#define BM3803_TIM_CNT_OFFSET 0x0000 /* Counter (16-bit) */
#define BM3803_TIM_ARR_OFFSET 0x0004 /* Auto-reload register (16-bit) */
#define BM3803_TIM_PSCLOAD_OFFSET 0x0004 /* Prescaler load (16-bit) */
#define BM3803_TIM_PSCCONT_OFFSET 0x0000 /* Prescaler count (16-bit) */
#define TIMER_WDG 0x10
#define TIMER_LOADCOUNT 0x4
#define TIMER_RELOADCOUNT 0x2
#define TIMER_ENABLE 0x1
# define UINT24_MAX 16777215u
/* Helpers ******************************************************************/
#define BM3803_TIM_SETMODE(d,mode) ((d)->ops->setmode(d,mode))
#define BM3803_TIM_SETCLOCK(d,freq) ((d)->ops->setclock(d,freq))
#define BM3803_TIM_GETCLOCK(d) ((d)->ops->getclock(d))
#define BM3803_TIM_SETPERIOD(d,period) ((d)->ops->setperiod(d,period))
#define BM3803_TIM_GETPERIOD(d) ((d)->ops->getperiod(d))
#define BM3803_TIM_GETCOUNTER(d) ((d)->ops->getcounter(d))
#define BM3803_TIM_SETISR(d,hnd,arg,s) ((d)->ops->setisr(d,hnd,arg,s))
#define BM3803_TIM_CLRINT(d,s) ((d)->ops->clrint(d,s))
#define BM3803_TIM_CHECKINT(d,s) ((d)->ops->checkint(d,s))
/****************************************************************************
* Public Types
****************************************************************************/
#ifndef __ASSEMBLY__
#undef EXTERN
#if defined(__cplusplus)
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
/* TIM Device Structure */
struct bm3803_tim_dev_s
{
struct bm3803_tim_ops_s *ops;
};
enum bm3803_tim_mode_e
{
BM3803_TIM_MODE_UNUSED = -1,
/* One of the following */
BM3803_TIM_MODE_MASK = 0x3,
BM3803_TIM_MODE_DISABLED = 0x1,
BM3803_TIM_MODE_DOWN = 0x2,
};
/* TIM Operations */
struct bm3803_tim_ops_s
{
/* Basic Timers */
int (*setmode)(FAR struct bm3803_tim_dev_s *dev,
enum bm3803_tim_mode_e mode);
int (*setclock)(FAR struct bm3803_tim_dev_s *dev, uint32_t freq);
uint32_t (*getclock)(FAR struct bm3803_tim_dev_s *dev);
void (*setperiod)(FAR struct bm3803_tim_dev_s *dev, uint32_t period);
uint32_t (*getperiod)(FAR struct bm3803_tim_dev_s *dev);
uint32_t (*getcounter)(FAR struct bm3803_tim_dev_s *dev);
/* Timer interrupts */
int (*setisr)(FAR struct bm3803_tim_dev_s *dev,
xcpt_t handler, void *arg, int source);
void (*clrint)(FAR struct bm3803_tim_dev_s *dev, int source);
int (*checkint)(FAR struct bm3803_tim_dev_s *dev, int source);
};
/* Power-up timer and get its structure */
FAR struct bm3803_tim_dev_s *bm3803_tim_init(int timer);
/* Power-down timer, mark it as unused */
int bm3803_tim_deinit(FAR struct bm3803_tim_dev_s *dev);
/****************************************************************************
* Name: bm3803_timer_initialize
*
* Description:
* Bind the configuration timer to a timer lower half instance and
* register the timer drivers at 'devpath'
*
* Input Parameters:
* devpath - The full path to the timer device. This should be of the form
* /dev/timer0
* timer - the timer number.
*
* Returned Value:
* Zero (OK) is returned on success; A negated errno value is returned
* to indicate the nature of any failure.
*
****************************************************************************/
#ifdef CONFIG_TIMER
int bm3803_timer_initialize(FAR const char *devpath, int timer);
#endif
#undef EXTERN
#if defined(__cplusplus)
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_SPARC_SRC_BM3803_BM3803_TIM_H */
arch/sparc/src/bm3803/bm3803_tim_lowerhalf.c
+464
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@@ -0,0 +1,464 @@
/****************************************************************************
* arch/sparc/src/bm3803/bm3803_tim_lowerhalf.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <stdint.h>
#include <string.h>
#include <errno.h>
#include <nuttx/irq.h>
#include <nuttx/timers/timer.h>
#include <arch/board/board.h>
#include "bm3803_tim.h"
#if defined(CONFIG_TIMER) && \
(defined(CONFIG_BM3803_TIM1) || defined(CONFIG_BM3803_TIM2))
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#define BM3803_TIM1_RES 24
#define BM3803_TIM2_RES 24
/****************************************************************************
* Private Types
****************************************************************************/
/* This structure provides the private representation of the "lower-half"
* driver state structure. This structure must be cast-compatible with the
* timer_lowerhalf_s structure.
*/
struct bm3803_lowerhalf_s
{
FAR const struct timer_ops_s *ops; /* Lower half operations */
FAR struct bm3803_tim_dev_s *tim; /* stm32 timer driver */
tccb_t callback; /* Current upper half interrupt
* callback */
FAR void *arg; /* Argument passed to upper half
* callback */
bool started; /* True: Timer has been started */
const uint8_t resolution; /* Number of bits in the timer
* (16 or 32 bits) */
};
/****************************************************************************
* Private Function Prototypes
****************************************************************************/
/* Interrupt handling *******************************************************/
static int bm3803_timer_handler(int irq, void *context, void *arg);
/* "Lower half" driver methods **********************************************/
static int bm3803_start(FAR struct timer_lowerhalf_s *lower);
static int bm3803_stop(FAR struct timer_lowerhalf_s *lower);
static int bm3803_getstatus(FAR struct timer_lowerhalf_s *lower,
FAR struct timer_status_s *status);
static int bm3803_settimeout(FAR struct timer_lowerhalf_s *lower,
uint32_t timeout);
static void bm3803_setcallback(FAR struct timer_lowerhalf_s *lower,
tccb_t callback, FAR void *arg);
/****************************************************************************
* Private Data
****************************************************************************/
/* "Lower half" driver methods */
static const struct timer_ops_s g_timer_ops =
{
.start = bm3803_start,
.stop = bm3803_stop,
.getstatus = bm3803_getstatus,
.settimeout = bm3803_settimeout,
.setcallback = bm3803_setcallback,
.ioctl = NULL,
};
#ifdef CONFIG_BM3803_TIM1
static struct bm3803_lowerhalf_s g_tim1_lowerhalf =
{
.ops = &g_timer_ops,
.resolution = BM3803_TIM1_RES,
};
#endif
#ifdef CONFIG_BM3803_TIM2
static struct bm3803_lowerhalf_s g_tim2_lowerhalf =
{
.ops = &g_timer_ops,
.resolution = BM3803_TIM2_RES,
};
#endif
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: bm3803_timer_handler
*
* Description:
* timer interrupt handler
*
* Input Parameters:
*
* Returned Value:
*
****************************************************************************/
static int bm3803_timer_handler(int irq, void *context, void *arg)
{
FAR struct bm3803_lowerhalf_s *lower =
(FAR struct bm3803_lowerhalf_s *)arg;
uint32_t next_interval_us = 0;
BM3803_TIM_ACKINT(lower->tim, 0);
if (lower->callback(&next_interval_us, lower->arg))
{
if (next_interval_us > 0)
{
BM3803_TIM_SETPERIOD(lower->tim, next_interval_us);
}
}
else
{
bm3803_stop((struct timer_lowerhalf_s *)lower);
}
return OK;
}
/****************************************************************************
* Name: bm3803_start
*
* Description:
* Start the timer, resetting the time to the current timeout,
*
* Input Parameters:
* lower- A pointer the publicly visible representation of the "lower-half"
* driver state structure.
*
* Returned Value:
* Zero on success; a negated errno value on failure.
*
****************************************************************************/
static int bm3803_start(FAR struct timer_lowerhalf_s *lower)
{
FAR struct bm3803_lowerhalf_s *priv =
(FAR struct bm3803_lowerhalf_s *)lower;
if (!priv->started)
{
BM3803_TIM_SETMODE(priv->tim, BM3803_TIM_MODE_DOWN);
if (priv->callback != NULL)
{
BM3803_TIM_SETISR(priv->tim, bm3803_timer_handler, priv, 0);
}
priv->started = true;
return OK;
}
/* Return EBUSY to indicate that the timer was already running */
return -EBUSY;
}
/****************************************************************************
* Name: bm3803_stop
*
* Description:
* Stop the timer
*
* Input Parameters:
* lower- A pointer the publicly visible representation of the "lower-half"
* driver state structure.
*
* Returned Value:
* Zero on success; a negated errno value on failure.
*
****************************************************************************/
static int bm3803_stop(FAR struct timer_lowerhalf_s *lower)
{
FAR struct bm3803_lowerhalf_s *priv =
(FAR struct bm3803_lowerhalf_s *)lower;
if (priv->started)
{
BM3803_TIM_SETMODE(priv->tim, BM3803_TIM_MODE_DISABLED);
BM3803_TIM_SETISR(priv->tim, NULL, NULL, 0);
priv->started = false;
return OK;
}
/* Return ENODEV to indicate that the timer was not running */
return -ENODEV;
}
/****************************************************************************
* Name: bm3803_getstatus
*
* Description:
* get timer status
*
* Input Parameters:
* lower - A pointer the publicly visible representation of the "lower-
* half" driver state structure.
* status - The location to return the status information.
*
* Returned Value:
* Zero on success; a negated errno value on failure.
*
****************************************************************************/
static int bm3803_getstatus(FAR struct timer_lowerhalf_s *lower,
FAR struct timer_status_s *status)
{
FAR struct bm3803_lowerhalf_s *priv =
(FAR struct bm3803_lowerhalf_s *)lower;
uint64_t maxtimeout;
uint32_t timeout;
uint32_t clock;
uint32_t period;
uint32_t clock_factor;
DEBUGASSERT(priv);
/* Return the status bit */
status->flags = 0;
if (priv->started)
{
status->flags |= TCFLAGS_ACTIVE;
}
if (priv->callback)
{
status->flags |= TCFLAGS_HANDLER;
}
/* Get timeout */
maxtimeout = (1 << priv->resolution) - 1;
clock = BM3803_TIM_GETCLOCK(priv->tim);
period = BM3803_TIM_GETPERIOD(priv->tim);
if (clock == 1000000)
{
timeout = period;
}
else
{
timeout = (maxtimeout * 1000000) / clock;
}
status->timeout = timeout;
/* Get the time remaining until the timer expires (in microseconds) */
clock_factor = (clock == 1000000)? 1: (clock / 1000000);
status->timeleft = (timeout - BM3803_TIM_GETCOUNTER(priv->tim)) *
clock_factor;
return OK;
}
/****************************************************************************
* Name: bm3803_settimeout
*
* Description:
* Set a new timeout value (and reset the timer)
*
* Input Parameters:
* lower- A pointer the publicly visible representation of the "lower-half"
* driver state structure.
* timeout - The new timeout value in microseconds.
*
* Returned Value:
* Zero on success; a negated errno value on failure.
*
****************************************************************************/
static int bm3803_settimeout(FAR struct timer_lowerhalf_s *lower,
uint32_t timeout)
{
FAR struct bm3803_lowerhalf_s *priv =
(FAR struct bm3803_lowerhalf_s *)lower;
uint64_t maxtimeout;
if (priv->started)
{
return -EPERM;
}
maxtimeout = (1 << priv->resolution) - 1;
if (timeout > maxtimeout)
{
uint64_t freq = (maxtimeout * 1000000) / timeout;
BM3803_TIM_SETCLOCK(priv->tim, freq);
BM3803_TIM_SETPERIOD(priv->tim, maxtimeout);
}
else
{
BM3803_TIM_SETCLOCK(priv->tim, 1000000);
BM3803_TIM_SETPERIOD(priv->tim, timeout);
}
return OK;
}
/****************************************************************************
* Name: bm3803_sethandler
*
* Description:
* Call this user provided timeout handler.
*
* Input Parameters:
* lower- A pointer the publicly visible representation of the "lower-half"
* driver state structure.
* callback - The new timer expiration function pointer. If this
* function pointer is NULL, then the reset-on-expiration
* behavior is restored,
* arg - Argument that will be provided in the callback
*
* Returned Value:
* The previous timer expiration function pointer or NULL is there was
* no previous function pointer.
*
****************************************************************************/
static void bm3803_setcallback(FAR struct timer_lowerhalf_s *lower,
tccb_t callback, FAR void *arg)
{
FAR struct bm3803_lowerhalf_s *priv =
(FAR struct bm3803_lowerhalf_s *)lower;
irqstate_t flags = enter_critical_section();
/* Save the new callback */
priv->callback = callback;
priv->arg = arg;
if (callback != NULL && priv->started)
{
BM3803_TIM_SETISR(priv->tim, bm3803_timer_handler, priv, 0);
}
else
{
BM3803_TIM_SETISR(priv->tim, NULL, NULL, 0);
}
leave_critical_section(flags);
}
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: bm3803_timer_initialize
*
* Description:
* Bind the configuration timer to a timer lower half instance and
* register the timer drivers at 'devpath'
*
* Input Parameters:
* devpath - The full path to the timer device. This should be of the
* form /dev/timer0
* timer - the timer's number.
*
* Returned Value:
* Zero (OK) is returned on success; A negated errno value is returned
* to indicate the nature of any failure.
*
****************************************************************************/
int bm3803_timer_initialize(FAR const char *devpath, int timer)
{
FAR struct bm3803_lowerhalf_s *lower;
switch (timer)
{
#ifdef CONFIG_BM3803_TIM1
case 1:
lower = &g_tim1_lowerhalf;
break;
#endif
#ifdef CONFIG_BM3803_TIM2
case 2:
lower = &g_tim2_lowerhalf;
break;
#endif
default:
return -ENODEV;
}
/* Initialize the elements of lower half state structure */
lower->started = false;
lower->callback = NULL;
lower->tim = bm3803_tim_init(timer);
if (lower->tim == NULL)
{
return -EINVAL;
}
/* Register the timer driver as /dev/timerX. The returned value from
* timer_register is a handle that could be used with timer_unregister().
* REVISIT: The returned handle is discard here.
*/
FAR void *drvr = timer_register(devpath,
(FAR struct timer_lowerhalf_s *)lower);
if (drvr == NULL)
{
/* The actual cause of the failure may have been a failure to allocate
* perhaps a failure to register the timer driver (such as if the
* 'depath' were not unique). We know here but we return EEXIST to
* indicate the failure (implying the non-unique devpath).
*/
return -EEXIST;
}
return OK;
}
#endif /* CONFIG_TIMER */
arch/sparc/src/bm3803/bm3803_wdg.c
+433
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@@ -0,0 +1,433 @@
/****************************************************************************
* arch/sparc/src/bm3803/bm3803_wdg.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/arch.h>
#include <stdint.h>
#include <errno.h>
#include <assert.h>
#include <debug.h>
#include <nuttx/irq.h>
#include <nuttx/clock.h>
#include <nuttx/timers/watchdog.h>
#include <arch/board/board.h>
#include "up_arch.h"
#include "bm3803_wdg.h"
#if defined(CONFIG_WATCHDOG) && defined(CONFIG_BM3803_WDG)
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Configuration ************************************************************/
#ifndef CONFIG_BM3803_WDG_DEFTIMOUT
# define CONFIG_BM3803_WDG_DEFTIMOUT 1000
#endif
/****************************************************************************
* Private Types
****************************************************************************/
/* This structure provides the private representation of the "lower-half"
* driver state structure. This structure must be cast-compatible with the
* well-known watchdog_lowerhalf_s structure.
*/
struct bm3803_lowerhalf_s
{
/* Lower half operations */
FAR const struct watchdog_ops_s *ops;
uint32_t timeout; /* The (actual) selected timeout */
uint32_t lastreset; /* The last reset time */
bool started; /* true: The watchdog timer has been started */
uint16_t prescaler; /* Clock prescaler value */
uint32_t reload; /* Timer reload value */
};
/****************************************************************************
* Private Function Prototypes
****************************************************************************/
/* Register operations ******************************************************/
# define bm3803_getreg(addr) getreg32(addr)
# define bm3803_putreg(val,addr) putreg32(val,addr)
static inline void bm3803_setreload(FAR struct bm3803_lowerhalf_s *priv);
/* "Lower half" driver methods **********************************************/
static int bm3803_start(FAR struct watchdog_lowerhalf_s *lower);
static int bm3803_stop(FAR struct watchdog_lowerhalf_s *lower);
static int bm3803_keepalive(FAR struct watchdog_lowerhalf_s *lower);
static int bm3803_getstatus(FAR struct watchdog_lowerhalf_s *lower,
FAR struct watchdog_status_s *status);
static int bm3803_settimeout(FAR struct watchdog_lowerhalf_s *lower,
uint32_t timeout);
/****************************************************************************
* Private Data
****************************************************************************/
/* "Lower half" driver methods */
static const struct watchdog_ops_s g_wdgops =
{
.start = bm3803_start,
.stop = bm3803_stop,
.keepalive = bm3803_keepalive,
.getstatus = bm3803_getstatus,
.settimeout = bm3803_settimeout,
.capture = NULL,
.ioctl = NULL,
};
/* "Lower half" driver state */
static struct bm3803_lowerhalf_s g_wdgdev;
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: bm3803_setreload
*
* Description:
* Set up the prescaler and reload values.
*
* Input Parameters:
* priv - A pointer the internal representation of the "lower-half"
* driver state structure.
*
****************************************************************************/
static inline void bm3803_setreload(FAR struct bm3803_lowerhalf_s *priv)
{
/* Set the reload value */
bm3803_putreg(priv->reload, BM3803_TIM1_BASE + BM3803_TIM_WDG_OFFSET);
}
/****************************************************************************
* Name: bm3803_start
*
* Description:
* Start the watchdog timer, resetting the time to the current timeout,
*
* Input Parameters:
* lower A pointer the publicly visible representation of the "lower-half"
* driver state structure.
*
* Returned Value:
* Zero on success; a negated errno value on failure.
*
****************************************************************************/
static int bm3803_start(FAR struct watchdog_lowerhalf_s *lower)
{
FAR struct bm3803_lowerhalf_s *priv =
(FAR struct bm3803_lowerhalf_s *)lower;
irqstate_t flags;
uint32_t val = bm3803_getreg(BM3803_TIM1_BASE + BM3803_TIM_CR_OFFSET);
val |= TIMER_WDG;
wdinfo("Entry: started=%d\n");
DEBUGASSERT(priv);
/* Have we already been started? */
if (!priv->started)
{
/* Set up prescaler and reload value for the selected timeout before
* starting the watchdog timer.
*/
bm3803_setreload(priv);
/* Enable WDG (the LSI oscillator will be enabled by hardware). NOTE:
* If the "Hardware watchdog" feature is enabled through the device
* option bits, the watchdog is automatically enabled at power-on.
*/
flags = enter_critical_section();
bm3803_putreg(val, BM3803_TIM1_BASE + BM3803_TIM_CR_OFFSET);
priv->lastreset = clock_systime_ticks();
priv->started = true;
leave_critical_section(flags);
}
return OK;
}
/****************************************************************************
* Name: bm3803_stop
*
* Description:
* Stop the watchdog timer
*
* Input Parameters:
* lower- A pointer the publicly visible representation of the "lower-half"
* driver state structure.
*
* Returned Value:
* Zero on success; a negated errno value on failure.
*
****************************************************************************/
static int bm3803_stop(FAR struct watchdog_lowerhalf_s *lower)
{
uint32_t val = bm3803_getreg(BM3803_TIM1_BASE + BM3803_TIM_CR_OFFSET);
wdinfo("Entry\n");
val &= ~TIMER_WDG;
bm3803_putreg(val, BM3803_TIM1_BASE + BM3803_TIM_CR_OFFSET);
return OK;
}
/****************************************************************************
* Name: bm3803_keepalive
*
* Description:
* Reset the watchdog timer to the current timeout value, prevent any
* imminent watchdog timeouts. This is sometimes referred as "pinging"
* the watchdog timer or "petting the dog".
*
* Input Parameters:
* lower- A pointer the publicly visible representation of the "lower-half"
* driver state structure.
*
* Returned Value:
* Zero on success; a negated errno value on failure.
*
****************************************************************************/
static int bm3803_keepalive(FAR struct watchdog_lowerhalf_s *lower)
{
FAR struct bm3803_lowerhalf_s *priv =
(FAR struct bm3803_lowerhalf_s *)lower;
irqstate_t flags;
wdinfo("Entry\n");
/* Reload the WDG timer */
flags = enter_critical_section();
bm3803_setreload(priv);
priv->lastreset = clock_systime_ticks();
leave_critical_section(flags);
return OK;
}
/****************************************************************************
* Name: bm3803_getstatus
*
* Description:
* Get the current watchdog timer status
*putreg32(value, ((struct bm3803_tim_priv_s *)dev)->base + offset);
* Input Parameters:
* lower- A pointer the publicly visible representation of the "lower-half"
* driver state structure.
* status - The location to return the watchdog status information.
*
* Returned Value:
* Zero on success; a negated errno value on failure.
*
****************************************************************************/
static int bm3803_getstatus(FAR struct watchdog_lowerhalf_s *lower,
FAR struct watchdog_status_s *status)
{
FAR struct bm3803_lowerhalf_s *priv =
(FAR struct bm3803_lowerhalf_s *)lower;
uint32_t ticks;
uint32_t elapsed;
wdinfo("Entry\n");
DEBUGASSERT(priv);
/* Return the status bit */
status->flags = WDFLAGS_RESET;
if (priv->started)
{
status->flags |= WDFLAGS_ACTIVE;
}
/* Return the actual timeout in milliseconds */
status->timeout = priv->timeout;
/* Get the elapsed time since the last ping */
ticks = clock_systime_ticks() - priv->lastreset;
elapsed = (int32_t)TICK2MSEC(ticks);
if (elapsed > priv->timeout)
{
elapsed = priv->timeout;
}
/* Return the approximate time until the watchdog timer expiration */
status->timeleft = priv->timeout - elapsed;
wdinfo("Status :\n");
wdinfo(" flags : %08x\n", status->flags);
wdinfo(" timeout : %d\n", status->timeout);
wdinfo(" timeleft : %d\n", status->timeleft);
return OK;
}
/****************************************************************************
* Name: bm3803_settimeout
*
* Description:
* Set a new timeout value (and reset the watchdog timer)
*
* Input Parameters:
* lower- A pointer the publicly visible representation of the "lower-half"
* driver state structure.
* timeout - The new timeout value in milliseconds.
*
* Returned Value:
* Zero on success; a negated errno value on failure.
*
****************************************************************************/
static int bm3803_settimeout(FAR struct watchdog_lowerhalf_s *lower,
uint32_t timeout)
{
FAR struct bm3803_lowerhalf_s *priv =
(FAR struct bm3803_lowerhalf_s *)lower;
uint32_t reload;
uint16_t prescaler;
uint32_t freqin;
uint32_t clock;
wdinfo("Entry: timeout=%d\n", timeout);
DEBUGASSERT(priv);
/* Can this timeout be represented? */
if (timeout < 1)
{
wderr("ERROR: Cannot represent timeout=%d \n", timeout);
return -ERANGE;
}
/* Get the input clock frequency for this timer. These vary with
* different timer clock sources, MCU-specific timer configuration, and
* board-specific clock configuration. The correct input clock frequency
* must be defined in the board.h header file.
*/
freqin = BOARD_TIM1_FREQUENCY;
prescaler = 0x3ff & bm3803_getreg(BM3803_TIM12PRE_BASE +
BM3803_TIM_PSCLOAD_OFFSET);
clock = freqin / (prescaler + 1);
reload = (timeout / 1000) * clock;
priv->timeout = timeout;
/* Save setup values for later use */
priv->prescaler = prescaler;
priv->reload = reload;
/* Write the prescaler and reload values to the WDG registers. */
if (priv->started)
{
bm3803_setreload(priv);
}
wdinfo("reload=%d\n", reload);
return OK;
}
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: bm3803_wdginitialize
*
* Description:
* Initialize the WDG watchdog timer.The watchdog timer is initialized and
* registers as 'devpath'. The initial state of the watchdog timer is
* disabled.
*
* Input Parameters:
* devpath - The full path to the watchdog. This should be of the form
* /dev/watchdog0
*
* Returned Value:
* None
*
****************************************************************************/
void bm3803_wdginitialize(FAR const char *devpath)
{
FAR struct bm3803_lowerhalf_s *priv = &g_wdgdev;
wdinfo("Entry: devpath=%s \n", devpath);
/* NOTE we assume that clocking to the WDG has already been provided by
* the RCC initialization logic.
*/
/* Initialize the driver state structure. */
priv->ops = &g_wdgops;
priv->started = false;
/* Select an arbitrary initial timeout value. But don't start the watchdog
* yet. NOTE: If the "Hardware watchdog" feature is enabled through the
* device option bits, the watchdog is automatically enabled at power-on.
*/
bm3803_settimeout((FAR struct watchdog_lowerhalf_s *)priv,
CONFIG_BM3803_WDG_DEFTIMOUT);
/* Register the watchdog driver as /dev/watchdog0 */
(void)watchdog_register(devpath, (FAR struct watchdog_lowerhalf_s *)priv);
}
#endif /* CONFIG_WATCHDOG && CONFIG_BM3803_WDG */
arch/sparc/src/bm3803/bm3803_wdg.h
+78
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@@ -0,0 +1,78 @@
/****************************************************************************
* arch/sparc/src/bm3803/bm3803_wdg.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __ARCH_SPARC_SRC_BM3803_BM3803_WDG_H
#define __ARCH_SPARC_SRC_BM3803_BM3803_WDG_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include "bm3803_tim.h"
#ifdef CONFIG_WATCHDOG
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#ifndef __ASSEMBLY__
#undef EXTERN
#if defined(__cplusplus)
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
/****************************************************************************
* Name: bm3803_wdginitialize
*
* Description:
* Initialize the IWDG watchdog time. The watchdog timer is initialized
* and registers as 'devpath. The initial state of the watchdog time is
* disabled.
*
* Input Parameters:
* devpath - The full path to the watchdog. This should be of the form
* /dev/watchdog0
* lsifreq - The calibrated LSI clock frequency
*
* Returned Value:
* None
*
****************************************************************************/
#ifdef CONFIG_BM3803_WDG
void bm3803_wdginitialize(FAR const char *devpath);
#endif
#undef EXTERN
#if defined(__cplusplus)
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* CONFIG_WATCHDOG */
#endif /* __ARCH_SPARC_SRC_BM3803_BM3803_WDG_H */
arch/sparc/src/bm3803/chip.h
+48
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@@ -0,0 +1,48 @@
/****************************************************************************
* arch/sparc/src/bm3803/chip.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __ARCH_SPARC_SRC_BM3803_CHIP_H
#define __ARCH_SPARC_SRC_BM3803_CHIP_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
/* Include only the memory map. Other chip hardware files should then
* include this file for the proper setup
*/
#include "bm3803-memorymap.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Define features for supported chip in the SPARC family */
#if 1
#else
# error "Unsupported SPARC chip"
#endif
#endif /* __ARCH_SPARC_SRC_BM3803_CHIP_H */
arch/sparc/src/bm3823/Kconfig
+42
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@@ -0,0 +1,42 @@
#
# For a description of the syntax of this configuration file,
# see the file kconfig-language.txt in the NuttX tools repository.
#
if ARCH_CHIP_BM3823
comment "BM3823 Configuration Options"
menu "BM3823 Peripheral Support"
config BM3823_WDT
bool "Watchdog timer (WDT)"
default n
config BM3823_T1
bool "Timer 1 (T1)"
default n
config BM3823_T2
bool "Timer 2 (T2)"
default n
config BM3823_UART1
bool "UART1"
default n
select UART1_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
config BM3823_UART2
bool "UART2"
default n
select UART2_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
config BM3823_UART3
bool "UART3"
default n
select UART3_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
endmenu # BM3823 Peripheral Selections
endif
arch/sparc/src/bm3823/Make.defs
+59
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@@ -0,0 +1,59 @@
############################################################################
# arch/sparc/src/bm3823/Make.defs
#
# Licensed to the Apache Software Foundation (ASF) under one or more
# contributor license agreements. See the NOTICE file distributed with
# this work for additional information regarding copyright ownership. The
# ASF licenses this file to you under the Apache License, Version 2.0 (the
# "License"); you may not use this file except in compliance with the
# License. You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations
# under the License.
#
############################################################################
# The start-up, "head", file
HEAD_ASRC = bm3823_head.S
# Common SPARC files
CMN_ASRCS = up_syscall.S
CMN_CSRCS = up_allocateheap.c up_assert.c up_blocktask.c up_copystate.c
CMN_CSRCS += up_createstack.c up_doirq.c up_exit.c up_idle.c up_initialize.c
CMN_CSRCS += up_initialstate.c up_interruptcontext.c up_irq.c up_lowputs.c
CMN_CSRCS += up_mdelay.c up_modifyreg8.c up_modifyreg16.c up_modifyreg32.c
CMN_CSRCS += up_puts.c up_releasepending.c up_releasestack.c
CMN_CSRCS += up_reprioritizertr.c up_schedulesigaction.c up_sigdeliver.c
CMN_CSRCS += up_stackframe.c up_swint1.c up_udelay.c up_unblocktask.c up_usestack.c
# Configuration-dependent common files
ifeq ($(CONFIG_ARCH_STACKDUMP),y)
CMN_CSRCS += up_dumpstate.c
endif
ifeq ($(CONFIG_STACK_COLORATION),y)
CMN_CSRCS += up_checkstack.c
endif
# Required bm3823 files
CHIP_ASRCS = bm3823_exceptions.S
CHIP_CSRCS = bm3823-lowconsole.c bm3823-lowinit.c bm3823-serial.c bm3823-irq.c
ifneq ($(CONFIG_SCHED_TICKLESS),y)
CHIP_CSRCS += bm3823-timerisr.c
endif
# Configuration-dependent files
ifeq ($(CONFIG_SPARC_GPIOIRQ),y)
CHIP_CSRCS +=
endif
arch/sparc/src/bm3823/bm3823-config.h
+102
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@@ -0,0 +1,102 @@
/****************************************************************************
* arch/sparc/src/bm3823/bm3823-config.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __ARCH_SPARC_SRC_BM3823_CONFIG_H
#define __ARCH_SPARC_SRC_BM3823_CONFIG_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <arch/board/board.h>
#include "chip.h"
#include "bm3823-memorymap.h"
#include "bm3823-uart.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* SYS calls ****************************************************************/
/* SYS call 1 and 2 are defined for internal use by the BM3823 port (see
* arch/sparc/include/sparc32/syscall.h). In addition, SYS call 3 is the
* return from a SYS call in kernel mode. The first four syscall values must
* therefore, be
* reserved (0 is not used).
*/
#ifdef CONFIG_BUILD_KERNEL
# if !defined(CONFIG_SYS_RESERVED) || CONFIG_SYS_RESERVED < 4
# error "CONFIG_SYS_RESERVED must be defined to be 4 for a kernel build"
# elif CONFIG_SYS_RESERVED > 4
# warning "CONFIG_SYS_RESERVED should be defined to be 4 for a kernel build"
# endif
#endif
/* UARTs ********************************************************************/
/* Don't enable UARTs not supported by the chip. */
#if CHIP_NUARTS < 1
# undef CONFIG_BM3823_UART1
# undef CONFIG_BM3823_UART2
# undef CONFIG_BM3823_UART3
#elif CHIP_NUARTS < 2
# undef CONFIG_BM3823_UART2
# undef CONFIG_BM3823_UART3
#elif CHIP_NUARTS < 3
# undef CONFIG_BM3823_UART3
#endif
/* Are any UARTs enabled? */
#undef HAVE_UART_DEVICE
#if defined(CONFIG_BM3823_UART1) || defined(CONFIG_BM3823_UART2) || defined(CONFIG_BM3823_UART3)
# define HAVE_UART_DEVICE 1
#endif
/* Is there a serial console? There should be no more than one defined. It
* could be on any UARTn, n=1,.. CHIP_NUARTS
*/
#if defined(CONFIG_UART1_SERIAL_CONSOLE) && defined(CONFIG_BM3823_UART1)
# undef CONFIG_UART2_SERIAL_CONSOLE
# undef CONFIG_UART3_SERIAL_CONSOLE
# define HAVE_SERIAL_CONSOLE 1
#elif defined(CONFIG_UART2_SERIAL_CONSOLE) && defined(CONFIG_BM3823_UART2)
# undef CONFIG_UART1_SERIAL_CONSOLE
# undef CONFIG_UART3_SERIAL_CONSOLE
# define HAVE_SERIAL_CONSOLE 1
#elif defined(CONFIG_UART3_SERIAL_CONSOLE) && defined(CONFIG_BM3823_UART3)
# undef CONFIG_UART1_SERIAL_CONSOLE
# undef CONFIG_UART2_SERIAL_CONSOLE
# define HAVE_SERIAL_CONSOLE 1
#else
# undef CONFIG_UART1_SERIAL_CONSOLE
# undef CONFIG_UART2_SERIAL_CONSOLE
# undef CONFIG_UART3_SERIAL_CONSOLE
# undef HAVE_SERIAL_CONSOLE
#endif
#endif /* __ARCH_SPARC_SRC_BM3823_CONFIG_H */
arch/sparc/src/bm3823/bm3823-irq.c
+327
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@@ -0,0 +1,327 @@
/****************************************************************************
* arch/sparc/src/bm3823/bm3823-irq.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <errno.h>
#include <debug.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include <arch/irq.h>
#include "up_arch.h"
#include "up_internal.h"
#include "bm3823.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Public Data
****************************************************************************/
volatile uint32_t *g_current_regs;
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
#ifndef CONFIG_ARCH_IRQPRIO
static int up_prioritize_irq(int irq, int priority);
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: up_irqinitialize
****************************************************************************/
void up_irqinitialize(void)
{
int irq;
for (irq = 1; irq < NR_IRQS; irq++)
{
/* Skip window overflow, underflow, and flush as well as software
* trap 0,9,10 which we will use as a shutdown, IRQ disable, IRQ enable.
* Also avoid trap 0x70 - 0x7f which cannot happen and where some of the
* space is used to pass parameters to the program.
*/
if (((irq >= 0x00) && (irq <= 0x11)) || ((irq >= 0x20) &&
(irq <= 0xff)))
{
continue;
}
/* Set all interrupts to the default (low) priority */
up_prioritize_irq(irq, 0);
/* Disable all interrupts */
up_disable_irq(irq);
}
/* Initialize GPIO change notification handling */
#ifdef CONFIG_BM3823_GPIOIRQ
bm3823_gpioirqinitialize();
#endif
/* Attach software interrupts */
irq_attach(BM3823_IRQ_SW_SYSCALL_TA0, up_swint0, NULL);
irq_attach(BM3823_IRQ_SW_SYSCALL_TA8, up_swint1, NULL);
/* currents_regs is non-NULL only while processing an interrupt */
g_current_regs = NULL;
/* And finally, enable interrupts */
/* Interrupts are enabled by setting the te bit in the psr status
* register
*/
up_irq_enable();
}
/****************************************************************************
* Name: up_disable_irq
*
* Description:
* Disable the IRQ specified by 'irq'
*
****************************************************************************/
void up_disable_irq(int irq)
{
int bitno;
/* Disable the interrupt by clearing the associated bit in the IEC
* register
*/
DEBUGASSERT(irq >= BM3823_IRQ_FIRST_INTERRUPT &&
irq <= BM3823_IRQ_LAST_INTERRUPT);
if (irq >= BM3823_IRQ_FIRST_INTERRUPT)
{
if (irq <= BM3823_IRQ_LAST_INTERRUPT)
{
/* Disable the interrupt */
bitno = irq - BM3823_IRQ_FIRST_INTERRUPT - 1;
INTER_REG.int_mask &= (~(1 << bitno));
}
else
{
/* Value out of range.. just ignore */
return;
}
}
}
/****************************************************************************
* Name: up_enable_irq
*
* Description:
* Enable the IRQ specified by 'irq'
*
****************************************************************************/
void up_enable_irq(int irq)
{
int bitno;
/* Enable the interrupt by setting the associated bit in the Interrupt_Mask
* Register
*/
DEBUGASSERT(irq >= BM3823_IRQ_FIRST_INTERRUPT &&
irq <= BM3823_IRQ_LAST_INTERRUPT);
if (irq >= BM3823_IRQ_FIRST_INTERRUPT)
{
if (irq <= BM3823_IRQ_LAST_INTERRUPT)
{
/* Enable the interrupt */
bitno = irq - BM3823_IRQ_FIRST_INTERRUPT + 1;
INTER_REG.int_mask |= (1 << bitno);
}
else
{
/* Value out of range.. just ignore */
return;
}
}
}
/****************************************************************************
* Name: up_pending_irq
*
* Description:
* Return true if the interrupt is pending and unmasked.
*
****************************************************************************/
bool up_pending_irq(int irq)
{
int bitno;
uint16_t regval;
uint16_t regval1;
uint16_t regval2;
/* Test if the interrupt is pending by reading both the IEC and IFS
* register. Return true if the bit associated with the irq is both pending
* the IFs and enabled in the IEC.
*/
DEBUGASSERT(irq >= BM3823_IRQ_FIRST_INTERRUPT &&
irq <= BM3823_IRQ_LAST_INTERRUPT);
if (irq >= BM3823_IRQ_FIRST_INTERRUPT)
{
if (irq <= BM3823_IRQ_LAST_INTERRUPT)
{
/* Get the set of unmasked, pending interrupts. */
regval1 = INTER_REG.int_mask;
regval2 = INTER_REG.int_pend_force;
regval = regval1 & regval2;
}
else
{
/* Value out of range.. just ignore */
return false;
}
/* Return true if the interrupt is pending and unmask. */
bitno = irq - BM3823_IRQ_FIRST_INTERRUPT - 1;
return (regval & (1 << bitno)) != 0;
}
return false;
}
/****************************************************************************
* Name: up_clrpend_irq
*
* Description:
* Clear any pending interrupt
*
****************************************************************************/
void up_clrpend_irq(int irq)
{
int bitno;
/* Acknowledge the interrupt by clearing the associated bit in the ITP
* register. It is necessary to do this BEFORE lowering the interrupt
* priority level otherwise recursive interrupts would occur.
*/
DEBUGASSERT(irq >= BM3823_IRQ_FIRST_INTERRUPT &&
irq <= BM3823_IRQ_LAST_INTERRUPT);
if (irq >= BM3823_IRQ_FIRST_INTERRUPT)
{
if (irq <= BM3823_IRQ_LAST_INTERRUPT)
{
/* written with a ‘1’, in Interrupt Clear Register
* will clear the corresponding bit(s) in the interrupt pending
* register
*/
bitno = irq - BM3823_IRQ_FIRST_INTERRUPT - 1;
INTER_REG.int_clear |= (1 << bitno);
}
else
{
/* Value out of range.. just ignore */
return;
}
}
}
/****************************************************************************
* Name: up_prioritize_irq
*
* Description:
* It is possible to change the priority level of an interrupt using the two
* priority levels from the interrupt mask and priority register (ITMP).
* Each interrupt can be assigned to one of two levels as programmed in the
* Interrupt mask and priority register. Level 1 has higher priority than
* level 0. Within each level the interrupts are prioritised
*
****************************************************************************/
#ifndef CONFIG_ARCH_IRQPRIO
static
#endif
int up_prioritize_irq(int irq, int priority)
{
int bitno;
int shift;
/* Don't allow this function to be used for disabling interrupts. */
DEBUGASSERT((unsigned)irq < NR_IRQS && (unsigned)(priority) < 2);
if (irq >= BM3823_IRQ_FIRST_INTERRUPT)
{
if (irq <= BM3823_IRQ_LAST_INTERRUPT)
{
bitno = irq - BM3823_IRQ_FIRST_INTERRUPT - 1;
shift = bitno + 16;
/* Set the new interrupt priority
* (momentarily disabling interrupts)
*/
INTER_REG.int_mask &= (~(1 << shift));
INTER_REG.int_mask |= (priority << shift);
}
else
{
/* Value out of range.. just ignore */
return -EINVAL;
}
}
return OK;
}
arch/sparc/src/bm3823/bm3823-lowconsole.c
+316
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@@ -0,0 +1,316 @@
/****************************************************************************
* arch/sparc/src/bm3823/bm3823-lowconsole.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <arch/board/board.h>
#include "bm3823-config.h"
#include <assert.h>
#include <debug.h>
#include <arch/irq.h>
#include "up_arch.h"
#include "up_internal.h"
#include "bm3823-uart.h"
#include "bm3823.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Private Function Prototypes
****************************************************************************/
/****************************************************************************
* Public Data
****************************************************************************/
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: usart0_reset and usart1_reset
*
* Description:
* Reset USART0 or USART1.
*
****************************************************************************/
#ifdef CONFIG_BM3823_UART1
void uart1_reset(void)
{
/* Clear USART configuration */
uart1_disable();
uart1_parity_config(NONE);
uart1_flow_ctrl_config(OFF);
uart1_loopback_config(OFF);
}
#endif
#ifdef CONFIG_BM3823_UART2
void uart2_reset(void)
{
/* Clear USART configuration */
uart2_disable();
uart2_parity_config(NONE);
uart2_flow_ctrl_config(OFF);
uart2_loopback_config(OFF);
}
#endif
#ifdef CONFIG_BM3823_UART3
void uart3_reset(void)
{
/* Clear USART configuration */
uart3_disable();
uart3_parity_config(NONE);
uart3_flow_ctrl_config(OFF);
uart3_loopback_config(OFF);
}
#endif
/****************************************************************************
* Name: bm3823_uartconfigure
*
* Description:
* Configure a UART as a console.
*
****************************************************************************/
#ifdef HAVE_UART_DEVICE
void bm3823_uartconfigure(uintptr_t uart_base, uint32_t baudrate,
unsigned int parity, unsigned int nbits, bool stop2)
{
if (uart_base == BM3823_UART1_BASE)
{
/* Select baud. */
uart1_set_baudrate(baudrate);
/* Select parity */
if (parity == 1)
{
uart1_parity_config(ODD); /* Odd parity */
}
else if (parity == 2)
{
uart1_parity_config(EVEN); /* Even parity */
}
else
{
uart1_parity_config(NONE); /* Even none */
}
uart1_flow_ctrl_config(OFF);
uart1_loopback_config(OFF);
uart1_enable();
}
else if (uart_base == BM3823_UART2_BASE)
{
/* Select baud. */
uart2_set_baudrate(baudrate);
/* Select parity */
if (parity == 1)
{
uart2_parity_config(ODD); /* Odd parity */
}
else if (parity == 2)
{
uart2_parity_config(EVEN); /* Even parity */
}
else
{
uart2_parity_config(NONE); /* Even none */
}
uart2_flow_ctrl_config(OFF);
uart2_loopback_config(OFF);
uart2_enable();
}
else
{
return;
}
}
#endif
#ifdef CONFIG_BM3823_UART1
void uart1_configure(void)
{
uint32_t i = 0;
/* Select baud. */
uart1_set_baudrate(CONFIG_UART1_BAUD);
i = EXTER_REG.uart_data1;
i = EXTER_REG.uart_data1;
i = i;
EXTER_REG.uart_status1 = 0;
/* Select parity */
#if CONFIG_UART1_PARITY == 1
uart1_parity_config(ODD); /* Odd parity */
#elif CONFIG_UART1_PARITY == 2
uart1_parity_config(EVEN); /* Even parity */
#else
uart1_parity_config(NONE); /* Even none */
#endif
uart1_flow_ctrl_config(OFF);
uart1_loopback_config(OFF);
uart1_enable();
GPIO_DIR = GPIO_DIR | 0x8000;
GPIO_DIR = GPIO_DIR & 0xffffbfff;
}
#endif
#ifdef CONFIG_BM3823_UART2
void uart2_configure(void)
{
/* Select baud. */
uart2_set_baudrate(CONFIG_UART2_BAUD);
/* Select parity */
#if CONFIG_UART2_PARITY == 1
uart2_parity_config(ODD); /* Odd parity */
#elif CONFIG_UART2_PARITY == 2
uart2_parity_config(EVEN); /* Even parity */
#else
uart2_parity_config(NONE); /* Even none */
#endif
uart2_flow_ctrl_config(OFF);
uart2_loopback_config(OFF);
uart2_enable();
}
#endif
#ifdef CONFIG_BM3823_UART3
void uart3_configure(void)
{
/* Select baud. */
uart3_set_baudrate(CONFIG_UART3_BAUD);
/* Select parity */
#if CONFIG_UART3_PARITY == 1
uart2_parity_config(ODD); /* Odd parity */
#elif CONFIG_UART3_PARITY == 2
uart3_parity_config(EVEN); /* Even parity */
#else
uart3_parity_config(NONE); /* Even none */
#endif
uart3_flow_ctrl_config(OFF);
uart3_loopback_config(OFF);
uart3_enable();
}
#endif
/****************************************************************************
* Name: up_consoleinit
*
* Description:
* Initialize a console for debug output. This function is called very
* early in the initialization sequence to configure the serial console uart
* (only).
*
****************************************************************************/
void up_consoleinit(void)
{
#ifdef HAVE_SERIAL_CONSOLE
# if defined(CONFIG_UART1_SERIAL_CONSOLE)
uart1_configure();
# elif defined(CONFIG_UART2_SERIAL_CONSOLE)
uart2_configure();
# elif defined(CONFIG_UART3_SERIAL_CONSOLE)
uart3_configure();
# endif
#endif
}
/****************************************************************************
* Name: up_lowputc
*
* Description:
* Output one byte on the serial console
*
****************************************************************************/
void up_lowputc(char ch)
{
#ifdef HAVE_SERIAL_CONSOLE
# if defined(CONFIG_UART1_SERIAL_CONSOLE)
while (!uart1_tx_ready())
{
}
uart1_send_byte(ch);
# elif defined(CONFIG_UART2_SERIAL_CONSOLE)
while (!uart2_tx_ready())
{
}
uart2_send_byte(ch);
# elif defined(CONFIG_UART3_SERIAL_CONSOLE)
while (!uart3_tx_ready())
{
}
uart3_send_byte(ch);
# endif
#endif
}
arch/sparc/src/bm3823/bm3823-lowinit.c
+172
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/****************************************************************************
* arch/sparc/src/bm3823/bm3823-lowinit.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include "bm3823-config.h"
#include "up_internal.h"
#include "bm3823.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#if defined(CONFIG_WDTO_15MS)
# define WDTO_VALUE WDTO_15MS
#elif defined(CONFIG_WDTO_30MS)
# define WDTO_VALUE WDTO_30MS
#elif defined(CONFIG_WDTO_60MS)
# define WDTO_VALUE WDTO_60MS
#elif defined(CONFIG_WDTO_120MS)
# define WDTO_VALUE WDTO_120MS
#elif defined(CONFIG_WDTO_1250MS)
# define WDTO_VALUE WDTO_250MS
#elif defined(CONFIG_WDTO_500MS)
# define WDTO_VALUE WDTO_500MS
#elif defined(CONFIG_WDTO_1S)
# define WDTO_VALUE WDTO_1S
#elif defined(CONFIG_WDTO_2S)
# define WDTO_VALUE WDTO_2S
#elif defined(CONFIG_WDTO_4S)
# define WDTO_VALUE WDTO_4S
#else /* if defined(CONFIG_WDTO_8S) */
# define WDTO_VALUE WDTO_8S
#endif
/****************************************************************************
* Private Types
****************************************************************************/
/****************************************************************************
* Private Function Prototypes
****************************************************************************/
/****************************************************************************
* Public Data
****************************************************************************/
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: showprogress
*
* Description:
* Print a character on the UART to show boot status.
*
****************************************************************************/
#ifdef CONFIG_DEBUG_FEATURES
# define showprogress(c) up_lowputc(c)
#else
# define showprogress(c)
#endif
/****************************************************************************
* Name: up_wdtinit
*
* Description:
* Initialize the watchdog per the NuttX configuration.
*
****************************************************************************/
void wdt_disable(void)
{
}
void wdt_enable(uint32_t wdt)
{
}
static inline void up_wdtinit(void)
{
#ifdef CONFIG_SPARC_WDT
wdt_enable(WDTO_VALUE);
#endif
}
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: up_lowinit
*
* Description:
* This performs basic initialization of the USART used for the serial
* console. Its purpose is to get the console output available as soon
* as possible.
*
****************************************************************************/
void up_lowinit(void)
{
uint32_t *dest;
/* Disable the watchdog timer */
wdt_disable();
/* Initialize the watchdog timer */
up_wdtinit();
/* Initialize a console (probably a serial console) */
up_consoleinit();
showprogress('A');
/* Clear .bss. We'll do this inline (vs. calling memset) just to be
* certain that there are no issues with the state of global variables.
*/
for (dest = &_bss_start; dest < &_end; )
{
*dest++ = 0;
}
showprogress('B');
/* Perform early serial initialization (so that we will have debug output
* available as soon as possible).
*/
#ifdef USE_EARLYSERIALINIT
up_earlyserialinit();
#endif
/* Perform board-level initialization */
bm3823_boardinitialize();
/* Then start NuttX */
showprogress('\r');
showprogress('\n');
}
arch/sparc/src/bm3823/bm3823-memorymap.h
+43
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@@ -0,0 +1,43 @@
/****************************************************************************
* arch/sparc/src/bm3823/bm3823-memorymap.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __ARCH_SPARC_SRC_BM3823_BM3823_MEMORYMAP_H
#define __ARCH_SPARC_SRC_BM3823_BM3823_MEMORYMAP_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
# define BM3823_INTER_REG_BASE 0x80000000
# define BM3823_EXTER_REG_BASE 0x81000000
/* UART 1-3 Register Base Addresses */
# define BM3823_UART1_BASE (BM3823_EXTER_REG_BASE + 0x70)
# define BM3823_UART2_BASE (BM3823_EXTER_REG_BASE + 0x80)
# define BM3823_UART3_BASE (BM3823_EXTER_REG_BASE + 0x1C0)
# define BM3823_UART4_BASE (BM3823_EXTER_REG_BASE + 0x1E0)
#endif /* __ARCH_SPARC_SRC_BM3823_BM3823_MEMORYMAP_H */
arch/sparc/src/bm3823/bm3823-serial.c
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