mirror of
https://github.com/apache/nuttx.git
synced 2026-06-07 01:05:54 +08:00
Add GPIO library functions
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2730 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo
@@ -51,9 +51,9 @@ CMN_CSRCS = up_assert.c up_blocktask.c up_copystate.c up_createstack.c \
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# Required SAM3U files
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CHIP_ASRCS =
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CHIP_CSRCS = lpc17_start.c
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CHIP_CSRCS = lpc17_gpio.c lpc17_start.c
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#CHIP_CSRCS = lpc17_allocateheap.c lpc17_clockconfig.c lpc17_gpioirq.c \
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# lpc17_irq.c lpc17_lowputc.c lpc17_pio.c lpc17_serial.c \
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# lpc17_irq.c lpc17_lowputc.c lpc17_gpio.c lpc17_serial.c \
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# lpc17_start.c lpc17_timerisr.c
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# Configuration-dependent SAM3U files
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@@ -43,7 +43,7 @@
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#include <nuttx/config.h>
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#include "chip.h"
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#include "lp17_memorymap.h"
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#include "lpc17_memorymap.h"
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/************************************************************************************
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* Pre-processor Definitions
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@@ -43,7 +43,7 @@
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#include <nuttx/config.h>
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#include "chip.h"
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#include "lp17_memorymap.h"
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#include "lpc17_memorymap.h"
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/************************************************************************************
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* Pre-processor Definitions
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@@ -43,7 +43,7 @@
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#include <nuttx/config.h>
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#include "chip.h"
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#include "lp17_memorymap.h"
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#include "lpc17_memorymap.h"
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/************************************************************************************
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* Pre-processor Definitions
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@@ -43,7 +43,7 @@
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#include <nuttx/config.h>
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#include "chip.h"
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#include "lp17_memorymap.h"
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#include "lpc17_memorymap.h"
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/************************************************************************************
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* Pre-processor Definitions
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@@ -43,7 +43,7 @@
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#include <nuttx/config.h>
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#include "chip.h"
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#include "lp17_memorymap.h"
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#include "lpc17_memorymap.h"
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/************************************************************************************
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* Pre-processor Definitions
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Executable
+652
File diff suppressed because it is too large
Load Diff
@@ -43,7 +43,7 @@
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#include <nuttx/config.h>
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#include "chip.h"
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#include "lp17_memorymap.h"
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#include "lpc17_memorymap.h"
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/************************************************************************************
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* Pre-processor Definitions
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@@ -66,7 +66,7 @@
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/* GPIO interrupt block register offsets ********************************************/
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#define LPC17_GPIOINT(n) (0x10*(n) + 0x80)
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#define LPC17_GPIOINT_OFFSET(n) (0x10*(n) + 0x80)
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#define LPC17_GPIOINT0_OFFSET 0x0080
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#define LPC17_GPIOINT2_OFFSET 0x00a0
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@@ -80,7 +80,7 @@
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/* Register addresses ***************************************************************/
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/* GPIO block register addresses ****************************************************/
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#define LPC17_FIO_BASE(n) (LPC17_GPIO_BASE+LPC17_GPIOINT(n))
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#define LPC17_FIO_BASE(n) (LPC17_GPIO_BASE+LPC17_GPIOINT_OFFSET(n))
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#define LPC17_FIO0_BASE (LPC17_GPIO_BASE+LPC17_FIO0_OFFSET)
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#define LPC17_FIO1_BASE (LPC17_GPIO_BASE+LPC17_FIO1_OFFSET)
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#define LPC17_FIO2_BASE (LPC17_GPIO_BASE+LPC17_FIO2_OFFSET)
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@@ -125,33 +125,33 @@
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/* GPIO interrupt block register addresses ******************************************/
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#define LPC17_GPIOINT(n) (0x10*(n) + 0x80)
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#define LPC17_GPIOINT0_OFFSET 0x0080
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#define LPC17_GPIOINT2_OFFSET 0x00a0
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#define LPC17_GPIOINTn_BASE(n) (LPC17_GPIOINT_BASE+LPC17_GPIOINT_OFFSET(n))
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#define LPC17_GPIOINT0_BASE (LPC17_GPIOINT_BASE+LPC17_GPIOINT0_OFFSET)
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#define LPC17_GPIOINT2_BASE (LPC17_GPIOINT_BASE+LPC17_GPIOINT2_OFFSET)
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#define LPC17_GPIOINT_IOINTSTATUS (LPC17_GPIOINT0_OFFSET+LPC17_GPIOINT_IOINTSTATUS_OFFSET)
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#define LPC17_GPIOINT_IOINTSTATUS (LPC17_GPIOINT0_BASE+LPC17_GPIOINT_IOINTSTATUS_OFFSET)
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#define LPC17_GPIOINT_INTSTATR(n) (LPC17_GPIOINT(n)+LPC17_GPIOINT_INTSTATR_OFFSET)
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#define LPC17_GPIOINT_INTSTATF(n) (LPC17_GPIOINT(n)+LPC17_GPIOINT_INTSTATF_OFFSET)
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#define LPC17_GPIOINT_INTCLR(n) (LPC17_GPIOINT(n)+LPC17_GPIOINT_INTCLR_OFFSET)
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#define LPC17_GPIOINT_INTENR(n) (LPC17_GPIOINT(n)+LPC17_GPIOINT_INTENR_OFFSET)
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#define LPC17_GPIOINT_INTENF(n) (LPC17_GPIOINT(n)+LPC17_GPIOINT_INTENF_OFFSET)
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#define LPC17_GPIOINT_INTSTATR(n) (LPC17_GPIOINTn_BASE(n)+LPC17_GPIOINT_INTSTATR_OFFSET)
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#define LPC17_GPIOINT_INTSTATF(n) (LPC17_GPIOINTn_BASE(n)+LPC17_GPIOINT_INTSTATF_OFFSET)
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#define LPC17_GPIOINT_INTCLR(n) (LPC17_GPIOINTn_BASE(n)+LPC17_GPIOINT_INTCLR_OFFSET)
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#define LPC17_GPIOINT_INTENR(n) (LPC17_GPIOINTn_BASE(n)+LPC17_GPIOINT_INTENR_OFFSET)
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#define LPC17_GPIOINT_INTENF(n) (LPC17_GPIOINTn_BASE(n)+LPC17_GPIOINT_INTENF_OFFSET)
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/* Pins P0.0-31 (P0.12-14 nad P0.31 are reserved) */
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#define LPC17_GPIOINT0_INTSTATR (LPC17_GPIOINT0_OFFSET+LPC17_GPIOINT_INTSTATR_OFFSET)
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#define LPC17_GPIOINT0_INTSTATF (LPC17_GPIOINT0_OFFSET+LPC17_GPIOINT_INTSTATF_OFFSET)
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#define LPC17_GPIOINT0_INTCLR (LPC17_GPIOINT0_OFFSET+LPC17_GPIOINT_INTCLR_OFFSET)
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#define LPC17_GPIOINT0_INTENR (LPC17_GPIOINT0_OFFSET+LPC17_GPIOINT_INTENR_OFFSET)
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#define LPC17_GPIOINT0_INTENF (LPC17_GPIOINT0_OFFSET+LPC17_GPIOINT_INTENF_OFFSET)
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#define LPC17_GPIOINT0_INTSTATR (LPC17_GPIOINT0_BASE+LPC17_GPIOINT_INTSTATR_OFFSET)
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#define LPC17_GPIOINT0_INTSTATF (LPC17_GPIOINT0_BASE+LPC17_GPIOINT_INTSTATF_OFFSET)
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#define LPC17_GPIOINT0_INTCLR (LPC17_GPIOINT0_BASE+LPC17_GPIOINT_INTCLR_OFFSET)
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#define LPC17_GPIOINT0_INTENR (LPC17_GPIOINT0_BASE+LPC17_GPIOINT_INTENR_OFFSET)
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#define LPC17_GPIOINT0_INTENF (LPC17_GPIOINT0_BASE+LPC17_GPIOINT_INTENF_OFFSET)
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/* Pins P2.0-13 (P0.14-31 are reserved) */
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#define LPC17_GPIOINT2_INTSTATR (LPC17_GPIOINT2_OFFSET+LPC17_GPIOINT_INTSTATR_OFFSET)
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#define LPC17_GPIOINT2_INTSTATF (LPC17_GPIOINT2_OFFSET+LPC17_GPIOINT_INTSTATF_OFFSET)
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#define LPC17_GPIOINT2_INTCLR (LPC17_GPIOINT2_OFFSET+LPC17_GPIOINT_INTCLR_OFFSET)
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#define LPC17_GPIOINT2_INTENR (LPC17_GPIOINT2_OFFSET+LPC17_GPIOINT_INTENR_OFFSET)
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#define LPC17_GPIOINT2_INTENF (LPC17_GPIOINT2_OFFSET+LPC17_GPIOINT_INTENF_OFFSET)
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#define LPC17_GPIOINT2_INTSTATR (LPC17_GPIOINT2_BASE+LPC17_GPIOINT_INTSTATR_OFFSET)
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#define LPC17_GPIOINT2_INTSTATF (LPC17_GPIOINT2_BASE+LPC17_GPIOINT_INTSTATF_OFFSET)
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#define LPC17_GPIOINT2_INTCLR (LPC17_GPIOINT2_BASE+LPC17_GPIOINT_INTCLR_OFFSET)
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#define LPC17_GPIOINT2_INTENR (LPC17_GPIOINT2_BASE+LPC17_GPIOINT_INTENR_OFFSET)
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#define LPC17_GPIOINT2_INTENF (LPC17_GPIOINT2_BASE+LPC17_GPIOINT_INTENF_OFFSET)
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/* Register bit definitions *********************************************************/
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/* GPIO block register bit definitions **********************************************/
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@@ -43,7 +43,7 @@
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#include <nuttx/config.h>
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#include "chip.h"
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#include "lp17_memorymap.h"
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#include "lpc17_memorymap.h"
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/************************************************************************************
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* Pre-processor Definitions
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@@ -43,7 +43,7 @@
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#include <nuttx/config.h>
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#include "chip.h"
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#include "lp17_memorymap.h"
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#include "lpc17_memorymap.h"
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/************************************************************************************
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* Pre-processor Definitions
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@@ -58,30 +58,51 @@
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/* Bit-encoded input to lpc17_configgpio() ******************************************/
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/* Encoding: FFMM OGGG PPPN NNNN
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/* Encoding: FFFx MMOV PPPN NNNN
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*
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* Pin Function: FF
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* Pin Mode: MM (input pins)
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* Pin Function: FFF
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* Pin Mode bits: MM
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* Open drain: O (output pins)
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* GPIO Mode bits: GGG
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* Initial value: V (output pins)
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* Port number: PPP (0-4)
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* Pin number: NNNNN (0-31)
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*/
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/* Pin Function: FF */
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#define GPIO_FUNC_SHIFT (14) /* Bits 14-15: Pin function select */
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#define GPIO_FUNC_MASK (3 << GPIO_FUNC_SHIFT)
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# define GPIO_PIN 0 (0 << GPIO_FUNC_SHIFT)
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# define GPIO_ALT1 1 (1 << GPIO_FUNC_SHIFT)
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# define GPIO_ALT2 2 (2 << GPIO_FUNC_SHIFT)
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# define GPIO_ALT3 3 (3 << GPIO_FUNC_SHIFT)
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/* Pin Function bits: FFF
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* Only meaningful when the GPIO function is GPIO_PIN
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*/
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#define GPIO_ISGPIO(ps) (((ps) & GPIO_FUNC_MASK) == GPIO_PIN)
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#define GPIO_FUNC_SHIFT (13) /* Bits 13-15: GPIO mode */
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#define GPIO_FUNC_MASK (7 << GPIO_FUNC_SHIFT)
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# define GPIO_INPUT (0 << GPIO_FUNC_SHIFT) /* 000 GPIO input pin */
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# define GPIO_INTFE (1 << GPIO_FUNC_SHIFT) /* 001 GPIO interrupt falling edge */
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# define GPIO_INTRE (2 << GPIO_FUNC_SHIFT) /* 010 GPIO interrupt rising edge */
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# define GPIO_INTBOTH (3 << GPIO_FUNC_SHIFT) /* 011 GPIO interrupt both edges */
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# define GPIO_OUTPUT (4 << GPIO_FUNC_SHIFT) /* 100 GPIO outpout pin */
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# define GPIO_ALT1 (5 << GPIO_FUNC_SHIFT) /* 101 Alternate function 1 */
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# define GPIO_ALT2 (6 << GPIO_FUNC_SHIFT) /* 110 Alternate function 2 */
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# define GPIO_ALT3 (7 << GPIO_FUNC_SHIFT) /* 111 Alternate function 3 */
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#define GPIO_EDGE_SHIFT (13) /* Bits 13-14: Interrupt edge bits */
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#define GPIO_EDGE_MASK (3 << GPIO_EDGE_SHIFT)
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#define GPIO_INOUT_MASK GPIO_OUTPUT
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#define GPIO_FE_MASK GPIO_INTFE
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#define GPIO_RE_MASK GPIO_INTRE
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#define GPIO_ISGPIO(ps) ((uint16_t(ps) & GPIO_FUNC_MASK) <= GPIO_OUTPUT)
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#define GPIO_ISALT(ps) ((uint16_t(ps) & GPIO_FUNC_MASK) > GPIO_OUTPUT)
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#define GPIO_ISINPUT(ps) ((ps) & GPIO_FUNC_MASK) == GPIO_INPUT)
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#define GPIO_ISOUTPUT(ps) ((ps) & GPIO_FUNC_MASK) == GPIO_OUTPUT)
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#define GPIO_ISINORINT(ps) ((ps) & GPIO_INOUT_MASK) == 0)
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#define GPIO_ISOUTORALT(ps) ((ps) & GPIO_INOUT_MASK) != 0)
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#define GPIO_ISINTERRUPT(ps) (GPIO_ISOUTPUT(ps) && !GPIO_ISINPUT(ps))
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#define GPIO_ISFE(ps) ((ps) & GPIO_FE_MASK) != 0)
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#define GPIO_ISRE(ps) ((ps) & GPIO_RE_MASK) != 0)
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/* Pin Mode: MM */
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#define GPIO_PUMODE_SHIFT (12) /* Bits 12-13: Pin pull-up mode */
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#define GPIO_PUMODE_SHIFT (10) /* Bits 10-11: Pin pull-up mode */
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#define GPIO_PUMODE_MASK (3 << GPIO_PUMODE_SHIFT)
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# define GPIO_PULLUP (0 << GPIO_PUMODE_SHIFT) /* Pull-up resistor enabled */
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# define GPIO_REPEATER (1 << GPIO_PUMODE_SHIFT) /* Repeater mode enabled */
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@@ -90,29 +111,13 @@
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/* Open drain: O */
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#define GPIO_OPEN_DRAIN (1 << 11) /* Bit 11: Open drain mode */
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#define GPIO_OPEN_DRAIN (1 << 9) /* Bit 9: Open drain mode */
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/* GPIO Mode bits: GGG
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* Only meaningful when the GPIO function is GPIO_PIN
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*/
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/* Initial value: V */
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#define GPIO_GMODE_SHIFT (8) /* Bits 8-10: GPIO mode */
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#define GPIO_GMODE_MASK (7 << GPIO_GMODE_SHIFT)
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# define GPIO_INPUT (0 << GPIO_GMODE_SHIFT) /* 000 GPIO input pin */
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# define GPIO_INTFE (1 << GPIO_GMODE_SHIFT) /* 001 GPIO interrupt falling edge */
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# define GPIO_INTRE (2 << GPIO_GMODE_SHIFT) /* 010 GPIO interrupt rising edge */
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# define GPIO_INTBOTH (3 << GPIO_GMODE_SHIFT) /* 011 GPIO interrupt both edges */
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# define GPIO_OUTPUT (4 << GPIO_GMODE_SHIFT) /* 100 GPIO outpout pin */
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#define GPIO_OUTPUT_MASK GPIO_OUTPUT
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#define GPIO_FE_MASK GPIO_INTFE
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#define GPIO_RE_MASK GPIO_INTRE
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#define GPIO_ISINPUT(ps) ((ps) & GPIO_GMODE_MASK) == GPIO_INPUT)
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#define GPIO_ISOUTPUT(ps) ((ps) & GPIO_OUTPUT_MASK) != 0)
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#define GPIO_ISINTERRUPT(ps) (!GPIO_ISINPUT(ps) && !GPIO_ISOUTPUT(ps))
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#define GPIO_ISFE(ps) ((ps) & GPIO_FE_MASK) != 0)
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#define GPIO_ISRE(ps) ((ps) & GPIO_RE_MASK) != 0)
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#define GPIO_VALUE (1 << 8) /* Bit 8: Initial GPIO output value */
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#define GPIO_VALUE_ONE GPIO_VALUE
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#define GPIO_VALUE_ZERO (0)
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/* Port number: PPP (0-4) */
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@@ -124,6 +129,8 @@
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# define GPIO_PORT3 (3 << GPIO_PORT_SHIFT)
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# define GPIO_PORT4 (4 << GPIO_PORT_SHIFT)
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#define GPIO_NPORTS 5
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/* Pin number: NNNNN (0-31) */
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#define GPIO_PIN_SHIFT 0 /* Bits 0-4: GPIO number: 0-31 */
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@@ -348,6 +355,18 @@ extern "C" {
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#define EXTERN extern
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#endif
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/* These tables have global scope only because they are shared between lpc_gpio.c
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* and lpc17_gpiodbg.c
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*/
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extern const uint32_t g_fiobase[GPIO_NPORTS];
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extern const uint32_t g_intbase[GPIO_NPORTS];
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extern const uint32_t g_lopinsel[GPIO_NPORTS];
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extern const uint32_t g_hipinsel[GPIO_NPORTS];
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extern const uint32_t g_lopinmode[GPIO_NPORTS];
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extern const uint32_t g_hipinmode[GPIO_NPORTS];
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extern const uint32_t g_odmode[GPIO_NPORTS];
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/************************************************************************************
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* Public Function Prototypes
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************************************************************************************/
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@@ -43,7 +43,7 @@
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#include <nuttx/config.h>
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#include "chip.h"
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#include "lp17_memorymap.h"
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#include "lpc17_memorymap.h"
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/************************************************************************************
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* Pre-processor Definitions
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@@ -43,7 +43,7 @@
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#include <nuttx/config.h>
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#include "chip.h"
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#include "lp17_memorymap.h"
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#include "lpc17_memorymap.h"
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/************************************************************************************
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* Pre-processor Definitions
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@@ -106,6 +106,12 @@
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/* Register bit definitions *********************************************************/
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/* Pin Function Select register 0 (PINSEL0: 0x4002c000) */
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#define PINCONN_PINSEL_GPIO (0)
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#define PINCONN_PINSEL_ALT1 (1)
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#define PINCONN_PINSEL_ALT2 (2)
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#define PINCONN_PINSEL_ALT3 (3)
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#define PINCONN_PINSEL_MASK (3)
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#define PINCONN_PINSELL_SHIFT(n) ((n) << 1) /* n=0,1,..,15 */
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#define PINCONN_PINSELL_MASK(n) (3 << PINCONN_PINSELL_SHIFT(n))
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#define PINCONN_PINSELH_SHIFT(n) (((n)-16) << 1) /* n=16,17,..31 */
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@@ -457,21 +463,21 @@
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#define PINCONN_PINMODE4_P2p4_SHIFT (8) /* Bits 8-9: P2.4 mode control */
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#define PINCONN_PINMODE4_P2p4_MASK (3 << PINCONN_PINMODE4_P2p4_SHIFT)
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#define PINCONN_PINMODE4_P2p5_SHIFT (10) /* Bits 10-11: P2.5 mode control */
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#define PINCONN_PINMODE4_P2p6_MASK (3 << PINCONN_PINMODE4_P2p5_SHIFT)
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#define PINCONN_PINMODE4_P2p5_MASK (3 << PINCONN_PINMODE4_P2p5_SHIFT)
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#define PINCONN_PINMODE4_P2p6_SHIFT (12) /* Bits 12-13: P2.6 mode control */
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#define PINCONN_PINMODE4_P2p7_MASK (3 << PINCONN_PINMODE4_P2p6_SHIFT)
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#define PINCONN_PINMODE4_P2p6_MASK (3 << PINCONN_PINMODE4_P2p6_SHIFT)
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#define PINCONN_PINMODE4_P2p7_SHIFT (14) /* Bits 14-15: P2.7 mode control */
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#define PINCONN_PINMODE4_P2p8_MASK (3 << PINCONN_PINMODE4_P2p7_SHIFT)
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#define PINCONN_PINMODE4_P2p7_MASK (3 << PINCONN_PINMODE4_P2p7_SHIFT)
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#define PINCONN_PINMODE4_P2p8_SHIFT (16) /* Bits 16-17: P2.8 mode control */
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#define PINCONN_PINMODE4_P2p9_MASK (3 << PINCONN_PINMODE4_P2p8_SHIFT)
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#define PINCONN_PINMODE4_P2p8_MASK (3 << PINCONN_PINMODE4_P2p8_SHIFT)
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#define PINCONN_PINMODE4_P2p9_SHIFT (18) /* Bits 18-19: P2.9 mode control */
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#define PINCONN_PINMODE4_P2p10_MASK (3 << PINCONN_PINMODE4_P2p9_SHIFT)
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#define PINCONN_PINMODE4_P2p9_MASK (3 << PINCONN_PINMODE4_P2p9_SHIFT)
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#define PINCONN_PINMODE4_P2p10_SHIFT (20) /* Bits 20-21: P2.10 mode control */
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#define PINCONN_PINMODE4_P2p11_MASK (3 << PINCONN_PINMODE4_P2p10_SHIFT)
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#define PINCONN_PINMODE4_P2p10_MASK (3 << PINCONN_PINMODE4_P2p10_SHIFT)
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#define PINCONN_PINMODE4_P2p11_SHIFT (22) /* Bits 22-23: P2.11 mode control */
|
||||
#define PINCONN_PINMODE4_P2p12_MASK (3 << PINCONN_PINMODE4_P2p11_SHIFT)
|
||||
#define PINCONN_PINMODE4_P2p11_MASK (3 << PINCONN_PINMODE4_P2p11_SHIFT)
|
||||
#define PINCONN_PINMODE4_P2p12_SHIFT (24) /* Bits 24-25: P2.12 mode control */
|
||||
#define PINCONN_PINMODE4_P2p13_MASK (3 << PINCONN_PINMODE4_P2p12_SHIFT)
|
||||
#define PINCONN_PINMODE4_P2p12_MASK (3 << PINCONN_PINMODE4_P2p12_SHIFT)
|
||||
#define PINCONN_PINMODE4_P2p13_SHIFT (26) /* Bits 26-27: P2.13 mode control */
|
||||
#define PINCONN_PINMODE4_P2p13_MASK (3 << PINCONN_PINMODE4_P2p13_SHIFT)
|
||||
/* Bits 28-31: Reserved */
|
||||
|
||||
@@ -43,7 +43,7 @@
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include "chip.h"
|
||||
#include "lp17_memorymap.h"
|
||||
#include "lpc17_memorymap.h"
|
||||
|
||||
/************************************************************************************
|
||||
* Pre-processor Definitions
|
||||
|
||||
@@ -43,7 +43,7 @@
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include "chip.h"
|
||||
#include "lp17_memorymap.h"
|
||||
#include "lpc17_memorymap.h"
|
||||
|
||||
/************************************************************************************
|
||||
* Pre-processor Definitions
|
||||
|
||||
@@ -43,7 +43,7 @@
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include "chip.h"
|
||||
#include "lp17_memorymap.h"
|
||||
#include "lpc17_memorymap.h"
|
||||
|
||||
/************************************************************************************
|
||||
* Pre-processor Definitions
|
||||
|
||||
@@ -43,7 +43,7 @@
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include "chip.h"
|
||||
#include "lp17_memorymap.h"
|
||||
#include "lpc17_memorymap.h"
|
||||
|
||||
/************************************************************************************
|
||||
* Pre-processor Definitions
|
||||
|
||||
@@ -43,7 +43,7 @@
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include "chip.h"
|
||||
#include "lp17_memorymap.h"
|
||||
#include "lpc17_memorymap.h"
|
||||
|
||||
/************************************************************************************
|
||||
* Pre-processor Definitions
|
||||
|
||||
@@ -43,7 +43,7 @@
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include "chip.h"
|
||||
#include "lp17_memorymap.h"
|
||||
#include "lpc17_memorymap.h"
|
||||
|
||||
/************************************************************************************
|
||||
* Pre-processor Definitions
|
||||
|
||||
@@ -43,7 +43,7 @@
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include "chip.h"
|
||||
#include "lp17_memorymap.h"
|
||||
#include "lpc17_memorymap.h"
|
||||
|
||||
/************************************************************************************
|
||||
* Pre-processor Definitions
|
||||
|
||||
@@ -43,7 +43,7 @@
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include "chip.h"
|
||||
#include "lp17_memorymap.h"
|
||||
#include "lpc17_memorymap.h"
|
||||
|
||||
/************************************************************************************
|
||||
* Pre-processor Definitions
|
||||
|
||||
@@ -43,7 +43,7 @@
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include "chip.h"
|
||||
#include "lp17_memorymap.h"
|
||||
#include "lpc17_memorymap.h"
|
||||
|
||||
/************************************************************************************
|
||||
* Pre-processor Definitions
|
||||
|
||||
@@ -44,7 +44,7 @@
|
||||
#include <nuttx/ohci.h>
|
||||
|
||||
#include "chip.h"
|
||||
#include "lp17_memorymap.h"
|
||||
#include "lpc17_memorymap.h"
|
||||
|
||||
/************************************************************************************
|
||||
* Pre-processor Definitions
|
||||
|
||||
@@ -43,7 +43,7 @@
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include "chip.h"
|
||||
#include "lp17_memorymap.h"
|
||||
#include "lpc17_memorymap.h"
|
||||
|
||||
/************************************************************************************
|
||||
* Pre-processor Definitions
|
||||
|
||||
Reference in New Issue
Block a user