risc-v/esp32c6: Remove duplicated esp32c6 implementation

This commit is contained in:
Eren Terzioglu
2023-12-27 15:16:16 +03:00
committed by Alin Jerpelea
parent 26f0a52059
commit 721c37a876
47 changed files with 0 additions and 11745 deletions
-27
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@@ -90,29 +90,6 @@ config ARCH_CHIP_ESP32C3
---help---
Espressif ESP32-C3 (RV32IMC).
config ARCH_CHIP_ESP32C6
bool "Espressif ESP32-C6"
select ARCH_RV32
select ARCH_RV_ISA_M
select ARCH_RV_ISA_A
select ARCH_RV_ISA_C
select ARCH_VECNOTIRQ
select ARCH_HAVE_RESET
select LIBC_ARCH_MEMCPY
select LIBC_ARCH_MEMCHR
select LIBC_ARCH_MEMCMP
select LIBC_ARCH_MEMMOVE
select LIBC_ARCH_MEMSET
select LIBC_ARCH_STRCHR
select LIBC_ARCH_STRCMP
select LIBC_ARCH_STRCPY
select LIBC_ARCH_STRLCPY
select LIBC_ARCH_STRNCPY
select LIBC_ARCH_STRLEN
select LIBC_ARCH_STRNLEN
---help---
Espressif ESP32-C6 (RV32IMAC).
config ARCH_CHIP_ESPRESSIF
bool "Espressif ESP32 family"
---help---
@@ -332,7 +309,6 @@ config ARCH_CHIP
default "litex" if ARCH_CHIP_LITEX
default "bl602" if ARCH_CHIP_BL602
default "esp32c3" if ARCH_CHIP_ESP32C3
default "esp32c6" if ARCH_CHIP_ESP32C6
default "espressif" if ARCH_CHIP_ESPRESSIF
default "c906" if ARCH_CHIP_C906
default "mpfs" if ARCH_CHIP_MPFS
@@ -484,9 +460,6 @@ endif
if ARCH_CHIP_ESP32C3
source "arch/risc-v/src/esp32c3/Kconfig"
endif
if ARCH_CHIP_ESP32C6
source "arch/risc-v/src/esp32c6/Kconfig"
endif
if ARCH_CHIP_ESPRESSIF
source "arch/risc-v/src/espressif/Kconfig"
endif
-24
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@@ -1,24 +0,0 @@
/****************************************************************************
* arch/risc-v/include/esp32c6/chip.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __ARCH_RISCV_INCLUDE_ESP32C6_CHIP_H
#define __ARCH_RISCV_INCLUDE_ESP32C6_CHIP_H
#endif /* __ARCH_RISCV_INCLUDE_ESP32C6_CHIP_H */
-260
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@@ -1,260 +0,0 @@
/****************************************************************************
* arch/risc-v/include/esp32c6/irq.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __ARCH_RISCV_INCLUDE_ESP32C6_IRQ_H
#define __ARCH_RISCV_INCLUDE_ESP32C6_IRQ_H
/****************************************************************************
* Included Files
****************************************************************************/
#ifndef __ASSEMBLY__
# include <arch/csr.h>
#endif
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Interrupt Matrix
* The Interrupt Matrix embedded in the ESP32-C6 independently allocates
* peripheral interrupt sources to the CPUs peripheral interrupts.
* This configuration is highly flexible in order to meet many different
* needs.
*
* Features
* - Accepts 77 peripheral interrupt sources as input.
* - Generate 31 peripheral interrupts to CPU as output.
* - Queries current interrupt status of peripheral interrupt sources.
*/
#define ESP32C6_WIFI_MAC_PERIPH 0 /* interrupt of WiFi MAC, level */
#define ESP32C6_WIFI_MAC_NMI_PERIPH 1 /* interrupt of WiFi MAC, NMI, use if MAC have bug to fix in NMI */
#define ESP32C6_WIFI_PWR_PERIPH 2
#define ESP32C6_WIFI_BB_PERIPH 3 /* interrupt of WiFi BB, level, we can do some calibartion */
#define ESP32C6_BT_MAC_PERIPH 4
#define ESP32C6_BT_BB_PERIPH 5 /* interrupt of BT BB, level */
#define ESP32C6_BT_BB_NMI_PERIPH 6 /* interrupt of BT BB, NMI, use if BB have bug to fix in NMI */
#define ESP32C6_LP_TIMER_PERIPH 7
#define ESP32C6_COEX_PERIPH 8
#define ESP32C6_BLE_TIMER_PERIPH 9
#define ESP32C6_BLE_SEC_PERIPH 10
#define ESP32C6_I2C_MASTER_PERIPH 11 /* interrupt of I2C Master, level */
#define ESP32C6_ZB_MAC_PERIPH 12
#define ESP32C6_PMU_PERIPH 13
#define ESP32C6_EFUSE_PERIPH 14 /* interrupt of efuse, level, not likely to use */
#define ESP32C6_LP_RTC_TIMER_PERIPH 15
#define ESP32C6_LP_UART_PERIPH 16
#define ESP32C6_LP_I2C_PERIPH 17
#define ESP32C6_LP_WDT_PERIPH 18
#define ESP32C6_LP_PERI_TIMEOUT_PERIPH 19
#define ESP32C6_LP_APM_M0_PERIPH 20
#define ESP32C6_LP_APM_M1_PERIPH 21
#define ESP32C6_FROM_CPU_PERIPH0 22 /* interrupt0 generated from a CPU, level */
#define ESP32C6_FROM_CPU_PERIPH1 23 /* interrupt1 generated from a CPU, level */
#define ESP32C6_FROM_CPU_PERIPH2 24 /* interrupt2 generated from a CPU, level */
#define ESP32C6_FROM_CPU_PERIPH3 25 /* interrupt3 generated from a CPU, level */
#define ESP32C6_ASSIST_DEBUG_PERIPH 26 /* interrupt of Assist debug module, level */
#define ESP32C6_TRACE_PERIPH 27
#define ESP32C6_CACHE_PERIPH 28
#define ESP32C6_CPU_PERI_TIMEOUT_PERIPH 29
#define ESP32C6_GPIO_PERIPH 30 /* interrupt of GPIO, level */
#define ESP32C6_GPIO_NMI_PERIPH 31 /* interrupt of GPIO, NMI */
#define ESP32C6_PAU_PERIPH 32
#define ESP32C6_HP_PERI_TIMEOUT_PERIPH 33
#define ESP32C6_MODEM_PERI_TIMEOUT_PERIPH 34
#define ESP32C6_HP_APM_M0_PERIPH 35
#define ESP32C6_HP_APM_M1_PERIPH 36
#define ESP32C6_HP_APM_M2_PERIPH 37
#define ESP32C6_HP_APM_M3_PERIPH 38
#define ESP32C6_LP_APM0_PERIPH 39
#define ESP32C6_MSPI_PERIPH 40
#define ESP32C6_I2S1_PERIPH 41 /* interrupt of I2S1, level */
#define ESP32C6_UHCI0_PERIPH 42 /* interrupt of UHCI0, level */
#define ESP32C6_UART0_PERIPH 43 /* interrupt of UART0, level */
#define ESP32C6_UART1_PERIPH 44 /* interrupt of UART1, level */
#define ESP32C6_LEDC_PERIPH 45 /* interrupt of LED PWM, level */
#define ESP32C6_TWAI0_PERIPH 46 /* interrupt of can0, level */
#define ESP32C6_TWAI1_PERIPH 47 /* interrupt of can1, level */
#define ESP32C6_USB_SERIAL_JTAG_PERIPH 48 /* interrupt of USB, level */
#define ESP32C6_RMT_PERIPH 49 /* interrupt of remote controller, level */
#define ESP32C6_I2C_EXT0_PERIPH 50 /* interrupt of I2C controller1, level */
#define ESP32C6_TG0_T0_LEVEL_PERIPH 51 /* interrupt of TIMER_GROUP0, TIMER0, level */
#define ESP32C6_TG0_T1_LEVEL_PERIPH 52 /* interrupt of TIMER_GROUP0, TIMER1, level */
#define ESP32C6_TG0_WDT_LEVEL_PERIPH 53 /* interrupt of TIMER_GROUP0, WATCH DOG, level */
#define ESP32C6_TG1_T0_LEVEL_PERIPH 54 /* interrupt of TIMER_GROUP1, TIMER0, level */
#define ESP32C6_TG1_T1_LEVEL_PERIPH 55 /* interrupt of TIMER_GROUP1, TIMER1, level */
#define ESP32C6_TG1_WDT_LEVEL_PERIPH 56 /* interrupt of TIMER_GROUP1, WATCHDOG, level */
#define ESP32C6_SYSTIMER_TARGET0_EDGE_PERIPH 57 /* interrupt of system timer 0, EDGE */
#define ESP32C6_SYSTIMER_TARGET1_EDGE_PERIPH 58 /* interrupt of system timer 1, EDGE */
#define ESP32C6_SYSTIMER_TARGET2_EDGE_PERIPH 59 /* interrupt of system timer 2, EDGE */
#define ESP32C6_APB_ADC_PERIPH 60 /* interrupt of APB ADC, level */
#define ESP32C6_MCPWM0_PERIPH 61 /* interrupt of MCPWM0, level */
#define ESP32C6_PCNT_PERIPH 62
#define ESP32C6_PARL_IO_PERIPH 63
#define ESP32C6_SLC0_PERIPH 64
#define ESP32C6_SLC_PERIPH 65
#define ESP32C6_DMA_IN_CH0_PERIPH 66 /* interrupt of general DMA IN channel 0, level */
#define ESP32C6_DMA_IN_CH1_PERIPH 67 /* interrupt of general DMA IN channel 1, level */
#define ESP32C6_DMA_IN_CH2_PERIPH 68 /* interrupt of general DMA IN channel 2, level */
#define ESP32C6_DMA_OUT_CH0_PERIPH 69 /* interrupt of general DMA OUT channel 0, level */
#define ESP32C6_DMA_OUT_CH1_PERIPH 70 /* interrupt of general DMA OUT channel 1, level */
#define ESP32C6_DMA_OUT_CH2_PERIPH 71 /* interrupt of general DMA OUT channel 2, level */
#define ESP32C6_GSPI2_PERIPH 72
#define ESP32C6_AES_PERIPH 73 /* interrupt of AES accelerator, level */
#define ESP32C6_SHA_PERIPH 74 /* interrupt of SHA accelerator, level */
#define ESP32C6_RSA_PERIPH 75 /* interrupt of RSA accelerator, level */
#define ESP32C6_ECC_PERIPH 76 /* interrupt of ECC accelerator, level */
/* Total number of peripherals */
#define ESP32C6_NPERIPHERALS 77
/* CPU Interrupts.
* The ESP32-C6 CPU interrupt controller accepts 31 asynchronous interrupts.
*/
#define ESP32C6_CPUINT_MIN 1
#define ESP32C6_CPUINT_MAX 31
#define ESP32C6_NCPUINTS 32
#define ESP32C6_CPUINT_PERIPHSET 0xffffffff
/* IRQ numbers. */
/* ecall is dispatched like normal interrupts. It occupies an IRQ number. */
#define RISCV_NIRQ_INTERRUPTS 16 /* Number of RISC-V dispatched interrupts. */
#define ESP32C6_IRQ_FIRSTPERIPH 16 /* First peripheral IRQ number */
/* IRQ numbers for peripheral interrupts coming through the Interrupt
* Matrix.
*/
#define ESP32C6_IRQ2PERIPH(irq) ((irq) - ESP32C6_IRQ_FIRSTPERIPH)
#define ESP32C6_PERIPH2IRQ(id) ((id) + ESP32C6_IRQ_FIRSTPERIPH)
/* Peripheral IRQs */
#define ESP32C6_IRQ_WIFI_MAC (ESP32C6_IRQ_FIRSTPERIPH + ESP32C6_WIFI_MAC_PERIPH)
#define ESP32C6_IRQ_WIFI_MAC_NMI (ESP32C6_IRQ_FIRSTPERIPH + ESP32C6_WIFI_MAC_NMI_PERIPH)
#define ESP32C6_IRQ_WIFI_PWR (ESP32C6_IRQ_FIRSTPERIPH + ESP32C6_WIFI_PWR_PERIPH)
#define ESP32C6_IRQ_WIFI_BB (ESP32C6_IRQ_FIRSTPERIPH + ESP32C6_WIFI_BB_PERIPH)
#define ESP32C6_IRQ_BT_MAC (ESP32C6_IRQ_FIRSTPERIPH + ESP32C6_BT_MAC_PERIPH)
#define ESP32C6_IRQ_BT_BB (ESP32C6_IRQ_FIRSTPERIPH + ESP32C6_BT_BB_PERIPH)
#define ESP32C6_IRQ_BT_BB_NMI (ESP32C6_IRQ_FIRSTPERIPH + ESP32C6_BT_BB_NMI_PERIPH)
#define ESP32C6_IRQ_LP_TIMER (ESP32C6_IRQ_FIRSTPERIPH + ESP32C6_LP_TIMER_PERIPH)
#define ESP32C6_IRQ_COEX (ESP32C6_IRQ_FIRSTPERIPH + ESP32C6_COEX_PERIPH)
#define ESP32C6_IRQ_BLE_TIMER (ESP32C6_IRQ_FIRSTPERIPH + ESP32C6_BLE_TIMER_PERIPH)
#define ESP32C6_IRQ_BLE_SEC (ESP32C6_IRQ_FIRSTPERIPH + ESP32C6_BLE_SEC_PERIPH)
#define ESP32C6_IRQ_I2C_MASTER (ESP32C6_IRQ_FIRSTPERIPH + ESP32C6_I2C_MASTER_PERIPH)
#define ESP32C6_IRQ_ZB_MAC (ESP32C6_IRQ_FIRSTPERIPH + ESP32C6_ZB_MAC_PERIPH)
#define ESP32C6_IRQ_PMU (ESP32C6_IRQ_FIRSTPERIPH + ESP32C6_PMU_PERIPH)
#define ESP32C6_IRQ_EFUSE (ESP32C6_IRQ_FIRSTPERIPH + ESP32C6_EFUSE_PERIPH)
#define ESP32C6_IRQ_LP_RTC_TIMER (ESP32C6_IRQ_FIRSTPERIPH + ESP32C6_LP_RTC_TIMER_PERIPH)
#define ESP32C6_IRQ_LP_UART (ESP32C6_IRQ_FIRSTPERIPH + ESP32C6_LP_UART_PERIPH)
#define ESP32C6_IRQ_LP_I2C (ESP32C6_IRQ_FIRSTPERIPH + ESP32C6_LP_I2C_PERIPH)
#define ESP32C6_IRQ_LP_WDT (ESP32C6_IRQ_FIRSTPERIPH + ESP32C6_LP_WDT_PERIPH)
#define ESP32C6_IRQ_LP_PERI_TIMEOUT (ESP32C6_IRQ_FIRSTPERIPH + ESP32C6_LP_PERI_TIMEOUT_PERIPH)
#define ESP32C6_IRQ_LP_APM_M0 (ESP32C6_IRQ_FIRSTPERIPH + ESP32C6_LP_APM_M0_PERIPH)
#define ESP32C6_IRQ_LP_APM_M1 (ESP32C6_IRQ_FIRSTPERIPH + ESP32C6_LP_APM_M1_PERIPH)
#define ESP32C6_IRQ_FROM_CPU_PERIPH0 (ESP32C6_IRQ_FIRSTPERIPH + ESP32C6_FROM_CPU_PERIPH0)
#define ESP32C6_IRQ_FROM_CPU_PERIPH1 (ESP32C6_IRQ_FIRSTPERIPH + ESP32C6_FROM_CPU_PERIPH1)
#define ESP32C6_IRQ_FROM_CPU_PERIPH2 (ESP32C6_IRQ_FIRSTPERIPH + ESP32C6_FROM_CPU_PERIPH2)
#define ESP32C6_IRQ_FROM_CPU_PERIPH3 (ESP32C6_IRQ_FIRSTPERIPH + ESP32C6_FROM_CPU_PERIPH3)
#define ESP32C6_IRQ_ASSIST_DEBUG (ESP32C6_IRQ_FIRSTPERIPH + ESP32C6_ASSIST_DEBUG_PERIPH)
#define ESP32C6_IRQ_TRACE (ESP32C6_IRQ_FIRSTPERIPH + ESP32C6_TRACE_PERIPH)
#define ESP32C6_IRQ_CACHE (ESP32C6_IRQ_FIRSTPERIPH + ESP32C6_CACHE_PERIPH)
#define ESP32C6_IRQ_CPU_PERI_TIMEOUT (ESP32C6_IRQ_FIRSTPERIPH + ESP32C6_CPU_PERI_TIMEOUT_PERIPH)
#define ESP32C6_IRQ_GPIO (ESP32C6_IRQ_FIRSTPERIPH + ESP32C6_GPIO_PERIPH)
#define ESP32C6_IRQ_GPIO_NMI (ESP32C6_IRQ_FIRSTPERIPH + ESP32C6_GPIO_NMI_PERIPH)
#define ESP32C6_IRQ_PAU (ESP32C6_IRQ_FIRSTPERIPH + ESP32C6_PAU_PERIPH)
#define ESP32C6_IRQ_HP_PERI_TIMEOUT (ESP32C6_IRQ_FIRSTPERIPH + ESP32C6_HP_PERI_TIMEOUT_PERIPH)
#define ESP32C6_IRQ_MODEM_PERI_TIMEOUT (ESP32C6_IRQ_FIRSTPERIPH + ESP32C6_MODEM_PERI_TIMEOUT_PERIPH)
#define ESP32C6_IRQ_HP_APM_M0 (ESP32C6_IRQ_FIRSTPERIPH + ESP32C6_HP_APM_M0_PERIPH)
#define ESP32C6_IRQ_HP_APM_M1 (ESP32C6_IRQ_FIRSTPERIPH + ESP32C6_HP_APM_M1_PERIPH)
#define ESP32C6_IRQ_HP_APM_M2 (ESP32C6_IRQ_FIRSTPERIPH + ESP32C6_HP_APM_M2_PERIPH)
#define ESP32C6_IRQ_HP_APM_M3 (ESP32C6_IRQ_FIRSTPERIPH + ESP32C6_HP_APM_M3_PERIPH)
#define ESP32C6_IRQ_LP_APM0 (ESP32C6_IRQ_FIRSTPERIPH + ESP32C6_LP_APM0_PERIPH)
#define ESP32C6_IRQ_MSPI (ESP32C6_IRQ_FIRSTPERIPH + ESP32C6_MSPI_PERIPH)
#define ESP32C6_IRQ_I2S1 (ESP32C6_IRQ_FIRSTPERIPH + ESP32C6_I2S1_PERIPH)
#define ESP32C6_IRQ_UHCI0 (ESP32C6_IRQ_FIRSTPERIPH + ESP32C6_UHCI0_PERIPH)
#define ESP32C6_IRQ_UART0 (ESP32C6_IRQ_FIRSTPERIPH + ESP32C6_UART0_PERIPH)
#define ESP32C6_IRQ_UART1 (ESP32C6_IRQ_FIRSTPERIPH + ESP32C6_UART1_PERIPH)
#define ESP32C6_IRQ_LEDC (ESP32C6_IRQ_FIRSTPERIPH + ESP32C6_LEDC_PERIPH)
#define ESP32C6_IRQ_TWAI0 (ESP32C6_IRQ_FIRSTPERIPH + ESP32C6_TWAI0_PERIPH)
#define ESP32C6_IRQ_TWAI1 (ESP32C6_IRQ_FIRSTPERIPH + ESP32C6_TWAI1_PERIPH)
#define ESP32C6_IRQ_USB_SERIAL_JTAG (ESP32C6_IRQ_FIRSTPERIPH + ESP32C6_USB_SERIAL_JTAG_PERIPH)
#define ESP32C6_IRQ_RMT (ESP32C6_IRQ_FIRSTPERIPH + ESP32C6_RMT_PERIPH)
#define ESP32C6_IRQ_I2C_EXT0 (ESP32C6_IRQ_FIRSTPERIPH + ESP32C6_I2C_EXT0_PERIPH)
#define ESP32C6_IRQ_TG0_T0_LEVEL (ESP32C6_IRQ_FIRSTPERIPH + ESP32C6_TG0_T0_LEVEL_PERIPH)
#define ESP32C6_IRQ_TG0_T1_LEVEL (ESP32C6_IRQ_FIRSTPERIPH + ESP32C6_TG0_T1_LEVEL_PERIPH)
#define ESP32C6_IRQ_TG0_WDT_LEVEL (ESP32C6_IRQ_FIRSTPERIPH + ESP32C6_TG0_WDT_LEVEL_PERIPH)
#define ESP32C6_IRQ_TG1_T0_LEVEL (ESP32C6_IRQ_FIRSTPERIPH + ESP32C6_TG1_T0_LEVEL_PERIPH)
#define ESP32C6_IRQ_TG1_T1_LEVEL (ESP32C6_IRQ_FIRSTPERIPH + ESP32C6_TG1_T1_LEVEL_PERIPH)
#define ESP32C6_IRQ_TG1_WDT_LEVEL (ESP32C6_IRQ_FIRSTPERIPH + ESP32C6_TG1_WDT_LEVEL_PERIPH)
#define ESP32C6_IRQ_SYSTIMER_TARGET0_EDGE (ESP32C6_IRQ_FIRSTPERIPH + ESP32C6_SYSTIMER_TARGET0_EDGE_PERIPH)
#define ESP32C6_IRQ_SYSTIMER_TARGET1_EDGE (ESP32C6_IRQ_FIRSTPERIPH + ESP32C6_SYSTIMER_TARGET1_EDGE_PERIPH)
#define ESP32C6_IRQ_SYSTIMER_TARGET2_EDGE (ESP32C6_IRQ_FIRSTPERIPH + ESP32C6_SYSTIMER_TARGET2_EDGE_PERIPH)
#define ESP32C6_IRQ_APB_ADC (ESP32C6_IRQ_FIRSTPERIPH + ESP32C6_APB_ADC_PERIPH)
#define ESP32C6_IRQ_MCPWM0 (ESP32C6_IRQ_FIRSTPERIPH + ESP32C6_MCPWM0_PERIPH)
#define ESP32C6_IRQ_PCNT (ESP32C6_IRQ_FIRSTPERIPH + ESP32C6_PCNT_PERIPH)
#define ESP32C6_IRQ_PARL_IO (ESP32C6_IRQ_FIRSTPERIPH + ESP32C6_PARL_IO_PERIPH)
#define ESP32C6_IRQ_SLC0 (ESP32C6_IRQ_FIRSTPERIPH + ESP32C6_SLC0_PERIPH)
#define ESP32C6_IRQ_SLC (ESP32C6_IRQ_FIRSTPERIPH + ESP32C6_SLC_PERIPH)
#define ESP32C6_IRQ_DMA_IN_CH0 (ESP32C6_IRQ_FIRSTPERIPH + ESP32C6_DMA_IN_CH0_PERIPH)
#define ESP32C6_IRQ_DMA_IN_CH1 (ESP32C6_IRQ_FIRSTPERIPH + ESP32C6_DMA_IN_CH1_PERIPH)
#define ESP32C6_IRQ_DMA_IN_CH2 (ESP32C6_IRQ_FIRSTPERIPH + ESP32C6_DMA_IN_CH2_PERIPH)
#define ESP32C6_IRQ_DMA_OUT_CH0 (ESP32C6_IRQ_FIRSTPERIPH + ESP32C6_DMA_OUT_CH0_PERIPH)
#define ESP32C6_IRQ_DMA_OUT_CH1 (ESP32C6_IRQ_FIRSTPERIPH + ESP32C6_DMA_OUT_CH1_PERIPH)
#define ESP32C6_IRQ_DMA_OUT_CH2 (ESP32C6_IRQ_FIRSTPERIPH + ESP32C6_DMA_OUT_CH2_PERIPH)
#define ESP32C6_IRQ_GSPI2 (ESP32C6_IRQ_FIRSTPERIPH + ESP32C6_GSPI2_PERIPH)
#define ESP32C6_IRQ_AES (ESP32C6_IRQ_FIRSTPERIPH + ESP32C6_AES_PERIPH)
#define ESP32C6_IRQ_SHA (ESP32C6_IRQ_FIRSTPERIPH + ESP32C6_SHA_PERIPH)
#define ESP32C6_IRQ_RSA (ESP32C6_IRQ_FIRSTPERIPH + ESP32C6_RSA_PERIPH)
#define ESP32C6_IRQ_CACHE_CORE0_ACS (ESP32C6_IRQ_FIRSTPERIPH + ESP32C6_ECC_PERIPH)
#define ESP32C6_NIRQ_PERIPH ESP32C6_NPERIPHERALS
/* Total number of IRQs: ecall + Number of peripheral IRQs + GPIOs IRQs. */
#define NR_IRQS (RISCV_NIRQ_INTERRUPTS + ESP32C6_NIRQ_PERIPH)
#endif /* __ARCH_RISCV_INCLUDE_ESP32C6_IRQ_H */
-119
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@@ -1,119 +0,0 @@
#
# For a description of the syntax of this configuration file,
# see the file kconfig-language.txt in the NuttX tools repository.
#
if ARCH_CHIP_ESP32C6
comment "ESP32-C6 Configuration Options"
choice
prompt "ESP32-C6 Chip Selection"
default ARCH_CHIP_ESP32C6WROOM1
depends on ARCH_CHIP_ESP32C6
config ARCH_CHIP_ESP32C6X
bool "ESP32-C6"
select ESP32C6_ESP32C6XXX
---help---
ESP32 chip with a single RISC-V IMC core, no embedded Flash memory
config ARCH_CHIP_ESP32C6FX4
bool "ESP32-C6Fx4"
select ESP32C6_ESP32C6XXX
select ESP32C6_FLASH_4M
---help---
ESP32 chip with a single RISC-V IMC core, 4 MB of in-package Flash memory
config ARCH_CHIP_ESP32C6MINI1
bool "ESP32-C6-MINI-1"
select ESP32C6_ESP32C6XXX
select ESP32C6_FLASH_4M
---help---
Generic module with an embedded ESP32-C6Fx4 chip
config ARCH_CHIP_ESP32C6WROOM1
bool "ESP32-C6-WROOM-1"
select ESP32C6_ESP32C6XXX
select ESP32C6_FLASH_4M
---help---
Generic module with an embedded ESP32-C6 chip, 4 MB of Flash memory
endchoice # ESP32-C6 Chip Selection
comment "Selected ESP32-C6 chip without embedded Flash, an external Flash memory is required."
depends on ARCH_CHIP_ESP32C6X
config ESP32C6_SINGLE_CPU
bool
default n
config ESP32C6_DUAL_CPU
bool
default n
config ESP32C6_FLASH_2M
bool
default n
config ESP32C6_FLASH_4M
bool
default n
config ESP32C6_FLASH_8M
bool
default n
config ESP32C6_FLASH_16M
bool
default n
config ESP32C6_ESP32C6XXX
bool
default n
select ESP32C6_SINGLE_CPU
choice ESP32C6_CPU_FREQ
prompt "CPU frequency"
default ESP32C6_CPU_FREQ_160
---help---
CPU frequency to be set on application startup.
config ESP32C6_CPU_FREQ_80
bool "80 MHz"
config ESP32C6_CPU_FREQ_120
bool "120 MHz"
config ESP32C6_CPU_FREQ_160
bool "160 MHz"
endchoice # CPU frequency
config ESP32C6_CPU_FREQ_MHZ
int
default 80 if ESP32C6_CPU_FREQ_80
default 120 if ESP32C6_CPU_FREQ_120
default 160 if ESP32C6_CPU_FREQ_160
menu "ESP32-C6 Peripheral Support"
config ESP32C6_UART
bool
default n
config ESP32C6_UART0
bool "UART0"
default y
select ESP32C6_UART
select UART0_SERIALDRIVER
config ESP32C6_UART1
bool "UART1"
default n
select ESP32C6_UART
select UART1_SERIALDRIVER
endmenu
endif # ARCH_CHIP_ESP32C6
-38
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@@ -1,38 +0,0 @@
############################################################################
# arch/risc-v/src/esp32c6/Make.defs
#
# Licensed to the Apache Software Foundation (ASF) under one or more
# contributor license agreements. See the NOTICE file distributed with
# this work for additional information regarding copyright ownership. The
# ASF licenses this file to you under the Apache License, Version 2.0 (the
# "License"); you may not use this file except in compliance with the
# License. You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations
# under the License.
#
############################################################################
include common/Make.defs
# Specify our HEAD assembly file. This will be linked as
# the first object file, so it will appear at address 0
HEAD_ASRC = esp32c6_head.S
CHIP_ASRCS = esp32c6_vectors.S
# Specify our general Assembly files
CMN_ASRCS := $(filter-out riscv_vectors.S,$(CMN_ASRCS))
# Specify our C code within this directory to be included
CHIP_CSRCS = esp32c6_allocateheap.c esp32c6_start.c esp32c6_idle.c
CHIP_CSRCS += esp32c6_irq.c esp32c6_timerisr.c esp32c6_systemreset.c
CHIP_CSRCS += esp32c6_serial.c esp32c6_lowputc.c esp32c6_clockconfig.c
-39
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@@ -1,39 +0,0 @@
/****************************************************************************
* arch/risc-v/src/esp32c6/chip.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __ARCH_RISCV_SRC_ESP32C6_CHIP_H
#define __ARCH_RISCV_SRC_ESP32C6_CHIP_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include "esp32c6_memorymap.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Section for exception handler. */
#define EXCEPTION_SECTION .iram1
#endif /* __ARCH_RISCV_SRC_ESP32C6_CHIP_H */
-49
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@@ -1,49 +0,0 @@
/****************************************************************************
* arch/risc-v/src/esp32c6/esp32c6.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __ARCH_RISCV_SRC_ESP32C6_ESP32C6_H
#define __ARCH_RISCV_SRC_ESP32C6_ESP32C6_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <stdint.h>
#include <stdbool.h>
#include <arch/irq.h>
#include "riscv_internal.h"
#include "chip.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#ifndef __ASSEMBLY__
#define setbits(bs, a) modifyreg32(a, 0, bs)
#define resetbits(bs, a) modifyreg32(a, bs, 0)
#endif
#endif /* __ARCH_RISCV_SRC_ESP32C6_ESP32C6_H */
@@ -1,92 +0,0 @@
/****************************************************************************
* arch/risc-v/src/esp32c6/esp32c6_allocateheap.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <debug.h>
#include <sys/types.h>
#include <nuttx/arch.h>
#include <nuttx/board.h>
#include <nuttx/mm/mm.h>
#include <arch/board/board.h>
#include "esp32c6.h"
#include "hardware/esp32c6_rom_layout.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: up_allocate_heap
*
* Description:
* This function will be called to dynamically set aside the heap region.
*
* For the kernel build (CONFIG_BUILD_KERNEL=y) with both kernel- and
* user-space heaps (CONFIG_MM_KERNEL_HEAP=y), this function provides the
* size of the unprotected, user-space heap.
*
* If a protected kernel-space heap is provided, the kernel heap must be
* allocated (and protected) by an analogous up_allocate_kheap().
*
****************************************************************************/
void up_allocate_heap(void **heap_start, size_t *heap_size)
{
/* These values come from the linker scripts (legacy_sections.ld and
* flat_memory.ld).
* Check boards/risc-v/esp32c6.
*/
extern uint8_t _sheap[];
extern const struct esp32c6_rom_layout_s *ets_rom_layout_p;
board_autoled_on(LED_HEAPALLOCATE);
*heap_start = _sheap;
*heap_size = ets_rom_layout_p->dram0_rtos_reserved_start -
(uintptr_t)_sheap;
}
/****************************************************************************
* Name: riscv_addregion
*
* Description:
* RAM may be added in non-contiguous chunks. This routine adds all chunks
* that may be used for heap.
*
****************************************************************************/
#if CONFIG_MM_REGIONS > 1
void riscv_addregion(void)
{
}
#endif
-53
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@@ -1,53 +0,0 @@
/****************************************************************************
* arch/risc-v/src/esp32c6/esp32c6_attr.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __ARCH_RISCV_SRC_ESP32C6_ESP32C6_ATTR_H
#define __ARCH_RISCV_SRC_ESP32C6_ESP32C6_ATTR_H
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Forces code into IRAM instead of flash */
#define IRAM_ATTR __attribute__((section(".iram1")))
/* Forces data into DRAM instead of flash */
#define DRAM_ATTR __attribute__((section(".dram1")))
/* Forces code into RTC fast memory */
#define RTC_IRAM_ATTR __attribute__((section(".rtc.text")))
/* Forces data into RTC slow memory
* Any variable marked with this attribute will keep its value
* during a deep sleep / wake cycle.
*/
#define RTC_DATA_ATTR __attribute__((section(".rtc.data")))
/* Forces read-only data into RTC slow memory
* Makes constant data available to RTC wake stubs.
*/
#define RTC_RODATA_ATTR __attribute__((section(".rtc.rodata")))
#endif /* __ARCH_RISCV_SRC_ESP32C6_ESP32C6_ATTR_H */
@@ -1,281 +0,0 @@
/****************************************************************************
* arch/risc-v/src/esp32c6/esp32c6_clockconfig.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <sys/param.h>
#include <stdint.h>
#include "riscv_internal.h"
#include "hardware/esp32c6_soc.h"
#include "hardware/esp32c6_pcr.h"
#include "esp32c6_attr.h"
#include "esp32c6_clockconfig.h"
/****************************************************************************
* Private Types
****************************************************************************/
enum cpu_clksrc_e
{
XTAL_CLK,
PLL_CLK,
FOSC_CLK
};
/****************************************************************************
* ROM Function Prototypes
****************************************************************************/
/****************************************************************************
* Name: ets_update_cpu_frequency
*
* Description:
* Set the real CPU ticks per us to the ets, so that ets_delay_us will be
* accurate. Call this function when CPU frequency is changed.
*
* Input Parameters:
* ticks_per_us - CPU ticks per us.
*
* Returned Value:
* None
*
****************************************************************************/
extern void ets_update_cpu_frequency(uint32_t ticks_per_us);
/****************************************************************************
* Name: ets_get_cpu_frequency
*
* Description:
* Get the real CPU ticks per us to the ets.
* This function do not return real CPU ticks per us, just the record in
* ets. It can be used to check with the real CPU frequency.
*
* Input Parameters:
* None.
*
* Returned Value:
* CPU ticks per us record in ets.
*
****************************************************************************/
extern uint32_t ets_get_cpu_frequency(void);
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: esp32c6_cpuclksrc
*
* Description:
* Select a clock source for CPU clock.
*
* Input Parameters:
* src - Any source from cpu_clksrc_e.
*
* Returned Value:
* None
*
****************************************************************************/
static inline void esp32c6_cpuclksrc(enum cpu_clksrc_e src)
{
uint32_t value;
value = VALUE_TO_FIELD(src, PCR_SOC_CLK_SEL);
modifyreg32(PCR_SYSCLK_CONF_REG, PCR_SOC_CLK_SEL_M, value);
}
/****************************************************************************
* Name: esp32c6_cpudiv
*
* Description:
* Select a divider for the CPU clk.
* NOTE: The divider is not necessarily the real divisor. See TRM for the
* equivalences.
*
* Input Parameters:
* divider - A value between 3 to 6.
*
* Returned Value:
* None
*
****************************************************************************/
static inline void esp32c6_cpudiv(uint8_t divider)
{
uint32_t value = (divider / 3) - 1;
bool force_120m = (divider == 4) ? 1 : 0;
value = VALUE_TO_FIELD(value, PCR_CPU_HS_DIV_NUM);
modifyreg32(PCR_CPU_FREQ_CONF_REG, PCR_CPU_HS_DIV_NUM_M, value);
value = VALUE_TO_FIELD(force_120m, PCR_CPU_HS_120M_FORCE);
modifyreg32(PCR_CPU_FREQ_CONF_REG, PCR_CPU_HS_120M_FORCE_M, value);
}
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: esp32c6_update_cpu_freq
*
* Description:
* Set the real CPU ticks per us to the ets, so that ets_delay_us
* will be accurate. Call this function when CPU frequency is changed.
*
* Input Parameters:
* ticks_per_us - CPU ticks per us
*
* Returned Value:
* None
*
****************************************************************************/
void IRAM_ATTR esp32c6_update_cpu_freq(uint32_t ticks_per_us)
{
/* Update scale factors used by esp_rom_delay_us */
ets_update_cpu_frequency(ticks_per_us);
}
/****************************************************************************
* Name: esp32c6_set_cpu_freq
*
* Description:
* Switch to one of PLL-based frequencies.
*
* Input Parameters:
* cpu_freq_mhz - Target CPU frequency
*
* Returned Value:
* None
*
****************************************************************************/
void IRAM_ATTR esp32c6_set_cpu_freq(int cpu_freq_mhz)
{
switch (cpu_freq_mhz)
{
case 80:
/* 80 MHz is obtained from the 480 MHz PLL.
* In this case CPU_CLK = PLL_CLK / 6. Config the PLL as 480 MHz
* with a 6 divider and set the source clock as PLL_CLK.
*/
esp32c6_cpudiv(6);
break;
case 120:
/* 120 MHz is obtained from the 480 MHz PLL.
* In this case CPU_CLK = PLL_CLK / 4. Config the PLL as 480 MHz
* with a 4 divider and set the source clock as PLL_CLK.
*/
esp32c6_cpudiv(4);
break;
case 160:
/* 160 MHz is obtained from the 480 MHz PLL.
* In this case CPU_CLK = PLL_CLK / 3. Config the PLL as 480 MHz
* with a 3 divider and set the source clock as PLL_CLK.
*/
esp32c6_cpudiv(3);
break;
default:
/* Unsupported clock config. */
return;
}
esp32c6_cpuclksrc(PLL_CLK);
esp32c6_update_cpu_freq(cpu_freq_mhz);
}
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: esp32c6_clockconfig
*
* Description:
* Called to initialize the ESP32-C6. This does whatever setup is needed to
* put the SoC in a usable state.
*
* Input Parameters:
* None.
*
* Returned Value:
* None.
*
****************************************************************************/
void esp32c6_clockconfig(void)
{
/* Configure the CPU frequency */
esp32c6_set_cpu_freq(CONFIG_ESP32C6_CPU_FREQ_MHZ);
}
/****************************************************************************
* Name: esp_clk_cpu_freq
*
* Description:
* Get CPU frequency
*
* Input Parameters:
* None
*
* Returned Value:
* CPU frequency
*
****************************************************************************/
int IRAM_ATTR esp_clk_cpu_freq(void)
{
return (int)ets_get_cpu_frequency() * MHZ;
}
/****************************************************************************
* Name: esp_clk_apb_freq
*
* Description:
* Return current APB clock frequency.
*
* Input Parameters:
* None
*
* Returned Value:
* APB clock frequency, in Hz
*
****************************************************************************/
int IRAM_ATTR esp_clk_apb_freq(void)
{
return MIN(ets_get_cpu_frequency(), 80) * MHZ;
}
@@ -1,119 +0,0 @@
/****************************************************************************
* arch/risc-v/src/esp32c6/esp32c6_clockconfig.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __ARCH_RISCV_SRC_ESP32C6_ESP32C6_CLOCKCONFIG_H
#define __ARCH_RISCV_SRC_ESP32C6_ESP32C6_CLOCKCONFIG_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
/****************************************************************************
* Name: esp32c6_update_cpu_freq
*
* Description:
* Set the real CPU ticks per us to the ets, so that ets_delay_us
* will be accurate. Call this function when CPU frequency is changed.
*
* Input Parameters:
* ticks_per_us - CPU ticks per us
*
* Returned Value:
* None.
*
****************************************************************************/
void esp32c6_update_cpu_freq(uint32_t ticks_per_us);
/****************************************************************************
* Name: esp32c6_set_cpu_freq
*
* Description:
* Switch to one of PLL-based frequencies.
* Current frequency can be XTAL or PLL.
*
* Input Parameters:
* cpu_freq_mhz - new CPU frequency
*
* Returned Value:
* None.
*
****************************************************************************/
void esp32c6_set_cpu_freq(int cpu_freq_mhz);
/****************************************************************************
* Name: esp32c6_clockconfig
*
* Description:
* Called to initialize the ESP32-C6. This does whatever setup is needed to
* put the SoC in a usable state.
*
* Input Parameters:
* None.
*
* Returned Value:
* None.
*
****************************************************************************/
void esp32c6_clockconfig(void);
/****************************************************************************
* Name: esp_clk_cpu_freq
*
* Description:
* Get the current CPU frequency.
*
* Input Parameters:
* None.
*
* Returned Value:
* CPU frequency in Hz.
*
****************************************************************************/
int esp_clk_cpu_freq(void);
/****************************************************************************
* Name: esp_clk_apb_freq
*
* Description:
* Return current APB clock frequency.
*
* Input Parameters:
* None.
*
* Returned Value:
* APB clock frequency in Hz.
*
****************************************************************************/
int esp_clk_apb_freq(void);
#endif /* __ARCH_RISCV_SRC_ESP32C6_ESP32C6_CLOCKCONFIG_H */
-65
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@@ -1,65 +0,0 @@
/****************************************************************************
* arch/risc-v/src/esp32c6/esp32c6_config.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __ARCH_RISCV_SRC_ESP32C6_ESP32C6_CONFIG_H
#define __ARCH_RISCV_SRC_ESP32C6_ESP32C6_CONFIG_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <arch/chip/chip.h>
#include <arch/board/board.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* UARTs ********************************************************************/
/* Are any UARTs enabled? */
#undef HAVE_UART_DEVICE
#if defined(CONFIG_ESP32C6_UART0) || defined(CONFIG_ESP32C6_UART1)
# define HAVE_UART_DEVICE 1 /* Flag to indicate a UART has been selected */
#endif
/* Serial Console ***********************************************************/
/* Is there a serial console? There should be no more than one defined. It
* could be on any UARTn. n E {0,1}
*/
#undef HAVE_SERIAL_CONSOLE
#if defined(CONFIG_UART0_SERIAL_CONSOLE) && defined(CONFIG_ESP32C6_UART0)
# undef CONFIG_UART1_SERIAL_CONSOLE
# define HAVE_SERIAL_CONSOLE 1
# define CONSOLE_UART 1
#elif defined(CONFIG_UART1_SERIAL_CONSOLE) && defined(CONFIG_ESP32C6_UART1)
# undef CONFIG_UART0_SERIAL_CONSOLE
# define HAVE_SERIAL_CONSOLE 1
# define CONSOLE_UART 1
#else
# undef CONFIG_UART0_SERIAL_CONSOLE
# undef CONFIG_UART1_SERIAL_CONSOLE
#endif
#endif /* __ARCH_XTENSA_SRC_ESP32C6_ESP32C6_CONFIG_H */
-77
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@@ -1,77 +0,0 @@
/****************************************************************************
* arch/risc-v/src/esp32c6/esp32c6_head.S
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <arch/irq.h>
#include "chip.h"
/****************************************************************************
* Public Symbols
****************************************************************************/
.global __start
/****************************************************************************
* Section: .text
****************************************************************************/
.section .text
/****************************************************************************
* Name: __start
****************************************************************************/
__start:
.option push
.option norelax
/* Set stack pointer to the idle thread stack */
lui sp, %hi(ESP32C6_IDLESTACK_TOP)
addi sp, sp, %lo(ESP32C6_IDLESTACK_TOP)
/* Set gp pointer */
la gp, __global_pointer$
/* Disable all interrupts (i.e. timer, external) in mstatus */
csrw mstatus, zero
.option pop
/* Initialize the Machine Trap-Vector */
lui t0, %hi(_vector_table)
addi t0, t0, %lo(_vector_table)
csrw mtvec, t0
/* Jump to __esp32c6_start */
jal x1, __esp32c6_start
/* We shouldn't return from __esp32c6_start */
ret
-73
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@@ -1,73 +0,0 @@
/****************************************************************************
* arch/risc-v/src/esp32c6/esp32c6_idle.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include <nuttx/power/pm.h>
#include "esp32c6.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: up_idle
*
* Description:
* up_idle() is the logic that will be executed when their is no other
* ready-to-run task. This is processor idle time and will continue until
* some interrupt occurs to cause a context switch from the idle task.
*
* Processing in this state may be processor-specific. e.g., this is where
* power management operations might be performed.
*
****************************************************************************/
void up_idle(void)
{
#if defined(CONFIG_SUPPRESS_INTERRUPTS) || defined(CONFIG_SUPPRESS_TIMER_INTS)
/* If the system is idle and there are no timer interrupts, then process
* "fake" timer interrupts. Hopefully, something will wake up.
*/
nxsched_process_timer();
#else
/* This would be an appropriate place to put some MCU-specific logic to
* sleep in a reduced power mode until an interrupt occurs to save power
*/
asm("WFI");
#endif
}
File diff suppressed because it is too large Load Diff
-146
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/****************************************************************************
* arch/risc-v/src/esp32c6/esp32c6_irq.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __ARCH_RISCV_SRC_ESP32C6_ESP32C6_IRQ_H
#define __ARCH_RISCV_SRC_ESP32C6_ESP32C6_IRQ_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#ifndef __ASSEMBLY__
#undef EXTERN
#if defined(__cplusplus)
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
/* CPU interrupt types. */
#define ESP32C6_INT_LEVEL (0 << 0)
#define ESP32C6_INT_EDGE (1 << 0)
#define ESP32C6_INT_PRIO_MIN 1
#define ESP32C6_INT_PRIO_MAX 7
#define ESP32C6_INT_PRIO_DEF 1
/****************************************************************************
* Public Functions Prototypes
****************************************************************************/
/****************************************************************************
* Name: esp32c6_bind_irq
*
* Description:
* Bind IRQ and resource with given parameters.
*
* Input Parameters:
* cpuint - CPU interrupt ID
* periphid - Peripheral ID
* prio - Interrupt priority
* flags - Interrupt flags
*
* Returned Value:
* None.
*
****************************************************************************/
void esp32c6_bind_irq(uint8_t cpuint, uint8_t periphid, uint8_t prio,
uint32_t flags);
/****************************************************************************
* Name: esp32c6_cpuint_initialize
*
* Description:
* Initialize CPU interrupts
*
* Input Parameters:
* None
*
* Returned Value:
* Zero (OK) is returned on success; A negated errno value is returned on
* any failure.
*
****************************************************************************/
int esp32c6_cpuint_initialize(void);
/****************************************************************************
* Name: esp32c6_setup_irq
*
* Description:
* This function sets up the IRQ. It allocates a CPU interrupt of the given
* priority and type and attaches it to the given peripheral.
*
* Input Parameters:
* periphid - The peripheral number from irq.h to be assigned to
* a CPU interrupt.
* priority - Interrupt's priority (1 - 5).
* type - Interrupt's type (level or edge).
*
* Returned Value:
* The allocated CPU interrupt on success, a negated errno value on
* failure.
*
****************************************************************************/
int esp32c6_setup_irq(int periphid, int priority, int type);
/****************************************************************************
* Name: esp32c6_teardown_irq
*
* Description:
* This function undoes the operations done by esp32c6_setup_irq.
* It detaches a peripheral interrupt from a CPU interrupt and frees the
* CPU interrupt.
*
* Input Parameters:
* periphid - The peripheral number from irq.h to be detached from the
* CPU interrupt.
* cpuint - The CPU interrupt from which the peripheral interrupt will
* be detached.
*
* Returned Value:
* None
*
****************************************************************************/
void esp32c6_teardown_irq(int periphid, int cpuint);
#undef EXTERN
#if defined(__cplusplus)
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_RISCV_SRC_ESP32C6_ESP32C6_IRQ_H */
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/****************************************************************************
* arch/risc-v/src/esp32c6/esp32c6_lowputc.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __ARCH_RISCV_SRC_ESP32C6_ESP32C6_LOWPUTC_H
#define __ARCH_RISCV_SRC_ESP32C6_ESP32C6_LOWPUTC_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/arch.h>
#include <nuttx/irq.h>
#include <sys/types.h>
#include <stdint.h>
#include <stdbool.h>
#include <unistd.h>
#include <string.h>
#include <errno.h>
#include <debug.h>
#include "hardware/esp32c6_uart.h"
#include "chip.h"
/****************************************************************************
* Public Types
****************************************************************************/
enum uart_sclk
{
APB_CLK = 1, /* 80 MHz */
CLK_8, /* 8 MHz */
XTAL_CLK
};
enum uart_parity
{
UART_PARITY_DISABLE,
UART_PARITY_ODD,
UART_PARITY_EVEN
};
enum uart_data_length
{
UART_DATA_5_BITS,
UART_DATA_6_BITS,
UART_DATA_7_BITS,
UART_DATA_8_BITS
};
enum uart_stop_length
{
UART_STOP_BITS_1 = 0x1, /* stop bit: 1 bit */
UART_STOP_BITS_2 = 0x3, /* stop bit: 2bits */
};
/* Default FIFOs size */
#define UART_TX_FIFO_SIZE 128
#define UART_RX_FIFO_SIZE 128
/* Struct used to store uart driver information and to
* manipulate uart driver
*/
struct esp32c6_uart_s
{
uint32_t base; /* Base address of UART registers */
uint8_t periph; /* UART peripheral ID */
int cpuint; /* CPU interrupt assigned to this UART */
uint8_t id; /* UART ID */
uint8_t irq; /* IRQ associated with this UART */
uint32_t baud; /* Configured baud rate */
uint8_t bits;
uint8_t parity; /* 0=no parity, 1=odd parity, 2=even parity */
uint8_t stop_b2; /* Use 2 stop bits? 0 no, others yes */
uint8_t int_pri; /* UART Interrupt Priority */
};
#ifdef CONFIG_ESP32C6_UART0
extern struct esp32c6_uart_s g_uart0_config;
#endif
#ifdef CONFIG_ESP32C6_UART1
extern struct esp32c6_uart_s g_uart1_config;
#endif
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
/****************************************************************************
* Name: esp32c6_lowputc_reset_core
* Reset both TX and RX core
****************************************************************************/
void esp32c6_lowputc_reset_core(const struct esp32c6_uart_s *conf);
/****************************************************************************
* Name: esp32c6_lowputc_enable_sclk
* Enable clock for whole core
****************************************************************************/
void esp32c6_lowputc_enable_sclk(const struct esp32c6_uart_s *conf);
/****************************************************************************
* Name: esp32c6_lowputc_disable_sclk
* Disable clock for whole core
****************************************************************************/
void esp32c6_lowputc_disable_sclk(const struct esp32c6_uart_s *conf);
/****************************************************************************
* Name: esp32c6_lowputc_set_sclk
* Set a source clock for UART
* APB_CLK = 1 80 MHz
* CLK_8 = 2 8 MHz
* XTAL_CLK = 3
****************************************************************************/
void esp32c6_lowputc_set_sclk(const struct esp32c6_uart_s *conf, enum
uart_sclk source);
/****************************************************************************
* Name: esp32c6_lowputc_get_sclk
* Get the source clock for UART
****************************************************************************/
uint32_t esp32c6_lowputc_get_sclk(const struct esp32c6_uart_s *conf);
/****************************************************************************
* Name: esp32c6_lowputc_baud
* Set the baud rate
****************************************************************************/
void esp32c6_lowputc_baud(const struct esp32c6_uart_s * conf);
/****************************************************************************
* Name: esp32c6_lowputc_normal_mode
* Set the UART to operate in normal mode
****************************************************************************/
void esp32c6_lowputc_normal_mode(const struct esp32c6_uart_s * conf);
/****************************************************************************
* Name: esp32c6_lowputc_parity
* Set the parity
****************************************************************************/
void esp32c6_lowputc_parity(const struct esp32c6_uart_s * conf);
/****************************************************************************
* Name: esp32c6_lowputc_data_length
* Set the data length
****************************************************************************/
int esp32c6_lowputc_data_length(const struct esp32c6_uart_s * conf);
/****************************************************************************
* Name: esp32c6_lowputc_stop_length
* Set the stop length
****************************************************************************/
void esp32c6_lowputc_stop_length(const struct esp32c6_uart_s * conf);
/****************************************************************************
* Name: esp32c6_lowputc_set_tx_idle_time
* Set the idle time between transfers
****************************************************************************/
void esp32c6_lowputc_set_tx_idle_time(const struct esp32c6_uart_s *
conf, uint32_t time);
/****************************************************************************
* Name: esp32c6_lowputc_send_byte
* Send one byte
****************************************************************************/
void esp32c6_lowputc_send_byte(const struct esp32c6_uart_s * conf,
char byte);
/****************************************************************************
* Name: esp32c6_lowputc_is_tx_fifo_full
* Send one byte
****************************************************************************/
bool esp32c6_lowputc_is_tx_fifo_full(const struct esp32c6_uart_s *conf);
/****************************************************************************
* Name: esp32c6_lowputc_disable_all_uart_int
*
* Description:
* Disable all UART interrupts.
*
* Parameters:
* priv - Pointer to the private driver struct.
* current_status - Pointer to a variable to store the current status of
* the interrupt enable register before disabling
* UART interrupts.
*
****************************************************************************/
void esp32c6_lowputc_disable_all_uart_int(const struct esp32c6_uart_s *priv,
uint32_t *current_status);
/****************************************************************************
* Name: esp32c6_lowputc_restore_all_uart_int
*
* Description:
* Restore all UART interrupts.
*
* Parameters:
* priv - Pointer to the private driver struct.
* last_status - Pointer to a variable that stored the last state of the
* interrupt enable register.
*
****************************************************************************/
void esp32c6_lowputc_restore_all_uart_int(const struct esp32c6_uart_s *priv,
uint32_t *last_status);
/****************************************************************************
* Name: esp32c6_lowsetup
*
* Description:
* This performs basic initialization of the UART used for the serial
* console. Its purpose is to get the console output available as soon
* as possible.
*
****************************************************************************/
void esp32c6_lowsetup(void);
#endif /* __ARCH_RISCV_SRC_ESP32C6_ESP32C6_LOWPUTC_H */
@@ -1,43 +0,0 @@
/****************************************************************************
* arch/risc-v/src/esp32c6/esp32c6_memorymap.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef _ARCH_RISCV_SRC_ESP32C6_ESP32C6_MEMORYMAP_H
#define _ARCH_RISCV_SRC_ESP32C6_ESP32C6_MEMORYMAP_H
/****************************************************************************
* Included Files
****************************************************************************/
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Idle thread stack starts from _ebss */
#ifndef __ASSEMBLY__
#define ESP32C6_IDLESTACK_BASE (uint32_t)&g_idlestack
#else
#define ESP32C6_IDLESTACK_BASE g_idlestack
#endif
#define ESP32C6_IDLESTACK_SIZE (CONFIG_IDLETHREAD_STACKSIZE & ~3)
#define ESP32C6_IDLESTACK_TOP (ESP32C6_IDLESTACK_BASE + ESP32C6_IDLESTACK_SIZE)
#endif /* _ARCH_RISCV_SRC_ESP32C6_ESP32C6_MEMORYMAP_H */
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/****************************************************************************
* arch/risc-v/src/esp32c6/esp32c6_start.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/arch.h>
#include <nuttx/init.h>
#include <arch/board/board.h>
#include "chip.h"
#include "esp32c6.h"
#include "esp32c6_irq.h"
#include "esp32c6_lowputc.h"
#include "esp32c6_clockconfig.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#ifdef CONFIG_DEBUG_FEATURES
# define showprogress(c) riscv_lowputc(c)
#else
# define showprogress(c)
#endif
/****************************************************************************
* Public Data
****************************************************************************/
/* Address of the IDLE thread */
uint8_t g_idlestack[CONFIG_IDLETHREAD_STACKSIZE]
aligned_data(16) locate_data(".noinit");
uintptr_t g_idle_topstack = ESP32C6_IDLESTACK_TOP;
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: __esp32c6_start
****************************************************************************/
void __esp32c6_start(void)
{
/* Set CPU frequency */
esp32c6_clockconfig();
/* Configure the UART so we can get debug output */
esp32c6_lowsetup();
showprogress('A');
/* Clear .bss. We'll do this inline (vs. calling memset) just to be
* certain that there are no issues with the state of global variables.
*/
for (uint32_t *dest = (uint32_t *)_sbss; dest < (uint32_t *)_ebss; )
{
*dest++ = 0;
}
showprogress('B');
#ifndef CONFIG_SUPPRESS_INTERRUPTS
/* Put the CPU Interrupts in initial state */
esp32c6_cpuint_initialize();
#endif
/* Call nx_start() */
nx_start();
for (; ; );
}
@@ -1,53 +0,0 @@
/****************************************************************************
* arch/risc-v/src/esp32c6/esp32c6_systemreset.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <nuttx/arch.h>
#include "esp32c6.h"
#include "hardware/esp32c6_lp_aon.h"
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: up_systemreset
*
* Description:
* Internal reset logic.
*
****************************************************************************/
void up_systemreset(void)
{
putreg32(LP_AON_HPSYS_SW_RESET, LP_AON_SYS_CFG_REG);
/* Wait for the reset */
for (; ; );
}
-127
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@@ -1,127 +0,0 @@
/****************************************************************************
* arch/risc-v/src/esp32c6/esp32c6_timerisr.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <assert.h>
#include <time.h>
#include <arch/board/board.h>
#include <arch/irq.h>
#include "chip.h"
#include "esp32c6.h"
#include "esp32c6_irq.h"
#include "hardware/esp32c6_systimer.h"
#include "hardware/esp32c6_pcr.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#define ESP32C6_SYSTIMER_TICKS_PER_SEC (16 * 1000 * 1000)
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: systimer_isr
****************************************************************************/
static int systimer_isr(int irq, void *context, void *arg)
{
setbits(SYSTIMER_TARGET0_INT_CLR, SYSTIMER_INT_CLR_REG);
/* Process timer interrupt */
nxsched_process_timer();
return OK;
}
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: up_timer_initialize
*
* Description:
* This function is called during start-up to initialize
* the timer interrupt.
*
****************************************************************************/
void up_timer_initialize(void)
{
uint32_t regval;
/* Enable timer clock */
setbits(PCR_SYSTIMER_CLK_EN, PCR_SYSTIMER_CONF_REG);
resetbits(PCR_SYSTIMER_RST_EN, PCR_SYSTIMER_CONF_REG);
setbits(SYSTIMER_CLK_EN, SYSTIMER_CONF_REG);
setbits(SYSTIMER_ETM_EN, SYSTIMER_CONF_REG);
/* Configure alarm0 counter1 */
regval = SYSTIMER_TARGET0_PERIOD_MODE |
(1 << SYSTIMER_TARGET0_TIMER_UNIT_SEL_S) |
((ESP32C6_SYSTIMER_TICKS_PER_SEC / CLOCKS_PER_SEC) <<
SYSTIMER_TARGET0_PERIOD_S);
putreg32(regval, SYSTIMER_TARGET0_CONF_REG);
putreg32(SYSTIMER_TIMER_COMP0_LOAD, SYSTIMER_COMP0_LOAD_REG);
/* Stall timer when stall CPU, specially when using JTAG to debug */
setbits(SYSTIMER_TIMER_UNIT0_CORE0_STALL_EN, SYSTIMER_CONF_REG);
/* Enable interrupt */
setbits(SYSTIMER_TARGET0_INT_CLR, SYSTIMER_INT_CLR_REG);
setbits(SYSTIMER_TARGET0_INT_ENA, SYSTIMER_INT_ENA_REG);
regval = SYSTIMER_TARGET0_WORK_EN;
setbits(regval, SYSTIMER_CONF_REG);
/* Start alarm0 counter1 */
regval = SYSTIMER_TIMER_UNIT1_WORK_EN;
setbits(regval, SYSTIMER_CONF_REG);
esp32c6_setup_irq(ESP32C6_SYSTIMER_TARGET0_EDGE_PERIPH,
ESP32C6_INT_PRIO_DEF,
ESP32C6_INT_LEVEL);
/* Attach the timer interrupt. */
irq_attach(ESP32C6_IRQ_SYSTIMER_TARGET0_EDGE, (xcpt_t)systimer_isr, NULL);
/* Enable the allocated CPU interrupt. */
up_enable_irq(ESP32C6_IRQ_SYSTIMER_TARGET0_EDGE);
}
-56
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@@ -1,56 +0,0 @@
/****************************************************************************
* arch/risc-v/src/esp32c6/esp32c6_vectors.S
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <arch/irq.h>
#include <arch/esp32c6/irq.h>
#include "chip.h"
/****************************************************************************
* Public Symbols
****************************************************************************/
.global _vector_table
/****************************************************************************
* Section: .exception_vectors.text
****************************************************************************/
.section .exception_vectors.text
/****************************************************************************
* Name: _vector_table
****************************************************************************/
.balign 0x100
.type _vector_table, @function
_vector_table:
.option push
.option norvc
.rept (32)
j exception_common
.endr
File diff suppressed because it is too large Load Diff
File diff suppressed because it is too large Load Diff
@@ -1,102 +0,0 @@
/****************************************************************************
* arch/risc-v/src/esp32c6/hardware/esp32c6_rom_layout.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __ARCH_RISCV_SRC_ESP32C6_HARDWARE_ESP32C6_ROM_LAYOUT_H
#define __ARCH_RISCV_SRC_ESP32C6_HARDWARE_ESP32C6_ROM_LAYOUT_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <stdint.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Structure and functions for returning ROM global layout
*
* This is for address symbols defined in the linker script,
* which may change during ECOs.
*/
struct esp32c6_rom_layout_s
{
uintptr_t dram0_stack_shared_mem_start;
uintptr_t dram0_rtos_reserved_start;
uintptr_t stack_sentry;
uintptr_t stack;
/* BTDM data */
uintptr_t data_start_btdm;
uintptr_t data_end_btdm;
uintptr_t bss_start_btdm;
uintptr_t bss_end_btdm;
uintptr_t data_start_btdm_rom;
uintptr_t data_start_interface_btdm;
uintptr_t data_end_interface_btdm;
uintptr_t bss_start_interface_btdm;
uintptr_t bss_end_interface_btdm;
/* BTBB data */
uintptr_t dram_start_btbbrom;
uintptr_t dram_end_btbbrom;
/* PHY data */
uintptr_t dram_start_phyrom;
uintptr_t dram_end_phyrom;
/* Wi-Fi data */
uintptr_t dram_start_net80211;
uintptr_t dram_end_net80211;
uintptr_t data_start_interface_net80211;
uintptr_t data_end_interface_net80211;
uintptr_t bss_start_interface_net80211;
uintptr_t bss_end_interface_net80211;
uintptr_t dram_start_pp;
uintptr_t dram_end_pp;
uintptr_t data_start_interface_pp;
uintptr_t data_end_interface_pp;
uintptr_t bss_start_interface_pp;
uintptr_t bss_end_interface_pp;
/* Coexist data */
uintptr_t dram_start_coexist;
uintptr_t dram_end_coexist;
uintptr_t data_start_interface_coexist;
uintptr_t data_end_interface_coexist;
uintptr_t bss_start_interface_coexist;
uintptr_t bss_end_interface_coexist;
/* USB device data */
uintptr_t dram_start_usbdev_rom;
uintptr_t dram_end_usbdev_rom;
uintptr_t dram_start_uart_rom;
uintptr_t dram_end_uart_rom;
};
#endif /* __ARCH_RISCV_SRC_ESP32C6_HARDWARE_ESP32C6_ROM_LAYOUT_H */
@@ -1,161 +0,0 @@
/****************************************************************************
* arch/risc-v/src/esp32c6/hardware/esp32c6_soc.h
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
****************************************************************************/
#ifndef __ARCH_RISCV_SRC_ESP32C6_HARDWARE_ESP32C6_SOC_H
#define __ARCH_RISCV_SRC_ESP32C6_HARDWARE_ESP32C6_SOC_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <stdint.h>
#include <stdbool.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#define DR_REG_PLIC_MX_BASE 0x20001000
#define DR_REG_PLIC_UX_BASE 0x20001400
#define DR_REG_CLINT_M_BASE 0x20001800
#define DR_REG_CLINT_U_BASE 0x20001C00
#define DR_REG_UART_BASE 0x60000000
#define DR_REG_UART1_BASE 0x60001000
#define DR_REG_SPI0_BASE 0x60002000
#define DR_REG_SPI1_BASE 0x60003000
#define DR_REG_I2C_EXT_BASE 0x60004000
#define DR_REG_UHCI0_BASE 0x60005000
#define DR_REG_RMT_BASE 0x60006000
#define DR_REG_LEDC_BASE 0x60007000
#define DR_REG_TIMERGROUP0_BASE 0x60008000
#define DR_REG_TIMERGROUP1_BASE 0x60009000
#define DR_REG_SYSTIMER_BASE 0x6000A000
#define DR_REG_TWAI0_BASE 0x6000B000
#define DR_REG_I2S_BASE 0x6000C000
#define DR_REG_TWAI1_BASE 0x6000D000
#define DR_REG_APB_SARADC_BASE 0x6000E000
#define DR_REG_USB_SERIAL_JTAG_BASE 0x6000F000
#define DR_REG_INTERRUPT_MATRIX_BASE 0x60010000
#define DR_REG_ATOMIC_BASE 0x60011000
#define DR_REG_PCNT_BASE 0x60012000
#define DR_REG_SOC_ETM_BASE 0x60013000
#define DR_REG_MCPWM_BASE 0x60014000
#define DR_REG_PARL_IO_BASE 0x60015000
#define DR_REG_HINF_BASE 0x60016000
#define DR_REG_SLC_BASE 0x60017000
#define DR_REG_SLCHOST_BASE 0x60018000
#define DR_REG_PVT_MONITOR_BASE 0x60019000
#define DR_REG_GDMA_BASE 0x60080000
#define DR_REG_SPI2_BASE 0x60081000
#define DR_REG_AES_BASE 0x60088000
#define DR_REG_SHA_BASE 0x60089000
#define DR_REG_RSA_BASE 0x6008A000
#define DR_REG_ECC_MULT_BASE 0x6008B000
#define DR_REG_DS_BASE 0x6008C000
#define DR_REG_HMAC_BASE 0x6008D000
#define DR_REG_IO_MUX_BASE 0x60090000
#define DR_REG_GPIO_BASE 0x60091000
#define DR_REG_GPIO_EXT_BASE 0x60091f00 //ESP32C6-TODO
#define DR_REG_MEM_MONITOR_BASE 0x60092000
#define DR_REG_PAU_BASE 0x60093000
#define DR_REG_HP_SYSTEM_BASE 0x60095000
#define DR_REG_PCR_BASE 0x60096000
#define DR_REG_TEE_BASE 0x60098000
#define DR_REG_HP_APM_BASE 0x60099000
#define DR_REG_LP_APM0_BASE 0x60099800
#define DR_REG_MISC_BASE 0x6009F000
#define DR_REG_PMU_BASE 0x600B0000
#define DR_REG_LP_CLKRST_BASE 0x600B0400
#define DR_REG_EFUSE_BASE 0x600B0800
#define DR_REG_LP_TIMER_BASE 0x600B0C00
#define DR_REG_LP_AON_BASE 0x600B1000
#define DR_REG_LP_UART_BASE 0x600B1400
#define DR_REG_LP_I2C_BASE 0x600B1800
#define DR_REG_LP_WDT_BASE 0x600B1C00
#define DR_REG_LP_IO_BASE 0x600B2000
#define DR_REG_LP_I2C_ANA_MST_BASE 0x600B2400
#define DR_REG_LPPERI_BASE 0x600B2800
#define DR_REG_LP_ANALOG_PERI_BASE 0x600B2C00
#define DR_REG_LP_TEE_BASE 0x600B3400
#define DR_REG_LP_APM_BASE 0x600B3800
#define DR_REG_OPT_DEBUG_BASE 0x600B3C00
#define DR_REG_TRACE_BASE 0x600C0000
#define DR_REG_ASSIST_DEBUG_BASE 0x600C2000
#define DR_REG_CPU_BUS_MONITOR_BASE 0x600C2000
#define DR_REG_INTPRI_BASE 0x600C5000
#define DR_REG_EXTMEM_BASE 0x600C8000
/* Registers Operation */
#define REG_UHCI_BASE(i) (DR_REG_UHCI0_BASE - (i) * 0x8000)
#define REG_UART_BASE(i) (DR_REG_UART_BASE + (i) * 0x1000)
#define REG_UART_AHB_BASE(i) (DR_REG_UART_BASE + (i) * 0x10000)
#define UART_FIFO_AHB_REG(i) (REG_UART_AHB_BASE(i) + 0x0)
#define REG_I2S_BASE(i) (DR_REG_I2S_BASE)
#define REG_TIMG_BASE(i) (DR_REG_TIMERGROUP0_BASE + (i) * 0x1000)
#define REG_SPI_MEM_BASE(i) (DR_REG_SPI0_BASE + (i) * 0x1000)
#define REG_SPI_BASE(i) (DR_REG_SPI2_BASE)
#define REG_I2C_BASE(i) (DR_REG_I2C_EXT_BASE)
#define REG_MCPWM_BASE(i) (DR_REG_MCPWM_BASE)
#define REG_TWAI_BASE(i) (DR_REG_TWAI_BASE + (i) * 0x2000)
/* Peripheral Clock */
#define APB_CLK_FREQ_ROM (40 * 1000000)
#define CPU_CLK_FREQ_ROM APB_CLK_FREQ_ROM
#define UART_CLK_FREQ_ROM (40 * 1000000)
#define EFUSE_CLK_FREQ_ROM (20 * 1000000)
#define CPU_CLK_FREQ APB_CLK_FREQ
#define APB_CLK_FREQ (80 * 1000000)
#define REF_CLK_FREQ (1000000)
#define RTC_CLK_FREQ (20 * 1000000)
#define XTAL_CLK_FREQ (40 * 1000000)
#define UART_CLK_FREQ APB_CLK_FREQ
#define WDT_CLK_FREQ APB_CLK_FREQ
#define TIMER_CLK_FREQ (80000000 >> 4) /* 80MHz divided by 16 */
#define SPI_CLK_DIV 4
#define TICKS_PER_US_ROM 40 /* CPU is 80MHz */
#define GPIO_MATRIX_DELAY_NS 0
#define PLIC_MXINT_ENABLE_REG (DR_REG_PLIC_MX_BASE + 0x0)
#define PLIC_MXINT_TYPE_REG (DR_REG_PLIC_MX_BASE + 0x4)
#define PLIC_MXINT_CLEAR_REG (DR_REG_PLIC_MX_BASE + 0x8)
#define PLIC_MXINT_THRESH_REG (DR_REG_PLIC_MX_BASE + 0x90)
#define PLIC_MXINT0_PRI_REG (DR_REG_PLIC_MX_BASE + 0x10)
#define INTC_INT_PRIO_REG(n) (PLIC_MXINT0_PRI_REG + (n)*4)
/* Mapping Peripheral IDs to map register addresses. */
#define CORE_MAP_REGADDR(n) (DR_REG_INTERRUPT_MATRIX_BASE + ((n) << 2))
#define BIT(nr) (1UL << (nr))
/* Extract the field from the register and shift it to avoid wrong reading */
#define REG_MASK(_reg, _field) (((_reg) & (_field##_M)) >> (_field##_S))
/* Helper to place a value in a field */
#define VALUE_TO_FIELD(_value, _field) (((_value) << (_field##_S)) & (_field##_M))
#define MHZ (1000000)
#endif /* __ARCH_RISCV_SRC_ESP32C6_HARDWARE_ESP32C6_SOC_H */
File diff suppressed because it is too large Load Diff
File diff suppressed because it is too large Load Diff
-3
View File
@@ -4218,9 +4218,6 @@ endif
if ARCH_BOARD_ESP32S3_BOX
source "boards/xtensa/esp32s3/esp32s3-box/Kconfig"
endif
if ARCH_BOARD_ESP32C6_DEVKIT
source "boards/risc-v/esp32c6/esp32c6-devkit/Kconfig"
endif
if ARCH_BOARD_ESP32C6_GENERIC
source "boards/risc-v/espressif/esp32c6-generic/Kconfig"
endif
-29
View File
@@ -1,29 +0,0 @@
#############################################################################
# boards/risc-v/esp32c6/common/Makefile
#
# Licensed to the Apache Software Foundation (ASF) under one or more
# contributor license agreements. See the NOTICE file distributed with
# this work for additional information regarding copyright ownership. The
# ASF licenses this file to you under the Apache License, Version 2.0 (the
# "License"); you may not use this file except in compliance with the
# License. You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations
# under the License.
#
#############################################################################
include $(TOPDIR)/Make.defs
include board/Make.defs
DEPPATH += --dep-path board
include $(TOPDIR)/boards/Board.mk
BOARDDIR = $(ARCHSRCDIR)$(DELIM)board
@@ -1,2 +0,0 @@
/*.ld.tmp
File diff suppressed because it is too large Load Diff
@@ -1,104 +0,0 @@
/****************************************************************************
* boards/risc-v/esp32c6/common/scripts/flat_memory.ld
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* This file describes the memory layout (memory blocks) as virtual
* memory addresses.
*
* legacy_sections.ld contains output sections to link compiler
* output into these memory blocks.
*
****************************************************************************/
#include <nuttx/config.h>
#define SRAM_IRAM_START 0x40800000
#define SRAM_DRAM_START 0x40800000
#define I_D_SRAM_OFFSET (SRAM_IRAM_START - SRAM_DRAM_START)
/* 2nd stage bootloader iram_loader_seg start address */
#define SRAM_DRAM_END (0x4086e610 - I_D_SRAM_OFFSET)
#define SRAM_IRAM_ORG (SRAM_IRAM_START)
#define SRAM_DRAM_ORG (SRAM_DRAM_START)
#define I_D_SRAM_SIZE (SRAM_DRAM_END - SRAM_DRAM_ORG)
/* IDRAM0_2_SEG_SIZE_DEFAULT is used when page size is 64KB */
#define CONFIG_MMU_PAGE_SIZE 0x10000
#define IDRAM0_2_SEG_SIZE (CONFIG_MMU_PAGE_SIZE << 8)
#define DRAM0_0_SEG_LEN I_D_SRAM_SIZE
MEMORY
{
/* All these values assume the flash cache is on, and have the blocks it
* uses subtracted from the length of the various regions. The 'data access
* port' dram/drom regions map to the same iram/irom regions but are
* connected to the data port of the CPU and eg allow byte-wise access.
*/
iram0_0_seg (RX) : org = SRAM_IRAM_ORG, len = I_D_SRAM_SIZE
/* Flash mapped instruction data.
*
* The 0x20 offset is a convenience for the app binary image generation.
* Flash cache has 64KB pages. The .bin file which is flashed to the chip
* has a 0x18 byte file header, and each segment has a 0x08 byte segment
* header. Setting this offset makes it simple to meet the flash cache MMU's
* constraint that (paddr % 64KB == vaddr % 64KB).
*/
irom0_0_seg (RX) : org = 0x42000020, len = IDRAM0_2_SEG_SIZE - 0x20
/* Shared data RAM, excluding memory reserved for ROM bss/data/stack.
* Enabling Bluetooth & Trace Memory features in menuconfig will decrease
* the amount of RAM available.
*/
dram0_0_seg (RW) : org = SRAM_DRAM_ORG, len = DRAM0_0_SEG_LEN
/* Flash mapped constant data */
drom0_0_seg (R) : org = 0x42000020, len = IDRAM0_2_SEG_SIZE - 0x20
/* RTC fast memory (executable). Persists over deep sleep. */
rtc_iram_seg(RWX) : org = 0x50000000, len = 0x4000
}
/* Heap ends at the start of the static data of the ROM bootloader */
_eheap = 0x4086ad08;
#if CONFIG_ESP32C6_DEVKIT_RUN_IRAM
REGION_ALIAS("default_rodata_seg", dram0_0_seg);
REGION_ALIAS("default_code_seg", iram0_0_seg);
#else
REGION_ALIAS("default_rodata_seg", drom0_0_seg);
REGION_ALIAS("default_code_seg", irom0_0_seg);
#endif /* CONFIG_ESP32C6_DEVKIT_RUN_IRAM */
REGION_ALIAS("rtc_data_seg", rtc_iram_seg );
REGION_ALIAS("rtc_slow_seg", rtc_iram_seg );
REGION_ALIAS("rtc_data_location", rtc_iram_seg );
@@ -1,233 +0,0 @@
/****************************************************************************
* boards/risc-v/esp32c6/common/scripts/legacy_sections.ld
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/* Default entry point: */
ENTRY(__start);
SECTIONS
{
.iram0.text :
{
_iram_start = ABSOLUTE(.);
/* Vectors go to start of IRAM */
KEEP(*(.exception_vectors.text));
. = ALIGN(4);
*(.iram1)
*(.iram1.*)
} >iram0_0_seg
/* Marks the end of IRAM code segment */
.iram0.text_end (NOLOAD) :
{
. = ALIGN (16);
} >iram0_0_seg
.iram0.data :
{
. = ALIGN(16);
*(.iram.data)
*(.iram.data*)
} >iram0_0_seg
.iram0.bss (NOLOAD) :
{
. = ALIGN(16);
*(.iram.bss)
*(.iram.bss*)
. = ALIGN(16);
_iram_end = ABSOLUTE(.);
} >iram0_0_seg
/* This section is required to skip .iram0.text area because iram0_0_seg
* and dram0_0_seg reflect the same address space on different buses.
*/
.dram0.dummy (NOLOAD):
{
. = ORIGIN(dram0_0_seg) + _iram_end - _iram_start;
} >dram0_0_seg
/* Shared RAM */
.dram0.bss (NOLOAD) :
{
. = ALIGN (8);
_sbss = ABSOLUTE(.);
*(.dynsbss)
*(.sbss)
*(.sbss.*)
*(.gnu.linkonce.sb.*)
*(.scommon)
*(.sbss2)
*(.sbss2.*)
*(.gnu.linkonce.sb2.*)
*(.dynbss)
*(.bss)
*(.bss.*)
*(.share.mem)
*(.gnu.linkonce.b.*)
*(COMMON)
. = ALIGN (8);
_ebss = ABSOLUTE(.);
/* Uninitialized .bss */
*(.noinit)
*(.noinit.*)
} >dram0_0_seg
.dram0.data :
{
_sdata = ABSOLUTE(.);
*(.data)
*(.data.*)
*(.gnu.linkonce.d.*)
*(.data1)
__global_pointer$ = . + 0x800;
*(.sdata)
*(.sdata.*)
*(.gnu.linkonce.s.*)
*(.sdata2)
*(.sdata2.*)
*(.gnu.linkonce.s2.*)
*(.jcr)
*(.dram1)
*(.dram1.*)
. = ALIGN(4);
_edata = ABSOLUTE(.);
/* Heap starts at the end of .data */
_sheap = ABSOLUTE(.);
} >dram0_0_seg
.flash.text :
{
_stext = .;
*(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
*(.irom0.text) /* catch stray ICACHE_RODATA_ATTR */
*(.fini.literal)
*(.fini)
*(.gnu.version)
_etext = .;
/* Similar to _iram_start, this symbol goes here so it is
* resolved by addr2line in preference to the first symbol in
* the flash.text segment.
*/
_flash_cache_start = ABSOLUTE(0);
} >default_code_seg
.flash_rodata_dummy (NOLOAD):
{
. = SIZEOF(.flash.text);
. = ALIGN(0x10000) + 0x20;
} >drom0_0_seg
.flash.rodata : ALIGN(0x10)
{
_srodata = ABSOLUTE(.);
*(.rodata)
*(.rodata.*)
*(.irom1.text) /* catch stray ICACHE_RODATA_ATTR */
*(.gnu.linkonce.r.*)
*(.rodata1)
*(.srodata.*)
__XT_EXCEPTION_TABLE_ = ABSOLUTE(.);
*(.xt_except_table)
*(.gcc_except_table .gcc_except_table.*)
*(.gnu.linkonce.e.*)
*(.gnu.version_r)
. = (. + 3) & ~ 3;
__eh_frame = ABSOLUTE(.);
KEEP(*(.eh_frame))
. = (. + 7) & ~ 3;
/* C++ constructor and destructor tables: */
_sinit = ABSOLUTE(.);
KEEP (*crtbegin.o(.ctors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*(.ctors))
_einit = ABSOLUTE(.);
KEEP (*crtbegin.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
/* C++ exception handlers table: */
__XT_EXCEPTION_DESCS_ = ABSOLUTE(.);
*(.xt_except_desc)
*(.gnu.linkonce.h.*)
__XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
*(.xt_except_desc_end)
*(.dynamic)
*(.gnu.version_d)
_erodata = ABSOLUTE(.);
/* Literals are also RO data. */
_lit4_start = ABSOLUTE(.);
*(*.lit4)
*(.lit4.*)
*(.gnu.linkonce.lit4.*)
_lit4_end = ABSOLUTE(.);
. = ALIGN(4);
} >default_rodata_seg
/* RTC fast memory holds RTC wake stub code !*/
.rtc.text :
{
. = ALIGN(4);
*(.rtc.literal .rtc.text)
} >rtc_iram_seg
/* This section is required to skip rtc.text area because the text and
* data segements reflect the same address space on different buses.
*/
.rtc.dummy :
{
. = SIZEOF(.rtc.text);
} >rtc_iram_seg
/* RTC data section holds RTC wake stub data/rodata. */
.rtc.data :
{
*(.rtc.data)
*(.rtc.rodata)
} >rtc_iram_seg
}
@@ -1,12 +0,0 @@
#
# For a description of the syntax of this configuration file,
# see the file kconfig-language.txt in the NuttX tools repository.
#
if ARCH_BOARD_ESP32C6_DEVKIT
config ESP32C6_DEVKIT_RUN_IRAM
bool "Run from IRAM"
default n
endif # ARCH_BOARD_ESP32C6_DEVKIT
@@ -1,33 +0,0 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_NDEBUG is not set
CONFIG_ARCH="risc-v"
CONFIG_ARCH_BOARD="esp32c6-devkit"
CONFIG_ARCH_BOARD_COMMON=y
CONFIG_ARCH_BOARD_ESP32C6_DEVKIT=y
CONFIG_ARCH_CHIP="esp32c6"
CONFIG_ARCH_CHIP_ESP32C6=y
CONFIG_ARCH_CHIP_ESP32C6WROOM1=y
CONFIG_ARCH_INTERRUPTSTACK=1536
CONFIG_ARCH_RISCV=y
CONFIG_BENCHMARK_COREMARK=y
CONFIG_BOARD_LOOPSPERMSEC=15000
CONFIG_DEBUG_CUSTOMOPT=y
CONFIG_DEBUG_OPTLEVEL="-O3"
CONFIG_FS_PROCFS=y
CONFIG_IDLETHREAD_STACKSIZE=3072
CONFIG_INIT_ENTRYPOINT="coremark_main"
CONFIG_INIT_STACKSIZE=3072
CONFIG_INTELHEX_BINARY=y
CONFIG_PREALLOC_TIMERS=0
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_WAITPID=y
CONFIG_START_DAY=29
CONFIG_START_MONTH=11
CONFIG_START_YEAR=2019
CONFIG_UART0_SERIAL_CONSOLE=y
@@ -1,47 +0,0 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_NSH_ARGCAT is not set
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
CONFIG_ARCH="risc-v"
CONFIG_ARCH_BOARD="esp32c6-devkit"
CONFIG_ARCH_BOARD_COMMON=y
CONFIG_ARCH_BOARD_ESP32C6_DEVKIT=y
CONFIG_ARCH_CHIP="esp32c6"
CONFIG_ARCH_CHIP_ESP32C6=y
CONFIG_ARCH_CHIP_ESP32C6WROOM1=y
CONFIG_ARCH_INTERRUPTSTACK=1536
CONFIG_ARCH_RISCV=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_BOARD_LOOPSPERMSEC=15000
CONFIG_BUILTIN=y
CONFIG_DEBUG_FULLOPT=y
CONFIG_DEBUG_SYMBOLS=y
CONFIG_DEV_ZERO=y
CONFIG_FRAME_POINTER=y
CONFIG_FS_PROCFS=y
CONFIG_IDLETHREAD_STACKSIZE=2048
CONFIG_INIT_ENTRYPOINT="nsh_main"
CONFIG_INTELHEX_BINARY=y
CONFIG_LIBC_PERROR_STDOUT=y
CONFIG_LIBC_STRERROR=y
CONFIG_NFILE_DESCRIPTORS_PER_BLOCK=6
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_READLINE=y
CONFIG_NSH_STRERROR=y
CONFIG_PREALLOC_TIMERS=0
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_BACKTRACE=y
CONFIG_SCHED_WAITPID=y
CONFIG_START_DAY=29
CONFIG_START_MONTH=11
CONFIG_START_YEAR=2019
CONFIG_SYSTEM_DUMPSTACK=y
CONFIG_SYSTEM_NSH=y
CONFIG_UART0_SERIAL_CONSOLE=y
@@ -1,33 +0,0 @@
/****************************************************************************
* boards/risc-v/esp32c6/esp32c6-devkit/include/board.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __BOARDS_RISCV_ESP32C6_ESP32C6_DEVKIT_INCLUDE_BOARD_H
#define __BOARDS_RISCV_ESP32C6_ESP32C6_DEVKIT_INCLUDE_BOARD_H
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Clocking *****************************************************************/
#define BOARD_XTAL_FREQUENCY 40000000
#endif /* __BOARDS_RISCV_ESP32C6_ESP32C6_DEVKIT_INCLUDE_BOARD_H */
@@ -1,56 +0,0 @@
############################################################################
# boards/risc-v/esp32c6/esp32c6-devkit/scripts/Make.defs
#
# Licensed to the Apache Software Foundation (ASF) under one or more
# contributor license agreements. See the NOTICE file distributed with
# this work for additional information regarding copyright ownership. The
# ASF licenses this file to you under the Apache License, Version 2.0 (the
# "License"); you may not use this file except in compliance with the
# License. You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations
# under the License.
#
###########################################################################
include $(TOPDIR)/.config
include $(TOPDIR)/tools/Config.mk
include $(TOPDIR)/tools/esp32c6/Config.mk
include $(TOPDIR)/arch/risc-v/src/common/Toolchain.defs
ARCHSCRIPT += $(BOARD_COMMON_DIR)$(DELIM)scripts$(DELIM)esp32c6_rom.ld
# Pick the linker scripts from the board level if they exist, if not
# pick the common linker scripts.
ARCHSCRIPT += $(call FINDSCRIPT,flat_memory.ld)
ARCHSCRIPT += $(call FINDSCRIPT,legacy_sections.ld)
ARCHPICFLAGS = -fpic
CFLAGS := $(ARCHCFLAGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) -pipe -Werror=return-type -Werror
CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
CXXFLAGS := $(ARCHCXXFLAGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) -pipe
CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS)
AFLAGS := $(CFLAGS) -D__ASSEMBLY__
# Loadable module definitions
CMODULEFLAGS = $(CFLAGS)
LDMODULEFLAGS = -melf32lriscv -r -e module_initialize
LDMODULEFLAGS += -T $(call CONVERT_PATH,$(TOPDIR)/libs/libc/modlib/gnu-elf.ld)
# ELF module definitions
CELFFLAGS = $(CFLAGS)
CXXELFFLAGS = $(CXXFLAGS)
LDELFFLAGS = -melf32lriscv -r -e main
LDELFFLAGS += -T $(call CONVERT_PATH,$(TOPDIR)$(DELIM)binfmt$(DELIM)libelf$(DELIM)gnu-elf.ld)
@@ -1,34 +0,0 @@
#############################################################################
# boards/risc-v/esp32c6/esp32c6-devkit/src/Makefile
#
# Licensed to the Apache Software Foundation (ASF) under one or more
# contributor license agreements. See the NOTICE file distributed with
# this work for additional information regarding copyright ownership. The
# ASF licenses this file to you under the Apache License, Version 2.0 (the
# "License"); you may not use this file except in compliance with the
# License. You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations
# under the License.
#
#############################################################################
include $(TOPDIR)/Make.defs
CSRCS = esp32c6_boot.c esp32c6_bringup.c
ifeq ($(CONFIG_BOARDCTL),y)
CSRCS += esp32c6_appinit.c
ifeq ($(CONFIG_BOARDCTL_RESET),y)
CSRCS += esp32c6_reset.c
endif
endif
DEPPATH += --dep-path board
VPATH += :board
CFLAGS += ${INCDIR_PREFIX}$(TOPDIR)$(DELIM)arch$(DELIM)$(CONFIG_ARCH)$(DELIM)src$(DELIM)board$(DELIM)board
@@ -1,67 +0,0 @@
/****************************************************************************
* boards/risc-v/esp32c6/esp32c6-devkit/src/esp32c6-devkit.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __BOARDS_RISCV_ESP32C6_ESP32C6_DEVKIT_SRC_ESP32C6_DEVKIT_H
#define __BOARDS_RISCV_ESP32C6_ESP32C6_DEVKIT_SRC_ESP32C6_DEVKIT_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/compiler.h>
#include <stdint.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Public Types
****************************************************************************/
/****************************************************************************
* Public data
****************************************************************************/
#ifndef __ASSEMBLY__
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
/****************************************************************************
* Name: esp32c6_bringup
*
* Description:
* Perform architecture-specific initialization
*
* CONFIG_BOARD_LATE_INITIALIZE=y :
* Called from board_late_initialize().
*
* CONFIG_BOARD_LATE_INITIALIZE=y && CONFIG_LIB_BOARDCTL=y :
* Called from the NSH library via board_app_initialize()
*
****************************************************************************/
int esp32c6_bringup(void);
#endif /* __ASSEMBLY__ */
#endif /* __BOARDS_RISCV_ESP32C6_ESP32C6_DEVKIT_SRC_ESP32C6_DEVKIT_H */
@@ -1,80 +0,0 @@
/****************************************************************************
* boards/risc-v/esp32c6/esp32c6-devkit/src/esp32c6_appinit.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <nuttx/board.h>
#include "esp32c6-devkit.h"
#ifdef CONFIG_BOARDCTL
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_app_initialize
*
* Description:
* Perform application specific initialization. This function is never
* called directly from application code, but only indirectly via the
* (non-standard) boardctl() interface using the command BOARDIOC_INIT.
*
* Input Parameters:
* arg - The boardctl() argument is passed to the board_app_initialize()
* implementation without modification. The argument has no
* meaning to NuttX; the meaning of the argument is a contract
* between the board-specific initialization logic and the
* matching application logic. The value could be such things as a
* mode enumeration value, a set of DIP switch settings, a
* pointer to configuration data read from a file or serial FLASH,
* or whatever you would like to do with it. Every implementation
* should accept zero/NULL as a default configuration.
*
* Returned Value:
* Zero (OK) is returned on success; a negated errno value is returned on
* any failure to indicate the nature of the failure.
*
****************************************************************************/
int board_app_initialize(uintptr_t arg)
{
#ifdef CONFIG_BOARD_LATE_INITIALIZE
/* Board initialization already performed by board_late_initialize() */
return OK;
#else
/* Perform board-specific initialization */
return esp32c6_bringup();
#endif
}
#endif /* CONFIG_BOARDCTL */
@@ -1,87 +0,0 @@
/****************************************************************************
* boards/risc-v/esp32c6/esp32c6-devkit/src/esp32c6_boot.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <debug.h>
#include <nuttx/board.h>
#include <arch/board/board.h>
#include "esp32c6-devkit.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: esp32c6_board_initialize
*
* Description:
* All ESP32C6 architectures must provide the following entry point.
* This entry point is called early in the initialization -- after all
* memory has been configured and mapped but before any devices have been
* initialized.
*
****************************************************************************/
void esp32c6_board_initialize(void)
{
/* Configure on-board LEDs if LED support has been selected. */
#ifdef CONFIG_ARCH_LEDS
board_autoled_initialize();
#endif
}
/****************************************************************************
* Name: board_late_initialize
*
* Description:
* If CONFIG_BOARD_LATE_INITIALIZE is selected, then an additional
* initialization call will be performed in the boot-up sequence to a
* function called board_late_initialize(). board_late_initialize() will
* be called immediately after up_initialize() is called and just before
* the initial application is started. This additional initialization
* phase may be used, for example, to initialize board-specific device
* drivers.
*
****************************************************************************/
#ifdef CONFIG_BOARD_LATE_INITIALIZE
void board_late_initialize(void)
{
/* Perform board-specific initialization */
esp32c6_bringup();
}
#endif
@@ -1,86 +0,0 @@
/****************************************************************************
* boards/risc-v/esp32c6/esp32c6-devkit/src/esp32c6_bringup.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdio.h>
#include <fcntl.h>
#include <unistd.h>
#include <syslog.h>
#include <sys/stat.h>
#include <sys/ioctl.h>
#include <sys/types.h>
#include <sys/mount.h>
#include <syslog.h>
#include <debug.h>
#include <stdio.h>
#include <syslog.h>
#include "esp32c6-devkit.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: esp32c6_bringup
*
* Description:
* Perform architecture-specific initialization
*
* CONFIG_BOARD_LATE_INITIALIZE=y :
* Called from board_late_initialize().
*
* CONFIG_BOARD_LATE_INITIALIZE=n && CONFIG_LIB_BOARDCTL=y :
* Called from the NSH library
*
****************************************************************************/
int esp32c6_bringup(void)
{
int ret;
#ifdef CONFIG_FS_PROCFS
/* Mount the procfs file system */
ret = mount(NULL, "/proc", "procfs", 0, NULL);
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: Failed to mount procfs at /proc: %d\n", ret);
}
#endif
/* If we got here then perhaps not all initialization was successful, but
* at least enough succeeded to bring-up NSH with perhaps reduced
* capabilities.
*/
UNUSED(ret);
return OK;
}
@@ -1,63 +0,0 @@
/****************************************************************************
* boards/risc-v/esp32c6/esp32c6-devkit/src/esp32c6_reset.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/arch.h>
#include <nuttx/board.h>
#ifdef CONFIG_BOARDCTL_RESET
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_reset
*
* Description:
* Reset board. Support for this function is required by board-level
* logic if CONFIG_BOARDCTL_RESET is selected.
*
* Input Parameters:
* status - Status information provided with the reset event. This
* meaning of this status information is board-specific. If not
* used by a board, the value zero may be provided in calls to
* board_reset().
*
* Returned Value:
* If this function returns, then it was not possible to power-off the
* board due to some constraints. The return value in this case is a
* board-specific reason for the failure to shutdown.
*
****************************************************************************/
int board_reset(int status)
{
up_systemreset();
return 0;
}
#endif /* CONFIG_BOARDCTL_RESET */