mirror of
https://github.com/apache/nuttx.git
synced 2026-06-06 08:36:24 +08:00
Fix SPI compilation errors
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2139 42af7a65-404d-4744-a932-0658087f49c3
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@@ -79,6 +79,36 @@
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* Private Functions
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************************************************************************************/
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static void stm32_chipselect(FAR struct spi_dev_s *dev, uint32 pinset, boolean pinval, boolean selected)
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{
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spidbg("devid: %d CS: %s pinset: %08x pinval: %s\n",
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(int)devid, selected ? "assert" : "de-assert", pinset, pinval ? "HIGH" : "LOW");
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/* If we are selecting the chip, then we must call stm32_spitake to assure that we
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* have mutually exclusive access to the SPI bus while the chip is selected.
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*/
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if (selected)
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{
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stm32_spitake(dev);
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}
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/* Then set the CHIP select. Usually the chip select is LOW to select and HIGH, but
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* that can vary from part to part.
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*/
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stm32_gpiowrite(pinset, pinval);
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/* If we just de-selected the chip, then we must call stm32_spigive to to relinquish
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* our exclusive access to the SPI bus. Now, any waiting threads can have the SPI.
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*/
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if (!selected)
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{
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stm32_spigive(dev);
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}
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}
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/************************************************************************************
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* Public Functions
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************************************************************************************/
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@@ -93,76 +123,65 @@
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void weak_function stm32_spiinitialize(void)
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{
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/* NOTE: Clocking for SPI1 and/or SPI2 was already provided in stm32_rcc.c */
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/* NOTE: Clocking for SPI1 and/or SPI2 was already provided in stm32_rcc.c.
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* Configurations of SPI pins is performed in stm32_spi.c.
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* Here, we only initialize chip select pins unique to the board
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* architecture.
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*/
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#ifdef CONFIG_STM32_SPI1
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/* Select SPI1 pin mapping */
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uint32 mapr = getreg32(STM32_AFIO_MAPR);
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#ifdef CONFIG_STM32_SPI1_REMAP
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mapr |= AFIO_MAPR_SPI1_REMAP;
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#else
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mapr &= ~AFIO_MAPR_SPI1_REMAP;
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#endif
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putreg32(mapr, STM32_AFIO_MAPR);
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/* Configure SPI1 alternate function pins */
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stm32_configgpio(GPIO_SPI1_SCK);
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stm32_configgpio(GPIO_SPI1_MISO);
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stm32_configgpio(GPIO_SPI1_MOSI);
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/* Configure the SPI-based microSD and FLASH CS GPIO */
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stm32_configgpio(GPIO_MMCSD_CS);
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stm32_configgpio(GPIO_FLASH_CS);
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#endif
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#ifdef CONFIG_STM32_SPI2
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/* Configure SPI1 alternate function pins */
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stm32_configgpio(GPIO_SPI2_SCK);
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stm32_configgpio(GPIO_SPI2_MISO);
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stm32_configgpio(GPIO_SPI2_MOSI);
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#endif
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}
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/****************************************************************************
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* The external functions, stm32_spi1/2select and stm32_spi1/2status must be
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* provided by board-specific logic. These are implementations of the
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* select and status methods SPI interface defined by struct spi_ops_s (see
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* include/nuttx/spi.h). All other methods (including up_spiinitialize())
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* are provided by common logic. To use this common SPI logic on your board:
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*
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* 1. Provide stm32_spi1/2select() and stm32_spi1/2status() functions in your
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* board-specific logic. This function will perform chip selection and
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* status operations using GPIOs in the way your board is configured.
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* 2. Add a call to up_spiinitialize() in your low level initialization
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* logic
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* 3. The handle returned by up_spiinitialize() may then be used to bind the
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* SPI driver to higher level logic (e.g., calling
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* mmcsd_spislotinitialize(), for example, will bind the SPI driver to
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* the SPI MMC/SD driver).
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*
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* Name: stm32_spi1/2/3select and stm32_spi1/2/3status
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*
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* Description:
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* The external functions, stm32_spi1/2/3select and stm32_spi1/2/3status must be
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* provided by board-specific logic. They are implementations of the select
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* and status methods of the SPI interface defined by struct spi_ops_s (see
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* include/nuttx/spi.h). All other methods (including up_spiinitialize())
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* are provided by common STM32 logic. To use this common SPI logic on your
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* board:
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*
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* 1. Provide logic in stm32_boardinitialize() to configure SPI chip select
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* pins.
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* 2. Provide stm32_spi1/2/3select() and stm32_spi1/2/3status() functions in your
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* board-specific logic. These functions will perform chip selection and
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* status operations using GPIOs in the way your board is configured.
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* The select() methods must call stm32_spitake() when the chip is selected
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* and stm32_spigive() when the chip is deselected. This assures mutually
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* exclusive access to the SPI for the duration while a chip is selected.
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* 3. Add a calls to up_spiinitialize() in your low level application
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* initialization logic
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* 4. The handle returned by up_spiinitialize() may then be used to bind the
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* SPI driver to higher level logic (e.g., calling
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* mmcsd_spislotinitialize(), for example, will bind the SPI driver to
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* the SPI MMC/SD driver).
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*
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****************************************************************************/
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#ifdef CONFIG_STM32_SPI1
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void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, boolean selected)
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{
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spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
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spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
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uint32 pinset;
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if (devid == SPIDEV_MMCSD)
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{
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/* Set the GPIO low to select and high to de-select */
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stm32_gpiowrite(GPIO_MMCSD_CS, !selected);
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stm32_chipselect(dev, GPIO_MMCSD_CS,!selected, selected);
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}
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else if (devid == SPIDEV_FLASH)
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{
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/* Set the GPIO low to select and high to de-select */
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stm32_gpiowrite(GPIO_FLASH_CS, !selected);
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stm32_chipselect(dev, GPIO_FLASH_CS,!selected, selected);
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}
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}
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@@ -184,4 +203,16 @@ ubyte stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
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}
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#endif
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#ifdef CONFIG_STM32_SPI3
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void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, boolean selected)
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{
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spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
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}
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ubyte stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
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{
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return SPI_STATUS_PRESENT;
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}
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#endif
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#endif /* CONFIG_STM32_SPI1 || CONFIG_STM32_SPI2 */
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