arch/arm/samv7: enable USART peripherals for SAMx7xJ series

SAME70J and SAMV70J series (64 pin packages) have two USART peripherals
and three UART peripherals. Ensure USART peripherals are enabled.

This is consistent with datasheet, USART0 also physically tested
on SAME70J21 MCU.

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
This commit is contained in:
Michal Lenc
2025-09-17 17:17:47 +02:00
committed by Alin Jerpelea
parent 59f3a37b83
commit 6ec759706d
2 changed files with 8 additions and 4 deletions
+4 -4
View File
@@ -183,8 +183,8 @@
# define SAMV7_NDAC12 1 /* 1 12-bit DAC channel */
# define SAMV7_NTCCH 12 /* 12 Timer/counter channels */
# define SAMV7_NTCCHIO 3 /* 3 Timer/counter channels I/O */
# define SAMV7_NUSART 0 /* No USARTs */
# define SAMV7_NUART 5 /* 5 UARTs */
# define SAMV7_NUSART 2 /* 2 USARTs */
# define SAMV7_NUART 3 /* 3 UARTs */
# define SAMV7_NQSPI 0 /* No Quad SPI */
# define SAMV7_NQSPI_SPI 1 /* QSPI functions in SPI mode only */
# define SAMV7_NSPI 0 /* No SPI */
@@ -354,8 +354,8 @@
# define SAMV7_NDAC12 1 /* 1 12-bit DAC channels */
# define SAMV7_NTCCH 12 /* 12 Timer/counter channels */
# define SAMV7_NTCCHIO 3 /* 3 Timer/counter channels I/O */
# define SAMV7_NUSART 0 /* No USARTs */
# define SAMV7_NUART 5 /* 5 UARTs */
# define SAMV7_NUSART 2 /* 2 USARTs */
# define SAMV7_NUART 3 /* 3 UARTs */
# define SAMV7_NQSPI 0 /* No Quad SPI */
# define SAMV7_NQSPI_SPI 1 /* QSPI functions in SPI mode only */
# define SAMV7_NSPI 0 /* No SPI */
+4
View File
@@ -217,6 +217,8 @@ config ARCH_CHIP_SAME70J
select SAMV7_QSPI_IS_SPI
select SAMV7_HAVE_USBFS
select SAMV7_HAVE_ISI8
select SAMV7_HAVE_USART0
select SAMV7_HAVE_USART1
config ARCH_CHIP_SAMV71
bool
@@ -269,6 +271,8 @@ config ARCH_CHIP_SAMV71J
select SAMV7_QSPI_IS_SPI
select SAMV7_HAVE_USBFS
select SAMV7_HAVE_ISI8
select SAMV7_HAVE_USART0
select SAMV7_HAVE_USART1
config ARCH_CHIP_PIC32CZCA70
bool