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arch/arm/samv7: enable USART peripherals for SAMx7xJ series
SAME70J and SAMV70J series (64 pin packages) have two USART peripherals and three UART peripherals. Ensure USART peripherals are enabled. This is consistent with datasheet, USART0 also physically tested on SAME70J21 MCU. Signed-off-by: Michal Lenc <michallenc@seznam.cz>
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committed by
Alin Jerpelea
parent
59f3a37b83
commit
6ec759706d
@@ -183,8 +183,8 @@
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# define SAMV7_NDAC12 1 /* 1 12-bit DAC channel */
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# define SAMV7_NTCCH 12 /* 12 Timer/counter channels */
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# define SAMV7_NTCCHIO 3 /* 3 Timer/counter channels I/O */
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# define SAMV7_NUSART 0 /* No USARTs */
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# define SAMV7_NUART 5 /* 5 UARTs */
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# define SAMV7_NUSART 2 /* 2 USARTs */
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# define SAMV7_NUART 3 /* 3 UARTs */
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# define SAMV7_NQSPI 0 /* No Quad SPI */
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# define SAMV7_NQSPI_SPI 1 /* QSPI functions in SPI mode only */
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# define SAMV7_NSPI 0 /* No SPI */
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@@ -354,8 +354,8 @@
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# define SAMV7_NDAC12 1 /* 1 12-bit DAC channels */
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# define SAMV7_NTCCH 12 /* 12 Timer/counter channels */
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# define SAMV7_NTCCHIO 3 /* 3 Timer/counter channels I/O */
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# define SAMV7_NUSART 0 /* No USARTs */
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# define SAMV7_NUART 5 /* 5 UARTs */
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# define SAMV7_NUSART 2 /* 2 USARTs */
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# define SAMV7_NUART 3 /* 3 UARTs */
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# define SAMV7_NQSPI 0 /* No Quad SPI */
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# define SAMV7_NQSPI_SPI 1 /* QSPI functions in SPI mode only */
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# define SAMV7_NSPI 0 /* No SPI */
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@@ -217,6 +217,8 @@ config ARCH_CHIP_SAME70J
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select SAMV7_QSPI_IS_SPI
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select SAMV7_HAVE_USBFS
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select SAMV7_HAVE_ISI8
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select SAMV7_HAVE_USART0
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select SAMV7_HAVE_USART1
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config ARCH_CHIP_SAMV71
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bool
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@@ -269,6 +271,8 @@ config ARCH_CHIP_SAMV71J
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select SAMV7_QSPI_IS_SPI
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select SAMV7_HAVE_USBFS
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select SAMV7_HAVE_ISI8
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select SAMV7_HAVE_USART0
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select SAMV7_HAVE_USART1
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config ARCH_CHIP_PIC32CZCA70
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bool
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