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naming errors/inconsitencies/typos

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Titus von Boxberg
2017-07-18 17:43:08 +02:00
parent 041a319789
commit 6d29a04752
2 changed files with 4 additions and 4 deletions
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arch/arm/src/stm32f7/chip/stm32f76xx77xx_rcc.h
+3 -3
View File
@@ -729,9 +729,9 @@
# define RCC_DCKCFGR2_SDMMC2SEL_48MHZ (0 << RCC_DCKCFGR2_SDMMC2SEL_SHIFT) /* 48 MHz clock is selected as SDMMC 2 clock */
# define RCC_DCKCFGR2_SDMMC2SEL_SYSCLK (1 << RCC_DCKCFGR2_SDMMC2SEL_SHIFT) /* System clock is selected as SDMMC 2 clock */
#define RCC_DCKCFGR2_DSISEL_SHIFT (30) /* Bit 30: DSI clock source selection */
#define RCC_DCKCFGR2_DSISELL_MASK (1 << RCC_DCKCFGR2_DSISEL_SHIFT)
# define RCC_DCKCFGR2_DSISEL_48MHZ (0 << RCC_DCKCFGR2_DSISEL_SHIFT) /* 48 MHz clock is selected as DSI clock */
# define RCC_DCKCFGR2_DSISEL_SYSCLK (1 << RCC_DCKCFGR2_DSISEL_SHIFT) /* System clock is selected as DSI clock */
#define RCC_DCKCFGR2_DSISEL_MASK (1 << RCC_DCKCFGR2_DSISEL_SHIFT)
# define RCC_DCKCFGR2_DSISEL_PHY (0 << RCC_DCKCFGR2_DSISEL_SHIFT) /* DSI PHY sources DSI clock */
# define RCC_DCKCFGR2_DSISEL_SYSCLK (1 << RCC_DCKCFGR2_DSISEL_SHIFT) /* System clock is selected as DSI clock */
#endif /* CONFIG_STM32F7_STM32F76XX || CONFIG_STM32F7_STM32F77XX */
#endif /* __ARCH_ARM_SRC_STM32_CHIP_STM32F76XX77XX_RCC_H */
arch/arm/src/stm32f7/stm32f76xx77xx_rcc.c
+1 -1
View File
@@ -909,7 +909,7 @@ static void stm32_stdclockconfig(void)
| RCC_DCKCFGR2_CK48MSEL_MASK
| RCC_DCKCFGR2_SDMMCSEL_MASK
| RCC_DCKCFGR2_SDMMC2SEL_MASK
| RCC_DCKCFGR2_DSISELL_MASK);
| RCC_DCKCFGR2_DSISEL_MASK);
regval |= ( STM32_RCC_DCKCFGR2_USART1SRC
| STM32_RCC_DCKCFGR2_USART2SRC