Add z8 I2C driver

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1680 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo
2009-04-04 20:53:06 +00:00
parent affc606a1d
commit 6d10d5deb9
6 changed files with 648 additions and 23 deletions
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@@ -688,3 +688,6 @@
* eZ80Acclaim!: Add a generic SPI driver for all eZ80 boards. * eZ80Acclaim!: Add a generic SPI driver for all eZ80 boards.
* Add a setmode() method to the SPI interface to handle parts with differing * Add a setmode() method to the SPI interface to handle parts with differing
mode requirements. mode requirements.
* include/nuttx/i2c.h: Defined a standard I2C interface
* eZ80Acclaim!: Add an I2C driver.
* eZ8Encore!: Add an I2C driver.
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@@ -8,7 +8,7 @@
<tr align="center" bgcolor="#e4e4e4"> <tr align="center" bgcolor="#e4e4e4">
<td> <td>
<h1><big><font color="#3c34ec"><i>NuttX RTOS</i></font></big></h1> <h1><big><font color="#3c34ec"><i>NuttX RTOS</i></font></big></h1>
<p>Last Updated: March 29, 2009</p> <p>Last Updated: April 4, 2009</p>
</td> </td>
</tr> </tr>
</table> </table>
@@ -948,7 +948,7 @@ BFD_ASSERT (*plt_offset != (bfd_vma) -1);
Integration and testing of NuttX on the ZiLOG ez80f0910200zcog-d is complete. Integration and testing of NuttX on the ZiLOG ez80f0910200zcog-d is complete.
The first integrated version was released in NuttX version 0.4.2 (with important early bugfixes The first integrated version was released in NuttX version 0.4.2 (with important early bugfixes
in 0.4.3 and 0.4.4). in 0.4.3 and 0.4.4).
As of this writing, that port provides basic board support with a serial console and eZ80F91 EMAC driver. As of this writing, that port provides basic board support with a serial console, SPI, and eZ80F91 EMAC driver.
</p> </p>
</td> </td>
</tr> </tr>
@@ -1361,11 +1361,16 @@ nuttx-0.4.5 2009-xx-xx Gregory Nutt &lt;spudmonkey@racsa.co.cr&gt;
* eZ80Acclaim!: Add a generic SPI driver for all eZ80 boards. * eZ80Acclaim!: Add a generic SPI driver for all eZ80 boards.
* Add a setmode() method to the SPI interface to handle parts with differing * Add a setmode() method to the SPI interface to handle parts with differing
mode requirements. mode requirements.
* include/nuttx/i2c.h: Defined a standard I2C interface
* eZ80Acclaim!: Add an I2C driver.
* eZ8Encore!: Add an I2C driver.
pascal-0.1.3 2009-xx-xx Gregory Nutt &lt;spudmonkey@racsa.co.cr&gt; pascal-0.1.3 2009-xx-xx Gregory Nutt &lt;spudmonkey@racsa.co.cr&gt;
buildroot-0.1.4 2009-xx-xx &lt;spudmonkey@racsa.co.cr&gt; buildroot-0.1.4 2009-xx-xx &lt;spudmonkey@racsa.co.cr&gt;
* Add support for a blackfin toolchain using GCC 4.2.4 and binutils 2.19
</pre></ul> </pre></ul>
<table width ="100%"> <table width ="100%">
+8 -2
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@@ -688,8 +688,14 @@ o z80/z8/ez80 (arch/z80)
Status: Open Status: Open
Priority: High if you happen to be working with XTRS. Priority: High if you happen to be working with XTRS.
Description: A "generic" SPI driver has been coded for the eZ80Acclaim! Description: A "generic" SPI and I2C drivers have been coded for the eZ80Acclaim!
However, this remains untested since I have no SPI devices for However, these remains untested since I have no SPI or I2C devices for
the board (yet).
Status: Open
Priority: Med
Description: A "generic" I2C driver has been coded for the eZ8Encore!
However, this remains untested since I have no I2C devices for
the board (yet). the board (yet).
Status: Open Status: Open
Priority: Med Priority: Med
+2 -2
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@@ -1,7 +1,7 @@
############################################################################ ############################################################################
# arch/z80/src/z8/Make.defs # arch/z80/src/z8/Make.defs
# #
# Copyright (C) 2008 Gregory Nutt. All rights reserved. # Copyright (C) 2008-2009 Gregory Nutt. All rights reserved.
# Author: Gregory Nutt <spudmonkey@racsa.co.cr> # Author: Gregory Nutt <spudmonkey@racsa.co.cr>
# #
# Redistribution and use in source and binary forms, with or without # Redistribution and use in source and binary forms, with or without
@@ -45,5 +45,5 @@ CMN_CSRCS = up_initialize.c up_allocateheap.c up_createstack.c \
CHIP_SSRCS = z8_vector.S z8_saveusercontext.S z8_restorecontext.S CHIP_SSRCS = z8_vector.S z8_saveusercontext.S z8_restorecontext.S
CHIP_CSRCS = z8_initialstate.c z8_irq.c z8_saveirqcontext.c \ CHIP_CSRCS = z8_initialstate.c z8_irq.c z8_saveirqcontext.c \
z8_schedulesigaction.c z8_sigdeliver.c z8_timerisr.c \ z8_schedulesigaction.c z8_sigdeliver.c z8_timerisr.c \
z8_lowuart.c z8_serial.c z8_registerdump.c z8_lowuart.c z8_serial.c z8_i2c.c z8_registerdump.c
+25 -17
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@@ -2,7 +2,7 @@
* arch/z80/src/z8/chip.h * arch/z80/src/z8/chip.h
* arch/z80/src/chip/chip.h * arch/z80/src/chip/chip.h
* *
* Copyright (C) 2008 Gregory Nutt. All rights reserved. * Copyright (C) 2008-2009 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr> * Author: Gregory Nutt <spudmonkey@racsa.co.cr>
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without
@@ -167,27 +167,35 @@
/* I2C Status Register Bit Definitions **********************************************/ /* I2C Status Register Bit Definitions **********************************************/
#if defined(_Z8FMC16) || defined(_Z8F1680) #if defined(_Z8FMC16) || defined(_Z8F1680)
# define I2C_ISTAT_NCKI (1 << 0) /* Bit 0: 1=NAK Interrupt */
# define I2C_ISTAT_SPRS (1 << 1) /* Bit 1: 1=STOP/RESTART condition Interrupt */
# define I2C_ISTAT_ARBLST (1 << 2) /* Bit 2: 1=Arbitration lost */
# define I2C_ISTAT_RD (1 << 3) /* Bit 3: 1=Read */
# define I2C_ISTAT_GCA (1 << 4) /* Bit 4: 1=General Call Address */
# define I2C_ISTAT_SAM (1 << 5) /* Bit 5: 1=Slave address match */
# define I2C_ISTAT_RDRF (1 << 6) /* Bit 6: 1=Receive Data Register Full */
# define I2C_ISTAT_TDRE (1 << 7) /* Bit 7: 1=Transmit Data Register Empty */
#else #else
# define I2C_STAT_NCKI (1 << 0) /* Bit 0: 1=NACK Interrupt */ # define I2C_STAT_NCKI (1 << 0) /* Bit 0: 1=NAK Interrupt */
# define I2C_STAT_DSS (1 << 1) /* Bit 1: 1=Data Shift State */ # define I2C_STAT_DSS (1 << 1) /* Bit 1: 1=Data Shift State */
# define I2C_STAT_TAS (1 << 2) /* Bit 2: 1=Transmit Address State */ # define I2C_STAT_TAS (1 << 2) /* Bit 2: 1=Transmit Address State */
# define I2C_STAT_RD (1 << 3) /* Bit 3: 1=Read */ # define I2C_STAT_RD (1 << 3) /* Bit 3: 1=Read */
# define I2C_STAT_10B (1 << 4) /* Bit 4: 1=10-Bit Address */ # define I2C_STAT_10B (1 << 4) /* Bit 4: 1=10-Bit Address */
# define I2C_STAT_ACK (1 << 5) /* Bit 5: 1=Acknowledge */ # define I2C_STAT_ACK (1 << 5) /* Bit 5: 1=Acknowledge */
# define I2C_STAT_RDRF (1 << 6) /* Bit 6: 1=Receive Data Register Full */ # define I2C_STAT_RDRF (1 << 6) /* Bit 6: 1=Receive Data Register Full */
# define I2C_STAT_TDRE (1 << 7) /* Bit 7: 1=Transmit Data Register Empty */ # define I2C_STAT_TDRE (1 << 7) /* Bit 7: 1=Transmit Data Register Empty */
#endif #endif
/* I2C Control Register Bit Definitions *********************************************/ /* I2C Control Register Bit Definitions *********************************************/
#define I2C_CTL_FILTEN (1 << 0) /* Bit 0: 1=I2C Signal Filter Enable */ #define I2C_CTL_FILTEN (1 << 0) /* Bit 0: 1=I2C Signal Filter Enable */
#define I2C_CTL_FLUSH (1 << 1) /* Bit 1: 1=Flush Data */ #define I2C_CTL_FLUSH (1 << 1) /* Bit 1: 1=Flush Data */
#define I2C_CTL_NAK (1 << 2) /* Bit 2: 1=Send NAK */ #define I2C_CTL_NAK (1 << 2) /* Bit 2: 1=Send NAK */
#define I2C_CTL_TXI (1 << 3) /* Bit 3: 1=Enable TDRE interrupts */ #define I2C_CTL_TXI (1 << 3) /* Bit 3: 1=Enable TDRE interrupts */
#define I2C_CTL_BIRQ (1 << 4) /* Bit 4: 1=Baud Rate Generator Interrupt Request */ #define I2C_CTL_BIRQ (1 << 4) /* Bit 4: 1=Baud Rate Generator Interrupt Request */
#define I2C_CTL_STOP (1 << 5) /* Bit 5: 1=Send Stop Condition */ #define I2C_CTL_STOP (1 << 5) /* Bit 5: 1=Send Stop Condition */
#define I2C_CTL_START (1 << 6) /* Bit 6: 1=Send Start Condition */ #define I2C_CTL_START (1 << 6) /* Bit 6: 1=Send Start Condition */
#define I2C_CTL_IEN (1 << 7) /* Bit 7: 1=I2C Enable */ #define I2C_CTL_IEN (1 << 7) /* Bit 7: 1=I2C Enable */
/* Register access macros *********************************************************** /* Register access macros ***********************************************************
* *
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